···358358359359 i2s_priv = dev_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0)->dev);360360361361- of_dma_configure(pcm->card->dev, pcm->card->dev->of_node, 1);361361+ ret = of_dma_configure(pcm->card->dev, pcm->card->dev->of_node, 1);362362+ if (ret)363363+ return ret;362364363365 ret = dma_coerce_mask_and_coherent(pcm->card->dev, DMA_BIT_MASK(32));364366 if (ret)
+1-2
sound/soc/codecs/Kconfig
···777777config SND_SOC_CROS_EC_CODEC778778 tristate "codec driver for ChromeOS EC"779779 depends on CROS_EC780780- select CRYPTO781780 select CRYPTO_LIB_SHA256782781 help783782 If you say yes here you will get support for the···917918config SND_SOC_CS35L56_CAL_SET_CTRL918919 bool "CS35L56 ALSA control to restore factory calibration"919920 default N920920- select SND_SOC_CS35L56_CAL_SYSFS_COMMON921921+ select SND_SOC_CS35L56_CAL_DEBUGFS_COMMON921922 help922923 Allow restoring factory calibration data through an ALSA923924 control. This is only needed on platforms without UEFI or
···386386 const struct nau8325_srate_attr **srate_table,387387 int *n1_sel, int *mult_sel, int *n2_sel)388388{389389- int i, j, mclk, mclk_max, ratio, ratio_sel, n2_max;389389+ int i, j, mclk, ratio;390390+ int mclk_max = 0, ratio_sel = 0, n2_max = 0;390391391392 if (!nau8325->mclk || !nau8325->fs)392393 goto proc_err;···409408 }410409411410 /* Get MCLK_SRC through 1/N, Multiplier, and then 1/N2. */412412- mclk_max = 0;413411 for (i = 0; i < ARRAY_SIZE(mclk_n1_div); i++) {414412 for (j = 0; j < ARRAY_SIZE(mclk_n3_mult); j++) {415413 mclk = nau8325->mclk << mclk_n3_mult[j].param;