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linux
dt-bindings: msm/mdp: Provide details on MDP interface ports
The MDP4/5 DT node now contains a list of ports that describe how it
connects to external encoder interfaces like DSI and HDMI. These follow
the standard of_graph bindings, and allow us to get rid of the 'connectors'
phandle that contained a list of all the external encoders connected to
MDP.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
authored by
Archit Taneja
and committed by
Rob Clark
b137bb4b
fd7ef706
+110
-6
+63
-5
Documentation/devicetree/bindings/display/msm/mdp4.txt
+63
-5
Documentation/devicetree/bindings/display/msm/mdp4.txt
···
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* "qcom,mdp4" - mdp4
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- reg: Physical base address and length of the controller's registers.
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- interrupts: The interrupt signal from the display controller.
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-
- connectors: array of phandles for output device(s)
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- clocks: device clocks
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See ../clocks/clock-bindings.txt for details.
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- clock-names: the following clocks are required.
···
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* "lut_clk"
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* "hdmi_clk"
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* "tv_clk"
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+
- ports: contains the list of output ports from MDP. These connect to interfaces
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that are external to the MDP hardware, such as HDMI, DSI, EDP etc (LVDS is a
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special case since it is a part of the MDP block itself).
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+
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Each output port contains an endpoint that describes how it is connected to an
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external interface. These are described by the standard properties documented
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here:
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Documentation/devicetree/bindings/graph.txt
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Documentation/devicetree/bindings/media/video-interfaces.txt
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+
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The output port mappings are:
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Port 0 -> LCDC/LVDS
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Port 1 -> DSI1 Cmd/Video
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Port 2 -> DSI2 Cmd/Video
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Port 3 -> DTV
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Optional properties:
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-
- gpus: phandle for gpu device
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- clock-names: the following clocks are optional:
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* "lut_clk"
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···
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/ {
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...
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-
mdp: qcom,mdp@5100000 {
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hdmi: hdmi@4a00000 {
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...
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ports {
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...
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port@0 {
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reg = <0>;
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hdmi_in: endpoint {
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remote-endpoint = <&mdp_dtv_out>;
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};
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};
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...
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};
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+
...
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};
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+
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...
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+
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mdp: mdp@5100000 {
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compatible = "qcom,mdp4";
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reg = <0x05100000 0xf0000>;
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interrupts = <GIC_SPI 75 0>;
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-
connectors = <&hdmi>;
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-
gpus = <&gpu>;
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clock-names =
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"core_clk",
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"iface_clk",
···
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<&mmcc MDP_LUT_CLK>,
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<&mmcc HDMI_TV_CLK>,
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<&mmcc MDP_TV_CLK>;
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+
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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+
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port@0 {
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reg = <0>;
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mdp_lvds_out: endpoint {
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};
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};
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+
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port@1 {
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reg = <1>;
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mdp_dsi1_out: endpoint {
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};
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};
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+
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port@2 {
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reg = <2>;
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mdp_dsi2_out: endpoint {
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};
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};
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+
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port@3 {
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reg = <3>;
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mdp_dtv_out: endpoint {
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remote-endpoint = <&hdmi_in>;
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};
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};
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};
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};
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};
+47
-1
Documentation/devicetree/bindings/display/msm/mdp5.txt
+47
-1
Documentation/devicetree/bindings/display/msm/mdp5.txt
···
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- * "iface_clk"
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- * "core_clk"
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- * "vsync_clk"
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- ports: contains the list of output ports from MDP. These connect to interfaces
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that are external to the MDP hardware, such as HDMI, DSI, EDP etc (LVDS is a
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special case since it is a part of the MDP block itself).
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+
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Each output port contains an endpoint that describes how it is connected to an
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+
external interface. These are described by the standard properties documented
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+
here:
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Documentation/devicetree/bindings/graph.txt
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Documentation/devicetree/bindings/media/video-interfaces.txt
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+
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The availability of output ports can vary across SoC revisions:
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For MSM8974 and APQ8084:
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Port 0 -> MDP_INTF0 (eDP)
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Port 1 -> MDP_INTF1 (DSI1)
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Port 2 -> MDP_INTF2 (DSI2)
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Port 3 -> MDP_INTF3 (HDMI)
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+
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For MSM8916:
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Port 0 -> MDP_INTF1 (DSI1)
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+
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For MSM8994 and MSM8996:
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Port 0 -> MDP_INTF1 (DSI1)
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Port 1 -> MDP_INTF2 (DSI2)
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Port 2 -> MDP_INTF3 (HDMI)
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Optional properties:
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- clock-names: the following clocks are optional:
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* "lut_clk"
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-
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Example:
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···
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"core_clk",
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"vsync_clk";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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+
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port@0 {
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reg = <0>;
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mdp5_intf1_out: endpoint {
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remote-endpoint = <&dsi0_in>;
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};
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};
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};
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};
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dsi0: dsi@1a98000 {
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...
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ports {
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...
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port@0 {
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reg = <0>;
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dsi0_in: endpoint {
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remote-endpoint = <&mdp5_intf1_out>;
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};
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};
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...
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};
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...
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};
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