Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (72 commits)
sh: SuperH Mobile CEU and camera platform data for AP325RXA
sh: Update smc911x platform data for AP325RXA
sh: SuperH Mobile LCDC platform data for AP325RXA
sh: Add SuperH Mobile CEU platform data for Migo-R
sh: Add SuperH Mobile LCDC platform data for Migo-R
sh: Move asid_cache() out of ifdef to fix SH-3/4 nommu build.
sh: Workaround for __put_user_asm() bug with gcc 4.x on big-endian.
sh: Wire up new syscalls.
sh: fix uImage Entry Point
sh_keysc: remove request_mem_region() and release_mem_region()
sh: Don't miss pending signals returning to user mode after signal processing
sh: Use clk_always_enable() on sh7366
sh: Use clk_always_enable() on sh7343 / SE77343
sh: Use clk_always_enable() on sh7722 / Migo-R / SE7722
sh: Use clk_always_enable() on sh7723 / ap325rxa
sh: Introduce clk_always_enable() function
sh: Show all clocks and their state in /proc/clocks
sh: Merge sh7343 and sh7722 clock code
sh: Add SuperH Mobile MSTPCR bits to clock framework
sh: Use arch_flags to simplify sh7722 siu clock code
...

+7941 -2043
+34
arch/sh/Kconfig
··· 477 477 Select RTS7751R2D if configuring for a Renesas Technology 478 478 Sales SH-Graphics board. 479 479 480 + config SH_RSK7203 481 + bool "RSK7203" 482 + depends on CPU_SUBTYPE_SH7203 483 + 480 484 config SH_SDK7780 481 485 bool "SDK7780R3" 482 486 depends on CPU_SUBTYPE_SH7780 ··· 495 491 select SYS_SUPPORTS_PCI 496 492 select IO_TRAPPED 497 493 494 + config SH_SH7785LCR 495 + bool "SH7785LCR" 496 + depends on CPU_SUBTYPE_SH7785 497 + select SYS_SUPPORTS_PCI 498 + select IO_TRAPPED 499 + 500 + config SH_SH7785LCR_29BIT_PHYSMAPS 501 + bool "SH7785LCR 29bit physmaps" 502 + depends on SH_SH7785LCR 503 + default y 504 + help 505 + This board has 2 physical memory maps. It can be changed with 506 + DIP switch(S2-5). If you set the DIP switch for S2-5 = ON, 507 + you can access all on-board device in 29bit address mode. 508 + 498 509 config SH_MIGOR 499 510 bool "Migo-R" 500 511 depends on CPU_SUBTYPE_SH7722 501 512 help 502 513 Select Migo-R if configuring for the SH7722 Migo-R platform 503 514 by Renesas System Solutions Asia Pte. Ltd. 515 + 516 + config SH_AP325RXA 517 + bool "AP-325RXA" 518 + depends on CPU_SUBTYPE_SH7723 519 + help 520 + Renesas "AP-325RXA" support. 521 + Compatible with ALGO SYSTEM CO.,LTD. "AP-320A" 522 + 523 + config SH_SH7763RDP 524 + bool "SH7763RDP" 525 + depends on CPU_SUBTYPE_SH7763 526 + help 527 + Select SH7763RDP if configuring for a Renesas SH7763 528 + evaluation board. 504 529 505 530 config SH_EDOSK7705 506 531 bool "EDOSK7705" ··· 592 559 source "arch/sh/boards/renesas/rts7751r2d/Kconfig" 593 560 source "arch/sh/boards/renesas/r7780rp/Kconfig" 594 561 source "arch/sh/boards/renesas/sdk7780/Kconfig" 562 + source "arch/sh/boards/renesas/migor/Kconfig" 595 563 source "arch/sh/boards/magicpanelr2/Kconfig" 596 564 597 565 menu "Timer and clock configuration"
+2 -1
arch/sh/Kconfig.debug
··· 36 36 default "0xff804000" if CPU_SUBTYPE_MXG 37 37 default "0xffc30000" if CPU_SUBTYPE_SHX3 38 38 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763 || \ 39 - CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 39 + CPU_SUBTYPE_SH7722 || CPU_SUBTYPE_SH7366 || \ 40 + CPU_SUBTYPE_SH7343 40 41 default "0xffe80000" if CPU_SH4 41 42 default "0xffea0000" if CPU_SUBTYPE_SH7785 42 43 default "0xfffe8000" if CPU_SUBTYPE_SH7203
+4
arch/sh/Makefile
··· 121 121 machdir-$(CONFIG_SH_MIGOR) += renesas/migor 122 122 machdir-$(CONFIG_SH_SDK7780) += renesas/sdk7780 123 123 machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto 124 + machdir-$(CONFIG_SH_RSK7203) += renesas/rsk7203 125 + machdir-$(CONFIG_SH_AP325RXA) += renesas/ap325rxa 126 + machdir-$(CONFIG_SH_SH7763RDP) += renesas/sh7763rdp 127 + machdir-$(CONFIG_SH_SH7785LCR) += renesas/sh7785lcr 124 128 machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev 125 129 machdir-$(CONFIG_SH_LANDISK) += landisk 126 130 machdir-$(CONFIG_SH_TITAN) += titan
+2 -2
arch/sh/boards/dreamcast/rtc.c
··· 30 30 * 31 31 * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch. 32 32 */ 33 - void aica_rtc_gettimeofday(struct timespec *ts) 33 + static void aica_rtc_gettimeofday(struct timespec *ts) 34 34 { 35 35 unsigned long val1, val2; 36 36 ··· 54 54 * 55 55 * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter. 56 56 */ 57 - int aica_rtc_settimeofday(const time_t secs) 57 + static int aica_rtc_settimeofday(const time_t secs) 58 58 { 59 59 unsigned long val1, val2; 60 60 unsigned long adj = secs + TWENTY_YEARS;
+1
arch/sh/boards/renesas/ap325rxa/Makefile
··· 1 + obj-y := setup.o
+313
arch/sh/boards/renesas/ap325rxa/setup.c
··· 1 + /* 2 + * Renesas - AP-325RXA 3 + * (Compatible with Algo System ., LTD. - AP-320A) 4 + * 5 + * Copyright (C) 2008 Renesas Solutions Corp. 6 + * Author : Yusuke Goda <goda.yuske@renesas.com> 7 + * 8 + * This file is subject to the terms and conditions of the GNU General Public 9 + * License. See the file "COPYING" in the main directory of this archive 10 + * for more details. 11 + */ 12 + 13 + #include <linux/init.h> 14 + #include <linux/device.h> 15 + #include <linux/interrupt.h> 16 + #include <linux/platform_device.h> 17 + #include <linux/mtd/physmap.h> 18 + #include <linux/delay.h> 19 + #include <linux/i2c.h> 20 + #include <linux/delay.h> 21 + #include <linux/smc911x.h> 22 + #include <media/soc_camera_platform.h> 23 + #include <media/sh_mobile_ceu.h> 24 + #include <asm/sh_mobile_lcdc.h> 25 + #include <asm/io.h> 26 + #include <asm/clock.h> 27 + 28 + static struct smc911x_platdata smc911x_info = { 29 + .flags = SMC911X_USE_32BIT, 30 + .irq_flags = IRQF_TRIGGER_LOW, 31 + }; 32 + 33 + static struct resource smc9118_resources[] = { 34 + [0] = { 35 + .start = 0xb6080000, 36 + .end = 0xb60fffff, 37 + .flags = IORESOURCE_MEM, 38 + }, 39 + [1] = { 40 + .start = 35, 41 + .end = 35, 42 + .flags = IORESOURCE_IRQ, 43 + } 44 + }; 45 + 46 + static struct platform_device smc9118_device = { 47 + .name = "smc911x", 48 + .id = -1, 49 + .num_resources = ARRAY_SIZE(smc9118_resources), 50 + .resource = smc9118_resources, 51 + .dev = { 52 + .platform_data = &smc911x_info, 53 + }, 54 + }; 55 + 56 + static struct mtd_partition ap325rxa_nor_flash_partitions[] = { 57 + { 58 + .name = "uboot", 59 + .offset = 0, 60 + .size = (1 * 1024 * 1024), 61 + .mask_flags = MTD_WRITEABLE, /* Read-only */ 62 + }, { 63 + .name = "kernel", 64 + .offset = MTDPART_OFS_APPEND, 65 + .size = (2 * 1024 * 1024), 66 + }, { 67 + .name = "other", 68 + .offset = MTDPART_OFS_APPEND, 69 + .size = MTDPART_SIZ_FULL, 70 + }, 71 + }; 72 + 73 + static struct physmap_flash_data ap325rxa_nor_flash_data = { 74 + .width = 2, 75 + .parts = ap325rxa_nor_flash_partitions, 76 + .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions), 77 + }; 78 + 79 + static struct resource ap325rxa_nor_flash_resources[] = { 80 + [0] = { 81 + .name = "NOR Flash", 82 + .start = 0x00000000, 83 + .end = 0x00ffffff, 84 + .flags = IORESOURCE_MEM, 85 + } 86 + }; 87 + 88 + static struct platform_device ap325rxa_nor_flash_device = { 89 + .name = "physmap-flash", 90 + .resource = ap325rxa_nor_flash_resources, 91 + .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources), 92 + .dev = { 93 + .platform_data = &ap325rxa_nor_flash_data, 94 + }, 95 + }; 96 + 97 + #define FPGA_LCDREG 0xB4100180 98 + #define FPGA_BKLREG 0xB4100212 99 + #define FPGA_LCDREG_VAL 0x0018 100 + #define PORT_PHCR 0xA405010E 101 + #define PORT_PLCR 0xA4050114 102 + #define PORT_PMCR 0xA4050116 103 + #define PORT_PRCR 0xA405011C 104 + #define PORT_PSCR 0xA405011E 105 + #define PORT_PZCR 0xA405014C 106 + #define PORT_HIZCRA 0xA4050158 107 + #define PORT_MSELCRB 0xA4050182 108 + #define PORT_PSDR 0xA405013E 109 + #define PORT_PZDR 0xA405016C 110 + #define PORT_PSELD 0xA4050154 111 + 112 + static void ap320_wvga_power_on(void *board_data) 113 + { 114 + msleep(100); 115 + 116 + /* ASD AP-320/325 LCD ON */ 117 + ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG); 118 + 119 + /* backlight */ 120 + ctrl_outw((ctrl_inw(PORT_PSCR) & ~0x00C0) | 0x40, PORT_PSCR); 121 + ctrl_outb(ctrl_inb(PORT_PSDR) & ~0x08, PORT_PSDR); 122 + ctrl_outw(0x100, FPGA_BKLREG); 123 + } 124 + 125 + static struct sh_mobile_lcdc_info lcdc_info = { 126 + .clock_source = LCDC_CLK_EXTERNAL, 127 + .ch[0] = { 128 + .chan = LCDC_CHAN_MAINLCD, 129 + .bpp = 16, 130 + .interface_type = RGB18, 131 + .clock_divider = 1, 132 + .lcd_cfg = { 133 + .name = "LB070WV1", 134 + .xres = 800, 135 + .yres = 480, 136 + .left_margin = 40, 137 + .right_margin = 160, 138 + .hsync_len = 8, 139 + .upper_margin = 63, 140 + .lower_margin = 80, 141 + .vsync_len = 1, 142 + .sync = 0, /* hsync and vsync are active low */ 143 + }, 144 + .board_cfg = { 145 + .display_on = ap320_wvga_power_on, 146 + }, 147 + } 148 + }; 149 + 150 + static struct resource lcdc_resources[] = { 151 + [0] = { 152 + .name = "LCDC", 153 + .start = 0xfe940000, /* P4-only space */ 154 + .end = 0xfe941fff, 155 + .flags = IORESOURCE_MEM, 156 + }, 157 + }; 158 + 159 + static struct platform_device lcdc_device = { 160 + .name = "sh_mobile_lcdc_fb", 161 + .num_resources = ARRAY_SIZE(lcdc_resources), 162 + .resource = lcdc_resources, 163 + .dev = { 164 + .platform_data = &lcdc_info, 165 + }, 166 + }; 167 + 168 + static unsigned char camera_ncm03j_magic[] = 169 + { 170 + 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8, 171 + 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36, 172 + 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F, 173 + 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55, 174 + 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12, 175 + 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0, 176 + 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F, 177 + 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A, 178 + 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A, 179 + 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A, 180 + 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56, 181 + 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37, 182 + 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A, 183 + 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56, 184 + 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC, 185 + 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F, 186 + }; 187 + 188 + static int camera_set_capture(struct soc_camera_platform_info *info, 189 + int enable) 190 + { 191 + struct i2c_adapter *a = i2c_get_adapter(0); 192 + struct i2c_msg msg; 193 + int ret = 0; 194 + int i; 195 + 196 + if (!enable) 197 + return 0; /* no disable for now */ 198 + 199 + for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) { 200 + u_int8_t buf[8]; 201 + 202 + msg.addr = 0x6e; 203 + msg.buf = buf; 204 + msg.len = 2; 205 + msg.flags = 0; 206 + 207 + buf[0] = camera_ncm03j_magic[i]; 208 + buf[1] = camera_ncm03j_magic[i + 1]; 209 + 210 + ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1); 211 + } 212 + 213 + return ret; 214 + } 215 + 216 + static struct soc_camera_platform_info camera_info = { 217 + .iface = 0, 218 + .format_name = "UYVY", 219 + .format_depth = 16, 220 + .format = { 221 + .pixelformat = V4L2_PIX_FMT_UYVY, 222 + .colorspace = V4L2_COLORSPACE_SMPTE170M, 223 + .width = 640, 224 + .height = 480, 225 + }, 226 + .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | 227 + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, 228 + .set_capture = camera_set_capture, 229 + }; 230 + 231 + static struct platform_device camera_device = { 232 + .name = "soc_camera_platform", 233 + .dev = { 234 + .platform_data = &camera_info, 235 + }, 236 + }; 237 + 238 + static struct sh_mobile_ceu_info sh_mobile_ceu_info = { 239 + .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | 240 + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, 241 + }; 242 + 243 + static struct resource ceu_resources[] = { 244 + [0] = { 245 + .name = "CEU", 246 + .start = 0xfe910000, 247 + .end = 0xfe91009f, 248 + .flags = IORESOURCE_MEM, 249 + }, 250 + [1] = { 251 + .start = 52, 252 + .flags = IORESOURCE_IRQ, 253 + }, 254 + [2] = { 255 + /* place holder for contiguous memory */ 256 + }, 257 + }; 258 + 259 + static struct platform_device ceu_device = { 260 + .name = "sh_mobile_ceu", 261 + .num_resources = ARRAY_SIZE(ceu_resources), 262 + .resource = ceu_resources, 263 + .dev = { 264 + .platform_data = &sh_mobile_ceu_info, 265 + }, 266 + }; 267 + 268 + static struct platform_device *ap325rxa_devices[] __initdata = { 269 + &smc9118_device, 270 + &ap325rxa_nor_flash_device, 271 + &lcdc_device, 272 + &ceu_device, 273 + &camera_device, 274 + }; 275 + 276 + static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = { 277 + }; 278 + 279 + static int __init ap325rxa_devices_setup(void) 280 + { 281 + clk_always_enable("mstp200"); /* LCDC */ 282 + clk_always_enable("mstp203"); /* CEU */ 283 + 284 + platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20); 285 + 286 + i2c_register_board_info(0, ap325rxa_i2c_devices, 287 + ARRAY_SIZE(ap325rxa_i2c_devices)); 288 + 289 + return platform_add_devices(ap325rxa_devices, 290 + ARRAY_SIZE(ap325rxa_devices)); 291 + } 292 + device_initcall(ap325rxa_devices_setup); 293 + 294 + static void __init ap325rxa_setup(char **cmdline_p) 295 + { 296 + /* LCDC configuration */ 297 + ctrl_outw(ctrl_inw(PORT_PHCR) & ~0xffff, PORT_PHCR); 298 + ctrl_outw(ctrl_inw(PORT_PLCR) & ~0xffff, PORT_PLCR); 299 + ctrl_outw(ctrl_inw(PORT_PMCR) & ~0xffff, PORT_PMCR); 300 + ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x03ff, PORT_PRCR); 301 + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01C0, PORT_HIZCRA); 302 + 303 + /* CEU */ 304 + ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); 305 + ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x0003, PORT_PSELD); 306 + ctrl_outw((ctrl_inw(PORT_PZCR) & ~0xff00) | 0x5500, PORT_PZCR); 307 + ctrl_outb((ctrl_inb(PORT_PZDR) & ~0xf0) | 0x20, PORT_PZDR); 308 + } 309 + 310 + static struct sh_machine_vector mv_ap325rxa __initmv = { 311 + .mv_name = "AP-325RXA", 312 + .mv_setup = ap325rxa_setup, 313 + };
+15
arch/sh/boards/renesas/migor/Kconfig
··· 1 + if SH_MIGOR 2 + 3 + choice 4 + prompt "Migo-R LCD Panel Board Selection" 5 + default SH_MIGOR_QVGA 6 + 7 + config SH_MIGOR_QVGA 8 + bool "QVGA (320x240)" 9 + 10 + config SH_MIGOR_RTA_WVGA 11 + bool "RTA WVGA (800x480)" 12 + 13 + endchoice 14 + 15 + endif
+1
arch/sh/boards/renesas/migor/Makefile
··· 1 1 obj-y := setup.o 2 + obj-$(CONFIG_SH_MIGOR_QVGA) += lcd_qvga.o
+165
arch/sh/boards/renesas/migor/lcd_qvga.c
··· 1 + /* 2 + * Support for SuperH MigoR Quarter VGA LCD Panel 3 + * 4 + * Copyright (C) 2008 Magnus Damm 5 + * 6 + * Based on lcd_powertip.c from Kenati Technologies Pvt Ltd. 7 + * Copyright (c) 2007 Ujjwal Pande <ujjwal@kenati.com>, 8 + * 9 + * This program is free software; you can redistribute it and/or modify 10 + * it under the terms of the GNU General Public License version 2 as 11 + * published by the Free Software Foundation. 12 + */ 13 + 14 + #include <linux/delay.h> 15 + #include <linux/err.h> 16 + #include <linux/fb.h> 17 + #include <linux/init.h> 18 + #include <linux/kernel.h> 19 + #include <linux/module.h> 20 + #include <asm/sh_mobile_lcdc.h> 21 + #include <asm/migor.h> 22 + 23 + /* LCD Module is a PH240320T according to board schematics. This module 24 + * is made up of a 240x320 LCD hooked up to a R61505U (or HX8347-A01?) 25 + * Driver IC. This IC is connected to the SH7722 built-in LCDC using a 26 + * SYS-80 interface configured in 16 bit mode. 27 + * 28 + * Index 0: "Device Code Read" returns 0x1505. 29 + */ 30 + 31 + static void reset_lcd_module(void) 32 + { 33 + ctrl_outb(ctrl_inb(PORT_PHDR) & ~0x04, PORT_PHDR); 34 + mdelay(2); 35 + ctrl_outb(ctrl_inb(PORT_PHDR) | 0x04, PORT_PHDR); 36 + mdelay(1); 37 + } 38 + 39 + /* DB0-DB7 are connected to D1-D8, and DB8-DB15 to D10-D17 */ 40 + 41 + static unsigned long adjust_reg18(unsigned short data) 42 + { 43 + unsigned long tmp1, tmp2; 44 + 45 + tmp1 = (data<<1 | 0x00000001) & 0x000001FF; 46 + tmp2 = (data<<2 | 0x00000200) & 0x0003FE00; 47 + return tmp1 | tmp2; 48 + } 49 + 50 + static void write_reg(void *sys_ops_handle, 51 + struct sh_mobile_lcdc_sys_bus_ops *sys_ops, 52 + unsigned short reg, unsigned short data) 53 + { 54 + sys_ops->write_index(sys_ops_handle, adjust_reg18(reg << 8 | data)); 55 + } 56 + 57 + static void write_reg16(void *sys_ops_handle, 58 + struct sh_mobile_lcdc_sys_bus_ops *sys_ops, 59 + unsigned short reg, unsigned short data) 60 + { 61 + sys_ops->write_index(sys_ops_handle, adjust_reg18(reg)); 62 + sys_ops->write_data(sys_ops_handle, adjust_reg18(data)); 63 + } 64 + 65 + static unsigned long read_reg16(void *sys_ops_handle, 66 + struct sh_mobile_lcdc_sys_bus_ops *sys_ops, 67 + unsigned short reg) 68 + { 69 + unsigned long data; 70 + 71 + sys_ops->write_index(sys_ops_handle, adjust_reg18(reg)); 72 + data = sys_ops->read_data(sys_ops_handle); 73 + return ((data >> 1) & 0xff) | ((data >> 2) & 0xff00); 74 + } 75 + 76 + static void migor_lcd_qvga_seq(void *sys_ops_handle, 77 + struct sh_mobile_lcdc_sys_bus_ops *sys_ops, 78 + unsigned short const *data, int no_data) 79 + { 80 + int i; 81 + 82 + for (i = 0; i < no_data; i += 2) 83 + write_reg16(sys_ops_handle, sys_ops, data[i], data[i + 1]); 84 + } 85 + 86 + static const unsigned short sync_data[] = { 87 + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 88 + }; 89 + 90 + static const unsigned short magic0_data[] = { 91 + 0x0060, 0x2700, 0x0008, 0x0808, 0x0090, 0x001A, 0x0007, 0x0001, 92 + 0x0017, 0x0001, 0x0019, 0x0000, 0x0010, 0x17B0, 0x0011, 0x0116, 93 + 0x0012, 0x0198, 0x0013, 0x1400, 0x0029, 0x000C, 0x0012, 0x01B8, 94 + }; 95 + 96 + static const unsigned short magic1_data[] = { 97 + 0x0030, 0x0307, 0x0031, 0x0303, 0x0032, 0x0603, 0x0033, 0x0202, 98 + 0x0034, 0x0202, 0x0035, 0x0202, 0x0036, 0x1F1F, 0x0037, 0x0303, 99 + 0x0038, 0x0303, 0x0039, 0x0603, 0x003A, 0x0202, 0x003B, 0x0102, 100 + 0x003C, 0x0204, 0x003D, 0x0000, 0x0001, 0x0100, 0x0002, 0x0300, 101 + 0x0003, 0x5028, 0x0020, 0x00ef, 0x0021, 0x0000, 0x0004, 0x0000, 102 + 0x0009, 0x0000, 0x000A, 0x0008, 0x000C, 0x0000, 0x000D, 0x0000, 103 + 0x0015, 0x8000, 104 + }; 105 + 106 + static const unsigned short magic2_data[] = { 107 + 0x0061, 0x0001, 0x0092, 0x0100, 0x0093, 0x0001, 0x0007, 0x0021, 108 + }; 109 + 110 + static const unsigned short magic3_data[] = { 111 + 0x0010, 0x16B0, 0x0011, 0x0111, 0x0007, 0x0061, 112 + }; 113 + 114 + int migor_lcd_qvga_setup(void *board_data, void *sohandle, 115 + struct sh_mobile_lcdc_sys_bus_ops *so) 116 + { 117 + unsigned long xres = 320; 118 + unsigned long yres = 240; 119 + int k; 120 + 121 + reset_lcd_module(); 122 + migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data)); 123 + 124 + if (read_reg16(sohandle, so, 0) != 0x1505) 125 + return -ENODEV; 126 + 127 + pr_info("Migo-R QVGA LCD Module detected.\n"); 128 + 129 + migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data)); 130 + write_reg16(sohandle, so, 0x00A4, 0x0001); 131 + mdelay(10); 132 + 133 + migor_lcd_qvga_seq(sohandle, so, magic0_data, ARRAY_SIZE(magic0_data)); 134 + mdelay(100); 135 + 136 + migor_lcd_qvga_seq(sohandle, so, magic1_data, ARRAY_SIZE(magic1_data)); 137 + write_reg16(sohandle, so, 0x0050, 0xef - (yres - 1)); 138 + write_reg16(sohandle, so, 0x0051, 0x00ef); 139 + write_reg16(sohandle, so, 0x0052, 0x0000); 140 + write_reg16(sohandle, so, 0x0053, xres - 1); 141 + 142 + migor_lcd_qvga_seq(sohandle, so, magic2_data, ARRAY_SIZE(magic2_data)); 143 + mdelay(10); 144 + 145 + migor_lcd_qvga_seq(sohandle, so, magic3_data, ARRAY_SIZE(magic3_data)); 146 + mdelay(40); 147 + 148 + /* clear GRAM to avoid displaying garbage */ 149 + 150 + write_reg16(sohandle, so, 0x0020, 0x0000); /* horiz addr */ 151 + write_reg16(sohandle, so, 0x0021, 0x0000); /* vert addr */ 152 + 153 + for (k = 0; k < (xres * 256); k++) /* yes, 256 words per line */ 154 + write_reg16(sohandle, so, 0x0022, 0x0000); 155 + 156 + write_reg16(sohandle, so, 0x0020, 0x0000); /* reset horiz addr */ 157 + write_reg16(sohandle, so, 0x0021, 0x0000); /* reset vert addr */ 158 + write_reg16(sohandle, so, 0x0007, 0x0173); 159 + mdelay(40); 160 + 161 + /* enable display */ 162 + write_reg(sohandle, so, 0x00, 0x22); 163 + mdelay(100); 164 + return 0; 165 + }
+271 -5
arch/sh/boards/renesas/migor/setup.c
··· 15 15 #include <linux/mtd/nand.h> 16 16 #include <linux/i2c.h> 17 17 #include <linux/smc91x.h> 18 + #include <linux/delay.h> 19 + #include <linux/clk.h> 20 + #include <media/soc_camera_platform.h> 21 + #include <media/sh_mobile_ceu.h> 22 + #include <asm/clock.h> 18 23 #include <asm/machvec.h> 19 24 #include <asm/io.h> 20 25 #include <asm/sh_keysc.h> 26 + #include <asm/sh_mobile_lcdc.h> 21 27 #include <asm/migor.h> 22 28 23 29 /* Address IRQ Size Bus Description ··· 204 198 } 205 199 }; 206 200 201 + static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = { 202 + #ifdef CONFIG_SH_MIGOR_RTA_WVGA 203 + .clock_source = LCDC_CLK_BUS, 204 + .ch[0] = { 205 + .chan = LCDC_CHAN_MAINLCD, 206 + .bpp = 16, 207 + .interface_type = RGB16, 208 + .clock_divider = 2, 209 + .lcd_cfg = { 210 + .name = "LB070WV1", 211 + .xres = 800, 212 + .yres = 480, 213 + .left_margin = 64, 214 + .right_margin = 16, 215 + .hsync_len = 120, 216 + .upper_margin = 1, 217 + .lower_margin = 17, 218 + .vsync_len = 2, 219 + .sync = 0, 220 + }, 221 + } 222 + #endif 223 + #ifdef CONFIG_SH_MIGOR_QVGA 224 + .clock_source = LCDC_CLK_PERIPHERAL, 225 + .ch[0] = { 226 + .chan = LCDC_CHAN_MAINLCD, 227 + .bpp = 16, 228 + .interface_type = SYS16A, 229 + .clock_divider = 10, 230 + .lcd_cfg = { 231 + .name = "PH240320T", 232 + .xres = 320, 233 + .yres = 240, 234 + .left_margin = 0, 235 + .right_margin = 16, 236 + .hsync_len = 8, 237 + .upper_margin = 1, 238 + .lower_margin = 17, 239 + .vsync_len = 2, 240 + .sync = FB_SYNC_HOR_HIGH_ACT, 241 + }, 242 + .board_cfg = { 243 + .setup_sys = migor_lcd_qvga_setup, 244 + }, 245 + .sys_bus_cfg = { 246 + .ldmt2r = 0x06000a09, 247 + .ldmt3r = 0x180e3418, 248 + }, 249 + } 250 + #endif 251 + }; 252 + 253 + static struct resource migor_lcdc_resources[] = { 254 + [0] = { 255 + .name = "LCDC", 256 + .start = 0xfe940000, /* P4-only space */ 257 + .end = 0xfe941fff, 258 + .flags = IORESOURCE_MEM, 259 + }, 260 + }; 261 + 262 + static struct platform_device migor_lcdc_device = { 263 + .name = "sh_mobile_lcdc_fb", 264 + .num_resources = ARRAY_SIZE(migor_lcdc_resources), 265 + .resource = migor_lcdc_resources, 266 + .dev = { 267 + .platform_data = &sh_mobile_lcdc_info, 268 + }, 269 + }; 270 + 271 + static struct clk *camera_clk; 272 + 273 + static void camera_power_on(void) 274 + { 275 + unsigned char value; 276 + 277 + camera_clk = clk_get(NULL, "video_clk"); 278 + clk_set_rate(camera_clk, 24000000); 279 + clk_enable(camera_clk); /* start VIO_CKO */ 280 + 281 + mdelay(10); 282 + value = ctrl_inb(PORT_PTDR); 283 + value &= ~0x09; 284 + #ifndef CONFIG_SH_MIGOR_RTA_WVGA 285 + value |= 0x01; 286 + #endif 287 + ctrl_outb(value, PORT_PTDR); 288 + mdelay(10); 289 + 290 + ctrl_outb(value | 8, PORT_PTDR); 291 + } 292 + 293 + static void camera_power_off(void) 294 + { 295 + clk_disable(camera_clk); /* stop VIO_CKO */ 296 + clk_put(camera_clk); 297 + 298 + ctrl_outb(ctrl_inb(PORT_PTDR) & ~0x08, PORT_PTDR); 299 + } 300 + 301 + static unsigned char camera_ov772x_magic[] = 302 + { 303 + 0x09, 0x01, 0x0c, 0x10, 0x0d, 0x41, 0x0e, 0x01, 304 + 0x12, 0x00, 0x13, 0x8F, 0x14, 0x4A, 0x15, 0x00, 305 + 0x16, 0x00, 0x17, 0x23, 0x18, 0xa0, 0x19, 0x07, 306 + 0x1a, 0xf0, 0x1b, 0x40, 0x1f, 0x00, 0x20, 0x10, 307 + 0x22, 0xff, 0x23, 0x01, 0x28, 0x00, 0x29, 0xa0, 308 + 0x2a, 0x00, 0x2b, 0x00, 0x2c, 0xf0, 0x2d, 0x00, 309 + 0x2e, 0x00, 0x30, 0x80, 0x31, 0x60, 0x32, 0x00, 310 + 0x33, 0x00, 0x34, 0x00, 0x3d, 0x80, 0x3e, 0xe2, 311 + 0x3f, 0x1f, 0x42, 0x80, 0x43, 0x80, 0x44, 0x80, 312 + 0x45, 0x80, 0x46, 0x00, 0x47, 0x00, 0x48, 0x00, 313 + 0x49, 0x50, 0x4a, 0x30, 0x4b, 0x50, 0x4c, 0x50, 314 + 0x4d, 0x00, 0x4e, 0xef, 0x4f, 0x10, 0x50, 0x60, 315 + 0x51, 0x00, 0x52, 0x00, 0x53, 0x24, 0x54, 0x7a, 316 + 0x55, 0xfc, 0x62, 0xff, 0x63, 0xf0, 0x64, 0x1f, 317 + 0x65, 0x00, 0x66, 0x10, 0x67, 0x00, 0x68, 0x00, 318 + 0x69, 0x5c, 0x6a, 0x11, 0x6b, 0xa2, 0x6c, 0x01, 319 + 0x6d, 0x50, 0x6e, 0x80, 0x6f, 0x80, 0x70, 0x0f, 320 + 0x71, 0x00, 0x72, 0x00, 0x73, 0x0f, 0x74, 0x0f, 321 + 0x75, 0xff, 0x78, 0x10, 0x79, 0x70, 0x7a, 0x70, 322 + 0x7b, 0xf0, 0x7c, 0xf0, 0x7d, 0xf0, 0x7e, 0x0e, 323 + 0x7f, 0x1a, 0x80, 0x31, 0x81, 0x5a, 0x82, 0x69, 324 + 0x83, 0x75, 0x84, 0x7e, 0x85, 0x88, 0x86, 0x8f, 325 + 0x87, 0x96, 0x88, 0xa3, 0x89, 0xaf, 0x8a, 0xc4, 326 + 0x8b, 0xd7, 0x8c, 0xe8, 0x8d, 0x20, 0x8e, 0x00, 327 + 0x8f, 0x00, 0x90, 0x08, 0x91, 0x10, 0x92, 0x1f, 328 + 0x93, 0x01, 0x94, 0x2c, 0x95, 0x24, 0x96, 0x08, 329 + 0x97, 0x14, 0x98, 0x24, 0x99, 0x38, 0x9a, 0x9e, 330 + 0x9b, 0x00, 0x9c, 0x40, 0x9e, 0x11, 0x9f, 0x02, 331 + 0xa0, 0x00, 0xa1, 0x40, 0xa2, 0x40, 0xa3, 0x06, 332 + 0xa4, 0x00, 0xa6, 0x00, 0xa7, 0x40, 0xa8, 0x40, 333 + 0xa9, 0x80, 0xaa, 0x80, 0xab, 0x06, 0xac, 0xff, 334 + 0x12, 0x06, 0x64, 0x3f, 0x12, 0x46, 0x17, 0x3f, 335 + 0x18, 0x50, 0x19, 0x03, 0x1a, 0x78, 0x29, 0x50, 336 + 0x2c, 0x78, 337 + }; 338 + 339 + static int ov772x_set_capture(struct soc_camera_platform_info *info, 340 + int enable) 341 + { 342 + struct i2c_adapter *a = i2c_get_adapter(0); 343 + struct i2c_msg msg; 344 + int ret = 0; 345 + int i; 346 + 347 + if (!enable) 348 + return 0; /* camera_power_off() is enough */ 349 + 350 + for (i = 0; i < ARRAY_SIZE(camera_ov772x_magic); i += 2) { 351 + u_int8_t buf[8]; 352 + 353 + msg.addr = 0x21; 354 + msg.buf = buf; 355 + msg.len = 2; 356 + msg.flags = 0; 357 + 358 + buf[0] = camera_ov772x_magic[i]; 359 + buf[1] = camera_ov772x_magic[i + 1]; 360 + 361 + ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1); 362 + } 363 + 364 + return ret; 365 + } 366 + 367 + static struct soc_camera_platform_info ov772x_info = { 368 + .iface = 0, 369 + .format_name = "RGB565", 370 + .format_depth = 16, 371 + .format = { 372 + .pixelformat = V4L2_PIX_FMT_RGB565, 373 + .colorspace = V4L2_COLORSPACE_SRGB, 374 + .width = 320, 375 + .height = 240, 376 + }, 377 + .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH | 378 + SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8, 379 + .set_capture = ov772x_set_capture, 380 + }; 381 + 382 + static struct platform_device migor_camera_device = { 383 + .name = "soc_camera_platform", 384 + .dev = { 385 + .platform_data = &ov772x_info, 386 + }, 387 + }; 388 + 389 + static struct sh_mobile_ceu_info sh_mobile_ceu_info = { 390 + .flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \ 391 + | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH, 392 + .enable_camera = camera_power_on, 393 + .disable_camera = camera_power_off, 394 + }; 395 + 396 + static struct resource migor_ceu_resources[] = { 397 + [0] = { 398 + .name = "CEU", 399 + .start = 0xfe910000, 400 + .end = 0xfe91009f, 401 + .flags = IORESOURCE_MEM, 402 + }, 403 + [1] = { 404 + .start = 52, 405 + .flags = IORESOURCE_IRQ, 406 + }, 407 + [2] = { 408 + /* place holder for contiguous memory */ 409 + }, 410 + }; 411 + 412 + static struct platform_device migor_ceu_device = { 413 + .name = "sh_mobile_ceu", 414 + .num_resources = ARRAY_SIZE(migor_ceu_resources), 415 + .resource = migor_ceu_resources, 416 + .dev = { 417 + .platform_data = &sh_mobile_ceu_info, 418 + }, 419 + }; 420 + 207 421 static struct platform_device *migor_devices[] __initdata = { 208 422 &smc91x_eth_device, 209 423 &sh_keysc_device, 424 + &migor_lcdc_device, 425 + &migor_ceu_device, 426 + &migor_camera_device, 210 427 &migor_nor_flash_device, 211 428 &migor_nand_flash_device, 212 429 }; 213 430 214 - static struct i2c_board_info __initdata migor_i2c_devices[] = { 431 + static struct i2c_board_info migor_i2c_devices[] = { 215 432 { 216 433 I2C_BOARD_INFO("rs5c372b", 0x32), 217 434 }, ··· 446 217 447 218 static int __init migor_devices_setup(void) 448 219 { 220 + clk_always_enable("mstp214"); /* KEYSC */ 221 + clk_always_enable("mstp200"); /* LCDC */ 222 + clk_always_enable("mstp203"); /* CEU */ 223 + 224 + platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20); 225 + 449 226 i2c_register_board_info(0, migor_i2c_devices, 450 227 ARRAY_SIZE(migor_i2c_devices)); 451 228 ··· 470 235 ctrl_outw(ctrl_inw(PORT_PSELA) & ~0x4100, PORT_PSELA); 471 236 ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); 472 237 ctrl_outw(ctrl_inw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); 473 - ctrl_outl(ctrl_inl(MSTPCR2) & ~0x00004000, MSTPCR2); 474 238 475 239 /* NAND Flash */ 476 240 ctrl_outw(ctrl_inw(PORT_PXCR) & 0x0fff, PORT_PXCR); 477 241 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x00000600) | 0x00000200, 478 242 BSC_CS6ABCR); 479 243 480 - /* I2C */ 481 - ctrl_outl(ctrl_inl(MSTPCR1) & ~0x00000200, MSTPCR1); 482 - 483 244 /* Touch Panel - Enable IRQ6 */ 484 245 ctrl_outw(ctrl_inw(PORT_PZCR) & ~0xc, PORT_PZCR); 485 246 ctrl_outw((ctrl_inw(PORT_PSELA) | 0x8000), PORT_PSELA); 486 247 ctrl_outw((ctrl_inw(PORT_HIZCRC) & ~0x4000), PORT_HIZCRC); 248 + 249 + #ifdef CONFIG_SH_MIGOR_RTA_WVGA 250 + /* LCDC - WVGA - Enable RGB Interface signals */ 251 + ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR); 252 + ctrl_outw(0x0000, PORT_PHCR); 253 + ctrl_outw(0x0000, PORT_PLCR); 254 + ctrl_outw(0x0000, PORT_PMCR); 255 + ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x000f, PORT_PRCR); 256 + ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x000d) | 0x0400, PORT_PSELD); 257 + ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0100, PORT_MSELCRB); 258 + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA); 259 + #endif 260 + #ifdef CONFIG_SH_MIGOR_QVGA 261 + /* LCDC - QVGA - Enable SYS Interface signals */ 262 + ctrl_outw(ctrl_inw(PORT_PACR) & ~0x0003, PORT_PACR); 263 + ctrl_outw((ctrl_inw(PORT_PHCR) & ~0xcfff) | 0x0010, PORT_PHCR); 264 + ctrl_outw(0x0000, PORT_PLCR); 265 + ctrl_outw(0x0000, PORT_PMCR); 266 + ctrl_outw(ctrl_inw(PORT_PRCR) & ~0x030f, PORT_PRCR); 267 + ctrl_outw((ctrl_inw(PORT_PSELD) & ~0x0001) | 0x0420, PORT_PSELD); 268 + ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x0100, PORT_MSELCRB); 269 + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x01e0, PORT_HIZCRA); 270 + #endif 271 + 272 + /* CEU */ 273 + ctrl_outw((ctrl_inw(PORT_PTCR) & ~0x03c3) | 0x0051, PORT_PTCR); 274 + ctrl_outw(ctrl_inw(PORT_PUCR) & ~0x03ff, PORT_PUCR); 275 + ctrl_outw(ctrl_inw(PORT_PVCR) & ~0x03ff, PORT_PVCR); 276 + ctrl_outw(ctrl_inw(PORT_PWCR) & ~0x3c00, PORT_PWCR); 277 + ctrl_outw(ctrl_inw(PORT_PSELC) | 0x0001, PORT_PSELC); 278 + ctrl_outw(ctrl_inw(PORT_PSELD) & ~0x2000, PORT_PSELD); 279 + ctrl_outw(ctrl_inw(PORT_PSELE) | 0x000f, PORT_PSELE); 280 + ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2200, PORT_MSELCRB); 281 + ctrl_outw(ctrl_inw(PORT_HIZCRA) & ~0x0a00, PORT_HIZCRA); 282 + ctrl_outw(ctrl_inw(PORT_HIZCRB) & ~0x0003, PORT_HIZCRB); 487 283 } 488 284 489 285 static struct sh_machine_vector mv_migor __initmv = {
+1
arch/sh/boards/renesas/rsk7203/Makefile
··· 1 + obj-y := setup.o
+126
arch/sh/boards/renesas/rsk7203/setup.c
··· 1 + /* 2 + * Renesas Technology Europe RSK+ 7203 Support. 3 + * 4 + * Copyright (C) 2008 Paul Mundt 5 + * 6 + * This file is subject to the terms and conditions of the GNU General Public 7 + * License. See the file "COPYING" in the main directory of this archive 8 + * for more details. 9 + */ 10 + #include <linux/init.h> 11 + #include <linux/types.h> 12 + #include <linux/platform_device.h> 13 + #include <linux/mtd/mtd.h> 14 + #include <linux/mtd/partitions.h> 15 + #include <linux/mtd/physmap.h> 16 + #include <linux/mtd/map.h> 17 + #include <asm/machvec.h> 18 + #include <asm/io.h> 19 + 20 + static struct resource smc911x_resources[] = { 21 + [0] = { 22 + .start = 0x24000000, 23 + .end = 0x24000000 + 0x100, 24 + .flags = IORESOURCE_MEM, 25 + }, 26 + [1] = { 27 + .start = 64, 28 + .end = 64, 29 + .flags = IORESOURCE_IRQ, 30 + }, 31 + }; 32 + 33 + static struct platform_device smc911x_device = { 34 + .name = "smc911x", 35 + .id = -1, 36 + .num_resources = ARRAY_SIZE(smc911x_resources), 37 + .resource = smc911x_resources, 38 + }; 39 + 40 + static const char *probes[] = { "cmdlinepart", NULL }; 41 + 42 + static struct mtd_partition *parsed_partitions; 43 + 44 + static struct mtd_partition rsk7203_partitions[] = { 45 + { 46 + .name = "Bootloader", 47 + .offset = 0x00000000, 48 + .size = 0x00040000, 49 + .mask_flags = MTD_WRITEABLE, 50 + }, { 51 + .name = "Kernel", 52 + .offset = MTDPART_OFS_NXTBLK, 53 + .size = 0x001c0000, 54 + }, { 55 + .name = "Flash_FS", 56 + .offset = MTDPART_OFS_NXTBLK, 57 + .size = MTDPART_SIZ_FULL, 58 + } 59 + }; 60 + 61 + static struct physmap_flash_data flash_data = { 62 + .width = 2, 63 + }; 64 + 65 + static struct resource flash_resource = { 66 + .start = 0x20000000, 67 + .end = 0x20400000, 68 + .flags = IORESOURCE_MEM, 69 + }; 70 + 71 + static struct platform_device flash_device = { 72 + .name = "physmap-flash", 73 + .id = -1, 74 + .resource = &flash_resource, 75 + .num_resources = 1, 76 + .dev = { 77 + .platform_data = &flash_data, 78 + }, 79 + }; 80 + 81 + static struct mtd_info *flash_mtd; 82 + 83 + static struct map_info rsk7203_flash_map = { 84 + .name = "RSK+ Flash", 85 + .size = 0x400000, 86 + .bankwidth = 2, 87 + }; 88 + 89 + static void __init set_mtd_partitions(void) 90 + { 91 + int nr_parts = 0; 92 + 93 + simple_map_init(&rsk7203_flash_map); 94 + flash_mtd = do_map_probe("cfi_probe", &rsk7203_flash_map); 95 + nr_parts = parse_mtd_partitions(flash_mtd, probes, 96 + &parsed_partitions, 0); 97 + /* If there is no partition table, used the hard coded table */ 98 + if (nr_parts <= 0) { 99 + flash_data.parts = rsk7203_partitions; 100 + flash_data.nr_parts = ARRAY_SIZE(rsk7203_partitions); 101 + } else { 102 + flash_data.nr_parts = nr_parts; 103 + flash_data.parts = parsed_partitions; 104 + } 105 + } 106 + 107 + 108 + static struct platform_device *rsk7203_devices[] __initdata = { 109 + &smc911x_device, 110 + &flash_device, 111 + }; 112 + 113 + static int __init rsk7203_devices_setup(void) 114 + { 115 + set_mtd_partitions(); 116 + return platform_add_devices(rsk7203_devices, 117 + ARRAY_SIZE(rsk7203_devices)); 118 + } 119 + device_initcall(rsk7203_devices_setup); 120 + 121 + /* 122 + * The Machine Vector 123 + */ 124 + static struct sh_machine_vector mv_rsk7203 __initmv = { 125 + .mv_name = "RSK+7203", 126 + };
+1
arch/sh/boards/renesas/sh7763rdp/Makefile
··· 1 + obj-y := setup.o irq.o
+45
arch/sh/boards/renesas/sh7763rdp/irq.c
··· 1 + /* 2 + * linux/arch/sh/boards/renesas/sh7763rdp/irq.c 3 + * 4 + * Renesas Solutions SH7763RDP Support. 5 + * 6 + * Copyright (C) 2008 Renesas Solutions Corp. 7 + * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 8 + * 9 + * This file is subject to the terms and conditions of the GNU General Public 10 + * License. See the file "COPYING" in the main directory of this archive 11 + * for more details. 12 + */ 13 + 14 + #include <linux/init.h> 15 + #include <linux/irq.h> 16 + #include <asm/io.h> 17 + #include <asm/irq.h> 18 + #include <asm/sh7763rdp.h> 19 + 20 + #define INTC_BASE (0xFFD00000) 21 + #define INTC_INT2PRI7 (INTC_BASE+0x4001C) 22 + #define INTC_INT2MSKCR (INTC_BASE+0x4003C) 23 + #define INTC_INT2MSKCR1 (INTC_BASE+0x400D4) 24 + 25 + /* 26 + * Initialize IRQ setting 27 + */ 28 + void __init init_sh7763rdp_IRQ(void) 29 + { 30 + /* GPIO enabled */ 31 + ctrl_outl(1 << 25, INTC_INT2MSKCR); 32 + 33 + /* enable GPIO interrupts */ 34 + ctrl_outl((ctrl_inl(INTC_INT2PRI7) & 0xFF00FFFF) | 0x000F0000, 35 + INTC_INT2PRI7); 36 + 37 + /* USBH enabled */ 38 + ctrl_outl(1 << 17, INTC_INT2MSKCR1); 39 + 40 + /* GETHER enabled */ 41 + ctrl_outl(1 << 16, INTC_INT2MSKCR1); 42 + 43 + /* DMAC enabled */ 44 + ctrl_outl(1 << 8, INTC_INT2MSKCR); 45 + }
+128
arch/sh/boards/renesas/sh7763rdp/setup.c
··· 1 + /* 2 + * linux/arch/sh/boards/renesas/sh7763rdp/setup.c 3 + * 4 + * Renesas Solutions sh7763rdp board 5 + * 6 + * Copyright (C) 2008 Renesas Solutions Corp. 7 + * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 8 + * 9 + * This file is subject to the terms and conditions of the GNU General Public 10 + * License. See the file "COPYING" in the main directory of this archive 11 + * for more details. 12 + */ 13 + #include <linux/init.h> 14 + #include <linux/platform_device.h> 15 + #include <linux/interrupt.h> 16 + #include <linux/input.h> 17 + #include <linux/mtd/physmap.h> 18 + #include <asm/io.h> 19 + #include <asm/sh7763rdp.h> 20 + 21 + /* NOR Flash */ 22 + static struct mtd_partition sh7763rdp_nor_flash_partitions[] = { 23 + { 24 + .name = "U-Boot", 25 + .offset = 0, 26 + .size = (2 * 128 * 1024), 27 + .mask_flags = MTD_WRITEABLE, /* Read-only */ 28 + }, { 29 + .name = "Linux-Kernel", 30 + .offset = MTDPART_OFS_APPEND, 31 + .size = (20 * 128 * 1024), 32 + }, { 33 + .name = "Root Filesystem", 34 + .offset = MTDPART_OFS_APPEND, 35 + .size = MTDPART_SIZ_FULL, 36 + }, 37 + }; 38 + 39 + static struct physmap_flash_data sh7763rdp_nor_flash_data = { 40 + .width = 2, 41 + .parts = sh7763rdp_nor_flash_partitions, 42 + .nr_parts = ARRAY_SIZE(sh7763rdp_nor_flash_partitions), 43 + }; 44 + 45 + static struct resource sh7763rdp_nor_flash_resources[] = { 46 + [0] = { 47 + .name = "NOR Flash", 48 + .start = 0, 49 + .end = (64 * 1024 * 1024), 50 + .flags = IORESOURCE_MEM, 51 + }, 52 + }; 53 + 54 + static struct platform_device sh7763rdp_nor_flash_device = { 55 + .name = "physmap-flash", 56 + .resource = sh7763rdp_nor_flash_resources, 57 + .num_resources = ARRAY_SIZE(sh7763rdp_nor_flash_resources), 58 + .dev = { 59 + .platform_data = &sh7763rdp_nor_flash_data, 60 + }, 61 + }; 62 + 63 + static struct platform_device *sh7763rdp_devices[] __initdata = { 64 + &sh7763rdp_nor_flash_device, 65 + }; 66 + 67 + static int __init sh7763rdp_devices_setup(void) 68 + { 69 + return platform_add_devices(sh7763rdp_devices, 70 + ARRAY_SIZE(sh7763rdp_devices)); 71 + } 72 + __initcall(sh7763rdp_devices_setup); 73 + 74 + static void __init sh7763rdp_setup(char **cmdline_p) 75 + { 76 + /* Board version check */ 77 + if (ctrl_inw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) 78 + printk(KERN_INFO "RTE Standard Configuration\n"); 79 + else 80 + printk(KERN_INFO "RTA Standard Configuration\n"); 81 + 82 + /* USB pin select bits (clear bit 5-2 to 0) */ 83 + ctrl_outw((ctrl_inw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); 84 + /* USBH setup port I controls to other (clear bits 4-9 to 0) */ 85 + ctrl_outw(ctrl_inw(PORT_PICR) & 0xFC0F, PORT_PICR); 86 + 87 + /* Select USB Host controller */ 88 + ctrl_outw(0x00, USB_USBHSC); 89 + 90 + /* For LCD */ 91 + /* set PTJ7-1, bits 15-2 of PJCR to 0 */ 92 + ctrl_outw(ctrl_inw(PORT_PJCR) & 0x0003, PORT_PJCR); 93 + /* set PTI5, bits 11-10 of PICR to 0 */ 94 + ctrl_outw(ctrl_inw(PORT_PICR) & 0xF3FF, PORT_PICR); 95 + ctrl_outw(0, PORT_PKCR); 96 + ctrl_outw(0, PORT_PLCR); 97 + /* set PSEL2 bits 14-8, 5-4, of PSEL2 to 0 */ 98 + ctrl_outw((ctrl_inw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); 99 + /* set PSEL3 bits 14-12, 6-4, 2-0 of PSEL3 to 0 */ 100 + ctrl_outw((ctrl_inw(PORT_PSEL3) & 0x0700), PORT_PSEL3); 101 + 102 + /* For HAC */ 103 + /* bit3-0 0100:HAC & SSI1 enable */ 104 + ctrl_outw((ctrl_inw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); 105 + /* bit14 1:SSI_HAC_CLK enable */ 106 + ctrl_outw(ctrl_inw(PORT_PSEL4) | 0x4000, PORT_PSEL4); 107 + 108 + /* SH-Ether */ 109 + ctrl_outw((ctrl_inw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); 110 + ctrl_outw(0x0, PORT_PFCR); 111 + ctrl_outw(0x0, PORT_PFCR); 112 + ctrl_outw(0x0, PORT_PFCR); 113 + 114 + /* MMC */ 115 + /*selects SCIF and MMC other functions */ 116 + ctrl_outw(0x0001, PORT_PSEL0); 117 + /* MMC clock operates */ 118 + ctrl_outl(ctrl_inl(MSTPCR1) & ~0x8, MSTPCR1); 119 + ctrl_outw(ctrl_inw(PORT_PACR) & ~0x3000, PORT_PACR); 120 + ctrl_outw(ctrl_inw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); 121 + } 122 + 123 + static struct sh_machine_vector mv_sh7763rdp __initmv = { 124 + .mv_name = "sh7763drp", 125 + .mv_setup = sh7763rdp_setup, 126 + .mv_nr_irqs = 112, 127 + .mv_init_irq = init_sh7763rdp_IRQ, 128 + };
+1
arch/sh/boards/renesas/sh7785lcr/Makefile
··· 1 + obj-y := setup.o
+302
arch/sh/boards/renesas/sh7785lcr/setup.c
··· 1 + /* 2 + * Renesas Technology Corp. R0P7785LC0011RL Support. 3 + * 4 + * Copyright (C) 2008 Yoshihiro Shimoda 5 + * 6 + * This file is subject to the terms and conditions of the GNU General Public 7 + * License. See the file "COPYING" in the main directory of this archive 8 + * for more details. 9 + */ 10 + 11 + #include <linux/init.h> 12 + #include <linux/platform_device.h> 13 + #include <linux/sm501.h> 14 + #include <linux/sm501-regs.h> 15 + #include <linux/fb.h> 16 + #include <linux/mtd/physmap.h> 17 + #include <linux/delay.h> 18 + #include <linux/i2c.h> 19 + #include <linux/i2c-pca-platform.h> 20 + #include <linux/i2c-algo-pca.h> 21 + #include <asm/heartbeat.h> 22 + #include <asm/sh7785lcr.h> 23 + 24 + /* 25 + * NOTE: This board has 2 physical memory maps. 26 + * Please look at include/asm-sh/sh7785lcr.h or hardware manual. 27 + */ 28 + static struct resource heartbeat_resources[] = { 29 + [0] = { 30 + .start = PLD_LEDCR, 31 + .end = PLD_LEDCR, 32 + .flags = IORESOURCE_MEM, 33 + }, 34 + }; 35 + 36 + static struct heartbeat_data heartbeat_data = { 37 + .regsize = 8, 38 + }; 39 + 40 + static struct platform_device heartbeat_device = { 41 + .name = "heartbeat", 42 + .id = -1, 43 + .dev = { 44 + .platform_data = &heartbeat_data, 45 + }, 46 + .num_resources = ARRAY_SIZE(heartbeat_resources), 47 + .resource = heartbeat_resources, 48 + }; 49 + 50 + static struct mtd_partition nor_flash_partitions[] = { 51 + { 52 + .name = "loader", 53 + .offset = 0x00000000, 54 + .size = 512 * 1024, 55 + }, 56 + { 57 + .name = "bootenv", 58 + .offset = MTDPART_OFS_APPEND, 59 + .size = 512 * 1024, 60 + }, 61 + { 62 + .name = "kernel", 63 + .offset = MTDPART_OFS_APPEND, 64 + .size = 4 * 1024 * 1024, 65 + }, 66 + { 67 + .name = "data", 68 + .offset = MTDPART_OFS_APPEND, 69 + .size = MTDPART_SIZ_FULL, 70 + }, 71 + }; 72 + 73 + static struct physmap_flash_data nor_flash_data = { 74 + .width = 4, 75 + .parts = nor_flash_partitions, 76 + .nr_parts = ARRAY_SIZE(nor_flash_partitions), 77 + }; 78 + 79 + static struct resource nor_flash_resources[] = { 80 + [0] = { 81 + .start = NOR_FLASH_ADDR, 82 + .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1, 83 + .flags = IORESOURCE_MEM, 84 + } 85 + }; 86 + 87 + static struct platform_device nor_flash_device = { 88 + .name = "physmap-flash", 89 + .dev = { 90 + .platform_data = &nor_flash_data, 91 + }, 92 + .num_resources = ARRAY_SIZE(nor_flash_resources), 93 + .resource = nor_flash_resources, 94 + }; 95 + 96 + static struct resource r8a66597_usb_host_resources[] = { 97 + [0] = { 98 + .name = "r8a66597_hcd", 99 + .start = R8A66597_ADDR, 100 + .end = R8A66597_ADDR + R8A66597_SIZE - 1, 101 + .flags = IORESOURCE_MEM, 102 + }, 103 + [1] = { 104 + .name = "r8a66597_hcd", 105 + .start = 2, 106 + .end = 2, 107 + .flags = IORESOURCE_IRQ, 108 + }, 109 + }; 110 + 111 + static struct platform_device r8a66597_usb_host_device = { 112 + .name = "r8a66597_hcd", 113 + .id = -1, 114 + .dev = { 115 + .dma_mask = NULL, 116 + .coherent_dma_mask = 0xffffffff, 117 + }, 118 + .num_resources = ARRAY_SIZE(r8a66597_usb_host_resources), 119 + .resource = r8a66597_usb_host_resources, 120 + }; 121 + 122 + static struct resource sm501_resources[] = { 123 + [0] = { 124 + .start = SM107_MEM_ADDR, 125 + .end = SM107_MEM_ADDR + SM107_MEM_SIZE - 1, 126 + .flags = IORESOURCE_MEM, 127 + }, 128 + [1] = { 129 + .start = SM107_REG_ADDR, 130 + .end = SM107_REG_ADDR + SM107_REG_SIZE - 1, 131 + .flags = IORESOURCE_MEM, 132 + }, 133 + [2] = { 134 + .start = 10, 135 + .flags = IORESOURCE_IRQ, 136 + }, 137 + }; 138 + 139 + static struct fb_videomode sm501_default_mode_crt = { 140 + .pixclock = 35714, /* 28MHz */ 141 + .xres = 640, 142 + .yres = 480, 143 + .left_margin = 105, 144 + .right_margin = 16, 145 + .upper_margin = 33, 146 + .lower_margin = 10, 147 + .hsync_len = 39, 148 + .vsync_len = 2, 149 + .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 150 + }; 151 + 152 + static struct fb_videomode sm501_default_mode_pnl = { 153 + .pixclock = 40000, /* 25MHz */ 154 + .xres = 640, 155 + .yres = 480, 156 + .left_margin = 2, 157 + .right_margin = 16, 158 + .upper_margin = 33, 159 + .lower_margin = 10, 160 + .hsync_len = 39, 161 + .vsync_len = 2, 162 + .sync = 0, 163 + }; 164 + 165 + static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = { 166 + .def_bpp = 16, 167 + .def_mode = &sm501_default_mode_pnl, 168 + .flags = SM501FB_FLAG_USE_INIT_MODE | 169 + SM501FB_FLAG_USE_HWCURSOR | 170 + SM501FB_FLAG_USE_HWACCEL | 171 + SM501FB_FLAG_DISABLE_AT_EXIT | 172 + SM501FB_FLAG_PANEL_NO_VBIASEN, 173 + }; 174 + 175 + static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = { 176 + .def_bpp = 16, 177 + .def_mode = &sm501_default_mode_crt, 178 + .flags = SM501FB_FLAG_USE_INIT_MODE | 179 + SM501FB_FLAG_USE_HWCURSOR | 180 + SM501FB_FLAG_USE_HWACCEL | 181 + SM501FB_FLAG_DISABLE_AT_EXIT, 182 + }; 183 + 184 + static struct sm501_platdata_fb sm501_fb_pdata = { 185 + .fb_route = SM501_FB_OWN, 186 + .fb_crt = &sm501_pdata_fbsub_crt, 187 + .fb_pnl = &sm501_pdata_fbsub_pnl, 188 + }; 189 + 190 + static struct sm501_initdata sm501_initdata = { 191 + .gpio_high = { 192 + .set = 0x00001fe0, 193 + .mask = 0x0, 194 + }, 195 + .devices = 0, 196 + .mclk = 84 * 1000000, 197 + .m1xclk = 112 * 1000000, 198 + }; 199 + 200 + static struct sm501_platdata sm501_platform_data = { 201 + .init = &sm501_initdata, 202 + .fb = &sm501_fb_pdata, 203 + }; 204 + 205 + static struct platform_device sm501_device = { 206 + .name = "sm501", 207 + .id = -1, 208 + .dev = { 209 + .platform_data = &sm501_platform_data, 210 + }, 211 + .num_resources = ARRAY_SIZE(sm501_resources), 212 + .resource = sm501_resources, 213 + }; 214 + 215 + static struct resource i2c_resources[] = { 216 + [0] = { 217 + .start = PCA9564_ADDR, 218 + .end = PCA9564_ADDR + PCA9564_SIZE - 1, 219 + .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, 220 + }, 221 + [1] = { 222 + .start = 12, 223 + .end = 12, 224 + .flags = IORESOURCE_IRQ, 225 + }, 226 + }; 227 + 228 + static struct i2c_pca9564_pf_platform_data i2c_platform_data = { 229 + .gpio = 0, 230 + .i2c_clock_speed = I2C_PCA_CON_330kHz, 231 + .timeout = 100, 232 + }; 233 + 234 + static struct platform_device i2c_device = { 235 + .name = "i2c-pca-platform", 236 + .id = -1, 237 + .dev = { 238 + .platform_data = &i2c_platform_data, 239 + }, 240 + .num_resources = ARRAY_SIZE(i2c_resources), 241 + .resource = i2c_resources, 242 + }; 243 + 244 + static struct platform_device *sh7785lcr_devices[] __initdata = { 245 + &heartbeat_device, 246 + &nor_flash_device, 247 + &r8a66597_usb_host_device, 248 + &sm501_device, 249 + &i2c_device, 250 + }; 251 + 252 + static struct i2c_board_info __initdata sh7785lcr_i2c_devices[] = { 253 + { 254 + I2C_BOARD_INFO("r2025sd", 0x32), 255 + }, 256 + }; 257 + 258 + static int __init sh7785lcr_devices_setup(void) 259 + { 260 + i2c_register_board_info(0, sh7785lcr_i2c_devices, 261 + ARRAY_SIZE(sh7785lcr_i2c_devices)); 262 + 263 + return platform_add_devices(sh7785lcr_devices, 264 + ARRAY_SIZE(sh7785lcr_devices)); 265 + } 266 + __initcall(sh7785lcr_devices_setup); 267 + 268 + /* Initialize IRQ setting */ 269 + void __init init_sh7785lcr_IRQ(void) 270 + { 271 + plat_irq_setup_pins(IRQ_MODE_IRQ7654); 272 + plat_irq_setup_pins(IRQ_MODE_IRQ3210); 273 + } 274 + 275 + static void sh7785lcr_power_off(void) 276 + { 277 + ctrl_outb(0x01, P2SEGADDR(PLD_POFCR)); 278 + } 279 + 280 + /* Initialize the board */ 281 + static void __init sh7785lcr_setup(char **cmdline_p) 282 + { 283 + void __iomem *sm501_reg; 284 + 285 + printk(KERN_INFO "Renesas Technology Corp. R0P7785LC0011RL support.\n"); 286 + 287 + pm_power_off = sh7785lcr_power_off; 288 + 289 + /* sm501 DRAM configuration */ 290 + sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL; 291 + writel(0x000307c2, sm501_reg); 292 + } 293 + 294 + /* 295 + * The Machine Vector 296 + */ 297 + static struct sh_machine_vector mv_sh7785lcr __initmv = { 298 + .mv_name = "SH7785LCR", 299 + .mv_setup = sh7785lcr_setup, 300 + .mv_init_irq = init_sh7785lcr_IRQ, 301 + }; 302 +
+50 -172
arch/sh/boards/se/7343/irq.c
··· 1 1 /* 2 - * arch/sh/boards/se/7343/irq.c 2 + * linux/arch/sh/boards/se/7343/irq.c 3 3 * 4 + * Copyright (C) 2008 Yoshihiro Shimoda 5 + * 6 + * Based on linux/arch/sh/boards/se/7722/irq.c 7 + * Copyright (C) 2007 Nobuhiro Iwamatsu 8 + * 9 + * This file is subject to the terms and conditions of the GNU General Public 10 + * License. See the file "COPYING" in the main directory of this archive 11 + * for more details. 4 12 */ 5 13 #include <linux/init.h> 6 - #include <linux/interrupt.h> 7 14 #include <linux/irq.h> 15 + #include <linux/interrupt.h> 8 16 #include <asm/irq.h> 9 17 #include <asm/io.h> 10 - #include <asm/mach/se7343.h> 18 + #include <asm/se7343.h> 11 19 12 - static void 13 - disable_intreq_irq(unsigned int irq) 20 + static void disable_se7343_irq(unsigned int irq) 14 21 { 15 - int bit = irq - OFFCHIP_IRQ_BASE; 16 - u16 val; 17 - 18 - val = ctrl_inw(PA_CPLD_IMSK); 19 - val |= 1 << bit; 20 - ctrl_outw(val, PA_CPLD_IMSK); 22 + unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 23 + ctrl_outw(ctrl_inw(PA_CPLD_IMSK) | 1 << bit, PA_CPLD_IMSK); 21 24 } 22 25 23 - static void 24 - enable_intreq_irq(unsigned int irq) 26 + static void enable_se7343_irq(unsigned int irq) 25 27 { 26 - int bit = irq - OFFCHIP_IRQ_BASE; 27 - u16 val; 28 - 29 - val = ctrl_inw(PA_CPLD_IMSK); 30 - val &= ~(1 << bit); 31 - ctrl_outw(val, PA_CPLD_IMSK); 28 + unsigned int bit = irq - SE7343_FPGA_IRQ_BASE; 29 + ctrl_outw(ctrl_inw(PA_CPLD_IMSK) & ~(1 << bit), PA_CPLD_IMSK); 32 30 } 33 31 34 - static void 35 - mask_and_ack_intreq_irq(unsigned int irq) 36 - { 37 - disable_intreq_irq(irq); 38 - } 39 - 40 - static unsigned int 41 - startup_intreq_irq(unsigned int irq) 42 - { 43 - enable_intreq_irq(irq); 44 - return 0; 45 - } 46 - 47 - static void 48 - shutdown_intreq_irq(unsigned int irq) 49 - { 50 - disable_intreq_irq(irq); 51 - } 52 - 53 - static void 54 - end_intreq_irq(unsigned int irq) 55 - { 56 - if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) 57 - enable_intreq_irq(irq); 58 - } 59 - 60 - static struct hw_interrupt_type intreq_irq_type = { 61 - .typename = "FPGA-IRQ", 62 - .startup = startup_intreq_irq, 63 - .shutdown = shutdown_intreq_irq, 64 - .enable = enable_intreq_irq, 65 - .disable = disable_intreq_irq, 66 - .ack = mask_and_ack_intreq_irq, 67 - .end = end_intreq_irq 32 + static struct irq_chip se7343_irq_chip __read_mostly = { 33 + .name = "SE7343-FPGA", 34 + .mask = disable_se7343_irq, 35 + .unmask = enable_se7343_irq, 36 + .mask_ack = disable_se7343_irq, 68 37 }; 69 38 70 - static void 71 - make_intreq_irq(unsigned int irq) 39 + static void se7343_irq_demux(unsigned int irq, struct irq_desc *desc) 72 40 { 73 - disable_irq_nosync(irq); 74 - irq_desc[irq].chip = &intreq_irq_type; 75 - disable_intreq_irq(irq); 76 - } 41 + unsigned short intv = ctrl_inw(PA_CPLD_ST); 42 + struct irq_desc *ext_desc; 43 + unsigned int ext_irq = SE7343_FPGA_IRQ_BASE; 77 44 78 - int 79 - shmse_irq_demux(int irq) 80 - { 81 - int bit; 82 - volatile u16 val; 45 + intv &= (1 << SE7343_FPGA_IRQ_NR) - 1; 83 46 84 - if (irq == IRQ5_IRQ) { 85 - /* Read status Register */ 86 - val = ctrl_inw(PA_CPLD_ST); 87 - bit = ffs(val); 88 - if (bit != 0) 89 - return OFFCHIP_IRQ_BASE + bit - 1; 47 + while (intv) { 48 + if (intv & 1) { 49 + ext_desc = irq_desc + ext_irq; 50 + handle_level_irq(ext_irq, ext_desc); 51 + } 52 + intv >>= 1; 53 + ext_irq++; 90 54 } 91 - return irq; 92 55 } 93 - 94 - /* IRQ5 is multiplexed between the following sources: 95 - * 1. PC Card socket 96 - * 2. Extension slot 97 - * 3. USB Controller 98 - * 4. Serial Controller 99 - * 100 - * We configure IRQ5 as a cascade IRQ. 101 - */ 102 - static struct irqaction irq5 = { 103 - .handler = no_action, 104 - .mask = CPU_MASK_NONE, 105 - .name = "IRQ5-cascade", 106 - }; 107 - 108 - static struct ipr_data se7343_irq5_ipr_map[] = { 109 - { IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY }, 110 - }; 111 - static struct ipr_data se7343_siof0_vpu_ipr_map[] = { 112 - { SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY }, 113 - { VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8 }, 114 - }; 115 - static struct ipr_data se7343_other_ipr_map[] = { 116 - { DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY }, 117 - { DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY }, 118 - { DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY }, 119 - { DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY }, 120 - { DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY }, 121 - { DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY }, 122 - 123 - /* I2C block */ 124 - { IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY }, 125 - { IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY }, 126 - { IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY }, 127 - { IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY }, 128 - 129 - { IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY }, 130 - { IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY }, 131 - { IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY }, 132 - { IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY }, 133 - 134 - /* SIOF */ 135 - { SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY }, 136 - 137 - /* SIU */ 138 - { SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY }, 139 - 140 - /* VIO interrupt */ 141 - { CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY }, 142 - { BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY }, 143 - { VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY }, 144 - 145 - /*MFI interrupt*/ 146 - 147 - { MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY }, 148 - 149 - /* LCD controller */ 150 - { LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY }, 151 - }; 152 56 153 57 /* 154 58 * Initialize IRQ setting 155 59 */ 156 - void __init 157 - init_7343se_IRQ(void) 60 + void __init init_7343se_IRQ(void) 158 61 { 159 - /* Setup Multiplexed interrupts */ 160 - ctrl_outw(8, PA_CPLD_MODESET); /* Set all CPLD interrupts to active 161 - * low. 162 - */ 163 - /* Mask all CPLD controller interrupts */ 164 - ctrl_outw(0x0fff, PA_CPLD_IMSK); 62 + int i; 165 63 166 - /* PC Card interrupts */ 167 - make_intreq_irq(PC_IRQ0); 168 - make_intreq_irq(PC_IRQ1); 169 - make_intreq_irq(PC_IRQ2); 170 - make_intreq_irq(PC_IRQ3); 64 + ctrl_outw(0, PA_CPLD_IMSK); /* disable all irqs */ 65 + ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */ 171 66 172 - /* Extension Slot Interrupts */ 173 - make_intreq_irq(EXT_IRQ0); 174 - make_intreq_irq(EXT_IRQ1); 175 - make_intreq_irq(EXT_IRQ2); 176 - make_intreq_irq(EXT_IRQ3); 67 + for (i = 0; i < SE7343_FPGA_IRQ_NR; i++) 68 + set_irq_chip_and_handler_name(SE7343_FPGA_IRQ_BASE + i, 69 + &se7343_irq_chip, 70 + handle_level_irq, "level"); 177 71 178 - /* USB Controller interrupts */ 179 - make_intreq_irq(USB_IRQ0); 180 - make_intreq_irq(USB_IRQ1); 181 - 182 - /* Serial Controller interrupts */ 183 - make_intreq_irq(UART_IRQ0); 184 - make_intreq_irq(UART_IRQ1); 185 - 186 - /* Setup all external interrupts to be active low */ 187 - ctrl_outw(0xaaaa, INTC_ICR1); 188 - 189 - make_ipr_irq(se7343_irq5_ipr_map, ARRAY_SIZE(se7343_irq5_ipr_map)); 190 - 191 - setup_irq(IRQ5_IRQ, &irq5); 192 - /* Set port control to use IRQ5 */ 193 - *(u16 *)0xA4050108 &= ~0xc; 194 - 195 - make_ipr_irq(se7343_siof0_vpu_ipr_map, ARRAY_SIZE(se7343_siof0_vpu_ipr_map)); 196 - 197 - ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */ 198 - 199 - make_ipr_irq(se7343_other_ipr_map, ARRAY_SIZE(se7343_other_ipr_map)); 200 - 201 - ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */ 72 + set_irq_chained_handler(IRQ0_IRQ, se7343_irq_demux); 73 + set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW); 74 + set_irq_chained_handler(IRQ1_IRQ, se7343_irq_demux); 75 + set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW); 76 + set_irq_chained_handler(IRQ4_IRQ, se7343_irq_demux); 77 + set_irq_type(IRQ4_IRQ, IRQ_TYPE_LEVEL_LOW); 78 + set_irq_chained_handler(IRQ5_IRQ, se7343_irq_demux); 79 + set_irq_type(IRQ5_IRQ, IRQ_TYPE_LEVEL_LOW); 202 80 }
+64 -6
arch/sh/boards/se/7343/setup.c
··· 1 1 #include <linux/init.h> 2 2 #include <linux/platform_device.h> 3 + #include <linux/mtd/physmap.h> 3 4 #include <asm/machvec.h> 4 5 #include <asm/mach/se7343.h> 6 + #include <asm/heartbeat.h> 5 7 #include <asm/irq.h> 6 - 7 - void init_7343se_IRQ(void); 8 + #include <asm/io.h> 8 9 9 10 static struct resource smc91x_resources[] = { 10 11 [0] = { ··· 18 17 * shared with other devices via externel 19 18 * interrupt controller in FPGA... 20 19 */ 21 - .start = EXT_IRQ2, 22 - .end = EXT_IRQ2, 20 + .start = SMC_IRQ, 21 + .end = SMC_IRQ, 23 22 .flags = IORESOURCE_IRQ, 24 23 }, 25 24 }; ··· 39 38 }, 40 39 }; 41 40 41 + static struct heartbeat_data heartbeat_data = { 42 + .regsize = 16, 43 + }; 44 + 42 45 static struct platform_device heartbeat_device = { 43 46 .name = "heartbeat", 44 47 .id = -1, 48 + .dev = { 49 + .platform_data = &heartbeat_data, 50 + }, 45 51 .num_resources = ARRAY_SIZE(heartbeat_resources), 46 52 .resource = heartbeat_resources, 53 + }; 54 + 55 + static struct mtd_partition nor_flash_partitions[] = { 56 + { 57 + .name = "loader", 58 + .offset = 0x00000000, 59 + .size = 128 * 1024, 60 + }, 61 + { 62 + .name = "rootfs", 63 + .offset = MTDPART_OFS_APPEND, 64 + .size = 31 * 1024 * 1024, 65 + }, 66 + { 67 + .name = "data", 68 + .offset = MTDPART_OFS_APPEND, 69 + .size = MTDPART_SIZ_FULL, 70 + }, 71 + }; 72 + 73 + static struct physmap_flash_data nor_flash_data = { 74 + .width = 2, 75 + .parts = nor_flash_partitions, 76 + .nr_parts = ARRAY_SIZE(nor_flash_partitions), 77 + }; 78 + 79 + static struct resource nor_flash_resources[] = { 80 + [0] = { 81 + .start = 0x00000000, 82 + .end = 0x01ffffff, 83 + .flags = IORESOURCE_MEM, 84 + } 85 + }; 86 + 87 + static struct platform_device nor_flash_device = { 88 + .name = "physmap-flash", 89 + .dev = { 90 + .platform_data = &nor_flash_data, 91 + }, 92 + .num_resources = ARRAY_SIZE(nor_flash_resources), 93 + .resource = nor_flash_resources, 47 94 }; 48 95 49 96 static struct platform_device *sh7343se_platform_devices[] __initdata = { 50 97 &smc91x_device, 51 98 &heartbeat_device, 99 + &nor_flash_device, 52 100 }; 53 101 54 102 static int __init sh7343se_devices_setup(void) ··· 105 55 return platform_add_devices(sh7343se_platform_devices, 106 56 ARRAY_SIZE(sh7343se_platform_devices)); 107 57 } 58 + device_initcall(sh7343se_devices_setup); 108 59 60 + /* 61 + * Initialize the board 62 + */ 109 63 static void __init sh7343se_setup(char **cmdline_p) 110 64 { 111 - device_initcall(sh7343se_devices_setup); 65 + ctrl_outw(0xf900, FPGA_OUT); /* FPGA */ 66 + 67 + ctrl_outw(0x0002, PORT_PECR); /* PORT E 1 = IRQ5 */ 68 + ctrl_outw(0x0020, PORT_PSELD); 69 + 70 + printk(KERN_INFO "MS7343CP01 Setup...done\n"); 112 71 } 113 72 114 73 /* ··· 149 90 .mv_outsl = sh7343se_outsl, 150 91 151 92 .mv_init_irq = init_7343se_IRQ, 152 - .mv_irq_demux = shmse_irq_demux, 153 93 };
+14 -45
arch/sh/boards/se/770x/io.c
··· 1 - /* $Id: io.c,v 1.7 2006/02/05 21:55:29 lethal Exp $ 2 - * 3 - * linux/arch/sh/kernel/io_se.c 4 - * 1 + /* 5 2 * Copyright (C) 2000 Kazumoto Kojima 6 3 * 7 4 * I/O routine for Hitachi SolutionEngine. 8 - * 9 5 */ 10 - 11 6 #include <linux/kernel.h> 12 7 #include <linux/types.h> 13 8 #include <asm/io.h> 14 9 #include <asm/se.h> 15 - 16 - /* SH pcmcia io window base, start and end. */ 17 - int sh_pcic_io_wbase = 0xb8400000; 18 - int sh_pcic_io_start; 19 - int sh_pcic_io_stop; 20 - int sh_pcic_io_type; 21 - int sh_pcic_io_dummy; 22 10 23 11 /* MS7750 requires special versions of in*, out* routines, since 24 12 PC-like io ports are located at upper half byte of 16-bit word which ··· 21 33 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 22 34 else if (port >= 0x1000) 23 35 return (volatile __u16 *) (PA_83902 + (port << 1)); 24 - else if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) 25 - return (volatile __u16 *) (sh_pcic_io_wbase + (port &~ 1)); 26 36 else 27 37 return (volatile __u16 *) (PA_SUPERIO + (port << 1)); 28 38 } ··· 37 51 38 52 unsigned char se_inb(unsigned long port) 39 53 { 40 - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) 41 - return *(__u8 *) (sh_pcic_io_wbase + 0x40000 + port); 42 - else if (shifted_port(port)) 43 - return (*port2adr(port) >> 8); 54 + if (shifted_port(port)) 55 + return (*port2adr(port) >> 8); 44 56 else 45 - return (*port2adr(port))&0xff; 57 + return (*port2adr(port))&0xff; 46 58 } 47 59 48 60 unsigned char se_inb_p(unsigned long port) 49 61 { 50 62 unsigned long v; 51 63 52 - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) 53 - v = *(__u8 *) (sh_pcic_io_wbase + 0x40000 + port); 54 - else if (shifted_port(port)) 55 - v = (*port2adr(port) >> 8); 64 + if (shifted_port(port)) 65 + v = (*port2adr(port) >> 8); 56 66 else 57 - v = (*port2adr(port))&0xff; 67 + v = (*port2adr(port))&0xff; 58 68 ctrl_delay(); 59 69 return v; 60 70 } 61 71 62 72 unsigned short se_inw(unsigned long port) 63 73 { 64 - if (port >= 0x2000 || 65 - (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) 74 + if (port >= 0x2000) 66 75 return *port2adr(port); 67 76 else 68 77 maybebadio(port); ··· 72 91 73 92 void se_outb(unsigned char value, unsigned long port) 74 93 { 75 - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) 76 - *(__u8 *)(sh_pcic_io_wbase + port) = value; 77 - else if (shifted_port(port)) 94 + if (shifted_port(port)) 78 95 *(port2adr(port)) = value << 8; 79 96 else 80 97 *(port2adr(port)) = value; ··· 80 101 81 102 void se_outb_p(unsigned char value, unsigned long port) 82 103 { 83 - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) 84 - *(__u8 *)(sh_pcic_io_wbase + port) = value; 85 - else if (shifted_port(port)) 104 + if (shifted_port(port)) 86 105 *(port2adr(port)) = value << 8; 87 106 else 88 107 *(port2adr(port)) = value; ··· 89 112 90 113 void se_outw(unsigned short value, unsigned long port) 91 114 { 92 - if (port >= 0x2000 || 93 - (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) 115 + if (port >= 0x2000) 94 116 *port2adr(port) = value; 95 117 else 96 118 maybebadio(port); ··· 105 129 volatile __u16 *p = port2adr(port); 106 130 __u8 *ap = addr; 107 131 108 - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) { 109 - volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + 0x40000 + port); 110 - while (count--) 111 - *ap++ = *bp; 112 - } else if (shifted_port(port)) { 132 + if (shifted_port(port)) { 113 133 while (count--) 114 134 *ap++ = *p >> 8; 115 135 } else { ··· 132 160 volatile __u16 *p = port2adr(port); 133 161 const __u8 *ap = addr; 134 162 135 - if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) { 136 - volatile __u8 *bp = (__u8 *) (sh_pcic_io_wbase + port); 137 - while (count--) 138 - *bp = *ap++; 139 - } else if (shifted_port(port)) { 163 + if (shifted_port(port)) { 140 164 while (count--) 141 165 *p = *ap++ << 8; 142 166 } else { ··· 145 177 { 146 178 volatile __u16 *p = port2adr(port); 147 179 const __u16 *ap = addr; 180 + 148 181 while (count--) 149 182 *p = *ap++; 150 183 }
+50 -3
arch/sh/boards/se/770x/setup.c
··· 14 14 #include <asm/smc37c93x.h> 15 15 #include <asm/heartbeat.h> 16 16 17 - void init_se_IRQ(void); 18 - 19 17 /* 20 18 * Configure the Super I/O chip 21 19 */ ··· 71 73 }, 72 74 [1] = { 73 75 .start = PA_MRSHPC_IO + 0x1f0 + 0x206, 74 - .end = PA_MRSHPC_IO + 0x1f0 +8 + 0x206 + 8, 76 + .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8, 75 77 .flags = IORESOURCE_MEM, 76 78 }, 77 79 [2] = { ··· 113 115 .resource = heartbeat_resources, 114 116 }; 115 117 118 + /* SH771X Ethernet driver */ 119 + static struct resource sh_eth0_resources[] = { 120 + [0] = { 121 + .start = SH_ETH0_BASE, 122 + .end = SH_ETH0_BASE + 0x1B8, 123 + .flags = IORESOURCE_MEM, 124 + }, 125 + [1] = { 126 + .start = SH_ETH0_IRQ, 127 + .end = SH_ETH0_IRQ, 128 + .flags = IORESOURCE_IRQ, 129 + }, 130 + }; 131 + 132 + static struct platform_device sh_eth0_device = { 133 + .name = "sh-eth", 134 + .id = 0, 135 + .dev = { 136 + .platform_data = PHY_ID, 137 + }, 138 + .num_resources = ARRAY_SIZE(sh_eth0_resources), 139 + .resource = sh_eth0_resources, 140 + }; 141 + 142 + static struct resource sh_eth1_resources[] = { 143 + [0] = { 144 + .start = SH_ETH1_BASE, 145 + .end = SH_ETH1_BASE + 0x1B8, 146 + .flags = IORESOURCE_MEM, 147 + }, 148 + [1] = { 149 + .start = SH_ETH1_IRQ, 150 + .end = SH_ETH1_IRQ, 151 + .flags = IORESOURCE_IRQ, 152 + }, 153 + }; 154 + 155 + static struct platform_device sh_eth1_device = { 156 + .name = "sh-eth", 157 + .id = 1, 158 + .dev = { 159 + .platform_data = PHY_ID, 160 + }, 161 + .num_resources = ARRAY_SIZE(sh_eth1_resources), 162 + .resource = sh_eth1_resources, 163 + }; 164 + 116 165 static struct platform_device *se_devices[] __initdata = { 117 166 &heartbeat_device, 118 167 &cf_ide_device, 168 + &sh_eth0_device, 169 + &sh_eth1_device, 119 170 }; 120 171 121 172 static int __init se_devices_setup(void)
+3 -5
arch/sh/boards/se/7722/setup.c
··· 16 16 #include <linux/input.h> 17 17 #include <linux/smc91x.h> 18 18 #include <asm/machvec.h> 19 + #include <asm/clock.h> 19 20 #include <asm/se7722.h> 20 21 #include <asm/io.h> 21 22 #include <asm/heartbeat.h> ··· 146 145 147 146 static int __init se7722_devices_setup(void) 148 147 { 148 + clk_always_enable("mstp214"); /* KEYSC */ 149 + 149 150 return platform_add_devices(se7722_devices, 150 151 ARRAY_SIZE(se7722_devices)); 151 152 } ··· 156 153 static void __init se7722_setup(char **cmdline_p) 157 154 { 158 155 ctrl_outw(0x010D, FPGA_OUT); /* FPGA */ 159 - 160 - ctrl_outl(0x00051001, MSTPCR0); 161 - ctrl_outl(0x00000000, MSTPCR1); 162 - /* KEYSC, VOU, BEU, CEU, VEU, VPU, LCDC, USB */ 163 - ctrl_outl(0xffffb7c0, MSTPCR2); 164 156 165 157 ctrl_outw(0x0000, PORT_PECR); /* PORT E 1 = IRQ5 ,E 0 = BS */ 166 158 ctrl_outw(0x1000, PORT_PJCR); /* PORT J 1 = IRQ1,J 0 =IRQ0 */
+1 -1
arch/sh/boot/Makefile
··· 40 40 KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%08x" \ 41 41 $$[$(CONFIG_PAGE_OFFSET) + \ 42 42 $(CONFIG_MEMORY_START) + \ 43 - $(CONFIG_ZERO_PAGE_OFFSET)+0x1000]') 43 + $(CONFIG_ZERO_PAGE_OFFSET) + $(CONFIG_ENTRY_OFFSET)]') 44 44 45 45 quiet_cmd_uimage = UIMAGE $@ 46 46 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
+2 -3
arch/sh/boot/compressed/Makefile_32
··· 35 35 $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE 36 36 $(call if_changed,gzip) 37 37 38 - LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh-linux -T 39 38 OBJCOPYFLAGS += -R .empty_zero_page 40 39 41 - $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE 42 - $(call if_changed,ld) 40 + $(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE 41 + $(call if_changed,as_o_S)
+2 -3
arch/sh/boot/compressed/Makefile_64
··· 37 37 $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE 38 38 $(call if_changed,gzip) 39 39 40 - LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh64-linux -T 41 40 OBJCOPYFLAGS += -R .empty_zero_page 42 41 43 - $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE 44 - $(call if_changed,ld) 42 + $(obj)/piggy.o: $(obj)/piggy.S $(obj)/vmlinux.bin.gz FORCE 43 + $(call if_changed,as_o_S)
+8
arch/sh/boot/compressed/piggy.S
··· 1 + .global input_len, input_data 2 + .data 3 + input_len: 4 + .long input_data_end - input_data 5 + input_data: 6 + .incbin "arch/sh/boot/compressed/vmlinux.bin.gz" 7 + input_data_end: 8 + .end
-9
arch/sh/boot/compressed/vmlinux.scr
··· 1 - SECTIONS 2 - { 3 - .data : { 4 - input_len = .; 5 - LONG(input_data_end - input_data) input_data = .; 6 - *(.data) 7 - input_data_end = .; 8 - } 9 - }
+947
arch/sh/configs/ap325rxa_defconfig
··· 1 + # 2 + # Automatically generated make config: don't edit 3 + # Linux kernel version: 2.6.26-rc4 4 + # Wed Jun 4 17:30:00 2008 5 + # 6 + CONFIG_SUPERH=y 7 + CONFIG_SUPERH32=y 8 + CONFIG_RWSEM_GENERIC_SPINLOCK=y 9 + CONFIG_GENERIC_BUG=y 10 + CONFIG_GENERIC_FIND_NEXT_BIT=y 11 + CONFIG_GENERIC_HWEIGHT=y 12 + CONFIG_GENERIC_HARDIRQS=y 13 + CONFIG_GENERIC_IRQ_PROBE=y 14 + CONFIG_GENERIC_CALIBRATE_DELAY=y 15 + CONFIG_GENERIC_TIME=y 16 + CONFIG_GENERIC_CLOCKEVENTS=y 17 + CONFIG_STACKTRACE_SUPPORT=y 18 + CONFIG_LOCKDEP_SUPPORT=y 19 + # CONFIG_ARCH_HAS_ILOG2_U32 is not set 20 + # CONFIG_ARCH_HAS_ILOG2_U64 is not set 21 + CONFIG_ARCH_NO_VIRT_TO_BUS=y 22 + CONFIG_ARCH_SUPPORTS_AOUT=y 23 + CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 24 + 25 + # 26 + # General setup 27 + # 28 + CONFIG_EXPERIMENTAL=y 29 + CONFIG_BROKEN_ON_SMP=y 30 + CONFIG_LOCK_KERNEL=y 31 + CONFIG_INIT_ENV_ARG_LIMIT=32 32 + CONFIG_LOCALVERSION="" 33 + # CONFIG_LOCALVERSION_AUTO is not set 34 + CONFIG_SWAP=y 35 + CONFIG_SYSVIPC=y 36 + CONFIG_SYSVIPC_SYSCTL=y 37 + # CONFIG_POSIX_MQUEUE is not set 38 + CONFIG_BSD_PROCESS_ACCT=y 39 + # CONFIG_BSD_PROCESS_ACCT_V3 is not set 40 + # CONFIG_TASKSTATS is not set 41 + # CONFIG_AUDIT is not set 42 + # CONFIG_IKCONFIG is not set 43 + CONFIG_LOG_BUF_SHIFT=14 44 + # CONFIG_CGROUPS is not set 45 + CONFIG_GROUP_SCHED=y 46 + CONFIG_FAIR_GROUP_SCHED=y 47 + # CONFIG_RT_GROUP_SCHED is not set 48 + CONFIG_USER_SCHED=y 49 + # CONFIG_CGROUP_SCHED is not set 50 + CONFIG_SYSFS_DEPRECATED=y 51 + CONFIG_SYSFS_DEPRECATED_V2=y 52 + # CONFIG_RELAY is not set 53 + # CONFIG_NAMESPACES is not set 54 + # CONFIG_BLK_DEV_INITRD is not set 55 + CONFIG_CC_OPTIMIZE_FOR_SIZE=y 56 + CONFIG_SYSCTL=y 57 + CONFIG_EMBEDDED=y 58 + CONFIG_UID16=y 59 + CONFIG_SYSCTL_SYSCALL=y 60 + CONFIG_SYSCTL_SYSCALL_CHECK=y 61 + # CONFIG_KALLSYMS is not set 62 + CONFIG_HOTPLUG=y 63 + CONFIG_PRINTK=y 64 + CONFIG_BUG=y 65 + CONFIG_ELF_CORE=y 66 + CONFIG_COMPAT_BRK=y 67 + CONFIG_BASE_FULL=y 68 + CONFIG_FUTEX=y 69 + CONFIG_ANON_INODES=y 70 + CONFIG_EPOLL=y 71 + CONFIG_SIGNALFD=y 72 + CONFIG_TIMERFD=y 73 + CONFIG_EVENTFD=y 74 + CONFIG_SHMEM=y 75 + CONFIG_VM_EVENT_COUNTERS=y 76 + CONFIG_SLAB=y 77 + # CONFIG_SLUB is not set 78 + # CONFIG_SLOB is not set 79 + # CONFIG_PROFILING is not set 80 + # CONFIG_MARKERS is not set 81 + CONFIG_HAVE_OPROFILE=y 82 + # CONFIG_HAVE_KPROBES is not set 83 + # CONFIG_HAVE_KRETPROBES is not set 84 + # CONFIG_HAVE_DMA_ATTRS is not set 85 + CONFIG_PROC_PAGE_MONITOR=y 86 + CONFIG_SLABINFO=y 87 + CONFIG_RT_MUTEXES=y 88 + # CONFIG_TINY_SHMEM is not set 89 + CONFIG_BASE_SMALL=0 90 + CONFIG_MODULES=y 91 + # CONFIG_MODULE_FORCE_LOAD is not set 92 + CONFIG_MODULE_UNLOAD=y 93 + # CONFIG_MODULE_FORCE_UNLOAD is not set 94 + # CONFIG_MODVERSIONS is not set 95 + # CONFIG_MODULE_SRCVERSION_ALL is not set 96 + CONFIG_KMOD=y 97 + CONFIG_BLOCK=y 98 + # CONFIG_LBD is not set 99 + # CONFIG_BLK_DEV_IO_TRACE is not set 100 + # CONFIG_LSF is not set 101 + # CONFIG_BLK_DEV_BSG is not set 102 + 103 + # 104 + # IO Schedulers 105 + # 106 + CONFIG_IOSCHED_NOOP=y 107 + CONFIG_IOSCHED_AS=y 108 + CONFIG_IOSCHED_DEADLINE=y 109 + CONFIG_IOSCHED_CFQ=y 110 + # CONFIG_DEFAULT_AS is not set 111 + # CONFIG_DEFAULT_DEADLINE is not set 112 + CONFIG_DEFAULT_CFQ=y 113 + # CONFIG_DEFAULT_NOOP is not set 114 + CONFIG_DEFAULT_IOSCHED="cfq" 115 + CONFIG_CLASSIC_RCU=y 116 + 117 + # 118 + # System type 119 + # 120 + CONFIG_CPU_SH4=y 121 + CONFIG_CPU_SH4A=y 122 + CONFIG_CPU_SHX2=y 123 + # CONFIG_CPU_SUBTYPE_SH7619 is not set 124 + # CONFIG_CPU_SUBTYPE_SH7203 is not set 125 + # CONFIG_CPU_SUBTYPE_SH7206 is not set 126 + # CONFIG_CPU_SUBTYPE_SH7263 is not set 127 + # CONFIG_CPU_SUBTYPE_MXG is not set 128 + # CONFIG_CPU_SUBTYPE_SH7705 is not set 129 + # CONFIG_CPU_SUBTYPE_SH7706 is not set 130 + # CONFIG_CPU_SUBTYPE_SH7707 is not set 131 + # CONFIG_CPU_SUBTYPE_SH7708 is not set 132 + # CONFIG_CPU_SUBTYPE_SH7709 is not set 133 + # CONFIG_CPU_SUBTYPE_SH7710 is not set 134 + # CONFIG_CPU_SUBTYPE_SH7712 is not set 135 + # CONFIG_CPU_SUBTYPE_SH7720 is not set 136 + # CONFIG_CPU_SUBTYPE_SH7721 is not set 137 + # CONFIG_CPU_SUBTYPE_SH7750 is not set 138 + # CONFIG_CPU_SUBTYPE_SH7091 is not set 139 + # CONFIG_CPU_SUBTYPE_SH7750R is not set 140 + # CONFIG_CPU_SUBTYPE_SH7750S is not set 141 + # CONFIG_CPU_SUBTYPE_SH7751 is not set 142 + # CONFIG_CPU_SUBTYPE_SH7751R is not set 143 + # CONFIG_CPU_SUBTYPE_SH7760 is not set 144 + # CONFIG_CPU_SUBTYPE_SH4_202 is not set 145 + CONFIG_CPU_SUBTYPE_SH7723=y 146 + # CONFIG_CPU_SUBTYPE_SH7763 is not set 147 + # CONFIG_CPU_SUBTYPE_SH7770 is not set 148 + # CONFIG_CPU_SUBTYPE_SH7780 is not set 149 + # CONFIG_CPU_SUBTYPE_SH7785 is not set 150 + # CONFIG_CPU_SUBTYPE_SHX3 is not set 151 + # CONFIG_CPU_SUBTYPE_SH7343 is not set 152 + # CONFIG_CPU_SUBTYPE_SH7722 is not set 153 + # CONFIG_CPU_SUBTYPE_SH7366 is not set 154 + # CONFIG_CPU_SUBTYPE_SH5_101 is not set 155 + # CONFIG_CPU_SUBTYPE_SH5_103 is not set 156 + 157 + # 158 + # Memory management options 159 + # 160 + CONFIG_QUICKLIST=y 161 + CONFIG_MMU=y 162 + CONFIG_PAGE_OFFSET=0x80000000 163 + CONFIG_MEMORY_START=0x08000000 164 + CONFIG_MEMORY_SIZE=0x08000000 165 + CONFIG_29BIT=y 166 + # CONFIG_X2TLB is not set 167 + CONFIG_VSYSCALL=y 168 + CONFIG_ARCH_FLATMEM_ENABLE=y 169 + CONFIG_ARCH_SPARSEMEM_ENABLE=y 170 + CONFIG_ARCH_SPARSEMEM_DEFAULT=y 171 + CONFIG_MAX_ACTIVE_REGIONS=1 172 + CONFIG_ARCH_POPULATES_NODE_MAP=y 173 + CONFIG_ARCH_SELECT_MEMORY_MODEL=y 174 + CONFIG_PAGE_SIZE_4KB=y 175 + # CONFIG_PAGE_SIZE_8KB is not set 176 + # CONFIG_PAGE_SIZE_16KB is not set 177 + # CONFIG_PAGE_SIZE_64KB is not set 178 + CONFIG_SELECT_MEMORY_MODEL=y 179 + CONFIG_FLATMEM_MANUAL=y 180 + # CONFIG_DISCONTIGMEM_MANUAL is not set 181 + # CONFIG_SPARSEMEM_MANUAL is not set 182 + CONFIG_FLATMEM=y 183 + CONFIG_FLAT_NODE_MEM_MAP=y 184 + CONFIG_SPARSEMEM_STATIC=y 185 + # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set 186 + CONFIG_PAGEFLAGS_EXTENDED=y 187 + CONFIG_SPLIT_PTLOCK_CPUS=4 188 + # CONFIG_RESOURCES_64BIT is not set 189 + CONFIG_ZONE_DMA_FLAG=0 190 + CONFIG_NR_QUICK=2 191 + 192 + # 193 + # Cache configuration 194 + # 195 + # CONFIG_SH_DIRECT_MAPPED is not set 196 + CONFIG_CACHE_WRITEBACK=y 197 + # CONFIG_CACHE_WRITETHROUGH is not set 198 + # CONFIG_CACHE_OFF is not set 199 + 200 + # 201 + # Processor features 202 + # 203 + CONFIG_CPU_LITTLE_ENDIAN=y 204 + # CONFIG_CPU_BIG_ENDIAN is not set 205 + CONFIG_SH_FPU=y 206 + # CONFIG_SH_STORE_QUEUES is not set 207 + CONFIG_CPU_HAS_INTEVT=y 208 + CONFIG_CPU_HAS_SR_RB=y 209 + CONFIG_CPU_HAS_PTEA=y 210 + CONFIG_CPU_HAS_FPU=y 211 + 212 + # 213 + # Board support 214 + # 215 + CONFIG_SH_AP325RXA=y 216 + 217 + # 218 + # Timer and clock configuration 219 + # 220 + CONFIG_SH_TMU=y 221 + CONFIG_SH_TIMER_IRQ=16 222 + CONFIG_SH_PCLK_FREQ=33333333 223 + CONFIG_TICK_ONESHOT=y 224 + # CONFIG_NO_HZ is not set 225 + CONFIG_HIGH_RES_TIMERS=y 226 + CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 227 + 228 + # 229 + # CPU Frequency scaling 230 + # 231 + # CONFIG_CPU_FREQ is not set 232 + 233 + # 234 + # DMA support 235 + # 236 + # CONFIG_SH_DMA is not set 237 + 238 + # 239 + # Companion Chips 240 + # 241 + 242 + # 243 + # Additional SuperH Device Drivers 244 + # 245 + # CONFIG_HEARTBEAT is not set 246 + # CONFIG_PUSH_SWITCH is not set 247 + 248 + # 249 + # Kernel features 250 + # 251 + # CONFIG_HZ_100 is not set 252 + CONFIG_HZ_250=y 253 + # CONFIG_HZ_300 is not set 254 + # CONFIG_HZ_1000 is not set 255 + CONFIG_HZ=250 256 + # CONFIG_SCHED_HRTICK is not set 257 + # CONFIG_KEXEC is not set 258 + # CONFIG_CRASH_DUMP is not set 259 + # CONFIG_PREEMPT_NONE is not set 260 + # CONFIG_PREEMPT_VOLUNTARY is not set 261 + CONFIG_PREEMPT=y 262 + # CONFIG_PREEMPT_RCU is not set 263 + CONFIG_GUSA=y 264 + 265 + # 266 + # Boot options 267 + # 268 + CONFIG_ZERO_PAGE_OFFSET=0x00001000 269 + CONFIG_BOOT_LINK_OFFSET=0x00800000 270 + CONFIG_CMDLINE_BOOL=y 271 + CONFIG_CMDLINE="console=tty1 console=ttySC5,38400 root=/dev/nfs ip=dhcp" 272 + 273 + # 274 + # Bus options 275 + # 276 + # CONFIG_ARCH_SUPPORTS_MSI is not set 277 + # CONFIG_PCCARD is not set 278 + 279 + # 280 + # Executable file formats 281 + # 282 + CONFIG_BINFMT_ELF=y 283 + # CONFIG_BINFMT_MISC is not set 284 + 285 + # 286 + # Networking 287 + # 288 + CONFIG_NET=y 289 + 290 + # 291 + # Networking options 292 + # 293 + CONFIG_PACKET=y 294 + # CONFIG_PACKET_MMAP is not set 295 + CONFIG_UNIX=y 296 + # CONFIG_NET_KEY is not set 297 + CONFIG_INET=y 298 + # CONFIG_IP_MULTICAST is not set 299 + CONFIG_IP_ADVANCED_ROUTER=y 300 + CONFIG_ASK_IP_FIB_HASH=y 301 + # CONFIG_IP_FIB_TRIE is not set 302 + CONFIG_IP_FIB_HASH=y 303 + # CONFIG_IP_MULTIPLE_TABLES is not set 304 + # CONFIG_IP_ROUTE_MULTIPATH is not set 305 + # CONFIG_IP_ROUTE_VERBOSE is not set 306 + CONFIG_IP_PNP=y 307 + CONFIG_IP_PNP_DHCP=y 308 + # CONFIG_IP_PNP_BOOTP is not set 309 + # CONFIG_IP_PNP_RARP is not set 310 + # CONFIG_NET_IPIP is not set 311 + # CONFIG_NET_IPGRE is not set 312 + # CONFIG_ARPD is not set 313 + # CONFIG_SYN_COOKIES is not set 314 + # CONFIG_INET_AH is not set 315 + # CONFIG_INET_ESP is not set 316 + # CONFIG_INET_IPCOMP is not set 317 + # CONFIG_INET_XFRM_TUNNEL is not set 318 + # CONFIG_INET_TUNNEL is not set 319 + # CONFIG_INET_XFRM_MODE_TRANSPORT is not set 320 + # CONFIG_INET_XFRM_MODE_TUNNEL is not set 321 + # CONFIG_INET_XFRM_MODE_BEET is not set 322 + # CONFIG_INET_LRO is not set 323 + CONFIG_INET_DIAG=y 324 + CONFIG_INET_TCP_DIAG=y 325 + # CONFIG_TCP_CONG_ADVANCED is not set 326 + CONFIG_TCP_CONG_CUBIC=y 327 + CONFIG_DEFAULT_TCP_CONG="cubic" 328 + # CONFIG_TCP_MD5SIG is not set 329 + # CONFIG_IPV6 is not set 330 + # CONFIG_NETWORK_SECMARK is not set 331 + # CONFIG_NETFILTER is not set 332 + # CONFIG_IP_DCCP is not set 333 + # CONFIG_IP_SCTP is not set 334 + # CONFIG_TIPC is not set 335 + # CONFIG_ATM is not set 336 + # CONFIG_BRIDGE is not set 337 + # CONFIG_VLAN_8021Q is not set 338 + # CONFIG_DECNET is not set 339 + # CONFIG_LLC2 is not set 340 + # CONFIG_IPX is not set 341 + # CONFIG_ATALK is not set 342 + # CONFIG_X25 is not set 343 + # CONFIG_LAPB is not set 344 + # CONFIG_ECONET is not set 345 + # CONFIG_WAN_ROUTER is not set 346 + # CONFIG_NET_SCHED is not set 347 + 348 + # 349 + # Network testing 350 + # 351 + # CONFIG_NET_PKTGEN is not set 352 + # CONFIG_HAMRADIO is not set 353 + # CONFIG_CAN is not set 354 + # CONFIG_IRDA is not set 355 + # CONFIG_BT is not set 356 + # CONFIG_AF_RXRPC is not set 357 + 358 + # 359 + # Wireless 360 + # 361 + # CONFIG_CFG80211 is not set 362 + # CONFIG_WIRELESS_EXT is not set 363 + # CONFIG_MAC80211 is not set 364 + # CONFIG_IEEE80211 is not set 365 + # CONFIG_RFKILL is not set 366 + # CONFIG_NET_9P is not set 367 + 368 + # 369 + # Device Drivers 370 + # 371 + 372 + # 373 + # Generic Driver Options 374 + # 375 + CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 376 + CONFIG_STANDALONE=y 377 + CONFIG_PREVENT_FIRMWARE_BUILD=y 378 + CONFIG_FW_LOADER=y 379 + # CONFIG_SYS_HYPERVISOR is not set 380 + # CONFIG_CONNECTOR is not set 381 + CONFIG_MTD=y 382 + # CONFIG_MTD_DEBUG is not set 383 + CONFIG_MTD_CONCAT=y 384 + CONFIG_MTD_PARTITIONS=y 385 + # CONFIG_MTD_REDBOOT_PARTS is not set 386 + CONFIG_MTD_CMDLINE_PARTS=y 387 + # CONFIG_MTD_AR7_PARTS is not set 388 + 389 + # 390 + # User Modules And Translation Layers 391 + # 392 + CONFIG_MTD_CHAR=y 393 + CONFIG_MTD_BLKDEVS=y 394 + CONFIG_MTD_BLOCK=y 395 + # CONFIG_FTL is not set 396 + # CONFIG_NFTL is not set 397 + # CONFIG_INFTL is not set 398 + # CONFIG_RFD_FTL is not set 399 + # CONFIG_SSFDC is not set 400 + # CONFIG_MTD_OOPS is not set 401 + 402 + # 403 + # RAM/ROM/Flash chip drivers 404 + # 405 + CONFIG_MTD_CFI=y 406 + # CONFIG_MTD_JEDECPROBE is not set 407 + CONFIG_MTD_GEN_PROBE=y 408 + # CONFIG_MTD_CFI_ADV_OPTIONS is not set 409 + CONFIG_MTD_MAP_BANK_WIDTH_1=y 410 + CONFIG_MTD_MAP_BANK_WIDTH_2=y 411 + CONFIG_MTD_MAP_BANK_WIDTH_4=y 412 + # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set 413 + # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set 414 + # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set 415 + CONFIG_MTD_CFI_I1=y 416 + CONFIG_MTD_CFI_I2=y 417 + # CONFIG_MTD_CFI_I4 is not set 418 + # CONFIG_MTD_CFI_I8 is not set 419 + # CONFIG_MTD_CFI_INTELEXT is not set 420 + CONFIG_MTD_CFI_AMDSTD=y 421 + # CONFIG_MTD_CFI_STAA is not set 422 + CONFIG_MTD_CFI_UTIL=y 423 + # CONFIG_MTD_RAM is not set 424 + # CONFIG_MTD_ROM is not set 425 + # CONFIG_MTD_ABSENT is not set 426 + 427 + # 428 + # Mapping drivers for chip access 429 + # 430 + # CONFIG_MTD_COMPLEX_MAPPINGS is not set 431 + CONFIG_MTD_PHYSMAP=y 432 + CONFIG_MTD_PHYSMAP_START=0xffffffff 433 + CONFIG_MTD_PHYSMAP_LEN=0 434 + CONFIG_MTD_PHYSMAP_BANKWIDTH=0 435 + # CONFIG_MTD_PLATRAM is not set 436 + 437 + # 438 + # Self-contained MTD device drivers 439 + # 440 + # CONFIG_MTD_SLRAM is not set 441 + # CONFIG_MTD_PHRAM is not set 442 + # CONFIG_MTD_MTDRAM is not set 443 + # CONFIG_MTD_BLOCK2MTD is not set 444 + 445 + # 446 + # Disk-On-Chip Device Drivers 447 + # 448 + # CONFIG_MTD_DOC2000 is not set 449 + # CONFIG_MTD_DOC2001 is not set 450 + # CONFIG_MTD_DOC2001PLUS is not set 451 + # CONFIG_MTD_NAND is not set 452 + # CONFIG_MTD_ONENAND is not set 453 + 454 + # 455 + # UBI - Unsorted block images 456 + # 457 + # CONFIG_MTD_UBI is not set 458 + # CONFIG_PARPORT is not set 459 + CONFIG_BLK_DEV=y 460 + # CONFIG_BLK_DEV_COW_COMMON is not set 461 + # CONFIG_BLK_DEV_LOOP is not set 462 + # CONFIG_BLK_DEV_NBD is not set 463 + CONFIG_BLK_DEV_RAM=y 464 + CONFIG_BLK_DEV_RAM_COUNT=4 465 + CONFIG_BLK_DEV_RAM_SIZE=4096 466 + # CONFIG_BLK_DEV_XIP is not set 467 + # CONFIG_CDROM_PKTCDVD is not set 468 + # CONFIG_ATA_OVER_ETH is not set 469 + CONFIG_MISC_DEVICES=y 470 + # CONFIG_EEPROM_93CX6 is not set 471 + # CONFIG_ENCLOSURE_SERVICES is not set 472 + CONFIG_HAVE_IDE=y 473 + # CONFIG_IDE is not set 474 + 475 + # 476 + # SCSI device support 477 + # 478 + # CONFIG_RAID_ATTRS is not set 479 + CONFIG_SCSI=y 480 + CONFIG_SCSI_DMA=y 481 + # CONFIG_SCSI_TGT is not set 482 + # CONFIG_SCSI_NETLINK is not set 483 + CONFIG_SCSI_PROC_FS=y 484 + 485 + # 486 + # SCSI support type (disk, tape, CD-ROM) 487 + # 488 + CONFIG_BLK_DEV_SD=y 489 + # CONFIG_CHR_DEV_ST is not set 490 + # CONFIG_CHR_DEV_OSST is not set 491 + # CONFIG_BLK_DEV_SR is not set 492 + # CONFIG_CHR_DEV_SG is not set 493 + # CONFIG_CHR_DEV_SCH is not set 494 + 495 + # 496 + # Some SCSI devices (e.g. CD jukebox) support multiple LUNs 497 + # 498 + # CONFIG_SCSI_MULTI_LUN is not set 499 + # CONFIG_SCSI_CONSTANTS is not set 500 + # CONFIG_SCSI_LOGGING is not set 501 + # CONFIG_SCSI_SCAN_ASYNC is not set 502 + CONFIG_SCSI_WAIT_SCAN=m 503 + 504 + # 505 + # SCSI Transports 506 + # 507 + # CONFIG_SCSI_SPI_ATTRS is not set 508 + # CONFIG_SCSI_FC_ATTRS is not set 509 + # CONFIG_SCSI_ISCSI_ATTRS is not set 510 + # CONFIG_SCSI_SAS_LIBSAS is not set 511 + # CONFIG_SCSI_SRP_ATTRS is not set 512 + CONFIG_SCSI_LOWLEVEL=y 513 + # CONFIG_ISCSI_TCP is not set 514 + # CONFIG_SCSI_DEBUG is not set 515 + # CONFIG_ATA is not set 516 + # CONFIG_MD is not set 517 + CONFIG_NETDEVICES=y 518 + # CONFIG_NETDEVICES_MULTIQUEUE is not set 519 + # CONFIG_DUMMY is not set 520 + # CONFIG_BONDING is not set 521 + # CONFIG_MACVLAN is not set 522 + # CONFIG_EQUALIZER is not set 523 + # CONFIG_TUN is not set 524 + # CONFIG_VETH is not set 525 + # CONFIG_PHYLIB is not set 526 + CONFIG_NET_ETHERNET=y 527 + CONFIG_MII=y 528 + # CONFIG_AX88796 is not set 529 + # CONFIG_STNIC is not set 530 + # CONFIG_SMC91X is not set 531 + CONFIG_SMC911X=y 532 + # CONFIG_IBM_NEW_EMAC_ZMII is not set 533 + # CONFIG_IBM_NEW_EMAC_RGMII is not set 534 + # CONFIG_IBM_NEW_EMAC_TAH is not set 535 + # CONFIG_IBM_NEW_EMAC_EMAC4 is not set 536 + # CONFIG_B44 is not set 537 + # CONFIG_NETDEV_1000 is not set 538 + # CONFIG_NETDEV_10000 is not set 539 + 540 + # 541 + # Wireless LAN 542 + # 543 + # CONFIG_WLAN_PRE80211 is not set 544 + # CONFIG_WLAN_80211 is not set 545 + # CONFIG_IWLWIFI_LEDS is not set 546 + # CONFIG_WAN is not set 547 + # CONFIG_PPP is not set 548 + # CONFIG_SLIP is not set 549 + # CONFIG_NETCONSOLE is not set 550 + # CONFIG_NETPOLL is not set 551 + # CONFIG_NET_POLL_CONTROLLER is not set 552 + # CONFIG_ISDN is not set 553 + # CONFIG_PHONE is not set 554 + 555 + # 556 + # Input device support 557 + # 558 + CONFIG_INPUT=y 559 + # CONFIG_INPUT_FF_MEMLESS is not set 560 + # CONFIG_INPUT_POLLDEV is not set 561 + 562 + # 563 + # Userland interfaces 564 + # 565 + # CONFIG_INPUT_MOUSEDEV is not set 566 + # CONFIG_INPUT_JOYDEV is not set 567 + # CONFIG_INPUT_EVDEV is not set 568 + # CONFIG_INPUT_EVBUG is not set 569 + 570 + # 571 + # Input Device Drivers 572 + # 573 + # CONFIG_INPUT_KEYBOARD is not set 574 + # CONFIG_INPUT_MOUSE is not set 575 + # CONFIG_INPUT_JOYSTICK is not set 576 + # CONFIG_INPUT_TABLET is not set 577 + # CONFIG_INPUT_TOUCHSCREEN is not set 578 + # CONFIG_INPUT_MISC is not set 579 + 580 + # 581 + # Hardware I/O ports 582 + # 583 + # CONFIG_SERIO is not set 584 + # CONFIG_GAMEPORT is not set 585 + 586 + # 587 + # Character devices 588 + # 589 + CONFIG_VT=y 590 + CONFIG_VT_CONSOLE=y 591 + CONFIG_HW_CONSOLE=y 592 + CONFIG_VT_HW_CONSOLE_BINDING=y 593 + CONFIG_DEVKMEM=y 594 + # CONFIG_SERIAL_NONSTANDARD is not set 595 + 596 + # 597 + # Serial drivers 598 + # 599 + # CONFIG_SERIAL_8250 is not set 600 + 601 + # 602 + # Non-8250 serial port support 603 + # 604 + CONFIG_SERIAL_SH_SCI=y 605 + CONFIG_SERIAL_SH_SCI_NR_UARTS=6 606 + CONFIG_SERIAL_SH_SCI_CONSOLE=y 607 + CONFIG_SERIAL_CORE=y 608 + CONFIG_SERIAL_CORE_CONSOLE=y 609 + CONFIG_UNIX98_PTYS=y 610 + CONFIG_LEGACY_PTYS=y 611 + CONFIG_LEGACY_PTY_COUNT=256 612 + # CONFIG_IPMI_HANDLER is not set 613 + CONFIG_HW_RANDOM=y 614 + # CONFIG_R3964 is not set 615 + # CONFIG_RAW_DRIVER is not set 616 + # CONFIG_TCG_TPM is not set 617 + # CONFIG_I2C is not set 618 + # CONFIG_SPI is not set 619 + # CONFIG_W1 is not set 620 + # CONFIG_POWER_SUPPLY is not set 621 + # CONFIG_HWMON is not set 622 + # CONFIG_THERMAL is not set 623 + # CONFIG_WATCHDOG is not set 624 + 625 + # 626 + # Sonics Silicon Backplane 627 + # 628 + CONFIG_SSB_POSSIBLE=y 629 + # CONFIG_SSB is not set 630 + 631 + # 632 + # Multifunction device drivers 633 + # 634 + # CONFIG_MFD_SM501 is not set 635 + # CONFIG_HTC_PASIC3 is not set 636 + 637 + # 638 + # Multimedia devices 639 + # 640 + 641 + # 642 + # Multimedia core support 643 + # 644 + # CONFIG_VIDEO_DEV is not set 645 + # CONFIG_DVB_CORE is not set 646 + # CONFIG_VIDEO_MEDIA is not set 647 + 648 + # 649 + # Multimedia drivers 650 + # 651 + # CONFIG_DAB is not set 652 + 653 + # 654 + # Graphics support 655 + # 656 + # CONFIG_VGASTATE is not set 657 + # CONFIG_VIDEO_OUTPUT_CONTROL is not set 658 + # CONFIG_FB is not set 659 + # CONFIG_BACKLIGHT_LCD_SUPPORT is not set 660 + 661 + # 662 + # Display device support 663 + # 664 + # CONFIG_DISPLAY_SUPPORT is not set 665 + 666 + # 667 + # Console display driver support 668 + # 669 + CONFIG_DUMMY_CONSOLE=y 670 + 671 + # 672 + # Sound 673 + # 674 + # CONFIG_SOUND is not set 675 + # CONFIG_HID_SUPPORT is not set 676 + # CONFIG_USB_SUPPORT is not set 677 + # CONFIG_MMC is not set 678 + # CONFIG_MEMSTICK is not set 679 + # CONFIG_NEW_LEDS is not set 680 + # CONFIG_ACCESSIBILITY is not set 681 + # CONFIG_RTC_CLASS is not set 682 + # CONFIG_UIO is not set 683 + 684 + # 685 + # File systems 686 + # 687 + CONFIG_EXT2_FS=y 688 + CONFIG_EXT2_FS_XATTR=y 689 + CONFIG_EXT2_FS_POSIX_ACL=y 690 + CONFIG_EXT2_FS_SECURITY=y 691 + # CONFIG_EXT2_FS_XIP is not set 692 + CONFIG_EXT3_FS=y 693 + CONFIG_EXT3_FS_XATTR=y 694 + CONFIG_EXT3_FS_POSIX_ACL=y 695 + CONFIG_EXT3_FS_SECURITY=y 696 + # CONFIG_EXT4DEV_FS is not set 697 + CONFIG_JBD=y 698 + CONFIG_FS_MBCACHE=y 699 + # CONFIG_REISERFS_FS is not set 700 + # CONFIG_JFS_FS is not set 701 + CONFIG_FS_POSIX_ACL=y 702 + # CONFIG_XFS_FS is not set 703 + # CONFIG_OCFS2_FS is not set 704 + CONFIG_DNOTIFY=y 705 + CONFIG_INOTIFY=y 706 + CONFIG_INOTIFY_USER=y 707 + # CONFIG_QUOTA is not set 708 + # CONFIG_AUTOFS_FS is not set 709 + # CONFIG_AUTOFS4_FS is not set 710 + # CONFIG_FUSE_FS is not set 711 + 712 + # 713 + # CD-ROM/DVD Filesystems 714 + # 715 + # CONFIG_ISO9660_FS is not set 716 + # CONFIG_UDF_FS is not set 717 + 718 + # 719 + # DOS/FAT/NT Filesystems 720 + # 721 + CONFIG_FAT_FS=y 722 + # CONFIG_MSDOS_FS is not set 723 + CONFIG_VFAT_FS=y 724 + CONFIG_FAT_DEFAULT_CODEPAGE=437 725 + CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" 726 + # CONFIG_NTFS_FS is not set 727 + 728 + # 729 + # Pseudo filesystems 730 + # 731 + CONFIG_PROC_FS=y 732 + CONFIG_PROC_KCORE=y 733 + CONFIG_PROC_SYSCTL=y 734 + CONFIG_SYSFS=y 735 + CONFIG_TMPFS=y 736 + # CONFIG_TMPFS_POSIX_ACL is not set 737 + # CONFIG_HUGETLBFS is not set 738 + # CONFIG_HUGETLB_PAGE is not set 739 + # CONFIG_CONFIGFS_FS is not set 740 + 741 + # 742 + # Miscellaneous filesystems 743 + # 744 + # CONFIG_ADFS_FS is not set 745 + # CONFIG_AFFS_FS is not set 746 + # CONFIG_HFS_FS is not set 747 + # CONFIG_HFSPLUS_FS is not set 748 + # CONFIG_BEFS_FS is not set 749 + # CONFIG_BFS_FS is not set 750 + # CONFIG_EFS_FS is not set 751 + # CONFIG_JFFS2_FS is not set 752 + # CONFIG_CRAMFS is not set 753 + # CONFIG_VXFS_FS is not set 754 + # CONFIG_MINIX_FS is not set 755 + # CONFIG_HPFS_FS is not set 756 + # CONFIG_QNX4FS_FS is not set 757 + # CONFIG_ROMFS_FS is not set 758 + # CONFIG_SYSV_FS is not set 759 + # CONFIG_UFS_FS is not set 760 + CONFIG_NETWORK_FILESYSTEMS=y 761 + CONFIG_NFS_FS=y 762 + CONFIG_NFS_V3=y 763 + # CONFIG_NFS_V3_ACL is not set 764 + # CONFIG_NFS_V4 is not set 765 + CONFIG_NFSD=y 766 + CONFIG_NFSD_V3=y 767 + # CONFIG_NFSD_V3_ACL is not set 768 + # CONFIG_NFSD_V4 is not set 769 + CONFIG_ROOT_NFS=y 770 + CONFIG_LOCKD=y 771 + CONFIG_LOCKD_V4=y 772 + CONFIG_EXPORTFS=y 773 + CONFIG_NFS_COMMON=y 774 + CONFIG_SUNRPC=y 775 + # CONFIG_SUNRPC_BIND34 is not set 776 + # CONFIG_RPCSEC_GSS_KRB5 is not set 777 + # CONFIG_RPCSEC_GSS_SPKM3 is not set 778 + # CONFIG_SMB_FS is not set 779 + # CONFIG_CIFS is not set 780 + # CONFIG_NCP_FS is not set 781 + # CONFIG_CODA_FS is not set 782 + # CONFIG_AFS_FS is not set 783 + 784 + # 785 + # Partition Types 786 + # 787 + # CONFIG_PARTITION_ADVANCED is not set 788 + CONFIG_MSDOS_PARTITION=y 789 + CONFIG_NLS=y 790 + CONFIG_NLS_DEFAULT="iso8859-1" 791 + CONFIG_NLS_CODEPAGE_437=y 792 + # CONFIG_NLS_CODEPAGE_737 is not set 793 + # CONFIG_NLS_CODEPAGE_775 is not set 794 + # CONFIG_NLS_CODEPAGE_850 is not set 795 + # CONFIG_NLS_CODEPAGE_852 is not set 796 + # CONFIG_NLS_CODEPAGE_855 is not set 797 + # CONFIG_NLS_CODEPAGE_857 is not set 798 + # CONFIG_NLS_CODEPAGE_860 is not set 799 + # CONFIG_NLS_CODEPAGE_861 is not set 800 + # CONFIG_NLS_CODEPAGE_862 is not set 801 + # CONFIG_NLS_CODEPAGE_863 is not set 802 + # CONFIG_NLS_CODEPAGE_864 is not set 803 + # CONFIG_NLS_CODEPAGE_865 is not set 804 + # CONFIG_NLS_CODEPAGE_866 is not set 805 + # CONFIG_NLS_CODEPAGE_869 is not set 806 + # CONFIG_NLS_CODEPAGE_936 is not set 807 + # CONFIG_NLS_CODEPAGE_950 is not set 808 + CONFIG_NLS_CODEPAGE_932=y 809 + # CONFIG_NLS_CODEPAGE_949 is not set 810 + # CONFIG_NLS_CODEPAGE_874 is not set 811 + # CONFIG_NLS_ISO8859_8 is not set 812 + # CONFIG_NLS_CODEPAGE_1250 is not set 813 + # CONFIG_NLS_CODEPAGE_1251 is not set 814 + # CONFIG_NLS_ASCII is not set 815 + CONFIG_NLS_ISO8859_1=y 816 + # CONFIG_NLS_ISO8859_2 is not set 817 + # CONFIG_NLS_ISO8859_3 is not set 818 + # CONFIG_NLS_ISO8859_4 is not set 819 + # CONFIG_NLS_ISO8859_5 is not set 820 + # CONFIG_NLS_ISO8859_6 is not set 821 + # CONFIG_NLS_ISO8859_7 is not set 822 + # CONFIG_NLS_ISO8859_9 is not set 823 + # CONFIG_NLS_ISO8859_13 is not set 824 + # CONFIG_NLS_ISO8859_14 is not set 825 + # CONFIG_NLS_ISO8859_15 is not set 826 + # CONFIG_NLS_KOI8_R is not set 827 + # CONFIG_NLS_KOI8_U is not set 828 + # CONFIG_NLS_UTF8 is not set 829 + # CONFIG_DLM is not set 830 + 831 + # 832 + # Kernel hacking 833 + # 834 + CONFIG_TRACE_IRQFLAGS_SUPPORT=y 835 + # CONFIG_PRINTK_TIME is not set 836 + CONFIG_ENABLE_WARN_DEPRECATED=y 837 + # CONFIG_ENABLE_MUST_CHECK is not set 838 + CONFIG_FRAME_WARN=1024 839 + # CONFIG_MAGIC_SYSRQ is not set 840 + # CONFIG_UNUSED_SYMBOLS is not set 841 + # CONFIG_DEBUG_FS is not set 842 + # CONFIG_HEADERS_CHECK is not set 843 + # CONFIG_DEBUG_KERNEL is not set 844 + # CONFIG_DEBUG_BUGVERBOSE is not set 845 + # CONFIG_SAMPLES is not set 846 + # CONFIG_SH_STANDARD_BIOS is not set 847 + # CONFIG_EARLY_SCIF_CONSOLE is not set 848 + # CONFIG_SH_KGDB is not set 849 + 850 + # 851 + # Security options 852 + # 853 + # CONFIG_KEYS is not set 854 + # CONFIG_SECURITY is not set 855 + # CONFIG_SECURITY_FILE_CAPABILITIES is not set 856 + CONFIG_CRYPTO=y 857 + 858 + # 859 + # Crypto core or helper 860 + # 861 + CONFIG_CRYPTO_ALGAPI=y 862 + CONFIG_CRYPTO_BLKCIPHER=y 863 + CONFIG_CRYPTO_MANAGER=y 864 + # CONFIG_CRYPTO_GF128MUL is not set 865 + # CONFIG_CRYPTO_NULL is not set 866 + # CONFIG_CRYPTO_CRYPTD is not set 867 + # CONFIG_CRYPTO_AUTHENC is not set 868 + # CONFIG_CRYPTO_TEST is not set 869 + 870 + # 871 + # Authenticated Encryption with Associated Data 872 + # 873 + # CONFIG_CRYPTO_CCM is not set 874 + # CONFIG_CRYPTO_GCM is not set 875 + # CONFIG_CRYPTO_SEQIV is not set 876 + 877 + # 878 + # Block modes 879 + # 880 + CONFIG_CRYPTO_CBC=y 881 + # CONFIG_CRYPTO_CTR is not set 882 + # CONFIG_CRYPTO_CTS is not set 883 + # CONFIG_CRYPTO_ECB is not set 884 + # CONFIG_CRYPTO_LRW is not set 885 + # CONFIG_CRYPTO_PCBC is not set 886 + # CONFIG_CRYPTO_XTS is not set 887 + 888 + # 889 + # Hash modes 890 + # 891 + # CONFIG_CRYPTO_HMAC is not set 892 + # CONFIG_CRYPTO_XCBC is not set 893 + 894 + # 895 + # Digest 896 + # 897 + # CONFIG_CRYPTO_CRC32C is not set 898 + # CONFIG_CRYPTO_MD4 is not set 899 + # CONFIG_CRYPTO_MD5 is not set 900 + # CONFIG_CRYPTO_MICHAEL_MIC is not set 901 + # CONFIG_CRYPTO_SHA1 is not set 902 + # CONFIG_CRYPTO_SHA256 is not set 903 + # CONFIG_CRYPTO_SHA512 is not set 904 + # CONFIG_CRYPTO_TGR192 is not set 905 + # CONFIG_CRYPTO_WP512 is not set 906 + 907 + # 908 + # Ciphers 909 + # 910 + # CONFIG_CRYPTO_AES is not set 911 + # CONFIG_CRYPTO_ANUBIS is not set 912 + # CONFIG_CRYPTO_ARC4 is not set 913 + # CONFIG_CRYPTO_BLOWFISH is not set 914 + # CONFIG_CRYPTO_CAMELLIA is not set 915 + # CONFIG_CRYPTO_CAST5 is not set 916 + # CONFIG_CRYPTO_CAST6 is not set 917 + # CONFIG_CRYPTO_DES is not set 918 + # CONFIG_CRYPTO_FCRYPT is not set 919 + # CONFIG_CRYPTO_KHAZAD is not set 920 + # CONFIG_CRYPTO_SALSA20 is not set 921 + # CONFIG_CRYPTO_SEED is not set 922 + # CONFIG_CRYPTO_SERPENT is not set 923 + # CONFIG_CRYPTO_TEA is not set 924 + # CONFIG_CRYPTO_TWOFISH is not set 925 + 926 + # 927 + # Compression 928 + # 929 + # CONFIG_CRYPTO_DEFLATE is not set 930 + # CONFIG_CRYPTO_LZO is not set 931 + CONFIG_CRYPTO_HW=y 932 + 933 + # 934 + # Library routines 935 + # 936 + CONFIG_BITREVERSE=y 937 + # CONFIG_GENERIC_FIND_FIRST_BIT is not set 938 + # CONFIG_CRC_CCITT is not set 939 + # CONFIG_CRC16 is not set 940 + # CONFIG_CRC_ITU_T is not set 941 + CONFIG_CRC32=y 942 + # CONFIG_CRC7 is not set 943 + # CONFIG_LIBCRC32C is not set 944 + CONFIG_PLIST=y 945 + CONFIG_HAS_IOMEM=y 946 + CONFIG_HAS_IOPORT=y 947 + CONFIG_HAS_DMA=y
+379 -406
arch/sh/configs/se7343_defconfig
··· 1 1 # 2 2 # Automatically generated make config: don't edit 3 - # Linux kernel version: 2.6.18 4 - # Tue Oct 3 11:46:17 2006 3 + # Linux kernel version: 2.6.26-rc8 4 + # Mon Jul 7 13:12:45 2008 5 5 # 6 6 CONFIG_SUPERH=y 7 + CONFIG_SUPERH32=y 7 8 CONFIG_RWSEM_GENERIC_SPINLOCK=y 9 + CONFIG_GENERIC_BUG=y 8 10 CONFIG_GENERIC_FIND_NEXT_BIT=y 9 11 CONFIG_GENERIC_HWEIGHT=y 10 12 CONFIG_GENERIC_HARDIRQS=y 11 13 CONFIG_GENERIC_IRQ_PROBE=y 12 14 CONFIG_GENERIC_CALIBRATE_DELAY=y 15 + CONFIG_GENERIC_TIME=y 16 + CONFIG_GENERIC_CLOCKEVENTS=y 17 + CONFIG_STACKTRACE_SUPPORT=y 18 + CONFIG_LOCKDEP_SUPPORT=y 19 + # CONFIG_ARCH_HAS_ILOG2_U32 is not set 20 + # CONFIG_ARCH_HAS_ILOG2_U64 is not set 21 + CONFIG_ARCH_NO_VIRT_TO_BUS=y 22 + CONFIG_ARCH_SUPPORTS_AOUT=y 13 23 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 14 - 15 - # 16 - # Code maturity level options 17 - # 18 - CONFIG_EXPERIMENTAL=y 19 - CONFIG_BROKEN_ON_SMP=y 20 - CONFIG_INIT_ENV_ARG_LIMIT=32 21 24 22 25 # 23 26 # General setup 24 27 # 28 + CONFIG_EXPERIMENTAL=y 29 + CONFIG_BROKEN_ON_SMP=y 30 + CONFIG_INIT_ENV_ARG_LIMIT=32 25 31 CONFIG_LOCALVERSION="" 26 32 CONFIG_LOCALVERSION_AUTO=y 27 33 # CONFIG_SWAP is not set 28 34 CONFIG_SYSVIPC=y 29 - # CONFIG_IPC_NS is not set 35 + CONFIG_SYSVIPC_SYSCTL=y 30 36 CONFIG_POSIX_MQUEUE=y 31 37 # CONFIG_BSD_PROCESS_ACCT is not set 32 38 # CONFIG_TASKSTATS is not set 33 - # CONFIG_UTS_NS is not set 34 39 # CONFIG_AUDIT is not set 35 40 # CONFIG_IKCONFIG is not set 41 + CONFIG_LOG_BUF_SHIFT=14 42 + # CONFIG_CGROUPS is not set 43 + CONFIG_GROUP_SCHED=y 44 + CONFIG_FAIR_GROUP_SCHED=y 45 + # CONFIG_RT_GROUP_SCHED is not set 46 + CONFIG_USER_SCHED=y 47 + # CONFIG_CGROUP_SCHED is not set 48 + CONFIG_SYSFS_DEPRECATED=y 49 + CONFIG_SYSFS_DEPRECATED_V2=y 36 50 # CONFIG_RELAY is not set 37 - CONFIG_INITRAMFS_SOURCE="" 51 + # CONFIG_NAMESPACES is not set 52 + # CONFIG_BLK_DEV_INITRD is not set 38 53 CONFIG_CC_OPTIMIZE_FOR_SIZE=y 39 54 CONFIG_SYSCTL=y 40 55 CONFIG_EMBEDDED=y ··· 61 46 CONFIG_PRINTK=y 62 47 CONFIG_BUG=y 63 48 CONFIG_ELF_CORE=y 49 + CONFIG_COMPAT_BRK=y 64 50 CONFIG_BASE_FULL=y 65 51 # CONFIG_FUTEX is not set 52 + CONFIG_ANON_INODES=y 66 53 # CONFIG_EPOLL is not set 54 + CONFIG_SIGNALFD=y 55 + CONFIG_TIMERFD=y 56 + CONFIG_EVENTFD=y 67 57 # CONFIG_SHMEM is not set 68 - CONFIG_SLAB=y 69 58 CONFIG_VM_EVENT_COUNTERS=y 59 + CONFIG_SLAB=y 60 + # CONFIG_SLUB is not set 61 + # CONFIG_SLOB is not set 62 + # CONFIG_PROFILING is not set 63 + # CONFIG_MARKERS is not set 64 + CONFIG_HAVE_OPROFILE=y 65 + # CONFIG_HAVE_KPROBES is not set 66 + # CONFIG_HAVE_KRETPROBES is not set 67 + # CONFIG_HAVE_DMA_ATTRS is not set 68 + CONFIG_PROC_PAGE_MONITOR=y 69 + CONFIG_SLABINFO=y 70 70 CONFIG_TINY_SHMEM=y 71 71 CONFIG_BASE_SMALL=0 72 - # CONFIG_SLOB is not set 73 - 74 - # 75 - # Loadable module support 76 - # 77 72 CONFIG_MODULES=y 73 + # CONFIG_MODULE_FORCE_LOAD is not set 78 74 CONFIG_MODULE_UNLOAD=y 79 75 CONFIG_MODULE_FORCE_UNLOAD=y 80 76 # CONFIG_MODVERSIONS is not set 81 77 # CONFIG_MODULE_SRCVERSION_ALL is not set 82 78 # CONFIG_KMOD is not set 83 - 84 - # 85 - # Block layer 86 - # 87 79 CONFIG_BLOCK=y 88 80 # CONFIG_LBD is not set 89 81 # CONFIG_BLK_DEV_IO_TRACE is not set 90 82 # CONFIG_LSF is not set 83 + # CONFIG_BLK_DEV_BSG is not set 91 84 92 85 # 93 86 # IO Schedulers ··· 109 86 # CONFIG_DEFAULT_CFQ is not set 110 87 # CONFIG_DEFAULT_NOOP is not set 111 88 CONFIG_DEFAULT_IOSCHED="deadline" 89 + CONFIG_CLASSIC_RCU=y 112 90 113 91 # 114 92 # System type 115 93 # 116 - CONFIG_SOLUTION_ENGINE=y 117 - # CONFIG_SH_SOLUTION_ENGINE is not set 118 - # CONFIG_SH_7751_SOLUTION_ENGINE is not set 119 - # CONFIG_SH_7300_SOLUTION_ENGINE is not set 120 - CONFIG_SH_7343_SOLUTION_ENGINE=y 121 - # CONFIG_SH_73180_SOLUTION_ENGINE is not set 122 - # CONFIG_SH_7751_SYSTEMH is not set 123 - # CONFIG_SH_HP6XX is not set 124 - # CONFIG_SH_EC3104 is not set 125 - # CONFIG_SH_SATURN is not set 126 - # CONFIG_SH_DREAMCAST is not set 127 - # CONFIG_SH_BIGSUR is not set 128 - # CONFIG_SH_MPC1211 is not set 129 - # CONFIG_SH_SH03 is not set 130 - # CONFIG_SH_SECUREEDGE5410 is not set 131 - # CONFIG_SH_HS7751RVOIP is not set 132 - # CONFIG_SH_7710VOIPGW is not set 133 - # CONFIG_SH_RTS7751R2D is not set 134 - # CONFIG_SH_R7780RP is not set 135 - # CONFIG_SH_EDOSK7705 is not set 136 - # CONFIG_SH_SH4202_MICRODEV is not set 137 - # CONFIG_SH_LANDISK is not set 138 - # CONFIG_SH_TITAN is not set 139 - # CONFIG_SH_SHMIN is not set 140 - # CONFIG_SH_UNKNOWN is not set 141 - 142 - # 143 - # Processor selection 144 - # 145 94 CONFIG_CPU_SH4=y 146 95 CONFIG_CPU_SH4A=y 147 96 CONFIG_CPU_SH4AL_DSP=y 148 - 149 - # 150 - # SH-2 Processor Support 151 - # 152 - # CONFIG_CPU_SUBTYPE_SH7604 is not set 153 - 154 - # 155 - # SH-3 Processor Support 156 - # 157 - # CONFIG_CPU_SUBTYPE_SH7300 is not set 97 + # CONFIG_CPU_SUBTYPE_SH7619 is not set 98 + # CONFIG_CPU_SUBTYPE_SH7203 is not set 99 + # CONFIG_CPU_SUBTYPE_SH7206 is not set 100 + # CONFIG_CPU_SUBTYPE_SH7263 is not set 101 + # CONFIG_CPU_SUBTYPE_MXG is not set 158 102 # CONFIG_CPU_SUBTYPE_SH7705 is not set 159 103 # CONFIG_CPU_SUBTYPE_SH7706 is not set 160 104 # CONFIG_CPU_SUBTYPE_SH7707 is not set 161 105 # CONFIG_CPU_SUBTYPE_SH7708 is not set 162 106 # CONFIG_CPU_SUBTYPE_SH7709 is not set 163 107 # CONFIG_CPU_SUBTYPE_SH7710 is not set 164 - 165 - # 166 - # SH-4 Processor Support 167 - # 108 + # CONFIG_CPU_SUBTYPE_SH7712 is not set 109 + # CONFIG_CPU_SUBTYPE_SH7720 is not set 110 + # CONFIG_CPU_SUBTYPE_SH7721 is not set 168 111 # CONFIG_CPU_SUBTYPE_SH7750 is not set 169 112 # CONFIG_CPU_SUBTYPE_SH7091 is not set 170 113 # CONFIG_CPU_SUBTYPE_SH7750R is not set ··· 139 150 # CONFIG_CPU_SUBTYPE_SH7751R is not set 140 151 # CONFIG_CPU_SUBTYPE_SH7760 is not set 141 152 # CONFIG_CPU_SUBTYPE_SH4_202 is not set 142 - 143 - # 144 - # ST40 Processor Support 145 - # 146 - # CONFIG_CPU_SUBTYPE_ST40STB1 is not set 147 - # CONFIG_CPU_SUBTYPE_ST40GX1 is not set 148 - 149 - # 150 - # SH-4A Processor Support 151 - # 153 + # CONFIG_CPU_SUBTYPE_SH7723 is not set 154 + # CONFIG_CPU_SUBTYPE_SH7763 is not set 152 155 # CONFIG_CPU_SUBTYPE_SH7770 is not set 153 156 # CONFIG_CPU_SUBTYPE_SH7780 is not set 154 - 155 - # 156 - # SH4AL-DSP Processor Support 157 - # 158 - # CONFIG_CPU_SUBTYPE_SH73180 is not set 157 + # CONFIG_CPU_SUBTYPE_SH7785 is not set 158 + # CONFIG_CPU_SUBTYPE_SHX3 is not set 159 159 CONFIG_CPU_SUBTYPE_SH7343=y 160 + # CONFIG_CPU_SUBTYPE_SH7722 is not set 161 + # CONFIG_CPU_SUBTYPE_SH7366 is not set 162 + # CONFIG_CPU_SUBTYPE_SH5_101 is not set 163 + # CONFIG_CPU_SUBTYPE_SH5_103 is not set 160 164 161 165 # 162 166 # Memory management options 163 167 # 168 + CONFIG_QUICKLIST=y 164 169 CONFIG_MMU=y 165 170 CONFIG_PAGE_OFFSET=0x80000000 166 171 CONFIG_MEMORY_START=0x0c000000 167 172 CONFIG_MEMORY_SIZE=0x01000000 168 - CONFIG_32BIT=y 173 + CONFIG_29BIT=y 169 174 CONFIG_VSYSCALL=y 175 + CONFIG_ARCH_FLATMEM_ENABLE=y 176 + CONFIG_ARCH_SPARSEMEM_ENABLE=y 177 + CONFIG_ARCH_SPARSEMEM_DEFAULT=y 178 + CONFIG_MAX_ACTIVE_REGIONS=1 179 + CONFIG_ARCH_POPULATES_NODE_MAP=y 180 + CONFIG_ARCH_SELECT_MEMORY_MODEL=y 181 + CONFIG_PAGE_SIZE_4KB=y 182 + # CONFIG_PAGE_SIZE_8KB is not set 183 + # CONFIG_PAGE_SIZE_16KB is not set 184 + # CONFIG_PAGE_SIZE_64KB is not set 170 185 CONFIG_SELECT_MEMORY_MODEL=y 171 186 CONFIG_FLATMEM_MANUAL=y 172 187 # CONFIG_DISCONTIGMEM_MANUAL is not set 173 188 # CONFIG_SPARSEMEM_MANUAL is not set 174 189 CONFIG_FLATMEM=y 175 190 CONFIG_FLAT_NODE_MEM_MAP=y 176 - # CONFIG_SPARSEMEM_STATIC is not set 191 + CONFIG_SPARSEMEM_STATIC=y 192 + # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set 193 + CONFIG_PAGEFLAGS_EXTENDED=y 177 194 CONFIG_SPLIT_PTLOCK_CPUS=4 178 195 # CONFIG_RESOURCES_64BIT is not set 196 + CONFIG_ZONE_DMA_FLAG=0 197 + CONFIG_NR_QUICK=2 179 198 180 199 # 181 200 # Cache configuration 182 201 # 183 202 # CONFIG_SH_DIRECT_MAPPED is not set 184 - # CONFIG_SH_WRITETHROUGH is not set 185 - # CONFIG_SH_OCRAM is not set 203 + CONFIG_CACHE_WRITEBACK=y 204 + # CONFIG_CACHE_WRITETHROUGH is not set 205 + # CONFIG_CACHE_OFF is not set 186 206 187 207 # 188 208 # Processor features 189 209 # 190 210 CONFIG_CPU_LITTLE_ENDIAN=y 191 - # CONFIG_SH_FPU is not set 211 + # CONFIG_CPU_BIG_ENDIAN is not set 192 212 # CONFIG_SH_FPU_EMU is not set 193 213 CONFIG_SH_DSP=y 194 214 # CONFIG_SH_STORE_QUEUES is not set 195 215 CONFIG_CPU_HAS_INTEVT=y 196 216 CONFIG_CPU_HAS_SR_RB=y 217 + CONFIG_CPU_HAS_DSP=y 197 218 198 219 # 199 - # Timer support 220 + # Board support 221 + # 222 + CONFIG_SOLUTION_ENGINE=y 223 + CONFIG_SH_7343_SOLUTION_ENGINE=y 224 + 225 + # 226 + # Timer and clock configuration 200 227 # 201 228 CONFIG_SH_TMU=y 229 + CONFIG_SH_TIMER_IRQ=16 202 230 CONFIG_SH_PCLK_FREQ=27000000 231 + # CONFIG_TICK_ONESHOT is not set 232 + # CONFIG_NO_HZ is not set 233 + # CONFIG_HIGH_RES_TIMERS is not set 234 + CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 203 235 204 236 # 205 237 # CPU Frequency scaling ··· 235 225 # 236 226 # Companion Chips 237 227 # 238 - # CONFIG_HD6446X_SERIES is not set 228 + 229 + # 230 + # Additional SuperH Device Drivers 231 + # 239 232 CONFIG_HEARTBEAT=y 233 + # CONFIG_PUSH_SWITCH is not set 240 234 241 235 # 242 236 # Kernel features 243 237 # 244 238 # CONFIG_HZ_100 is not set 245 239 CONFIG_HZ_250=y 240 + # CONFIG_HZ_300 is not set 246 241 # CONFIG_HZ_1000 is not set 247 242 CONFIG_HZ=250 243 + # CONFIG_SCHED_HRTICK is not set 248 244 # CONFIG_KEXEC is not set 249 - # CONFIG_SMP is not set 245 + # CONFIG_CRASH_DUMP is not set 250 246 CONFIG_PREEMPT_NONE=y 251 247 # CONFIG_PREEMPT_VOLUNTARY is not set 252 248 # CONFIG_PREEMPT is not set 249 + CONFIG_GUSA=y 253 250 254 251 # 255 252 # Boot options 256 253 # 257 254 CONFIG_ZERO_PAGE_OFFSET=0x00001000 258 255 CONFIG_BOOT_LINK_OFFSET=0x00800000 259 - # CONFIG_UBC_WAKEUP is not set 260 256 # CONFIG_CMDLINE_BOOL is not set 261 257 262 258 # 263 259 # Bus options 264 260 # 265 - # CONFIG_PCI is not set 266 - 267 - # 268 - # PCCARD (PCMCIA/CardBus) support 269 - # 261 + # CONFIG_CF_ENABLER is not set 262 + # CONFIG_ARCH_SUPPORTS_MSI is not set 270 263 # CONFIG_PCCARD is not set 271 - 272 - # 273 - # PCI Hotplug Support 274 - # 275 264 276 265 # 277 266 # Executable file formats 278 267 # 279 268 CONFIG_BINFMT_ELF=y 280 - # CONFIG_BINFMT_FLAT is not set 281 269 # CONFIG_BINFMT_MISC is not set 282 - 283 - # 284 - # Power management options (EXPERIMENTAL) 285 - # 286 - # CONFIG_PM is not set 287 270 288 271 # 289 272 # Networking ··· 286 283 # 287 284 # Networking options 288 285 # 289 - # CONFIG_NETDEBUG is not set 290 286 CONFIG_PACKET=y 291 287 CONFIG_PACKET_MMAP=y 292 288 CONFIG_UNIX=y 293 289 CONFIG_XFRM=y 294 290 # CONFIG_XFRM_USER is not set 295 291 # CONFIG_XFRM_SUB_POLICY is not set 292 + # CONFIG_XFRM_MIGRATE is not set 293 + # CONFIG_XFRM_STATISTICS is not set 296 294 # CONFIG_NET_KEY is not set 297 295 CONFIG_INET=y 298 296 # CONFIG_IP_MULTICAST is not set 299 297 # CONFIG_IP_ADVANCED_ROUTER is not set 300 298 CONFIG_IP_FIB_HASH=y 301 - CONFIG_IP_PNP=y 302 - CONFIG_IP_PNP_DHCP=y 303 - # CONFIG_IP_PNP_BOOTP is not set 304 - # CONFIG_IP_PNP_RARP is not set 299 + # CONFIG_IP_PNP is not set 305 300 # CONFIG_NET_IPIP is not set 306 301 # CONFIG_NET_IPGRE is not set 307 302 # CONFIG_ARPD is not set ··· 311 310 # CONFIG_INET_TUNNEL is not set 312 311 CONFIG_INET_XFRM_MODE_TRANSPORT=y 313 312 CONFIG_INET_XFRM_MODE_TUNNEL=y 313 + CONFIG_INET_XFRM_MODE_BEET=y 314 + # CONFIG_INET_LRO is not set 314 315 # CONFIG_INET_DIAG is not set 315 316 # CONFIG_TCP_CONG_ADVANCED is not set 316 317 CONFIG_TCP_CONG_CUBIC=y 317 318 CONFIG_DEFAULT_TCP_CONG="cubic" 319 + # CONFIG_TCP_MD5SIG is not set 318 320 # CONFIG_IPV6 is not set 319 - # CONFIG_INET6_XFRM_TUNNEL is not set 320 - # CONFIG_INET6_TUNNEL is not set 321 321 # CONFIG_NETWORK_SECMARK is not set 322 322 # CONFIG_NETFILTER is not set 323 - 324 - # 325 - # DCCP Configuration (EXPERIMENTAL) 326 - # 327 323 # CONFIG_IP_DCCP is not set 328 - 329 - # 330 - # SCTP Configuration (EXPERIMENTAL) 331 - # 332 324 # CONFIG_IP_SCTP is not set 333 - 334 - # 335 - # TIPC Configuration (EXPERIMENTAL) 336 - # 337 325 # CONFIG_TIPC is not set 338 326 # CONFIG_ATM is not set 339 327 # CONFIG_BRIDGE is not set ··· 335 345 # CONFIG_LAPB is not set 336 346 # CONFIG_ECONET is not set 337 347 # CONFIG_WAN_ROUTER is not set 338 - 339 - # 340 - # QoS and/or fair queueing 341 - # 342 348 # CONFIG_NET_SCHED is not set 343 349 344 350 # ··· 342 356 # 343 357 # CONFIG_NET_PKTGEN is not set 344 358 # CONFIG_HAMRADIO is not set 359 + # CONFIG_CAN is not set 345 360 # CONFIG_IRDA is not set 346 361 # CONFIG_BT is not set 362 + # CONFIG_AF_RXRPC is not set 363 + 364 + # 365 + # Wireless 366 + # 367 + # CONFIG_CFG80211 is not set 368 + # CONFIG_WIRELESS_EXT is not set 369 + # CONFIG_MAC80211 is not set 347 370 # CONFIG_IEEE80211 is not set 371 + # CONFIG_RFKILL is not set 372 + # CONFIG_NET_9P is not set 348 373 349 374 # 350 375 # Device Drivers ··· 364 367 # 365 368 # Generic Driver Options 366 369 # 370 + CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 367 371 CONFIG_STANDALONE=y 368 372 CONFIG_PREVENT_FIRMWARE_BUILD=y 369 373 CONFIG_FW_LOADER=y 370 374 # CONFIG_SYS_HYPERVISOR is not set 371 - 372 - # 373 - # Connector - unified userspace <-> kernelspace linker 374 - # 375 375 # CONFIG_CONNECTOR is not set 376 - 377 - # 378 - # Memory Technology Devices (MTD) 379 - # 380 376 CONFIG_MTD=y 381 377 # CONFIG_MTD_DEBUG is not set 382 378 CONFIG_MTD_CONCAT=y 383 379 CONFIG_MTD_PARTITIONS=y 384 380 # CONFIG_MTD_REDBOOT_PARTS is not set 385 381 # CONFIG_MTD_CMDLINE_PARTS is not set 382 + # CONFIG_MTD_AR7_PARTS is not set 386 383 387 384 # 388 385 # User Modules And Translation Layers 389 386 # 390 387 CONFIG_MTD_CHAR=y 388 + CONFIG_MTD_BLKDEVS=y 391 389 CONFIG_MTD_BLOCK=y 392 390 # CONFIG_FTL is not set 393 391 # CONFIG_NFTL is not set 394 392 # CONFIG_INFTL is not set 395 393 # CONFIG_RFD_FTL is not set 396 394 # CONFIG_SSFDC is not set 395 + # CONFIG_MTD_OOPS is not set 397 396 398 397 # 399 398 # RAM/ROM/Flash chip drivers ··· 415 422 CONFIG_MTD_RAM=y 416 423 # CONFIG_MTD_ROM is not set 417 424 # CONFIG_MTD_ABSENT is not set 418 - # CONFIG_MTD_OBSOLETE_CHIPS is not set 419 425 420 426 # 421 427 # Mapping drivers for chip access 422 428 # 423 429 # CONFIG_MTD_COMPLEX_MAPPINGS is not set 424 - # CONFIG_MTD_PHYSMAP is not set 430 + CONFIG_MTD_PHYSMAP=y 431 + CONFIG_MTD_PHYSMAP_START=0x0 432 + CONFIG_MTD_PHYSMAP_LEN=0 433 + CONFIG_MTD_PHYSMAP_BANKWIDTH=0 425 434 # CONFIG_MTD_PLATRAM is not set 426 435 427 436 # ··· 440 445 # CONFIG_MTD_DOC2000 is not set 441 446 # CONFIG_MTD_DOC2001 is not set 442 447 # CONFIG_MTD_DOC2001PLUS is not set 443 - 444 - # 445 - # NAND Flash Device Drivers 446 - # 447 448 # CONFIG_MTD_NAND is not set 448 - 449 - # 450 - # OneNAND Flash Device Drivers 451 - # 452 449 # CONFIG_MTD_ONENAND is not set 453 450 454 451 # 455 - # Parallel port support 452 + # UBI - Unsorted block images 456 453 # 454 + # CONFIG_MTD_UBI is not set 457 455 # CONFIG_PARPORT is not set 458 - 459 - # 460 - # Plug and Play support 461 - # 462 - 463 - # 464 - # Block devices 465 - # 456 + CONFIG_BLK_DEV=y 466 457 # CONFIG_BLK_DEV_COW_COMMON is not set 467 458 # CONFIG_BLK_DEV_LOOP is not set 468 459 # CONFIG_BLK_DEV_NBD is not set 469 460 # CONFIG_BLK_DEV_RAM is not set 470 - # CONFIG_BLK_DEV_INITRD is not set 471 461 # CONFIG_CDROM_PKTCDVD is not set 472 462 # CONFIG_ATA_OVER_ETH is not set 473 - 474 - # 475 - # ATA/ATAPI/MFM/RLL support 476 - # 463 + # CONFIG_MISC_DEVICES is not set 464 + CONFIG_HAVE_IDE=y 477 465 # CONFIG_IDE is not set 478 466 479 467 # 480 468 # SCSI device support 481 469 # 482 470 # CONFIG_RAID_ATTRS is not set 483 - # CONFIG_SCSI is not set 471 + CONFIG_SCSI=y 472 + CONFIG_SCSI_DMA=y 473 + # CONFIG_SCSI_TGT is not set 484 474 # CONFIG_SCSI_NETLINK is not set 475 + CONFIG_SCSI_PROC_FS=y 485 476 486 477 # 487 - # Serial ATA (prod) and Parallel ATA (experimental) drivers 478 + # SCSI support type (disk, tape, CD-ROM) 488 479 # 480 + # CONFIG_BLK_DEV_SD is not set 481 + # CONFIG_CHR_DEV_ST is not set 482 + # CONFIG_CHR_DEV_OSST is not set 483 + # CONFIG_BLK_DEV_SR is not set 484 + # CONFIG_CHR_DEV_SG is not set 485 + # CONFIG_CHR_DEV_SCH is not set 486 + 487 + # 488 + # Some SCSI devices (e.g. CD jukebox) support multiple LUNs 489 + # 490 + CONFIG_SCSI_MULTI_LUN=y 491 + # CONFIG_SCSI_CONSTANTS is not set 492 + # CONFIG_SCSI_LOGGING is not set 493 + # CONFIG_SCSI_SCAN_ASYNC is not set 494 + CONFIG_SCSI_WAIT_SCAN=m 495 + 496 + # 497 + # SCSI Transports 498 + # 499 + # CONFIG_SCSI_SPI_ATTRS is not set 500 + # CONFIG_SCSI_FC_ATTRS is not set 501 + # CONFIG_SCSI_ISCSI_ATTRS is not set 502 + # CONFIG_SCSI_SAS_LIBSAS is not set 503 + # CONFIG_SCSI_SRP_ATTRS is not set 504 + # CONFIG_SCSI_LOWLEVEL is not set 489 505 # CONFIG_ATA is not set 490 - 491 - # 492 - # Multi-device support (RAID and LVM) 493 - # 494 506 # CONFIG_MD is not set 495 - 496 - # 497 - # Fusion MPT device support 498 - # 499 - # CONFIG_FUSION is not set 500 - 501 - # 502 - # IEEE 1394 (FireWire) support 503 - # 504 - 505 - # 506 - # I2O device support 507 - # 508 - 509 - # 510 - # Network device support 511 - # 512 507 CONFIG_NETDEVICES=y 508 + # CONFIG_NETDEVICES_MULTIQUEUE is not set 513 509 # CONFIG_DUMMY is not set 514 510 # CONFIG_BONDING is not set 511 + # CONFIG_MACVLAN is not set 515 512 # CONFIG_EQUALIZER is not set 516 513 # CONFIG_TUN is not set 517 - 518 - # 519 - # PHY device support 520 - # 514 + # CONFIG_VETH is not set 521 515 # CONFIG_PHYLIB is not set 522 - 523 - # 524 - # Ethernet (10 or 100Mbit) 525 - # 526 516 CONFIG_NET_ETHERNET=y 527 517 CONFIG_MII=y 518 + # CONFIG_AX88796 is not set 528 519 # CONFIG_STNIC is not set 529 520 CONFIG_SMC91X=y 521 + # CONFIG_IBM_NEW_EMAC_ZMII is not set 522 + # CONFIG_IBM_NEW_EMAC_RGMII is not set 523 + # CONFIG_IBM_NEW_EMAC_TAH is not set 524 + # CONFIG_IBM_NEW_EMAC_EMAC4 is not set 525 + # CONFIG_B44 is not set 526 + CONFIG_NETDEV_1000=y 527 + # CONFIG_E1000E_ENABLED is not set 528 + CONFIG_NETDEV_10000=y 530 529 531 530 # 532 - # Ethernet (1000 Mbit) 531 + # Wireless LAN 533 532 # 534 - 535 - # 536 - # Ethernet (10000 Mbit) 537 - # 538 - 539 - # 540 - # Token Ring devices 541 - # 542 - 543 - # 544 - # Wireless LAN (non-hamradio) 545 - # 546 - # CONFIG_NET_RADIO is not set 547 - 548 - # 549 - # Wan interfaces 550 - # 533 + # CONFIG_WLAN_PRE80211 is not set 534 + # CONFIG_WLAN_80211 is not set 535 + # CONFIG_IWLWIFI_LEDS is not set 551 536 # CONFIG_WAN is not set 552 537 # CONFIG_PPP is not set 553 538 # CONFIG_SLIP is not set 554 - # CONFIG_SHAPER is not set 555 539 # CONFIG_NETCONSOLE is not set 556 540 # CONFIG_NETPOLL is not set 557 541 # CONFIG_NET_POLL_CONTROLLER is not set 558 - 559 - # 560 - # ISDN subsystem 561 - # 562 542 # CONFIG_ISDN is not set 563 - 564 - # 565 - # Telephony Support 566 - # 567 543 # CONFIG_PHONE is not set 568 544 569 545 # ··· 542 576 # 543 577 CONFIG_INPUT=y 544 578 # CONFIG_INPUT_FF_MEMLESS is not set 579 + # CONFIG_INPUT_POLLDEV is not set 545 580 546 581 # 547 582 # Userland interfaces 548 583 # 549 584 # CONFIG_INPUT_MOUSEDEV is not set 550 585 # CONFIG_INPUT_JOYDEV is not set 551 - # CONFIG_INPUT_TSDEV is not set 552 586 # CONFIG_INPUT_EVDEV is not set 553 587 # CONFIG_INPUT_EVBUG is not set 554 588 ··· 558 592 # CONFIG_INPUT_KEYBOARD is not set 559 593 # CONFIG_INPUT_MOUSE is not set 560 594 # CONFIG_INPUT_JOYSTICK is not set 595 + # CONFIG_INPUT_TABLET is not set 561 596 # CONFIG_INPUT_TOUCHSCREEN is not set 562 597 # CONFIG_INPUT_MISC is not set 563 598 ··· 575 608 CONFIG_VT_CONSOLE=y 576 609 CONFIG_HW_CONSOLE=y 577 610 # CONFIG_VT_HW_CONSOLE_BINDING is not set 611 + CONFIG_DEVKMEM=y 578 612 # CONFIG_SERIAL_NONSTANDARD is not set 579 613 580 614 # ··· 594 626 # CONFIG_UNIX98_PTYS is not set 595 627 CONFIG_LEGACY_PTYS=y 596 628 CONFIG_LEGACY_PTY_COUNT=256 597 - 598 - # 599 - # IPMI 600 - # 601 629 # CONFIG_IPMI_HANDLER is not set 602 - 603 - # 604 - # Watchdog Cards 605 - # 606 - # CONFIG_WATCHDOG is not set 607 630 CONFIG_HW_RANDOM=y 608 - # CONFIG_GEN_RTC is not set 609 - # CONFIG_DTLK is not set 610 631 # CONFIG_R3964 is not set 611 - 612 - # 613 - # Ftape, the floppy tape device driver 614 - # 615 632 # CONFIG_RAW_DRIVER is not set 616 - 617 - # 618 - # TPM devices 619 - # 620 633 # CONFIG_TCG_TPM is not set 621 - # CONFIG_TELCLOCK is not set 622 - 623 - # 624 - # I2C support 625 - # 626 - CONFIG_I2C=y 627 - CONFIG_I2C_CHARDEV=y 628 - 629 - # 630 - # I2C Algorithms 631 - # 632 - # CONFIG_I2C_ALGOBIT is not set 633 - # CONFIG_I2C_ALGOPCF is not set 634 - # CONFIG_I2C_ALGOPCA is not set 635 - 636 - # 637 - # I2C Hardware Bus support 638 - # 639 - # CONFIG_I2C_OCORES is not set 640 - # CONFIG_I2C_PARPORT_LIGHT is not set 641 - # CONFIG_I2C_STUB is not set 642 - # CONFIG_I2C_PCA_ISA is not set 643 - 644 - # 645 - # Miscellaneous I2C Chip support 646 - # 647 - # CONFIG_SENSORS_DS1337 is not set 648 - # CONFIG_SENSORS_DS1374 is not set 649 - # CONFIG_SENSORS_EEPROM is not set 650 - # CONFIG_SENSORS_PCF8574 is not set 651 - # CONFIG_SENSORS_PCA9539 is not set 652 - # CONFIG_SENSORS_PCF8591 is not set 653 - # CONFIG_SENSORS_MAX6875 is not set 654 - # CONFIG_I2C_DEBUG_CORE is not set 655 - # CONFIG_I2C_DEBUG_ALGO is not set 656 - # CONFIG_I2C_DEBUG_BUS is not set 657 - # CONFIG_I2C_DEBUG_CHIP is not set 658 - 659 - # 660 - # SPI support 661 - # 634 + # CONFIG_I2C is not set 662 635 # CONFIG_SPI is not set 663 - # CONFIG_SPI_MASTER is not set 664 - 665 - # 666 - # Dallas's 1-wire bus 667 - # 668 - 669 - # 670 - # Hardware Monitoring support 671 - # 636 + # CONFIG_W1 is not set 637 + # CONFIG_POWER_SUPPLY is not set 672 638 # CONFIG_HWMON is not set 673 - # CONFIG_HWMON_VID is not set 639 + # CONFIG_THERMAL is not set 640 + # CONFIG_THERMAL_HWMON is not set 641 + # CONFIG_WATCHDOG is not set 674 642 675 643 # 676 - # Misc devices 644 + # Sonics Silicon Backplane 677 645 # 646 + CONFIG_SSB_POSSIBLE=y 647 + # CONFIG_SSB is not set 648 + 649 + # 650 + # Multifunction device drivers 651 + # 652 + # CONFIG_MFD_SM501 is not set 653 + # CONFIG_HTC_PASIC3 is not set 678 654 679 655 # 680 656 # Multimedia devices 681 657 # 658 + 659 + # 660 + # Multimedia core support 661 + # 682 662 CONFIG_VIDEO_DEV=y 683 - CONFIG_VIDEO_V4L1=y 663 + CONFIG_VIDEO_V4L2_COMMON=y 664 + CONFIG_VIDEO_ALLOW_V4L1=y 684 665 CONFIG_VIDEO_V4L1_COMPAT=y 666 + # CONFIG_DVB_CORE is not set 667 + CONFIG_VIDEO_MEDIA=y 668 + 669 + # 670 + # Multimedia drivers 671 + # 672 + # CONFIG_MEDIA_ATTACH is not set 685 673 CONFIG_VIDEO_V4L2=y 686 - 687 - # 688 - # Video Capture Adapters 689 - # 690 - 691 - # 692 - # Video Capture Adapters 693 - # 674 + CONFIG_VIDEO_V4L1=y 675 + CONFIG_VIDEO_CAPTURE_DRIVERS=y 694 676 # CONFIG_VIDEO_ADV_DEBUG is not set 695 677 CONFIG_VIDEO_HELPER_CHIPS_AUTO=y 696 678 # CONFIG_VIDEO_VIVI is not set 697 679 # CONFIG_VIDEO_CPIA is not set 698 - # CONFIG_VIDEO_SAA5246A is not set 699 - # CONFIG_VIDEO_SAA5249 is not set 700 - # CONFIG_TUNER_3036 is not set 701 - 702 - # 703 - # Radio Adapters 704 - # 705 - 706 - # 707 - # Digital Video Broadcasting Devices 708 - # 709 - # CONFIG_DVB is not set 680 + # CONFIG_SOC_CAMERA is not set 681 + CONFIG_RADIO_ADAPTERS=y 682 + # CONFIG_DAB is not set 710 683 711 684 # 712 685 # Graphics support 713 686 # 714 - CONFIG_FIRMWARE_EDID=y 687 + # CONFIG_VGASTATE is not set 688 + # CONFIG_VIDEO_OUTPUT_CONTROL is not set 715 689 CONFIG_FB=y 690 + CONFIG_FIRMWARE_EDID=y 691 + # CONFIG_FB_DDC is not set 716 692 # CONFIG_FB_CFB_FILLRECT is not set 717 693 # CONFIG_FB_CFB_COPYAREA is not set 718 694 # CONFIG_FB_CFB_IMAGEBLIT is not set 695 + # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set 696 + # CONFIG_FB_SYS_FILLRECT is not set 697 + # CONFIG_FB_SYS_COPYAREA is not set 698 + # CONFIG_FB_SYS_IMAGEBLIT is not set 699 + # CONFIG_FB_FOREIGN_ENDIAN is not set 700 + # CONFIG_FB_SYS_FOPS is not set 701 + # CONFIG_FB_SVGALIB is not set 719 702 # CONFIG_FB_MACMODES is not set 720 703 # CONFIG_FB_BACKLIGHT is not set 721 704 # CONFIG_FB_MODE_HELPERS is not set 722 705 # CONFIG_FB_TILEBLITTING is not set 723 - # CONFIG_FB_EPSON1355 is not set 706 + 707 + # 708 + # Frame buffer hardware drivers 709 + # 724 710 # CONFIG_FB_S1D13XXX is not set 725 711 # CONFIG_FB_VIRTUAL is not set 712 + # CONFIG_BACKLIGHT_LCD_SUPPORT is not set 713 + 714 + # 715 + # Display device support 716 + # 717 + # CONFIG_DISPLAY_SUPPORT is not set 726 718 727 719 # 728 720 # Console display driver support 729 721 # 730 722 CONFIG_DUMMY_CONSOLE=y 731 723 # CONFIG_FRAMEBUFFER_CONSOLE is not set 732 - 733 - # 734 - # Logo configuration 735 - # 736 724 # CONFIG_LOGO is not set 737 - # CONFIG_BACKLIGHT_LCD_SUPPORT is not set 738 725 739 726 # 740 727 # Sound ··· 725 802 # CONFIG_SND_MPU401 is not set 726 803 727 804 # 805 + # SUPERH devices 806 + # 807 + 808 + # 809 + # System on Chip audio support 810 + # 811 + # CONFIG_SND_SOC is not set 812 + 813 + # 814 + # SoC Audio support for SuperH 815 + # 816 + 817 + # 818 + # ALSA SoC audio for Freescale SOCs 819 + # 820 + 821 + # 822 + # SoC Audio for the Texas Instruments OMAP 823 + # 824 + 825 + # 728 826 # Open Sound System 729 827 # 730 828 # CONFIG_SOUND_PRIME is not set 731 - 732 - # 733 - # USB support 734 - # 735 - # CONFIG_USB_ARCH_HAS_HCD is not set 736 - # CONFIG_USB_ARCH_HAS_OHCI is not set 737 - # CONFIG_USB_ARCH_HAS_EHCI is not set 738 - 739 - # 740 - # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 741 - # 742 - 743 - # 744 - # USB Gadget Support 745 - # 746 - # CONFIG_USB_GADGET is not set 747 - 748 - # 749 - # MMC/SD Card support 750 - # 829 + CONFIG_HID_SUPPORT=y 830 + CONFIG_HID=y 831 + # CONFIG_HID_DEBUG is not set 832 + # CONFIG_HIDRAW is not set 833 + # CONFIG_USB_SUPPORT is not set 751 834 # CONFIG_MMC is not set 752 - 753 - # 754 - # LED devices 755 - # 835 + # CONFIG_MEMSTICK is not set 756 836 # CONFIG_NEW_LEDS is not set 757 - 758 - # 759 - # LED drivers 760 - # 761 - 762 - # 763 - # LED Triggers 764 - # 765 - 766 - # 767 - # InfiniBand support 768 - # 769 - 770 - # 771 - # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) 772 - # 773 - 774 - # 775 - # Real Time Clock 776 - # 837 + # CONFIG_ACCESSIBILITY is not set 777 838 # CONFIG_RTC_CLASS is not set 778 - 779 - # 780 - # DMA Engine support 781 - # 782 - # CONFIG_DMA_ENGINE is not set 783 - 784 - # 785 - # DMA Clients 786 - # 787 - 788 - # 789 - # DMA Devices 790 - # 839 + # CONFIG_UIO is not set 791 840 792 841 # 793 842 # File systems 794 843 # 795 - # CONFIG_EXT2_FS is not set 796 - # CONFIG_EXT3_FS is not set 844 + CONFIG_EXT2_FS=y 845 + # CONFIG_EXT2_FS_XATTR is not set 846 + # CONFIG_EXT2_FS_XIP is not set 847 + CONFIG_EXT3_FS=y 848 + CONFIG_EXT3_FS_XATTR=y 849 + # CONFIG_EXT3_FS_POSIX_ACL is not set 850 + # CONFIG_EXT3_FS_SECURITY is not set 851 + # CONFIG_EXT4DEV_FS is not set 852 + CONFIG_JBD=y 853 + CONFIG_FS_MBCACHE=y 797 854 # CONFIG_REISERFS_FS is not set 798 855 # CONFIG_JFS_FS is not set 799 856 # CONFIG_FS_POSIX_ACL is not set 800 857 # CONFIG_XFS_FS is not set 801 858 # CONFIG_OCFS2_FS is not set 802 - # CONFIG_MINIX_FS is not set 803 - # CONFIG_ROMFS_FS is not set 859 + # CONFIG_DNOTIFY is not set 804 860 # CONFIG_INOTIFY is not set 805 861 # CONFIG_QUOTA is not set 806 - # CONFIG_DNOTIFY is not set 807 862 # CONFIG_AUTOFS_FS is not set 808 863 # CONFIG_AUTOFS4_FS is not set 809 864 # CONFIG_FUSE_FS is not set ··· 810 909 # CONFIG_TMPFS_POSIX_ACL is not set 811 910 # CONFIG_HUGETLBFS is not set 812 911 # CONFIG_HUGETLB_PAGE is not set 813 - CONFIG_RAMFS=y 814 912 # CONFIG_CONFIGFS_FS is not set 815 913 816 914 # ··· 822 922 # CONFIG_BEFS_FS is not set 823 923 # CONFIG_BFS_FS is not set 824 924 # CONFIG_EFS_FS is not set 825 - # CONFIG_JFFS_FS is not set 826 925 CONFIG_JFFS2_FS=y 827 926 CONFIG_JFFS2_FS_DEBUG=0 828 927 CONFIG_JFFS2_FS_WRITEBUFFER=y 928 + # CONFIG_JFFS2_FS_WBUF_VERIFY is not set 829 929 # CONFIG_JFFS2_SUMMARY is not set 830 930 # CONFIG_JFFS2_FS_XATTR is not set 831 931 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set 832 932 CONFIG_JFFS2_ZLIB=y 933 + # CONFIG_JFFS2_LZO is not set 833 934 CONFIG_JFFS2_RTIME=y 834 935 # CONFIG_JFFS2_RUBIN is not set 835 - # CONFIG_CRAMFS is not set 936 + CONFIG_CRAMFS=y 836 937 # CONFIG_VXFS_FS is not set 938 + # CONFIG_MINIX_FS is not set 837 939 # CONFIG_HPFS_FS is not set 838 940 # CONFIG_QNX4FS_FS is not set 941 + # CONFIG_ROMFS_FS is not set 839 942 # CONFIG_SYSV_FS is not set 840 943 # CONFIG_UFS_FS is not set 841 - 842 - # 843 - # Network File Systems 844 - # 944 + CONFIG_NETWORK_FILESYSTEMS=y 845 945 CONFIG_NFS_FS=y 846 946 CONFIG_NFS_V3=y 847 947 # CONFIG_NFS_V3_ACL is not set 848 948 # CONFIG_NFS_V4 is not set 849 - # CONFIG_NFS_DIRECTIO is not set 850 949 CONFIG_NFSD=y 851 950 # CONFIG_NFSD_V3 is not set 852 - # CONFIG_NFSD_TCP is not set 853 - CONFIG_ROOT_NFS=y 951 + # CONFIG_NFSD_V4 is not set 854 952 CONFIG_LOCKD=y 855 953 CONFIG_LOCKD_V4=y 856 954 CONFIG_EXPORTFS=y 857 955 CONFIG_NFS_COMMON=y 858 956 CONFIG_SUNRPC=y 957 + # CONFIG_SUNRPC_BIND34 is not set 859 958 # CONFIG_RPCSEC_GSS_KRB5 is not set 860 959 # CONFIG_RPCSEC_GSS_SPKM3 is not set 861 960 # CONFIG_SMB_FS is not set ··· 862 963 # CONFIG_NCP_FS is not set 863 964 # CONFIG_CODA_FS is not set 864 965 # CONFIG_AFS_FS is not set 865 - # CONFIG_9P_FS is not set 866 966 867 967 # 868 968 # Partition Types 869 969 # 870 970 # CONFIG_PARTITION_ADVANCED is not set 871 971 CONFIG_MSDOS_PARTITION=y 872 - 873 - # 874 - # Native Language Support 875 - # 876 972 # CONFIG_NLS is not set 877 - 878 - # 879 - # Profiling support 880 - # 881 - # CONFIG_PROFILING is not set 973 + # CONFIG_DLM is not set 882 974 883 975 # 884 976 # Kernel hacking 885 977 # 978 + CONFIG_TRACE_IRQFLAGS_SUPPORT=y 886 979 # CONFIG_PRINTK_TIME is not set 980 + CONFIG_ENABLE_WARN_DEPRECATED=y 887 981 CONFIG_ENABLE_MUST_CHECK=y 982 + CONFIG_FRAME_WARN=1024 888 983 # CONFIG_MAGIC_SYSRQ is not set 889 984 # CONFIG_UNUSED_SYMBOLS is not set 890 - # CONFIG_DEBUG_KERNEL is not set 891 - CONFIG_LOG_BUF_SHIFT=14 892 - # CONFIG_DEBUG_BUGVERBOSE is not set 893 985 # CONFIG_DEBUG_FS is not set 986 + # CONFIG_HEADERS_CHECK is not set 987 + # CONFIG_DEBUG_KERNEL is not set 988 + # CONFIG_DEBUG_BUGVERBOSE is not set 989 + # CONFIG_SAMPLES is not set 894 990 # CONFIG_SH_STANDARD_BIOS is not set 895 - # CONFIG_EARLY_SCIF_CONSOLE is not set 896 - # CONFIG_KGDB is not set 991 + CONFIG_EARLY_SCIF_CONSOLE=y 992 + CONFIG_EARLY_SCIF_CONSOLE_PORT=0xffe00000 993 + CONFIG_EARLY_PRINTK=y 994 + # CONFIG_SH_KGDB is not set 897 995 898 996 # 899 997 # Security options 900 998 # 901 999 # CONFIG_KEYS is not set 902 1000 # CONFIG_SECURITY is not set 1001 + # CONFIG_SECURITY_FILE_CAPABILITIES is not set 1002 + CONFIG_CRYPTO=y 903 1003 904 1004 # 905 - # Cryptographic options 1005 + # Crypto core or helper 906 1006 # 907 - # CONFIG_CRYPTO is not set 1007 + # CONFIG_CRYPTO_MANAGER is not set 1008 + # CONFIG_CRYPTO_GF128MUL is not set 1009 + # CONFIG_CRYPTO_NULL is not set 1010 + # CONFIG_CRYPTO_CRYPTD is not set 1011 + # CONFIG_CRYPTO_AUTHENC is not set 1012 + # CONFIG_CRYPTO_TEST is not set 1013 + 1014 + # 1015 + # Authenticated Encryption with Associated Data 1016 + # 1017 + # CONFIG_CRYPTO_CCM is not set 1018 + # CONFIG_CRYPTO_GCM is not set 1019 + # CONFIG_CRYPTO_SEQIV is not set 1020 + 1021 + # 1022 + # Block modes 1023 + # 1024 + # CONFIG_CRYPTO_CBC is not set 1025 + # CONFIG_CRYPTO_CTR is not set 1026 + # CONFIG_CRYPTO_CTS is not set 1027 + # CONFIG_CRYPTO_ECB is not set 1028 + # CONFIG_CRYPTO_LRW is not set 1029 + # CONFIG_CRYPTO_PCBC is not set 1030 + # CONFIG_CRYPTO_XTS is not set 1031 + 1032 + # 1033 + # Hash modes 1034 + # 1035 + # CONFIG_CRYPTO_HMAC is not set 1036 + # CONFIG_CRYPTO_XCBC is not set 1037 + 1038 + # 1039 + # Digest 1040 + # 1041 + # CONFIG_CRYPTO_CRC32C is not set 1042 + # CONFIG_CRYPTO_MD4 is not set 1043 + # CONFIG_CRYPTO_MD5 is not set 1044 + # CONFIG_CRYPTO_MICHAEL_MIC is not set 1045 + # CONFIG_CRYPTO_SHA1 is not set 1046 + # CONFIG_CRYPTO_SHA256 is not set 1047 + # CONFIG_CRYPTO_SHA512 is not set 1048 + # CONFIG_CRYPTO_TGR192 is not set 1049 + # CONFIG_CRYPTO_WP512 is not set 1050 + 1051 + # 1052 + # Ciphers 1053 + # 1054 + # CONFIG_CRYPTO_AES is not set 1055 + # CONFIG_CRYPTO_ANUBIS is not set 1056 + # CONFIG_CRYPTO_ARC4 is not set 1057 + # CONFIG_CRYPTO_BLOWFISH is not set 1058 + # CONFIG_CRYPTO_CAMELLIA is not set 1059 + # CONFIG_CRYPTO_CAST5 is not set 1060 + # CONFIG_CRYPTO_CAST6 is not set 1061 + # CONFIG_CRYPTO_DES is not set 1062 + # CONFIG_CRYPTO_FCRYPT is not set 1063 + # CONFIG_CRYPTO_KHAZAD is not set 1064 + # CONFIG_CRYPTO_SALSA20 is not set 1065 + # CONFIG_CRYPTO_SEED is not set 1066 + # CONFIG_CRYPTO_SERPENT is not set 1067 + # CONFIG_CRYPTO_TEA is not set 1068 + # CONFIG_CRYPTO_TWOFISH is not set 1069 + 1070 + # 1071 + # Compression 1072 + # 1073 + # CONFIG_CRYPTO_DEFLATE is not set 1074 + # CONFIG_CRYPTO_LZO is not set 1075 + CONFIG_CRYPTO_HW=y 908 1076 909 1077 # 910 1078 # Library routines 911 1079 # 1080 + CONFIG_BITREVERSE=y 1081 + # CONFIG_GENERIC_FIND_FIRST_BIT is not set 912 1082 # CONFIG_CRC_CCITT is not set 913 1083 # CONFIG_CRC16 is not set 1084 + # CONFIG_CRC_ITU_T is not set 914 1085 CONFIG_CRC32=y 1086 + # CONFIG_CRC7 is not set 915 1087 # CONFIG_LIBCRC32C is not set 916 1088 CONFIG_ZLIB_INFLATE=y 917 1089 CONFIG_ZLIB_DEFLATE=y 1090 + CONFIG_HAS_IOMEM=y 1091 + CONFIG_HAS_IOPORT=y 1092 + CONFIG_HAS_DMA=y
+293 -382
arch/sh/configs/se7712_defconfig
··· 1 1 # 2 2 # Automatically generated make config: don't edit 3 - # Linux kernel version: 2.6.21-rc4 4 - # Wed Mar 28 10:19:02 2007 3 + # Linux kernel version: 2.6.26-rc6 4 + # Wed Jun 18 16:36:08 2008 5 5 # 6 6 CONFIG_SUPERH=y 7 + CONFIG_SUPERH32=y 7 8 CONFIG_RWSEM_GENERIC_SPINLOCK=y 8 9 CONFIG_GENERIC_FIND_NEXT_BIT=y 9 10 CONFIG_GENERIC_HWEIGHT=y 10 11 CONFIG_GENERIC_HARDIRQS=y 11 12 CONFIG_GENERIC_IRQ_PROBE=y 12 13 CONFIG_GENERIC_CALIBRATE_DELAY=y 13 - # CONFIG_GENERIC_TIME is not set 14 + CONFIG_GENERIC_TIME=y 15 + CONFIG_GENERIC_CLOCKEVENTS=y 14 16 CONFIG_STACKTRACE_SUPPORT=y 15 17 CONFIG_LOCKDEP_SUPPORT=y 16 18 # CONFIG_ARCH_HAS_ILOG2_U32 is not set 17 19 # CONFIG_ARCH_HAS_ILOG2_U64 is not set 20 + CONFIG_ARCH_NO_VIRT_TO_BUS=y 21 + CONFIG_ARCH_SUPPORTS_AOUT=y 18 22 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 19 - 20 - # 21 - # Code maturity level options 22 - # 23 - CONFIG_EXPERIMENTAL=y 24 - CONFIG_BROKEN_ON_SMP=y 25 - CONFIG_INIT_ENV_ARG_LIMIT=32 26 23 27 24 # 28 25 # General setup 29 26 # 27 + CONFIG_EXPERIMENTAL=y 28 + CONFIG_BROKEN_ON_SMP=y 29 + CONFIG_INIT_ENV_ARG_LIMIT=32 30 30 CONFIG_LOCALVERSION="" 31 31 # CONFIG_LOCALVERSION_AUTO is not set 32 32 # CONFIG_SWAP is not set 33 33 CONFIG_SYSVIPC=y 34 - # CONFIG_IPC_NS is not set 35 34 CONFIG_SYSVIPC_SYSCTL=y 36 35 CONFIG_POSIX_MQUEUE=y 37 36 CONFIG_BSD_PROCESS_ACCT=y 38 37 # CONFIG_BSD_PROCESS_ACCT_V3 is not set 39 38 # CONFIG_TASKSTATS is not set 40 - # CONFIG_UTS_NS is not set 41 39 # CONFIG_AUDIT is not set 42 40 # CONFIG_IKCONFIG is not set 41 + CONFIG_LOG_BUF_SHIFT=14 42 + # CONFIG_CGROUPS is not set 43 + # CONFIG_GROUP_SCHED is not set 43 44 CONFIG_SYSFS_DEPRECATED=y 45 + CONFIG_SYSFS_DEPRECATED_V2=y 44 46 # CONFIG_RELAY is not set 47 + # CONFIG_NAMESPACES is not set 45 48 # CONFIG_BLK_DEV_INITRD is not set 46 49 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 47 50 CONFIG_SYSCTL=y 48 51 CONFIG_EMBEDDED=y 49 52 CONFIG_UID16=y 50 53 CONFIG_SYSCTL_SYSCALL=y 54 + CONFIG_SYSCTL_SYSCALL_CHECK=y 51 55 CONFIG_KALLSYMS=y 52 56 CONFIG_KALLSYMS_ALL=y 53 57 # CONFIG_KALLSYMS_EXTRA_PASS is not set ··· 59 55 CONFIG_PRINTK=y 60 56 # CONFIG_BUG is not set 61 57 CONFIG_ELF_CORE=y 58 + CONFIG_COMPAT_BRK=y 62 59 # CONFIG_BASE_FULL is not set 63 60 CONFIG_FUTEX=y 61 + CONFIG_ANON_INODES=y 64 62 CONFIG_EPOLL=y 63 + CONFIG_SIGNALFD=y 64 + CONFIG_TIMERFD=y 65 + CONFIG_EVENTFD=y 65 66 # CONFIG_SHMEM is not set 66 - CONFIG_SLAB=y 67 67 CONFIG_VM_EVENT_COUNTERS=y 68 + CONFIG_SLAB=y 69 + # CONFIG_SLUB is not set 70 + # CONFIG_SLOB is not set 71 + # CONFIG_PROFILING is not set 72 + # CONFIG_MARKERS is not set 73 + CONFIG_HAVE_OPROFILE=y 74 + # CONFIG_HAVE_KPROBES is not set 75 + # CONFIG_HAVE_KRETPROBES is not set 76 + # CONFIG_HAVE_DMA_ATTRS is not set 77 + CONFIG_PROC_PAGE_MONITOR=y 78 + CONFIG_SLABINFO=y 68 79 CONFIG_RT_MUTEXES=y 69 80 CONFIG_TINY_SHMEM=y 70 81 CONFIG_BASE_SMALL=1 71 - # CONFIG_SLOB is not set 72 - 73 - # 74 - # Loadable module support 75 - # 76 82 CONFIG_MODULES=y 83 + # CONFIG_MODULE_FORCE_LOAD is not set 77 84 # CONFIG_MODULE_UNLOAD is not set 78 85 # CONFIG_MODVERSIONS is not set 79 86 # CONFIG_MODULE_SRCVERSION_ALL is not set 80 87 # CONFIG_KMOD is not set 81 - 82 - # 83 - # Block layer 84 - # 85 88 CONFIG_BLOCK=y 86 89 # CONFIG_LBD is not set 87 90 # CONFIG_BLK_DEV_IO_TRACE is not set 88 91 # CONFIG_LSF is not set 92 + # CONFIG_BLK_DEV_BSG is not set 89 93 90 94 # 91 95 # IO Schedulers ··· 107 95 # CONFIG_DEFAULT_CFQ is not set 108 96 CONFIG_DEFAULT_NOOP=y 109 97 CONFIG_DEFAULT_IOSCHED="noop" 98 + CONFIG_CLASSIC_RCU=y 110 99 111 100 # 112 101 # System type 113 102 # 114 - CONFIG_SOLUTION_ENGINE=y 115 - CONFIG_SH_SOLUTION_ENGINE=y 116 - # CONFIG_SH_7751_SOLUTION_ENGINE is not set 117 - # CONFIG_SH_7300_SOLUTION_ENGINE is not set 118 - # CONFIG_SH_7343_SOLUTION_ENGINE is not set 119 - # CONFIG_SH_73180_SOLUTION_ENGINE is not set 120 - # CONFIG_SH_7751_SYSTEMH is not set 121 - # CONFIG_SH_HP6XX is not set 122 - # CONFIG_SH_SATURN is not set 123 - # CONFIG_SH_DREAMCAST is not set 124 - # CONFIG_SH_MPC1211 is not set 125 - # CONFIG_SH_SH03 is not set 126 - # CONFIG_SH_SECUREEDGE5410 is not set 127 - # CONFIG_SH_HS7751RVOIP is not set 128 - # CONFIG_SH_7710VOIPGW is not set 129 - # CONFIG_SH_RTS7751R2D is not set 130 - # CONFIG_SH_HIGHLANDER is not set 131 - # CONFIG_SH_EDOSK7705 is not set 132 - # CONFIG_SH_SH4202_MICRODEV is not set 133 - # CONFIG_SH_LANDISK is not set 134 - # CONFIG_SH_TITAN is not set 135 - # CONFIG_SH_SHMIN is not set 136 - # CONFIG_SH_7206_SOLUTION_ENGINE is not set 137 - # CONFIG_SH_7619_SOLUTION_ENGINE is not set 138 - # CONFIG_SH_LBOX_RE2 is not set 139 - # CONFIG_SH_UNKNOWN is not set 140 - 141 - # 142 - # Processor selection 143 - # 144 103 CONFIG_CPU_SH3=y 145 - 146 - # 147 - # SH-2 Processor Support 148 - # 149 - # CONFIG_CPU_SUBTYPE_SH7604 is not set 150 104 # CONFIG_CPU_SUBTYPE_SH7619 is not set 151 - 152 - # 153 - # SH-2A Processor Support 154 - # 105 + # CONFIG_CPU_SUBTYPE_SH7203 is not set 155 106 # CONFIG_CPU_SUBTYPE_SH7206 is not set 156 - 157 - # 158 - # SH-3 Processor Support 159 - # 160 - # CONFIG_CPU_SUBTYPE_SH7300 is not set 107 + # CONFIG_CPU_SUBTYPE_SH7263 is not set 108 + # CONFIG_CPU_SUBTYPE_MXG is not set 161 109 # CONFIG_CPU_SUBTYPE_SH7705 is not set 162 110 # CONFIG_CPU_SUBTYPE_SH7706 is not set 163 111 # CONFIG_CPU_SUBTYPE_SH7707 is not set ··· 125 153 # CONFIG_CPU_SUBTYPE_SH7709 is not set 126 154 # CONFIG_CPU_SUBTYPE_SH7710 is not set 127 155 CONFIG_CPU_SUBTYPE_SH7712=y 128 - 129 - # 130 - # SH-4 Processor Support 131 - # 156 + # CONFIG_CPU_SUBTYPE_SH7720 is not set 157 + # CONFIG_CPU_SUBTYPE_SH7721 is not set 132 158 # CONFIG_CPU_SUBTYPE_SH7750 is not set 133 159 # CONFIG_CPU_SUBTYPE_SH7091 is not set 134 160 # CONFIG_CPU_SUBTYPE_SH7750R is not set ··· 135 165 # CONFIG_CPU_SUBTYPE_SH7751R is not set 136 166 # CONFIG_CPU_SUBTYPE_SH7760 is not set 137 167 # CONFIG_CPU_SUBTYPE_SH4_202 is not set 138 - 139 - # 140 - # ST40 Processor Support 141 - # 142 - # CONFIG_CPU_SUBTYPE_ST40STB1 is not set 143 - # CONFIG_CPU_SUBTYPE_ST40GX1 is not set 144 - 145 - # 146 - # SH-4A Processor Support 147 - # 168 + # CONFIG_CPU_SUBTYPE_SH7723 is not set 169 + # CONFIG_CPU_SUBTYPE_SH7763 is not set 148 170 # CONFIG_CPU_SUBTYPE_SH7770 is not set 149 171 # CONFIG_CPU_SUBTYPE_SH7780 is not set 150 172 # CONFIG_CPU_SUBTYPE_SH7785 is not set 151 - 152 - # 153 - # SH4AL-DSP Processor Support 154 - # 155 - # CONFIG_CPU_SUBTYPE_SH73180 is not set 173 + # CONFIG_CPU_SUBTYPE_SHX3 is not set 156 174 # CONFIG_CPU_SUBTYPE_SH7343 is not set 157 175 # CONFIG_CPU_SUBTYPE_SH7722 is not set 176 + # CONFIG_CPU_SUBTYPE_SH7366 is not set 177 + # CONFIG_CPU_SUBTYPE_SH5_101 is not set 178 + # CONFIG_CPU_SUBTYPE_SH5_103 is not set 158 179 159 180 # 160 181 # Memory management options 161 182 # 183 + CONFIG_QUICKLIST=y 162 184 CONFIG_MMU=y 163 185 CONFIG_PAGE_OFFSET=0x80000000 164 186 CONFIG_MEMORY_START=0x0c000000 165 187 CONFIG_MEMORY_SIZE=0x02000000 188 + CONFIG_29BIT=y 166 189 CONFIG_VSYSCALL=y 190 + CONFIG_ARCH_FLATMEM_ENABLE=y 191 + CONFIG_ARCH_SPARSEMEM_ENABLE=y 192 + CONFIG_ARCH_SPARSEMEM_DEFAULT=y 193 + CONFIG_MAX_ACTIVE_REGIONS=1 194 + CONFIG_ARCH_POPULATES_NODE_MAP=y 195 + CONFIG_ARCH_SELECT_MEMORY_MODEL=y 167 196 CONFIG_PAGE_SIZE_4KB=y 168 197 # CONFIG_PAGE_SIZE_8KB is not set 198 + # CONFIG_PAGE_SIZE_16KB is not set 169 199 # CONFIG_PAGE_SIZE_64KB is not set 170 200 CONFIG_SELECT_MEMORY_MODEL=y 171 201 CONFIG_FLATMEM_MANUAL=y ··· 173 203 # CONFIG_SPARSEMEM_MANUAL is not set 174 204 CONFIG_FLATMEM=y 175 205 CONFIG_FLAT_NODE_MEM_MAP=y 176 - # CONFIG_SPARSEMEM_STATIC is not set 206 + CONFIG_SPARSEMEM_STATIC=y 207 + # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set 208 + CONFIG_PAGEFLAGS_EXTENDED=y 177 209 CONFIG_SPLIT_PTLOCK_CPUS=4 178 210 # CONFIG_RESOURCES_64BIT is not set 179 211 CONFIG_ZONE_DMA_FLAG=0 212 + CONFIG_NR_QUICK=2 180 213 181 214 # 182 215 # Cache configuration 183 216 # 184 217 # CONFIG_SH_DIRECT_MAPPED is not set 185 - # CONFIG_SH_WRITETHROUGH is not set 186 - # CONFIG_SH_OCRAM is not set 187 - CONFIG_CF_ENABLER=y 188 - # CONFIG_CF_AREA5 is not set 189 - CONFIG_CF_AREA6=y 190 - CONFIG_CF_BASE_ADDR=0xb8000000 218 + CONFIG_CACHE_WRITEBACK=y 219 + # CONFIG_CACHE_WRITETHROUGH is not set 220 + # CONFIG_CACHE_OFF is not set 191 221 192 222 # 193 223 # Processor features ··· 200 230 CONFIG_CPU_HAS_INTEVT=y 201 231 CONFIG_CPU_HAS_IPR_IRQ=y 202 232 CONFIG_CPU_HAS_SR_RB=y 233 + CONFIG_CPU_HAS_DSP=y 234 + 235 + # 236 + # Board support 237 + # 238 + CONFIG_SOLUTION_ENGINE=y 239 + CONFIG_SH_SOLUTION_ENGINE=y 240 + # CONFIG_SH_AP325RXA is not set 203 241 204 242 # 205 243 # Timer and clock configuration ··· 215 237 CONFIG_SH_TMU=y 216 238 CONFIG_SH_TIMER_IRQ=16 217 239 CONFIG_SH_PCLK_FREQ=66666666 240 + # CONFIG_TICK_ONESHOT is not set 241 + # CONFIG_NO_HZ is not set 242 + # CONFIG_HIGH_RES_TIMERS is not set 243 + CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 218 244 219 245 # 220 246 # CPU Frequency scaling ··· 233 251 # 234 252 # Companion Chips 235 253 # 236 - # CONFIG_HD6446X_SERIES is not set 237 254 238 255 # 239 256 # Additional SuperH Device Drivers ··· 248 267 # CONFIG_HZ_300 is not set 249 268 # CONFIG_HZ_1000 is not set 250 269 CONFIG_HZ=250 270 + # CONFIG_SCHED_HRTICK is not set 251 271 # CONFIG_KEXEC is not set 252 - # CONFIG_SMP is not set 272 + # CONFIG_CRASH_DUMP is not set 253 273 # CONFIG_PREEMPT_NONE is not set 254 274 CONFIG_PREEMPT_VOLUNTARY=y 255 275 # CONFIG_PREEMPT is not set 276 + CONFIG_GUSA=y 277 + # CONFIG_GUSA_RB is not set 256 278 257 279 # 258 280 # Boot options 259 281 # 260 282 CONFIG_ZERO_PAGE_OFFSET=0x00001000 261 283 CONFIG_BOOT_LINK_OFFSET=0x00800000 262 - # CONFIG_UBC_WAKEUP is not set 263 284 CONFIG_CMDLINE_BOOL=y 264 285 CONFIG_CMDLINE="console=ttySC0,115200 root=/dev/sda1" 265 286 266 287 # 267 288 # Bus options 268 289 # 269 - # CONFIG_PCI is not set 270 - 271 - # 272 - # PCCARD (PCMCIA/CardBus) support 273 - # 290 + CONFIG_CF_ENABLER=y 291 + # CONFIG_CF_AREA5 is not set 292 + CONFIG_CF_AREA6=y 293 + CONFIG_CF_BASE_ADDR=0xb8000000 294 + # CONFIG_ARCH_SUPPORTS_MSI is not set 274 295 # CONFIG_PCCARD is not set 275 - 276 - # 277 - # PCI Hotplug Support 278 - # 279 296 280 297 # 281 298 # Executable file formats 282 299 # 283 300 CONFIG_BINFMT_ELF=y 284 - # CONFIG_BINFMT_FLAT is not set 285 301 # CONFIG_BINFMT_MISC is not set 286 - 287 - # 288 - # Power management options (EXPERIMENTAL) 289 - # 290 - # CONFIG_PM is not set 291 302 292 303 # 293 304 # Networking ··· 289 316 # 290 317 # Networking options 291 318 # 292 - # CONFIG_NETDEBUG is not set 293 319 CONFIG_PACKET=y 294 320 CONFIG_PACKET_MMAP=y 295 321 CONFIG_UNIX=y ··· 296 324 # CONFIG_XFRM_USER is not set 297 325 # CONFIG_XFRM_SUB_POLICY is not set 298 326 # CONFIG_XFRM_MIGRATE is not set 327 + # CONFIG_XFRM_STATISTICS is not set 299 328 CONFIG_NET_KEY=y 300 329 # CONFIG_NET_KEY_MIGRATE is not set 301 330 CONFIG_INET=y ··· 307 334 CONFIG_IP_FIB_HASH=y 308 335 CONFIG_IP_MULTIPLE_TABLES=y 309 336 CONFIG_IP_ROUTE_MULTIPATH=y 310 - # CONFIG_IP_ROUTE_MULTIPATH_CACHED is not set 311 337 CONFIG_IP_ROUTE_VERBOSE=y 312 338 CONFIG_IP_PNP=y 313 339 CONFIG_IP_PNP_DHCP=y 314 - # CONFIG_IP_PNP_BOOTP is not set 340 + CONFIG_IP_PNP_BOOTP=y 315 341 # CONFIG_IP_PNP_RARP is not set 316 342 # CONFIG_NET_IPIP is not set 317 343 # CONFIG_NET_IPGRE is not set ··· 327 355 CONFIG_INET_XFRM_MODE_TRANSPORT=y 328 356 CONFIG_INET_XFRM_MODE_TUNNEL=y 329 357 CONFIG_INET_XFRM_MODE_BEET=y 358 + # CONFIG_INET_LRO is not set 330 359 # CONFIG_INET_DIAG is not set 331 360 # CONFIG_TCP_CONG_ADVANCED is not set 332 361 CONFIG_TCP_CONG_CUBIC=y 333 362 CONFIG_DEFAULT_TCP_CONG="cubic" 334 363 # CONFIG_TCP_MD5SIG is not set 335 364 # CONFIG_IPV6 is not set 336 - # CONFIG_INET6_XFRM_TUNNEL is not set 337 - # CONFIG_INET6_TUNNEL is not set 338 365 # CONFIG_NETWORK_SECMARK is not set 339 366 # CONFIG_NETFILTER is not set 340 - 341 - # 342 - # DCCP Configuration (EXPERIMENTAL) 343 - # 344 367 # CONFIG_IP_DCCP is not set 345 - 346 - # 347 - # SCTP Configuration (EXPERIMENTAL) 348 - # 349 368 # CONFIG_IP_SCTP is not set 350 - 351 - # 352 - # TIPC Configuration (EXPERIMENTAL) 353 - # 354 369 # CONFIG_TIPC is not set 355 370 # CONFIG_ATM is not set 356 371 # CONFIG_BRIDGE is not set ··· 350 391 # CONFIG_LAPB is not set 351 392 # CONFIG_ECONET is not set 352 393 # CONFIG_WAN_ROUTER is not set 353 - 354 - # 355 - # QoS and/or fair queueing 356 - # 357 394 CONFIG_NET_SCHED=y 358 - CONFIG_NET_SCH_FIFO=y 359 - CONFIG_NET_SCH_CLK_JIFFIES=y 360 - # CONFIG_NET_SCH_CLK_GETTIMEOFDAY is not set 361 - # CONFIG_NET_SCH_CLK_CPU is not set 362 395 363 396 # 364 397 # Queueing/Scheduling ··· 359 408 CONFIG_NET_SCH_HTB=y 360 409 CONFIG_NET_SCH_HFSC=y 361 410 CONFIG_NET_SCH_PRIO=y 411 + # CONFIG_NET_SCH_RR is not set 362 412 CONFIG_NET_SCH_RED=y 363 413 CONFIG_NET_SCH_SFQ=y 364 414 CONFIG_NET_SCH_TEQL=y ··· 367 415 CONFIG_NET_SCH_GRED=y 368 416 CONFIG_NET_SCH_DSMARK=y 369 417 CONFIG_NET_SCH_NETEM=y 370 - CONFIG_NET_SCH_INGRESS=y 371 418 372 419 # 373 420 # Classification ··· 380 429 # CONFIG_NET_CLS_U32 is not set 381 430 # CONFIG_NET_CLS_RSVP is not set 382 431 # CONFIG_NET_CLS_RSVP6 is not set 432 + # CONFIG_NET_CLS_FLOW is not set 383 433 # CONFIG_NET_EMATCH is not set 384 434 # CONFIG_NET_CLS_ACT is not set 385 - # CONFIG_NET_CLS_POLICE is not set 386 435 CONFIG_NET_CLS_IND=y 387 - CONFIG_NET_ESTIMATOR=y 436 + CONFIG_NET_SCH_FIFO=y 388 437 389 438 # 390 439 # Network testing 391 440 # 392 441 # CONFIG_NET_PKTGEN is not set 393 442 # CONFIG_HAMRADIO is not set 443 + # CONFIG_CAN is not set 394 444 # CONFIG_IRDA is not set 395 445 # CONFIG_BT is not set 396 - # CONFIG_IEEE80211 is not set 446 + # CONFIG_AF_RXRPC is not set 397 447 CONFIG_FIB_RULES=y 448 + 449 + # 450 + # Wireless 451 + # 452 + # CONFIG_CFG80211 is not set 453 + # CONFIG_WIRELESS_EXT is not set 454 + # CONFIG_MAC80211 is not set 455 + # CONFIG_IEEE80211 is not set 456 + # CONFIG_RFKILL is not set 457 + # CONFIG_NET_9P is not set 398 458 399 459 # 400 460 # Device Drivers ··· 414 452 # 415 453 # Generic Driver Options 416 454 # 455 + CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 417 456 CONFIG_STANDALONE=y 418 457 CONFIG_PREVENT_FIRMWARE_BUILD=y 419 458 CONFIG_FW_LOADER=y 420 459 # CONFIG_DEBUG_DRIVER is not set 421 460 # CONFIG_DEBUG_DEVRES is not set 422 461 # CONFIG_SYS_HYPERVISOR is not set 423 - 424 - # 425 - # Connector - unified userspace <-> kernelspace linker 426 - # 427 462 # CONFIG_CONNECTOR is not set 428 - 429 - # 430 - # Memory Technology Devices (MTD) 431 - # 432 463 CONFIG_MTD=y 433 464 # CONFIG_MTD_DEBUG is not set 434 465 CONFIG_MTD_CONCAT=y 435 466 CONFIG_MTD_PARTITIONS=y 436 467 # CONFIG_MTD_REDBOOT_PARTS is not set 437 468 # CONFIG_MTD_CMDLINE_PARTS is not set 469 + # CONFIG_MTD_AR7_PARTS is not set 438 470 439 471 # 440 472 # User Modules And Translation Layers ··· 441 485 # CONFIG_INFTL is not set 442 486 # CONFIG_RFD_FTL is not set 443 487 # CONFIG_SSFDC is not set 488 + # CONFIG_MTD_OOPS is not set 444 489 445 490 # 446 491 # RAM/ROM/Flash chip drivers ··· 467 510 # CONFIG_MTD_RAM is not set 468 511 # CONFIG_MTD_ROM is not set 469 512 # CONFIG_MTD_ABSENT is not set 470 - # CONFIG_MTD_OBSOLETE_CHIPS is not set 471 513 472 514 # 473 515 # Mapping drivers for chip access ··· 489 533 # CONFIG_MTD_DOC2000 is not set 490 534 # CONFIG_MTD_DOC2001 is not set 491 535 # CONFIG_MTD_DOC2001PLUS is not set 492 - 493 - # 494 - # NAND Flash Device Drivers 495 - # 496 536 # CONFIG_MTD_NAND is not set 497 - 498 - # 499 - # OneNAND Flash Device Drivers 500 - # 501 537 # CONFIG_MTD_ONENAND is not set 502 538 503 539 # 504 - # Parallel port support 540 + # UBI - Unsorted block images 505 541 # 542 + # CONFIG_MTD_UBI is not set 506 543 # CONFIG_PARPORT is not set 507 - 508 - # 509 - # Plug and Play support 510 - # 511 - # CONFIG_PNPACPI is not set 512 - 513 - # 514 - # Block devices 515 - # 544 + CONFIG_BLK_DEV=y 516 545 # CONFIG_BLK_DEV_COW_COMMON is not set 517 546 # CONFIG_BLK_DEV_LOOP is not set 518 547 # CONFIG_BLK_DEV_NBD is not set 519 548 # CONFIG_BLK_DEV_RAM is not set 520 549 # CONFIG_CDROM_PKTCDVD is not set 521 550 # CONFIG_ATA_OVER_ETH is not set 522 - 523 - # 524 - # Misc devices 525 - # 526 - 527 - # 528 - # ATA/ATAPI/MFM/RLL support 529 - # 551 + CONFIG_MISC_DEVICES=y 552 + # CONFIG_EEPROM_93CX6 is not set 553 + # CONFIG_ENCLOSURE_SERVICES is not set 554 + CONFIG_HAVE_IDE=y 530 555 # CONFIG_IDE is not set 531 556 532 557 # ··· 515 578 # 516 579 # CONFIG_RAID_ATTRS is not set 517 580 CONFIG_SCSI=y 581 + CONFIG_SCSI_DMA=y 518 582 # CONFIG_SCSI_TGT is not set 519 583 # CONFIG_SCSI_NETLINK is not set 520 584 CONFIG_SCSI_PROC_FS=y ··· 537 599 # CONFIG_SCSI_CONSTANTS is not set 538 600 # CONFIG_SCSI_LOGGING is not set 539 601 # CONFIG_SCSI_SCAN_ASYNC is not set 602 + CONFIG_SCSI_WAIT_SCAN=m 540 603 541 604 # 542 605 # SCSI Transports ··· 545 606 # CONFIG_SCSI_SPI_ATTRS is not set 546 607 # CONFIG_SCSI_FC_ATTRS is not set 547 608 # CONFIG_SCSI_ISCSI_ATTRS is not set 548 - # CONFIG_SCSI_SAS_ATTRS is not set 549 609 # CONFIG_SCSI_SAS_LIBSAS is not set 550 - 551 - # 552 - # SCSI low-level drivers 553 - # 610 + # CONFIG_SCSI_SRP_ATTRS is not set 611 + CONFIG_SCSI_LOWLEVEL=y 554 612 # CONFIG_ISCSI_TCP is not set 555 613 # CONFIG_SCSI_DEBUG is not set 556 - 557 - # 558 - # Serial ATA (prod) and Parallel ATA (experimental) drivers 559 - # 560 614 CONFIG_ATA=y 561 615 # CONFIG_ATA_NONSTANDARD is not set 616 + CONFIG_SATA_PMP=y 617 + CONFIG_ATA_SFF=y 618 + # CONFIG_SATA_MV is not set 562 619 CONFIG_PATA_PLATFORM=y 563 - 564 - # 565 - # Multi-device support (RAID and LVM) 566 - # 567 620 # CONFIG_MD is not set 568 - 569 - # 570 - # Fusion MPT device support 571 - # 572 - # CONFIG_FUSION is not set 573 - 574 - # 575 - # IEEE 1394 (FireWire) support 576 - # 577 - 578 - # 579 - # I2O device support 580 - # 581 - 582 - # 583 - # Network device support 584 - # 585 621 CONFIG_NETDEVICES=y 622 + # CONFIG_NETDEVICES_MULTIQUEUE is not set 586 623 # CONFIG_DUMMY is not set 587 624 # CONFIG_BONDING is not set 625 + # CONFIG_MACVLAN is not set 588 626 # CONFIG_EQUALIZER is not set 589 627 # CONFIG_TUN is not set 628 + # CONFIG_VETH is not set 629 + CONFIG_PHYLIB=y 590 630 591 631 # 592 - # PHY device support 632 + # MII PHY device drivers 593 633 # 634 + # CONFIG_MARVELL_PHY is not set 635 + # CONFIG_DAVICOM_PHY is not set 636 + # CONFIG_QSEMI_PHY is not set 637 + # CONFIG_LXT_PHY is not set 638 + # CONFIG_CICADA_PHY is not set 639 + # CONFIG_VITESSE_PHY is not set 640 + # CONFIG_SMSC_PHY is not set 641 + # CONFIG_BROADCOM_PHY is not set 642 + # CONFIG_ICPLUS_PHY is not set 643 + # CONFIG_REALTEK_PHY is not set 644 + # CONFIG_FIXED_PHY is not set 645 + CONFIG_MDIO_BITBANG=y 646 + CONFIG_NET_ETHERNET=y 647 + CONFIG_MII=y 648 + # CONFIG_AX88796 is not set 649 + # CONFIG_STNIC is not set 650 + CONFIG_SH_ETH=y 651 + # CONFIG_SMC91X is not set 652 + # CONFIG_SMC911X is not set 653 + # CONFIG_IBM_NEW_EMAC_ZMII is not set 654 + # CONFIG_IBM_NEW_EMAC_RGMII is not set 655 + # CONFIG_IBM_NEW_EMAC_TAH is not set 656 + # CONFIG_IBM_NEW_EMAC_EMAC4 is not set 657 + # CONFIG_B44 is not set 658 + CONFIG_NETDEV_1000=y 659 + # CONFIG_E1000E_ENABLED is not set 660 + CONFIG_NETDEV_10000=y 594 661 595 662 # 596 - # Ethernet (10 or 100Mbit) 663 + # Wireless LAN 597 664 # 598 - # CONFIG_NET_ETHERNET is not set 599 - 600 - # 601 - # Ethernet (1000 Mbit) 602 - # 603 - 604 - # 605 - # Ethernet (10000 Mbit) 606 - # 607 - 608 - # 609 - # Token Ring devices 610 - # 611 - 612 - # 613 - # Wireless LAN (non-hamradio) 614 - # 615 - # CONFIG_NET_RADIO is not set 616 - 617 - # 618 - # Wan interfaces 619 - # 665 + # CONFIG_WLAN_PRE80211 is not set 666 + # CONFIG_WLAN_80211 is not set 667 + # CONFIG_IWLWIFI_LEDS is not set 620 668 # CONFIG_WAN is not set 621 669 # CONFIG_PPP is not set 622 670 # CONFIG_SLIP is not set 623 - # CONFIG_SHAPER is not set 624 671 # CONFIG_NETCONSOLE is not set 625 672 # CONFIG_NETPOLL is not set 626 673 # CONFIG_NET_POLL_CONTROLLER is not set 627 - 628 - # 629 - # ISDN subsystem 630 - # 631 674 # CONFIG_ISDN is not set 632 - 633 - # 634 - # Telephony Support 635 - # 636 675 # CONFIG_PHONE is not set 637 676 638 677 # ··· 628 711 # Character devices 629 712 # 630 713 # CONFIG_VT is not set 714 + CONFIG_DEVKMEM=y 631 715 # CONFIG_SERIAL_NONSTANDARD is not set 632 716 633 717 # ··· 646 728 CONFIG_SERIAL_CORE_CONSOLE=y 647 729 CONFIG_UNIX98_PTYS=y 648 730 # CONFIG_LEGACY_PTYS is not set 649 - 650 - # 651 - # IPMI 652 - # 653 731 # CONFIG_IPMI_HANDLER is not set 654 - 655 - # 656 - # Watchdog Cards 657 - # 658 - # CONFIG_WATCHDOG is not set 659 732 CONFIG_HW_RANDOM=m 660 - # CONFIG_GEN_RTC is not set 661 - # CONFIG_DTLK is not set 662 733 # CONFIG_R3964 is not set 663 734 # CONFIG_RAW_DRIVER is not set 664 - 665 - # 666 - # TPM devices 667 - # 668 735 # CONFIG_TCG_TPM is not set 669 - 670 - # 671 - # I2C support 672 - # 673 736 # CONFIG_I2C is not set 674 - 675 - # 676 - # SPI support 677 - # 678 737 # CONFIG_SPI is not set 679 - # CONFIG_SPI_MASTER is not set 680 - 681 - # 682 - # Dallas's 1-wire bus 683 - # 684 738 # CONFIG_W1 is not set 739 + # CONFIG_POWER_SUPPLY is not set 740 + # CONFIG_HWMON is not set 741 + # CONFIG_THERMAL is not set 742 + # CONFIG_WATCHDOG is not set 685 743 686 744 # 687 - # Hardware Monitoring support 745 + # Sonics Silicon Backplane 688 746 # 689 - # CONFIG_HWMON is not set 690 - # CONFIG_HWMON_VID is not set 747 + CONFIG_SSB_POSSIBLE=y 748 + # CONFIG_SSB is not set 691 749 692 750 # 693 751 # Multifunction device drivers 694 752 # 695 753 # CONFIG_MFD_SM501 is not set 754 + # CONFIG_HTC_PASIC3 is not set 696 755 697 756 # 698 757 # Multimedia devices 699 758 # 700 - # CONFIG_VIDEO_DEV is not set 701 759 702 760 # 703 - # Digital Video Broadcasting Devices 761 + # Multimedia core support 704 762 # 705 - # CONFIG_DVB is not set 763 + # CONFIG_VIDEO_DEV is not set 764 + # CONFIG_DVB_CORE is not set 765 + # CONFIG_VIDEO_MEDIA is not set 766 + 767 + # 768 + # Multimedia drivers 769 + # 770 + # CONFIG_DAB is not set 706 771 707 772 # 708 773 # Graphics support 709 774 # 710 - # CONFIG_BACKLIGHT_LCD_SUPPORT is not set 775 + # CONFIG_VGASTATE is not set 776 + # CONFIG_VIDEO_OUTPUT_CONTROL is not set 711 777 # CONFIG_FB is not set 778 + # CONFIG_BACKLIGHT_LCD_SUPPORT is not set 779 + 780 + # 781 + # Display device support 782 + # 783 + # CONFIG_DISPLAY_SUPPORT is not set 712 784 713 785 # 714 786 # Sound 715 787 # 716 788 # CONFIG_SOUND is not set 717 - 718 - # 719 - # USB support 720 - # 721 - # CONFIG_USB_ARCH_HAS_HCD is not set 789 + CONFIG_USB_SUPPORT=y 790 + CONFIG_USB_ARCH_HAS_HCD=y 722 791 # CONFIG_USB_ARCH_HAS_OHCI is not set 723 792 # CONFIG_USB_ARCH_HAS_EHCI is not set 793 + # CONFIG_USB is not set 794 + # CONFIG_USB_OTG_WHITELIST is not set 795 + # CONFIG_USB_OTG_BLACKLIST_HUB is not set 724 796 725 797 # 726 798 # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 727 799 # 728 - 729 - # 730 - # USB Gadget Support 731 - # 732 800 # CONFIG_USB_GADGET is not set 733 - 734 - # 735 - # MMC/SD Card support 736 - # 737 801 # CONFIG_MMC is not set 738 - 739 - # 740 - # LED devices 741 - # 802 + # CONFIG_MEMSTICK is not set 742 803 CONFIG_NEW_LEDS=y 743 804 CONFIG_LEDS_CLASS=y 744 805 ··· 731 834 CONFIG_LEDS_TRIGGERS=y 732 835 # CONFIG_LEDS_TRIGGER_TIMER is not set 733 836 # CONFIG_LEDS_TRIGGER_HEARTBEAT is not set 734 - 735 - # 736 - # InfiniBand support 737 - # 738 - 739 - # 740 - # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) 741 - # 742 - 743 - # 744 - # Real Time Clock 745 - # 837 + # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set 838 + # CONFIG_ACCESSIBILITY is not set 746 839 # CONFIG_RTC_CLASS is not set 747 - 748 - # 749 - # DMA Engine support 750 - # 751 - # CONFIG_DMA_ENGINE is not set 752 - 753 - # 754 - # DMA Clients 755 - # 756 - 757 - # 758 - # DMA Devices 759 - # 760 - 761 - # 762 - # Auxiliary Display support 763 - # 764 - 765 - # 766 - # Virtualization 767 - # 840 + # CONFIG_UIO is not set 768 841 769 842 # 770 843 # File systems ··· 744 877 CONFIG_EXT2_FS_POSIX_ACL=y 745 878 CONFIG_EXT2_FS_SECURITY=y 746 879 # CONFIG_EXT2_FS_XIP is not set 747 - # CONFIG_EXT3_FS is not set 880 + CONFIG_EXT3_FS=y 881 + CONFIG_EXT3_FS_XATTR=y 882 + # CONFIG_EXT3_FS_POSIX_ACL is not set 883 + # CONFIG_EXT3_FS_SECURITY is not set 748 884 # CONFIG_EXT4DEV_FS is not set 885 + CONFIG_JBD=y 749 886 CONFIG_FS_MBCACHE=y 750 887 # CONFIG_REISERFS_FS is not set 751 888 # CONFIG_JFS_FS is not set 752 889 CONFIG_FS_POSIX_ACL=y 753 890 # CONFIG_XFS_FS is not set 754 - # CONFIG_GFS2_FS is not set 755 891 # CONFIG_OCFS2_FS is not set 756 - # CONFIG_MINIX_FS is not set 757 - # CONFIG_ROMFS_FS is not set 892 + # CONFIG_DNOTIFY is not set 758 893 # CONFIG_INOTIFY is not set 759 894 # CONFIG_QUOTA is not set 760 - # CONFIG_DNOTIFY is not set 761 895 # CONFIG_AUTOFS_FS is not set 762 896 # CONFIG_AUTOFS4_FS is not set 763 897 # CONFIG_FUSE_FS is not set ··· 787 919 # CONFIG_TMPFS_POSIX_ACL is not set 788 920 # CONFIG_HUGETLBFS is not set 789 921 # CONFIG_HUGETLB_PAGE is not set 790 - CONFIG_RAMFS=y 791 922 # CONFIG_CONFIGFS_FS is not set 792 923 793 924 # ··· 802 935 CONFIG_JFFS2_FS=y 803 936 CONFIG_JFFS2_FS_DEBUG=0 804 937 CONFIG_JFFS2_FS_WRITEBUFFER=y 938 + # CONFIG_JFFS2_FS_WBUF_VERIFY is not set 805 939 # CONFIG_JFFS2_SUMMARY is not set 806 940 # CONFIG_JFFS2_FS_XATTR is not set 807 941 # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set 808 942 CONFIG_JFFS2_ZLIB=y 943 + # CONFIG_JFFS2_LZO is not set 809 944 CONFIG_JFFS2_RTIME=y 810 945 # CONFIG_JFFS2_RUBIN is not set 811 946 CONFIG_CRAMFS=y 812 947 # CONFIG_VXFS_FS is not set 948 + # CONFIG_MINIX_FS is not set 813 949 # CONFIG_HPFS_FS is not set 814 950 # CONFIG_QNX4FS_FS is not set 951 + # CONFIG_ROMFS_FS is not set 815 952 # CONFIG_SYSV_FS is not set 816 953 # CONFIG_UFS_FS is not set 817 - 818 - # 819 - # Network File Systems 820 - # 821 - # CONFIG_NFS_FS is not set 954 + CONFIG_NETWORK_FILESYSTEMS=y 955 + CONFIG_NFS_FS=y 956 + # CONFIG_NFS_V3 is not set 957 + # CONFIG_NFS_V4 is not set 822 958 # CONFIG_NFSD is not set 959 + CONFIG_ROOT_NFS=y 960 + CONFIG_LOCKD=y 961 + CONFIG_NFS_COMMON=y 962 + CONFIG_SUNRPC=y 963 + # CONFIG_SUNRPC_BIND34 is not set 964 + # CONFIG_RPCSEC_GSS_KRB5 is not set 965 + # CONFIG_RPCSEC_GSS_SPKM3 is not set 823 966 # CONFIG_SMB_FS is not set 824 967 # CONFIG_CIFS is not set 825 968 # CONFIG_NCP_FS is not set 826 969 # CONFIG_CODA_FS is not set 827 970 # CONFIG_AFS_FS is not set 828 - # CONFIG_9P_FS is not set 829 971 830 972 # 831 973 # Partition Types 832 974 # 833 975 # CONFIG_PARTITION_ADVANCED is not set 834 976 CONFIG_MSDOS_PARTITION=y 835 - 836 - # 837 - # Native Language Support 838 - # 839 977 # CONFIG_NLS is not set 840 - 841 - # 842 - # Distributed Lock Manager 843 - # 844 978 # CONFIG_DLM is not set 845 - 846 - # 847 - # Profiling support 848 - # 849 - # CONFIG_PROFILING is not set 850 979 851 980 # 852 981 # Kernel hacking 853 982 # 854 983 CONFIG_TRACE_IRQFLAGS_SUPPORT=y 855 984 # CONFIG_PRINTK_TIME is not set 985 + CONFIG_ENABLE_WARN_DEPRECATED=y 856 986 CONFIG_ENABLE_MUST_CHECK=y 987 + CONFIG_FRAME_WARN=1024 857 988 # CONFIG_MAGIC_SYSRQ is not set 858 989 # CONFIG_UNUSED_SYMBOLS is not set 859 990 # CONFIG_DEBUG_FS is not set 860 991 # CONFIG_HEADERS_CHECK is not set 861 992 CONFIG_DEBUG_KERNEL=y 862 993 # CONFIG_DEBUG_SHIRQ is not set 863 - CONFIG_LOG_BUF_SHIFT=14 864 994 # CONFIG_DETECT_SOFTLOCKUP is not set 995 + CONFIG_SCHED_DEBUG=y 865 996 # CONFIG_SCHEDSTATS is not set 866 997 # CONFIG_TIMER_STATS is not set 998 + # CONFIG_DEBUG_OBJECTS is not set 867 999 # CONFIG_DEBUG_SLAB is not set 868 1000 # CONFIG_DEBUG_RT_MUTEXES is not set 869 1001 # CONFIG_RT_MUTEX_TESTER is not set ··· 870 1004 # CONFIG_DEBUG_MUTEXES is not set 871 1005 # CONFIG_DEBUG_LOCK_ALLOC is not set 872 1006 # CONFIG_PROVE_LOCKING is not set 1007 + # CONFIG_LOCK_STAT is not set 873 1008 # CONFIG_DEBUG_SPINLOCK_SLEEP is not set 874 1009 # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 875 1010 # CONFIG_DEBUG_KOBJECT is not set 876 1011 CONFIG_DEBUG_INFO=y 877 1012 # CONFIG_DEBUG_VM is not set 1013 + # CONFIG_DEBUG_WRITECOUNT is not set 878 1014 # CONFIG_DEBUG_LIST is not set 1015 + # CONFIG_DEBUG_SG is not set 879 1016 CONFIG_FRAME_POINTER=y 880 - # CONFIG_FORCED_INLINING is not set 1017 + # CONFIG_BOOT_PRINTK_DELAY is not set 881 1018 # CONFIG_RCU_TORTURE_TEST is not set 1019 + # CONFIG_BACKTRACE_SELF_TEST is not set 882 1020 # CONFIG_FAULT_INJECTION is not set 1021 + # CONFIG_SAMPLES is not set 883 1022 # CONFIG_SH_STANDARD_BIOS is not set 884 1023 # CONFIG_EARLY_SCIF_CONSOLE is not set 1024 + # CONFIG_DEBUG_BOOTMEM is not set 885 1025 # CONFIG_DEBUG_STACKOVERFLOW is not set 886 1026 # CONFIG_DEBUG_STACK_USAGE is not set 887 1027 # CONFIG_4KSTACKS is not set 1028 + # CONFIG_IRQSTACKS is not set 888 1029 # CONFIG_SH_KGDB is not set 889 1030 890 1031 # ··· 899 1026 # 900 1027 # CONFIG_KEYS is not set 901 1028 # CONFIG_SECURITY is not set 1029 + # CONFIG_SECURITY_FILE_CAPABILITIES is not set 1030 + CONFIG_CRYPTO=y 902 1031 903 1032 # 904 - # Cryptographic options 1033 + # Crypto core or helper 905 1034 # 906 - CONFIG_CRYPTO=y 907 1035 CONFIG_CRYPTO_ALGAPI=y 1036 + CONFIG_CRYPTO_AEAD=y 908 1037 CONFIG_CRYPTO_BLKCIPHER=y 909 1038 CONFIG_CRYPTO_HASH=y 910 1039 CONFIG_CRYPTO_MANAGER=y 911 - CONFIG_CRYPTO_HMAC=y 912 - # CONFIG_CRYPTO_XCBC is not set 913 - # CONFIG_CRYPTO_NULL is not set 914 - # CONFIG_CRYPTO_MD4 is not set 915 - CONFIG_CRYPTO_MD5=y 916 - CONFIG_CRYPTO_SHA1=y 917 - # CONFIG_CRYPTO_SHA256 is not set 918 - # CONFIG_CRYPTO_SHA512 is not set 919 - # CONFIG_CRYPTO_WP512 is not set 920 - # CONFIG_CRYPTO_TGR192 is not set 921 1040 # CONFIG_CRYPTO_GF128MUL is not set 922 - CONFIG_CRYPTO_ECB=m 923 - CONFIG_CRYPTO_CBC=y 924 - CONFIG_CRYPTO_PCBC=m 925 - # CONFIG_CRYPTO_LRW is not set 926 - CONFIG_CRYPTO_DES=y 927 - # CONFIG_CRYPTO_FCRYPT is not set 928 - # CONFIG_CRYPTO_BLOWFISH is not set 929 - # CONFIG_CRYPTO_TWOFISH is not set 930 - # CONFIG_CRYPTO_SERPENT is not set 931 - # CONFIG_CRYPTO_AES is not set 932 - # CONFIG_CRYPTO_CAST5 is not set 933 - # CONFIG_CRYPTO_CAST6 is not set 934 - # CONFIG_CRYPTO_TEA is not set 935 - # CONFIG_CRYPTO_ARC4 is not set 936 - # CONFIG_CRYPTO_KHAZAD is not set 937 - # CONFIG_CRYPTO_ANUBIS is not set 938 - CONFIG_CRYPTO_DEFLATE=y 939 - # CONFIG_CRYPTO_MICHAEL_MIC is not set 940 - # CONFIG_CRYPTO_CRC32C is not set 941 - # CONFIG_CRYPTO_CAMELLIA is not set 1041 + # CONFIG_CRYPTO_NULL is not set 1042 + # CONFIG_CRYPTO_CRYPTD is not set 1043 + CONFIG_CRYPTO_AUTHENC=y 942 1044 # CONFIG_CRYPTO_TEST is not set 943 1045 944 1046 # 945 - # Hardware crypto devices 1047 + # Authenticated Encryption with Associated Data 946 1048 # 1049 + # CONFIG_CRYPTO_CCM is not set 1050 + # CONFIG_CRYPTO_GCM is not set 1051 + # CONFIG_CRYPTO_SEQIV is not set 1052 + 1053 + # 1054 + # Block modes 1055 + # 1056 + CONFIG_CRYPTO_CBC=y 1057 + # CONFIG_CRYPTO_CTR is not set 1058 + # CONFIG_CRYPTO_CTS is not set 1059 + CONFIG_CRYPTO_ECB=m 1060 + # CONFIG_CRYPTO_LRW is not set 1061 + CONFIG_CRYPTO_PCBC=m 1062 + # CONFIG_CRYPTO_XTS is not set 1063 + 1064 + # 1065 + # Hash modes 1066 + # 1067 + CONFIG_CRYPTO_HMAC=y 1068 + # CONFIG_CRYPTO_XCBC is not set 1069 + 1070 + # 1071 + # Digest 1072 + # 1073 + # CONFIG_CRYPTO_CRC32C is not set 1074 + # CONFIG_CRYPTO_MD4 is not set 1075 + CONFIG_CRYPTO_MD5=y 1076 + # CONFIG_CRYPTO_MICHAEL_MIC is not set 1077 + CONFIG_CRYPTO_SHA1=y 1078 + # CONFIG_CRYPTO_SHA256 is not set 1079 + # CONFIG_CRYPTO_SHA512 is not set 1080 + # CONFIG_CRYPTO_TGR192 is not set 1081 + # CONFIG_CRYPTO_WP512 is not set 1082 + 1083 + # 1084 + # Ciphers 1085 + # 1086 + # CONFIG_CRYPTO_AES is not set 1087 + # CONFIG_CRYPTO_ANUBIS is not set 1088 + # CONFIG_CRYPTO_ARC4 is not set 1089 + # CONFIG_CRYPTO_BLOWFISH is not set 1090 + # CONFIG_CRYPTO_CAMELLIA is not set 1091 + # CONFIG_CRYPTO_CAST5 is not set 1092 + # CONFIG_CRYPTO_CAST6 is not set 1093 + CONFIG_CRYPTO_DES=y 1094 + # CONFIG_CRYPTO_FCRYPT is not set 1095 + # CONFIG_CRYPTO_KHAZAD is not set 1096 + # CONFIG_CRYPTO_SALSA20 is not set 1097 + # CONFIG_CRYPTO_SEED is not set 1098 + # CONFIG_CRYPTO_SERPENT is not set 1099 + # CONFIG_CRYPTO_TEA is not set 1100 + # CONFIG_CRYPTO_TWOFISH is not set 1101 + 1102 + # 1103 + # Compression 1104 + # 1105 + CONFIG_CRYPTO_DEFLATE=y 1106 + # CONFIG_CRYPTO_LZO is not set 1107 + CONFIG_CRYPTO_HW=y 947 1108 948 1109 # 949 1110 # Library routines 950 1111 # 951 1112 CONFIG_BITREVERSE=y 1113 + # CONFIG_GENERIC_FIND_FIRST_BIT is not set 952 1114 CONFIG_CRC_CCITT=y 953 1115 # CONFIG_CRC16 is not set 1116 + # CONFIG_CRC_ITU_T is not set 954 1117 CONFIG_CRC32=y 1118 + # CONFIG_CRC7 is not set 955 1119 # CONFIG_LIBCRC32C is not set 956 1120 CONFIG_ZLIB_INFLATE=y 957 1121 CONFIG_ZLIB_DEFLATE=y 958 1122 CONFIG_PLIST=y 959 1123 CONFIG_HAS_IOMEM=y 960 1124 CONFIG_HAS_IOPORT=y 1125 + CONFIG_HAS_DMA=y
+1052
arch/sh/configs/sh7763rdp_defconfig
··· 1 + # 2 + # Automatically generated make config: don't edit 3 + # Linux kernel version: 2.6.26-rc4 4 + # Fri Jun 6 12:20:17 2008 5 + # 6 + CONFIG_SUPERH=y 7 + CONFIG_SUPERH32=y 8 + CONFIG_RWSEM_GENERIC_SPINLOCK=y 9 + CONFIG_GENERIC_BUG=y 10 + CONFIG_GENERIC_FIND_NEXT_BIT=y 11 + CONFIG_GENERIC_HWEIGHT=y 12 + CONFIG_GENERIC_HARDIRQS=y 13 + CONFIG_GENERIC_IRQ_PROBE=y 14 + CONFIG_GENERIC_CALIBRATE_DELAY=y 15 + CONFIG_GENERIC_TIME=y 16 + CONFIG_GENERIC_CLOCKEVENTS=y 17 + CONFIG_STACKTRACE_SUPPORT=y 18 + CONFIG_LOCKDEP_SUPPORT=y 19 + # CONFIG_ARCH_HAS_ILOG2_U32 is not set 20 + # CONFIG_ARCH_HAS_ILOG2_U64 is not set 21 + CONFIG_ARCH_NO_VIRT_TO_BUS=y 22 + CONFIG_ARCH_SUPPORTS_AOUT=y 23 + CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 24 + 25 + # 26 + # General setup 27 + # 28 + CONFIG_EXPERIMENTAL=y 29 + CONFIG_BROKEN_ON_SMP=y 30 + CONFIG_INIT_ENV_ARG_LIMIT=32 31 + CONFIG_LOCALVERSION="" 32 + CONFIG_LOCALVERSION_AUTO=y 33 + CONFIG_SWAP=y 34 + CONFIG_SYSVIPC=y 35 + CONFIG_SYSVIPC_SYSCTL=y 36 + # CONFIG_POSIX_MQUEUE is not set 37 + # CONFIG_BSD_PROCESS_ACCT is not set 38 + # CONFIG_TASKSTATS is not set 39 + # CONFIG_AUDIT is not set 40 + CONFIG_IKCONFIG=y 41 + CONFIG_IKCONFIG_PROC=y 42 + CONFIG_LOG_BUF_SHIFT=14 43 + # CONFIG_CGROUPS is not set 44 + CONFIG_GROUP_SCHED=y 45 + CONFIG_FAIR_GROUP_SCHED=y 46 + # CONFIG_RT_GROUP_SCHED is not set 47 + CONFIG_USER_SCHED=y 48 + # CONFIG_CGROUP_SCHED is not set 49 + CONFIG_SYSFS_DEPRECATED=y 50 + CONFIG_SYSFS_DEPRECATED_V2=y 51 + # CONFIG_RELAY is not set 52 + CONFIG_NAMESPACES=y 53 + CONFIG_UTS_NS=y 54 + CONFIG_IPC_NS=y 55 + # CONFIG_USER_NS is not set 56 + # CONFIG_PID_NS is not set 57 + # CONFIG_BLK_DEV_INITRD is not set 58 + CONFIG_CC_OPTIMIZE_FOR_SIZE=y 59 + CONFIG_SYSCTL=y 60 + CONFIG_EMBEDDED=y 61 + CONFIG_UID16=y 62 + # CONFIG_SYSCTL_SYSCALL is not set 63 + CONFIG_KALLSYMS=y 64 + # CONFIG_KALLSYMS_EXTRA_PASS is not set 65 + CONFIG_HOTPLUG=y 66 + CONFIG_PRINTK=y 67 + CONFIG_BUG=y 68 + CONFIG_ELF_CORE=y 69 + CONFIG_COMPAT_BRK=y 70 + CONFIG_BASE_FULL=y 71 + CONFIG_FUTEX=y 72 + CONFIG_ANON_INODES=y 73 + CONFIG_EPOLL=y 74 + CONFIG_SIGNALFD=y 75 + CONFIG_TIMERFD=y 76 + CONFIG_EVENTFD=y 77 + CONFIG_SHMEM=y 78 + CONFIG_VM_EVENT_COUNTERS=y 79 + CONFIG_SLAB=y 80 + # CONFIG_SLUB is not set 81 + # CONFIG_SLOB is not set 82 + CONFIG_PROFILING=y 83 + # CONFIG_MARKERS is not set 84 + CONFIG_OPROFILE=y 85 + CONFIG_HAVE_OPROFILE=y 86 + # CONFIG_HAVE_KPROBES is not set 87 + # CONFIG_HAVE_KRETPROBES is not set 88 + # CONFIG_HAVE_DMA_ATTRS is not set 89 + CONFIG_PROC_PAGE_MONITOR=y 90 + CONFIG_SLABINFO=y 91 + CONFIG_RT_MUTEXES=y 92 + # CONFIG_TINY_SHMEM is not set 93 + CONFIG_BASE_SMALL=0 94 + CONFIG_MODULES=y 95 + # CONFIG_MODULE_FORCE_LOAD is not set 96 + # CONFIG_MODULE_UNLOAD is not set 97 + # CONFIG_MODVERSIONS is not set 98 + # CONFIG_MODULE_SRCVERSION_ALL is not set 99 + # CONFIG_KMOD is not set 100 + CONFIG_BLOCK=y 101 + # CONFIG_LBD is not set 102 + # CONFIG_BLK_DEV_IO_TRACE is not set 103 + # CONFIG_LSF is not set 104 + # CONFIG_BLK_DEV_BSG is not set 105 + 106 + # 107 + # IO Schedulers 108 + # 109 + CONFIG_IOSCHED_NOOP=y 110 + CONFIG_IOSCHED_AS=y 111 + CONFIG_IOSCHED_DEADLINE=y 112 + CONFIG_IOSCHED_CFQ=y 113 + CONFIG_DEFAULT_AS=y 114 + # CONFIG_DEFAULT_DEADLINE is not set 115 + # CONFIG_DEFAULT_CFQ is not set 116 + # CONFIG_DEFAULT_NOOP is not set 117 + CONFIG_DEFAULT_IOSCHED="anticipatory" 118 + CONFIG_CLASSIC_RCU=y 119 + 120 + # 121 + # System type 122 + # 123 + CONFIG_CPU_SH4=y 124 + CONFIG_CPU_SH4A=y 125 + # CONFIG_CPU_SUBTYPE_SH7619 is not set 126 + # CONFIG_CPU_SUBTYPE_SH7203 is not set 127 + # CONFIG_CPU_SUBTYPE_SH7206 is not set 128 + # CONFIG_CPU_SUBTYPE_SH7263 is not set 129 + # CONFIG_CPU_SUBTYPE_MXG is not set 130 + # CONFIG_CPU_SUBTYPE_SH7705 is not set 131 + # CONFIG_CPU_SUBTYPE_SH7706 is not set 132 + # CONFIG_CPU_SUBTYPE_SH7707 is not set 133 + # CONFIG_CPU_SUBTYPE_SH7708 is not set 134 + # CONFIG_CPU_SUBTYPE_SH7709 is not set 135 + # CONFIG_CPU_SUBTYPE_SH7710 is not set 136 + # CONFIG_CPU_SUBTYPE_SH7712 is not set 137 + # CONFIG_CPU_SUBTYPE_SH7720 is not set 138 + # CONFIG_CPU_SUBTYPE_SH7721 is not set 139 + # CONFIG_CPU_SUBTYPE_SH7750 is not set 140 + # CONFIG_CPU_SUBTYPE_SH7091 is not set 141 + # CONFIG_CPU_SUBTYPE_SH7750R is not set 142 + # CONFIG_CPU_SUBTYPE_SH7750S is not set 143 + # CONFIG_CPU_SUBTYPE_SH7751 is not set 144 + # CONFIG_CPU_SUBTYPE_SH7751R is not set 145 + # CONFIG_CPU_SUBTYPE_SH7760 is not set 146 + # CONFIG_CPU_SUBTYPE_SH4_202 is not set 147 + # CONFIG_CPU_SUBTYPE_SH7723 is not set 148 + CONFIG_CPU_SUBTYPE_SH7763=y 149 + # CONFIG_CPU_SUBTYPE_SH7770 is not set 150 + # CONFIG_CPU_SUBTYPE_SH7780 is not set 151 + # CONFIG_CPU_SUBTYPE_SH7785 is not set 152 + # CONFIG_CPU_SUBTYPE_SHX3 is not set 153 + # CONFIG_CPU_SUBTYPE_SH7343 is not set 154 + # CONFIG_CPU_SUBTYPE_SH7722 is not set 155 + # CONFIG_CPU_SUBTYPE_SH7366 is not set 156 + # CONFIG_CPU_SUBTYPE_SH5_101 is not set 157 + # CONFIG_CPU_SUBTYPE_SH5_103 is not set 158 + 159 + # 160 + # Memory management options 161 + # 162 + CONFIG_QUICKLIST=y 163 + CONFIG_MMU=y 164 + CONFIG_PAGE_OFFSET=0x80000000 165 + CONFIG_MEMORY_START=0x0c000000 166 + CONFIG_MEMORY_SIZE=0x04000000 167 + CONFIG_29BIT=y 168 + CONFIG_VSYSCALL=y 169 + CONFIG_ARCH_FLATMEM_ENABLE=y 170 + CONFIG_ARCH_SPARSEMEM_ENABLE=y 171 + CONFIG_ARCH_SPARSEMEM_DEFAULT=y 172 + CONFIG_MAX_ACTIVE_REGIONS=1 173 + CONFIG_ARCH_POPULATES_NODE_MAP=y 174 + CONFIG_ARCH_SELECT_MEMORY_MODEL=y 175 + CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 176 + CONFIG_PAGE_SIZE_4KB=y 177 + # CONFIG_PAGE_SIZE_8KB is not set 178 + # CONFIG_PAGE_SIZE_16KB is not set 179 + # CONFIG_PAGE_SIZE_64KB is not set 180 + CONFIG_SELECT_MEMORY_MODEL=y 181 + # CONFIG_FLATMEM_MANUAL is not set 182 + # CONFIG_DISCONTIGMEM_MANUAL is not set 183 + CONFIG_SPARSEMEM_MANUAL=y 184 + CONFIG_SPARSEMEM=y 185 + CONFIG_HAVE_MEMORY_PRESENT=y 186 + CONFIG_SPARSEMEM_STATIC=y 187 + # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set 188 + # CONFIG_MEMORY_HOTPLUG is not set 189 + CONFIG_PAGEFLAGS_EXTENDED=y 190 + CONFIG_SPLIT_PTLOCK_CPUS=4 191 + # CONFIG_RESOURCES_64BIT is not set 192 + CONFIG_ZONE_DMA_FLAG=0 193 + CONFIG_NR_QUICK=2 194 + 195 + # 196 + # Cache configuration 197 + # 198 + # CONFIG_SH_DIRECT_MAPPED is not set 199 + CONFIG_CACHE_WRITEBACK=y 200 + # CONFIG_CACHE_WRITETHROUGH is not set 201 + # CONFIG_CACHE_OFF is not set 202 + 203 + # 204 + # Processor features 205 + # 206 + CONFIG_CPU_LITTLE_ENDIAN=y 207 + # CONFIG_CPU_BIG_ENDIAN is not set 208 + CONFIG_SH_FPU=y 209 + # CONFIG_SH_STORE_QUEUES is not set 210 + CONFIG_CPU_HAS_INTEVT=y 211 + CONFIG_CPU_HAS_SR_RB=y 212 + CONFIG_CPU_HAS_FPU=y 213 + 214 + # 215 + # Board support 216 + # 217 + CONFIG_SH_SH7763RDP=y 218 + 219 + # 220 + # Timer and clock configuration 221 + # 222 + CONFIG_SH_TMU=y 223 + CONFIG_SH_TIMER_IRQ=28 224 + CONFIG_SH_PCLK_FREQ=66666666 225 + # CONFIG_TICK_ONESHOT is not set 226 + # CONFIG_NO_HZ is not set 227 + # CONFIG_HIGH_RES_TIMERS is not set 228 + CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 229 + 230 + # 231 + # CPU Frequency scaling 232 + # 233 + # CONFIG_CPU_FREQ is not set 234 + 235 + # 236 + # DMA support 237 + # 238 + # CONFIG_SH_DMA is not set 239 + 240 + # 241 + # Companion Chips 242 + # 243 + 244 + # 245 + # Additional SuperH Device Drivers 246 + # 247 + # CONFIG_HEARTBEAT is not set 248 + # CONFIG_PUSH_SWITCH is not set 249 + 250 + # 251 + # Kernel features 252 + # 253 + # CONFIG_HZ_100 is not set 254 + CONFIG_HZ_250=y 255 + # CONFIG_HZ_300 is not set 256 + # CONFIG_HZ_1000 is not set 257 + CONFIG_HZ=250 258 + # CONFIG_SCHED_HRTICK is not set 259 + # CONFIG_KEXEC is not set 260 + # CONFIG_CRASH_DUMP is not set 261 + CONFIG_PREEMPT_NONE=y 262 + # CONFIG_PREEMPT_VOLUNTARY is not set 263 + # CONFIG_PREEMPT is not set 264 + CONFIG_GUSA=y 265 + 266 + # 267 + # Boot options 268 + # 269 + CONFIG_ZERO_PAGE_OFFSET=0x00001000 270 + CONFIG_BOOT_LINK_OFFSET=0x00800000 271 + CONFIG_CMDLINE_BOOL=y 272 + CONFIG_CMDLINE="console=ttySC2,115200 root=/dev/sda1 rootdelay=10" 273 + 274 + # 275 + # Bus options 276 + # 277 + # CONFIG_ARCH_SUPPORTS_MSI is not set 278 + # CONFIG_PCCARD is not set 279 + 280 + # 281 + # Executable file formats 282 + # 283 + CONFIG_BINFMT_ELF=y 284 + # CONFIG_BINFMT_MISC is not set 285 + 286 + # 287 + # Networking 288 + # 289 + CONFIG_NET=y 290 + 291 + # 292 + # Networking options 293 + # 294 + CONFIG_PACKET=y 295 + # CONFIG_PACKET_MMAP is not set 296 + CONFIG_UNIX=y 297 + CONFIG_XFRM=y 298 + # CONFIG_XFRM_USER is not set 299 + # CONFIG_XFRM_SUB_POLICY is not set 300 + # CONFIG_XFRM_MIGRATE is not set 301 + # CONFIG_XFRM_STATISTICS is not set 302 + # CONFIG_NET_KEY is not set 303 + CONFIG_INET=y 304 + # CONFIG_IP_MULTICAST is not set 305 + # CONFIG_IP_ADVANCED_ROUTER is not set 306 + CONFIG_IP_FIB_HASH=y 307 + CONFIG_IP_PNP=y 308 + CONFIG_IP_PNP_DHCP=y 309 + CONFIG_IP_PNP_BOOTP=y 310 + # CONFIG_IP_PNP_RARP is not set 311 + # CONFIG_NET_IPIP is not set 312 + # CONFIG_NET_IPGRE is not set 313 + # CONFIG_ARPD is not set 314 + # CONFIG_SYN_COOKIES is not set 315 + # CONFIG_INET_AH is not set 316 + # CONFIG_INET_ESP is not set 317 + # CONFIG_INET_IPCOMP is not set 318 + # CONFIG_INET_XFRM_TUNNEL is not set 319 + # CONFIG_INET_TUNNEL is not set 320 + CONFIG_INET_XFRM_MODE_TRANSPORT=y 321 + CONFIG_INET_XFRM_MODE_TUNNEL=y 322 + CONFIG_INET_XFRM_MODE_BEET=y 323 + # CONFIG_INET_LRO is not set 324 + CONFIG_INET_DIAG=y 325 + CONFIG_INET_TCP_DIAG=y 326 + # CONFIG_TCP_CONG_ADVANCED is not set 327 + CONFIG_TCP_CONG_CUBIC=y 328 + CONFIG_DEFAULT_TCP_CONG="cubic" 329 + # CONFIG_TCP_MD5SIG is not set 330 + # CONFIG_IPV6 is not set 331 + # CONFIG_NETWORK_SECMARK is not set 332 + # CONFIG_NETFILTER is not set 333 + # CONFIG_IP_DCCP is not set 334 + # CONFIG_IP_SCTP is not set 335 + # CONFIG_TIPC is not set 336 + # CONFIG_ATM is not set 337 + # CONFIG_BRIDGE is not set 338 + # CONFIG_VLAN_8021Q is not set 339 + # CONFIG_DECNET is not set 340 + # CONFIG_LLC2 is not set 341 + # CONFIG_IPX is not set 342 + # CONFIG_ATALK is not set 343 + # CONFIG_X25 is not set 344 + # CONFIG_LAPB is not set 345 + # CONFIG_ECONET is not set 346 + # CONFIG_WAN_ROUTER is not set 347 + # CONFIG_NET_SCHED is not set 348 + 349 + # 350 + # Network testing 351 + # 352 + # CONFIG_NET_PKTGEN is not set 353 + # CONFIG_HAMRADIO is not set 354 + # CONFIG_CAN is not set 355 + # CONFIG_IRDA is not set 356 + # CONFIG_BT is not set 357 + # CONFIG_AF_RXRPC is not set 358 + 359 + # 360 + # Wireless 361 + # 362 + # CONFIG_CFG80211 is not set 363 + CONFIG_WIRELESS_EXT=y 364 + # CONFIG_MAC80211 is not set 365 + # CONFIG_IEEE80211 is not set 366 + # CONFIG_RFKILL is not set 367 + # CONFIG_NET_9P is not set 368 + 369 + # 370 + # Device Drivers 371 + # 372 + 373 + # 374 + # Generic Driver Options 375 + # 376 + CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 377 + CONFIG_STANDALONE=y 378 + CONFIG_PREVENT_FIRMWARE_BUILD=y 379 + CONFIG_FW_LOADER=y 380 + # CONFIG_SYS_HYPERVISOR is not set 381 + # CONFIG_CONNECTOR is not set 382 + CONFIG_MTD=y 383 + # CONFIG_MTD_DEBUG is not set 384 + # CONFIG_MTD_CONCAT is not set 385 + CONFIG_MTD_PARTITIONS=y 386 + # CONFIG_MTD_REDBOOT_PARTS is not set 387 + CONFIG_MTD_CMDLINE_PARTS=y 388 + # CONFIG_MTD_AR7_PARTS is not set 389 + 390 + # 391 + # User Modules And Translation Layers 392 + # 393 + # CONFIG_MTD_CHAR is not set 394 + CONFIG_MTD_BLKDEVS=y 395 + # CONFIG_MTD_BLOCK is not set 396 + # CONFIG_MTD_BLOCK_RO is not set 397 + # CONFIG_FTL is not set 398 + # CONFIG_NFTL is not set 399 + # CONFIG_INFTL is not set 400 + # CONFIG_RFD_FTL is not set 401 + # CONFIG_SSFDC is not set 402 + # CONFIG_MTD_OOPS is not set 403 + 404 + # 405 + # RAM/ROM/Flash chip drivers 406 + # 407 + CONFIG_MTD_CFI=y 408 + CONFIG_MTD_JEDECPROBE=y 409 + CONFIG_MTD_GEN_PROBE=y 410 + CONFIG_MTD_CFI_ADV_OPTIONS=y 411 + CONFIG_MTD_CFI_NOSWAP=y 412 + # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set 413 + # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set 414 + CONFIG_MTD_CFI_GEOMETRY=y 415 + CONFIG_MTD_MAP_BANK_WIDTH_1=y 416 + CONFIG_MTD_MAP_BANK_WIDTH_2=y 417 + # CONFIG_MTD_MAP_BANK_WIDTH_4 is not set 418 + # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set 419 + # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set 420 + # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set 421 + CONFIG_MTD_CFI_I1=y 422 + CONFIG_MTD_CFI_I2=y 423 + # CONFIG_MTD_CFI_I4 is not set 424 + # CONFIG_MTD_CFI_I8 is not set 425 + # CONFIG_MTD_OTP is not set 426 + CONFIG_MTD_CFI_INTELEXT=y 427 + CONFIG_MTD_CFI_AMDSTD=y 428 + CONFIG_MTD_CFI_STAA=y 429 + CONFIG_MTD_CFI_UTIL=y 430 + # CONFIG_MTD_RAM is not set 431 + # CONFIG_MTD_ROM is not set 432 + # CONFIG_MTD_ABSENT is not set 433 + 434 + # 435 + # Mapping drivers for chip access 436 + # 437 + CONFIG_MTD_COMPLEX_MAPPINGS=y 438 + CONFIG_MTD_PHYSMAP=y 439 + CONFIG_MTD_PHYSMAP_START=0x8000000 440 + CONFIG_MTD_PHYSMAP_LEN=0 441 + CONFIG_MTD_PHYSMAP_BANKWIDTH=2 442 + # CONFIG_MTD_PLATRAM is not set 443 + 444 + # 445 + # Self-contained MTD device drivers 446 + # 447 + # CONFIG_MTD_SLRAM is not set 448 + # CONFIG_MTD_PHRAM is not set 449 + # CONFIG_MTD_MTDRAM is not set 450 + # CONFIG_MTD_BLOCK2MTD is not set 451 + 452 + # 453 + # Disk-On-Chip Device Drivers 454 + # 455 + # CONFIG_MTD_DOC2000 is not set 456 + # CONFIG_MTD_DOC2001 is not set 457 + # CONFIG_MTD_DOC2001PLUS is not set 458 + # CONFIG_MTD_NAND is not set 459 + # CONFIG_MTD_ONENAND is not set 460 + 461 + # 462 + # UBI - Unsorted block images 463 + # 464 + # CONFIG_MTD_UBI is not set 465 + # CONFIG_PARPORT is not set 466 + CONFIG_BLK_DEV=y 467 + # CONFIG_BLK_DEV_COW_COMMON is not set 468 + # CONFIG_BLK_DEV_LOOP is not set 469 + # CONFIG_BLK_DEV_NBD is not set 470 + # CONFIG_BLK_DEV_UB is not set 471 + # CONFIG_BLK_DEV_RAM is not set 472 + # CONFIG_CDROM_PKTCDVD is not set 473 + # CONFIG_ATA_OVER_ETH is not set 474 + # CONFIG_MISC_DEVICES is not set 475 + CONFIG_HAVE_IDE=y 476 + # CONFIG_IDE is not set 477 + 478 + # 479 + # SCSI device support 480 + # 481 + # CONFIG_RAID_ATTRS is not set 482 + CONFIG_SCSI=y 483 + CONFIG_SCSI_DMA=y 484 + # CONFIG_SCSI_TGT is not set 485 + # CONFIG_SCSI_NETLINK is not set 486 + CONFIG_SCSI_PROC_FS=y 487 + 488 + # 489 + # SCSI support type (disk, tape, CD-ROM) 490 + # 491 + CONFIG_BLK_DEV_SD=y 492 + # CONFIG_CHR_DEV_ST is not set 493 + # CONFIG_CHR_DEV_OSST is not set 494 + # CONFIG_BLK_DEV_SR is not set 495 + # CONFIG_CHR_DEV_SG is not set 496 + # CONFIG_CHR_DEV_SCH is not set 497 + 498 + # 499 + # Some SCSI devices (e.g. CD jukebox) support multiple LUNs 500 + # 501 + # CONFIG_SCSI_MULTI_LUN is not set 502 + # CONFIG_SCSI_CONSTANTS is not set 503 + # CONFIG_SCSI_LOGGING is not set 504 + # CONFIG_SCSI_SCAN_ASYNC is not set 505 + CONFIG_SCSI_WAIT_SCAN=m 506 + 507 + # 508 + # SCSI Transports 509 + # 510 + # CONFIG_SCSI_SPI_ATTRS is not set 511 + # CONFIG_SCSI_FC_ATTRS is not set 512 + # CONFIG_SCSI_ISCSI_ATTRS is not set 513 + # CONFIG_SCSI_SAS_LIBSAS is not set 514 + # CONFIG_SCSI_SRP_ATTRS is not set 515 + CONFIG_SCSI_LOWLEVEL=y 516 + # CONFIG_ISCSI_TCP is not set 517 + # CONFIG_SCSI_DEBUG is not set 518 + # CONFIG_ATA is not set 519 + # CONFIG_MD is not set 520 + CONFIG_NETDEVICES=y 521 + # CONFIG_NETDEVICES_MULTIQUEUE is not set 522 + # CONFIG_DUMMY is not set 523 + # CONFIG_BONDING is not set 524 + # CONFIG_MACVLAN is not set 525 + # CONFIG_EQUALIZER is not set 526 + # CONFIG_TUN is not set 527 + # CONFIG_VETH is not set 528 + CONFIG_PHYLIB=y 529 + 530 + # 531 + # MII PHY device drivers 532 + # 533 + # CONFIG_MARVELL_PHY is not set 534 + # CONFIG_DAVICOM_PHY is not set 535 + # CONFIG_QSEMI_PHY is not set 536 + # CONFIG_LXT_PHY is not set 537 + # CONFIG_CICADA_PHY is not set 538 + # CONFIG_VITESSE_PHY is not set 539 + # CONFIG_SMSC_PHY is not set 540 + # CONFIG_BROADCOM_PHY is not set 541 + # CONFIG_ICPLUS_PHY is not set 542 + # CONFIG_REALTEK_PHY is not set 543 + # CONFIG_FIXED_PHY is not set 544 + CONFIG_MDIO_BITBANG=y 545 + CONFIG_NET_ETHERNET=y 546 + CONFIG_MII=y 547 + # CONFIG_AX88796 is not set 548 + # CONFIG_STNIC is not set 549 + # CONFIG_SMC91X is not set 550 + # CONFIG_IBM_NEW_EMAC_ZMII is not set 551 + # CONFIG_IBM_NEW_EMAC_RGMII is not set 552 + # CONFIG_IBM_NEW_EMAC_TAH is not set 553 + # CONFIG_IBM_NEW_EMAC_EMAC4 is not set 554 + # CONFIG_B44 is not set 555 + # CONFIG_NETDEV_1000 is not set 556 + # CONFIG_NETDEV_10000 is not set 557 + 558 + # 559 + # Wireless LAN 560 + # 561 + # CONFIG_WLAN_PRE80211 is not set 562 + # CONFIG_WLAN_80211 is not set 563 + # CONFIG_IWLWIFI_LEDS is not set 564 + 565 + # 566 + # USB Network Adapters 567 + # 568 + # CONFIG_USB_CATC is not set 569 + # CONFIG_USB_KAWETH is not set 570 + # CONFIG_USB_PEGASUS is not set 571 + # CONFIG_USB_RTL8150 is not set 572 + # CONFIG_USB_USBNET is not set 573 + # CONFIG_WAN is not set 574 + # CONFIG_PPP is not set 575 + # CONFIG_SLIP is not set 576 + # CONFIG_NETCONSOLE is not set 577 + # CONFIG_NETPOLL is not set 578 + # CONFIG_NET_POLL_CONTROLLER is not set 579 + # CONFIG_ISDN is not set 580 + # CONFIG_PHONE is not set 581 + 582 + # 583 + # Input device support 584 + # 585 + CONFIG_INPUT=y 586 + # CONFIG_INPUT_FF_MEMLESS is not set 587 + # CONFIG_INPUT_POLLDEV is not set 588 + 589 + # 590 + # Userland interfaces 591 + # 592 + # CONFIG_INPUT_MOUSEDEV is not set 593 + # CONFIG_INPUT_JOYDEV is not set 594 + # CONFIG_INPUT_EVDEV is not set 595 + # CONFIG_INPUT_EVBUG is not set 596 + 597 + # 598 + # Input Device Drivers 599 + # 600 + # CONFIG_INPUT_KEYBOARD is not set 601 + # CONFIG_INPUT_MOUSE is not set 602 + # CONFIG_INPUT_JOYSTICK is not set 603 + # CONFIG_INPUT_TABLET is not set 604 + # CONFIG_INPUT_TOUCHSCREEN is not set 605 + # CONFIG_INPUT_MISC is not set 606 + 607 + # 608 + # Hardware I/O ports 609 + # 610 + # CONFIG_SERIO is not set 611 + # CONFIG_GAMEPORT is not set 612 + 613 + # 614 + # Character devices 615 + # 616 + # CONFIG_VT is not set 617 + CONFIG_DEVKMEM=y 618 + # CONFIG_SERIAL_NONSTANDARD is not set 619 + 620 + # 621 + # Serial drivers 622 + # 623 + # CONFIG_SERIAL_8250 is not set 624 + 625 + # 626 + # Non-8250 serial port support 627 + # 628 + CONFIG_SERIAL_SH_SCI=y 629 + CONFIG_SERIAL_SH_SCI_NR_UARTS=3 630 + CONFIG_SERIAL_SH_SCI_CONSOLE=y 631 + CONFIG_SERIAL_CORE=y 632 + CONFIG_SERIAL_CORE_CONSOLE=y 633 + CONFIG_UNIX98_PTYS=y 634 + CONFIG_LEGACY_PTYS=y 635 + CONFIG_LEGACY_PTY_COUNT=256 636 + # CONFIG_IPMI_HANDLER is not set 637 + CONFIG_HW_RANDOM=y 638 + # CONFIG_R3964 is not set 639 + # CONFIG_RAW_DRIVER is not set 640 + # CONFIG_TCG_TPM is not set 641 + # CONFIG_I2C is not set 642 + # CONFIG_SPI is not set 643 + # CONFIG_W1 is not set 644 + # CONFIG_POWER_SUPPLY is not set 645 + # CONFIG_HWMON is not set 646 + # CONFIG_THERMAL is not set 647 + # CONFIG_WATCHDOG is not set 648 + 649 + # 650 + # Sonics Silicon Backplane 651 + # 652 + CONFIG_SSB_POSSIBLE=y 653 + # CONFIG_SSB is not set 654 + 655 + # 656 + # Multifunction device drivers 657 + # 658 + # CONFIG_MFD_SM501 is not set 659 + # CONFIG_HTC_PASIC3 is not set 660 + 661 + # 662 + # Multimedia devices 663 + # 664 + 665 + # 666 + # Multimedia core support 667 + # 668 + # CONFIG_VIDEO_DEV is not set 669 + # CONFIG_DVB_CORE is not set 670 + # CONFIG_VIDEO_MEDIA is not set 671 + 672 + # 673 + # Multimedia drivers 674 + # 675 + # CONFIG_DAB is not set 676 + 677 + # 678 + # Graphics support 679 + # 680 + # CONFIG_VGASTATE is not set 681 + # CONFIG_VIDEO_OUTPUT_CONTROL is not set 682 + # CONFIG_FB is not set 683 + # CONFIG_BACKLIGHT_LCD_SUPPORT is not set 684 + 685 + # 686 + # Display device support 687 + # 688 + # CONFIG_DISPLAY_SUPPORT is not set 689 + 690 + # 691 + # Sound 692 + # 693 + # CONFIG_SOUND is not set 694 + # CONFIG_HID_SUPPORT is not set 695 + CONFIG_USB_SUPPORT=y 696 + CONFIG_USB_ARCH_HAS_HCD=y 697 + CONFIG_USB_ARCH_HAS_OHCI=y 698 + # CONFIG_USB_ARCH_HAS_EHCI is not set 699 + CONFIG_USB=y 700 + # CONFIG_USB_DEBUG is not set 701 + # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set 702 + 703 + # 704 + # Miscellaneous USB options 705 + # 706 + # CONFIG_USB_DEVICEFS is not set 707 + CONFIG_USB_DEVICE_CLASS=y 708 + # CONFIG_USB_DYNAMIC_MINORS is not set 709 + # CONFIG_USB_OTG is not set 710 + # CONFIG_USB_OTG_WHITELIST is not set 711 + # CONFIG_USB_OTG_BLACKLIST_HUB is not set 712 + 713 + # 714 + # USB Host Controller Drivers 715 + # 716 + # CONFIG_USB_C67X00_HCD is not set 717 + # CONFIG_USB_ISP116X_HCD is not set 718 + # CONFIG_USB_ISP1760_HCD is not set 719 + CONFIG_USB_OHCI_HCD=y 720 + # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set 721 + # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set 722 + CONFIG_USB_OHCI_LITTLE_ENDIAN=y 723 + # CONFIG_USB_SL811_HCD is not set 724 + # CONFIG_USB_R8A66597_HCD is not set 725 + 726 + # 727 + # USB Device Class drivers 728 + # 729 + # CONFIG_USB_ACM is not set 730 + # CONFIG_USB_PRINTER is not set 731 + # CONFIG_USB_WDM is not set 732 + 733 + # 734 + # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 735 + # 736 + 737 + # 738 + # may also be needed; see USB_STORAGE Help for more information 739 + # 740 + CONFIG_USB_STORAGE=y 741 + # CONFIG_USB_STORAGE_DEBUG is not set 742 + # CONFIG_USB_STORAGE_DATAFAB is not set 743 + # CONFIG_USB_STORAGE_FREECOM is not set 744 + # CONFIG_USB_STORAGE_ISD200 is not set 745 + # CONFIG_USB_STORAGE_DPCM is not set 746 + # CONFIG_USB_STORAGE_USBAT is not set 747 + # CONFIG_USB_STORAGE_SDDR09 is not set 748 + # CONFIG_USB_STORAGE_SDDR55 is not set 749 + # CONFIG_USB_STORAGE_JUMPSHOT is not set 750 + # CONFIG_USB_STORAGE_ALAUDA is not set 751 + # CONFIG_USB_STORAGE_ONETOUCH is not set 752 + # CONFIG_USB_STORAGE_KARMA is not set 753 + # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set 754 + # CONFIG_USB_LIBUSUAL is not set 755 + 756 + # 757 + # USB Imaging devices 758 + # 759 + # CONFIG_USB_MDC800 is not set 760 + # CONFIG_USB_MICROTEK is not set 761 + CONFIG_USB_MON=y 762 + 763 + # 764 + # USB port drivers 765 + # 766 + # CONFIG_USB_SERIAL is not set 767 + 768 + # 769 + # USB Miscellaneous drivers 770 + # 771 + # CONFIG_USB_EMI62 is not set 772 + # CONFIG_USB_EMI26 is not set 773 + # CONFIG_USB_ADUTUX is not set 774 + # CONFIG_USB_AUERSWALD is not set 775 + # CONFIG_USB_RIO500 is not set 776 + # CONFIG_USB_LEGOTOWER is not set 777 + # CONFIG_USB_LCD is not set 778 + # CONFIG_USB_BERRY_CHARGE is not set 779 + # CONFIG_USB_LED is not set 780 + # CONFIG_USB_CYPRESS_CY7C63 is not set 781 + # CONFIG_USB_CYTHERM is not set 782 + # CONFIG_USB_PHIDGET is not set 783 + # CONFIG_USB_IDMOUSE is not set 784 + # CONFIG_USB_FTDI_ELAN is not set 785 + # CONFIG_USB_APPLEDISPLAY is not set 786 + # CONFIG_USB_LD is not set 787 + # CONFIG_USB_TRANCEVIBRATOR is not set 788 + # CONFIG_USB_IOWARRIOR is not set 789 + # CONFIG_USB_ISIGHTFW is not set 790 + # CONFIG_USB_GADGET is not set 791 + # CONFIG_MMC is not set 792 + # CONFIG_MEMSTICK is not set 793 + # CONFIG_NEW_LEDS is not set 794 + # CONFIG_ACCESSIBILITY is not set 795 + # CONFIG_RTC_CLASS is not set 796 + # CONFIG_UIO is not set 797 + 798 + # 799 + # File systems 800 + # 801 + CONFIG_EXT2_FS=y 802 + # CONFIG_EXT2_FS_XATTR is not set 803 + # CONFIG_EXT2_FS_XIP is not set 804 + CONFIG_EXT3_FS=y 805 + CONFIG_EXT3_FS_XATTR=y 806 + # CONFIG_EXT3_FS_POSIX_ACL is not set 807 + # CONFIG_EXT3_FS_SECURITY is not set 808 + # CONFIG_EXT4DEV_FS is not set 809 + CONFIG_JBD=y 810 + CONFIG_FS_MBCACHE=y 811 + # CONFIG_REISERFS_FS is not set 812 + # CONFIG_JFS_FS is not set 813 + CONFIG_FS_POSIX_ACL=y 814 + # CONFIG_XFS_FS is not set 815 + # CONFIG_OCFS2_FS is not set 816 + CONFIG_DNOTIFY=y 817 + CONFIG_INOTIFY=y 818 + CONFIG_INOTIFY_USER=y 819 + # CONFIG_QUOTA is not set 820 + CONFIG_AUTOFS_FS=y 821 + CONFIG_AUTOFS4_FS=y 822 + # CONFIG_FUSE_FS is not set 823 + CONFIG_GENERIC_ACL=y 824 + 825 + # 826 + # CD-ROM/DVD Filesystems 827 + # 828 + # CONFIG_ISO9660_FS is not set 829 + # CONFIG_UDF_FS is not set 830 + 831 + # 832 + # DOS/FAT/NT Filesystems 833 + # 834 + CONFIG_FAT_FS=y 835 + CONFIG_MSDOS_FS=y 836 + CONFIG_VFAT_FS=y 837 + CONFIG_FAT_DEFAULT_CODEPAGE=437 838 + CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" 839 + # CONFIG_NTFS_FS is not set 840 + 841 + # 842 + # Pseudo filesystems 843 + # 844 + CONFIG_PROC_FS=y 845 + CONFIG_PROC_KCORE=y 846 + CONFIG_PROC_SYSCTL=y 847 + CONFIG_SYSFS=y 848 + CONFIG_TMPFS=y 849 + CONFIG_TMPFS_POSIX_ACL=y 850 + # CONFIG_HUGETLBFS is not set 851 + # CONFIG_HUGETLB_PAGE is not set 852 + # CONFIG_CONFIGFS_FS is not set 853 + 854 + # 855 + # Miscellaneous filesystems 856 + # 857 + # CONFIG_ADFS_FS is not set 858 + # CONFIG_AFFS_FS is not set 859 + # CONFIG_HFS_FS is not set 860 + # CONFIG_HFSPLUS_FS is not set 861 + # CONFIG_BEFS_FS is not set 862 + # CONFIG_BFS_FS is not set 863 + # CONFIG_EFS_FS is not set 864 + # CONFIG_JFFS2_FS is not set 865 + # CONFIG_CRAMFS is not set 866 + # CONFIG_VXFS_FS is not set 867 + # CONFIG_MINIX_FS is not set 868 + # CONFIG_HPFS_FS is not set 869 + # CONFIG_QNX4FS_FS is not set 870 + # CONFIG_ROMFS_FS is not set 871 + # CONFIG_SYSV_FS is not set 872 + # CONFIG_UFS_FS is not set 873 + CONFIG_NETWORK_FILESYSTEMS=y 874 + CONFIG_NFS_FS=y 875 + # CONFIG_NFS_V3 is not set 876 + # CONFIG_NFS_V4 is not set 877 + # CONFIG_NFSD is not set 878 + CONFIG_ROOT_NFS=y 879 + CONFIG_LOCKD=y 880 + CONFIG_NFS_COMMON=y 881 + CONFIG_SUNRPC=y 882 + # CONFIG_SUNRPC_BIND34 is not set 883 + # CONFIG_RPCSEC_GSS_KRB5 is not set 884 + # CONFIG_RPCSEC_GSS_SPKM3 is not set 885 + # CONFIG_SMB_FS is not set 886 + # CONFIG_CIFS is not set 887 + # CONFIG_NCP_FS is not set 888 + # CONFIG_CODA_FS is not set 889 + # CONFIG_AFS_FS is not set 890 + 891 + # 892 + # Partition Types 893 + # 894 + # CONFIG_PARTITION_ADVANCED is not set 895 + CONFIG_MSDOS_PARTITION=y 896 + CONFIG_NLS=y 897 + CONFIG_NLS_DEFAULT="iso8859-1" 898 + CONFIG_NLS_CODEPAGE_437=y 899 + CONFIG_NLS_CODEPAGE_737=y 900 + CONFIG_NLS_CODEPAGE_775=y 901 + CONFIG_NLS_CODEPAGE_850=y 902 + CONFIG_NLS_CODEPAGE_852=y 903 + CONFIG_NLS_CODEPAGE_855=y 904 + CONFIG_NLS_CODEPAGE_857=y 905 + CONFIG_NLS_CODEPAGE_860=y 906 + CONFIG_NLS_CODEPAGE_861=y 907 + CONFIG_NLS_CODEPAGE_862=y 908 + CONFIG_NLS_CODEPAGE_863=y 909 + CONFIG_NLS_CODEPAGE_864=y 910 + CONFIG_NLS_CODEPAGE_865=y 911 + CONFIG_NLS_CODEPAGE_866=y 912 + CONFIG_NLS_CODEPAGE_869=y 913 + CONFIG_NLS_CODEPAGE_936=y 914 + CONFIG_NLS_CODEPAGE_950=y 915 + CONFIG_NLS_CODEPAGE_932=y 916 + CONFIG_NLS_CODEPAGE_949=y 917 + CONFIG_NLS_CODEPAGE_874=y 918 + CONFIG_NLS_ISO8859_8=y 919 + CONFIG_NLS_CODEPAGE_1250=y 920 + CONFIG_NLS_CODEPAGE_1251=y 921 + CONFIG_NLS_ASCII=y 922 + CONFIG_NLS_ISO8859_1=y 923 + CONFIG_NLS_ISO8859_2=y 924 + CONFIG_NLS_ISO8859_3=y 925 + CONFIG_NLS_ISO8859_4=y 926 + CONFIG_NLS_ISO8859_5=y 927 + CONFIG_NLS_ISO8859_6=y 928 + CONFIG_NLS_ISO8859_7=y 929 + CONFIG_NLS_ISO8859_9=y 930 + CONFIG_NLS_ISO8859_13=y 931 + CONFIG_NLS_ISO8859_14=y 932 + CONFIG_NLS_ISO8859_15=y 933 + CONFIG_NLS_KOI8_R=y 934 + CONFIG_NLS_KOI8_U=y 935 + CONFIG_NLS_UTF8=y 936 + # CONFIG_DLM is not set 937 + 938 + # 939 + # Kernel hacking 940 + # 941 + CONFIG_TRACE_IRQFLAGS_SUPPORT=y 942 + # CONFIG_PRINTK_TIME is not set 943 + # CONFIG_ENABLE_WARN_DEPRECATED is not set 944 + # CONFIG_ENABLE_MUST_CHECK is not set 945 + CONFIG_FRAME_WARN=1024 946 + # CONFIG_MAGIC_SYSRQ is not set 947 + # CONFIG_UNUSED_SYMBOLS is not set 948 + # CONFIG_DEBUG_FS is not set 949 + # CONFIG_HEADERS_CHECK is not set 950 + # CONFIG_DEBUG_KERNEL is not set 951 + # CONFIG_DEBUG_BUGVERBOSE is not set 952 + # CONFIG_SAMPLES is not set 953 + # CONFIG_SH_STANDARD_BIOS is not set 954 + # CONFIG_EARLY_SCIF_CONSOLE is not set 955 + # CONFIG_SH_KGDB is not set 956 + 957 + # 958 + # Security options 959 + # 960 + # CONFIG_KEYS is not set 961 + # CONFIG_SECURITY is not set 962 + # CONFIG_SECURITY_FILE_CAPABILITIES is not set 963 + CONFIG_CRYPTO=y 964 + 965 + # 966 + # Crypto core or helper 967 + # 968 + # CONFIG_CRYPTO_MANAGER is not set 969 + # CONFIG_CRYPTO_GF128MUL is not set 970 + # CONFIG_CRYPTO_NULL is not set 971 + # CONFIG_CRYPTO_CRYPTD is not set 972 + # CONFIG_CRYPTO_AUTHENC is not set 973 + # CONFIG_CRYPTO_TEST is not set 974 + 975 + # 976 + # Authenticated Encryption with Associated Data 977 + # 978 + # CONFIG_CRYPTO_CCM is not set 979 + # CONFIG_CRYPTO_GCM is not set 980 + # CONFIG_CRYPTO_SEQIV is not set 981 + 982 + # 983 + # Block modes 984 + # 985 + # CONFIG_CRYPTO_CBC is not set 986 + # CONFIG_CRYPTO_CTR is not set 987 + # CONFIG_CRYPTO_CTS is not set 988 + # CONFIG_CRYPTO_ECB is not set 989 + # CONFIG_CRYPTO_LRW is not set 990 + # CONFIG_CRYPTO_PCBC is not set 991 + # CONFIG_CRYPTO_XTS is not set 992 + 993 + # 994 + # Hash modes 995 + # 996 + # CONFIG_CRYPTO_HMAC is not set 997 + # CONFIG_CRYPTO_XCBC is not set 998 + 999 + # 1000 + # Digest 1001 + # 1002 + # CONFIG_CRYPTO_CRC32C is not set 1003 + # CONFIG_CRYPTO_MD4 is not set 1004 + # CONFIG_CRYPTO_MD5 is not set 1005 + # CONFIG_CRYPTO_MICHAEL_MIC is not set 1006 + # CONFIG_CRYPTO_SHA1 is not set 1007 + # CONFIG_CRYPTO_SHA256 is not set 1008 + # CONFIG_CRYPTO_SHA512 is not set 1009 + # CONFIG_CRYPTO_TGR192 is not set 1010 + # CONFIG_CRYPTO_WP512 is not set 1011 + 1012 + # 1013 + # Ciphers 1014 + # 1015 + # CONFIG_CRYPTO_AES is not set 1016 + # CONFIG_CRYPTO_ANUBIS is not set 1017 + # CONFIG_CRYPTO_ARC4 is not set 1018 + # CONFIG_CRYPTO_BLOWFISH is not set 1019 + # CONFIG_CRYPTO_CAMELLIA is not set 1020 + # CONFIG_CRYPTO_CAST5 is not set 1021 + # CONFIG_CRYPTO_CAST6 is not set 1022 + # CONFIG_CRYPTO_DES is not set 1023 + # CONFIG_CRYPTO_FCRYPT is not set 1024 + # CONFIG_CRYPTO_KHAZAD is not set 1025 + # CONFIG_CRYPTO_SALSA20 is not set 1026 + # CONFIG_CRYPTO_SEED is not set 1027 + # CONFIG_CRYPTO_SERPENT is not set 1028 + # CONFIG_CRYPTO_TEA is not set 1029 + # CONFIG_CRYPTO_TWOFISH is not set 1030 + 1031 + # 1032 + # Compression 1033 + # 1034 + # CONFIG_CRYPTO_DEFLATE is not set 1035 + # CONFIG_CRYPTO_LZO is not set 1036 + CONFIG_CRYPTO_HW=y 1037 + 1038 + # 1039 + # Library routines 1040 + # 1041 + CONFIG_BITREVERSE=y 1042 + # CONFIG_GENERIC_FIND_FIRST_BIT is not set 1043 + # CONFIG_CRC_CCITT is not set 1044 + # CONFIG_CRC16 is not set 1045 + # CONFIG_CRC_ITU_T is not set 1046 + CONFIG_CRC32=y 1047 + # CONFIG_CRC7 is not set 1048 + # CONFIG_LIBCRC32C is not set 1049 + CONFIG_PLIST=y 1050 + CONFIG_HAS_IOMEM=y 1051 + CONFIG_HAS_IOPORT=y 1052 + CONFIG_HAS_DMA=y
+1388
arch/sh/configs/sh7785lcr_defconfig
··· 1 + # 2 + # Automatically generated make config: don't edit 3 + # Linux kernel version: 2.6.26-rc8 4 + # Tue Jul 15 21:37:59 2008 5 + # 6 + CONFIG_SUPERH=y 7 + CONFIG_SUPERH32=y 8 + CONFIG_RWSEM_GENERIC_SPINLOCK=y 9 + CONFIG_GENERIC_BUG=y 10 + CONFIG_GENERIC_FIND_NEXT_BIT=y 11 + CONFIG_GENERIC_HWEIGHT=y 12 + CONFIG_GENERIC_HARDIRQS=y 13 + CONFIG_GENERIC_IRQ_PROBE=y 14 + CONFIG_GENERIC_CALIBRATE_DELAY=y 15 + CONFIG_GENERIC_TIME=y 16 + CONFIG_GENERIC_CLOCKEVENTS=y 17 + CONFIG_SYS_SUPPORTS_NUMA=y 18 + CONFIG_SYS_SUPPORTS_PCI=y 19 + CONFIG_STACKTRACE_SUPPORT=y 20 + CONFIG_LOCKDEP_SUPPORT=y 21 + # CONFIG_ARCH_HAS_ILOG2_U32 is not set 22 + # CONFIG_ARCH_HAS_ILOG2_U64 is not set 23 + CONFIG_ARCH_NO_VIRT_TO_BUS=y 24 + CONFIG_ARCH_SUPPORTS_AOUT=y 25 + CONFIG_IO_TRAPPED=y 26 + CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 27 + 28 + # 29 + # General setup 30 + # 31 + CONFIG_EXPERIMENTAL=y 32 + CONFIG_BROKEN_ON_SMP=y 33 + CONFIG_LOCK_KERNEL=y 34 + CONFIG_INIT_ENV_ARG_LIMIT=32 35 + CONFIG_LOCALVERSION="" 36 + CONFIG_LOCALVERSION_AUTO=y 37 + CONFIG_SWAP=y 38 + CONFIG_SYSVIPC=y 39 + CONFIG_SYSVIPC_SYSCTL=y 40 + # CONFIG_POSIX_MQUEUE is not set 41 + CONFIG_BSD_PROCESS_ACCT=y 42 + # CONFIG_BSD_PROCESS_ACCT_V3 is not set 43 + # CONFIG_TASKSTATS is not set 44 + # CONFIG_AUDIT is not set 45 + CONFIG_IKCONFIG=y 46 + CONFIG_IKCONFIG_PROC=y 47 + CONFIG_LOG_BUF_SHIFT=14 48 + # CONFIG_CGROUPS is not set 49 + CONFIG_GROUP_SCHED=y 50 + CONFIG_FAIR_GROUP_SCHED=y 51 + # CONFIG_RT_GROUP_SCHED is not set 52 + CONFIG_USER_SCHED=y 53 + # CONFIG_CGROUP_SCHED is not set 54 + CONFIG_SYSFS_DEPRECATED=y 55 + CONFIG_SYSFS_DEPRECATED_V2=y 56 + # CONFIG_RELAY is not set 57 + # CONFIG_NAMESPACES is not set 58 + # CONFIG_BLK_DEV_INITRD is not set 59 + CONFIG_CC_OPTIMIZE_FOR_SIZE=y 60 + CONFIG_SYSCTL=y 61 + CONFIG_EMBEDDED=y 62 + CONFIG_UID16=y 63 + CONFIG_SYSCTL_SYSCALL=y 64 + CONFIG_SYSCTL_SYSCALL_CHECK=y 65 + CONFIG_KALLSYMS=y 66 + # CONFIG_KALLSYMS_ALL is not set 67 + # CONFIG_KALLSYMS_EXTRA_PASS is not set 68 + CONFIG_HOTPLUG=y 69 + CONFIG_PRINTK=y 70 + CONFIG_BUG=y 71 + CONFIG_ELF_CORE=y 72 + CONFIG_COMPAT_BRK=y 73 + CONFIG_BASE_FULL=y 74 + CONFIG_FUTEX=y 75 + CONFIG_ANON_INODES=y 76 + CONFIG_EPOLL=y 77 + CONFIG_SIGNALFD=y 78 + CONFIG_TIMERFD=y 79 + CONFIG_EVENTFD=y 80 + CONFIG_SHMEM=y 81 + CONFIG_VM_EVENT_COUNTERS=y 82 + CONFIG_SLAB=y 83 + # CONFIG_SLUB is not set 84 + # CONFIG_SLOB is not set 85 + CONFIG_PROFILING=y 86 + # CONFIG_MARKERS is not set 87 + # CONFIG_OPROFILE is not set 88 + CONFIG_HAVE_OPROFILE=y 89 + # CONFIG_HAVE_KPROBES is not set 90 + # CONFIG_HAVE_KRETPROBES is not set 91 + # CONFIG_HAVE_DMA_ATTRS is not set 92 + CONFIG_PROC_PAGE_MONITOR=y 93 + CONFIG_SLABINFO=y 94 + CONFIG_RT_MUTEXES=y 95 + # CONFIG_TINY_SHMEM is not set 96 + CONFIG_BASE_SMALL=0 97 + CONFIG_MODULES=y 98 + # CONFIG_MODULE_FORCE_LOAD is not set 99 + CONFIG_MODULE_UNLOAD=y 100 + # CONFIG_MODULE_FORCE_UNLOAD is not set 101 + # CONFIG_MODVERSIONS is not set 102 + # CONFIG_MODULE_SRCVERSION_ALL is not set 103 + CONFIG_KMOD=y 104 + CONFIG_BLOCK=y 105 + # CONFIG_LBD is not set 106 + # CONFIG_BLK_DEV_IO_TRACE is not set 107 + # CONFIG_LSF is not set 108 + # CONFIG_BLK_DEV_BSG is not set 109 + 110 + # 111 + # IO Schedulers 112 + # 113 + CONFIG_IOSCHED_NOOP=y 114 + CONFIG_IOSCHED_AS=y 115 + CONFIG_IOSCHED_DEADLINE=y 116 + CONFIG_IOSCHED_CFQ=y 117 + # CONFIG_DEFAULT_AS is not set 118 + # CONFIG_DEFAULT_DEADLINE is not set 119 + CONFIG_DEFAULT_CFQ=y 120 + # CONFIG_DEFAULT_NOOP is not set 121 + CONFIG_DEFAULT_IOSCHED="cfq" 122 + CONFIG_CLASSIC_RCU=y 123 + 124 + # 125 + # System type 126 + # 127 + CONFIG_CPU_SH4=y 128 + CONFIG_CPU_SH4A=y 129 + CONFIG_CPU_SHX2=y 130 + # CONFIG_CPU_SUBTYPE_SH7619 is not set 131 + # CONFIG_CPU_SUBTYPE_SH7203 is not set 132 + # CONFIG_CPU_SUBTYPE_SH7206 is not set 133 + # CONFIG_CPU_SUBTYPE_SH7263 is not set 134 + # CONFIG_CPU_SUBTYPE_MXG is not set 135 + # CONFIG_CPU_SUBTYPE_SH7705 is not set 136 + # CONFIG_CPU_SUBTYPE_SH7706 is not set 137 + # CONFIG_CPU_SUBTYPE_SH7707 is not set 138 + # CONFIG_CPU_SUBTYPE_SH7708 is not set 139 + # CONFIG_CPU_SUBTYPE_SH7709 is not set 140 + # CONFIG_CPU_SUBTYPE_SH7710 is not set 141 + # CONFIG_CPU_SUBTYPE_SH7712 is not set 142 + # CONFIG_CPU_SUBTYPE_SH7720 is not set 143 + # CONFIG_CPU_SUBTYPE_SH7721 is not set 144 + # CONFIG_CPU_SUBTYPE_SH7750 is not set 145 + # CONFIG_CPU_SUBTYPE_SH7091 is not set 146 + # CONFIG_CPU_SUBTYPE_SH7750R is not set 147 + # CONFIG_CPU_SUBTYPE_SH7750S is not set 148 + # CONFIG_CPU_SUBTYPE_SH7751 is not set 149 + # CONFIG_CPU_SUBTYPE_SH7751R is not set 150 + # CONFIG_CPU_SUBTYPE_SH7760 is not set 151 + # CONFIG_CPU_SUBTYPE_SH4_202 is not set 152 + # CONFIG_CPU_SUBTYPE_SH7723 is not set 153 + # CONFIG_CPU_SUBTYPE_SH7763 is not set 154 + # CONFIG_CPU_SUBTYPE_SH7770 is not set 155 + # CONFIG_CPU_SUBTYPE_SH7780 is not set 156 + CONFIG_CPU_SUBTYPE_SH7785=y 157 + # CONFIG_CPU_SUBTYPE_SHX3 is not set 158 + # CONFIG_CPU_SUBTYPE_SH7343 is not set 159 + # CONFIG_CPU_SUBTYPE_SH7722 is not set 160 + # CONFIG_CPU_SUBTYPE_SH7366 is not set 161 + # CONFIG_CPU_SUBTYPE_SH5_101 is not set 162 + # CONFIG_CPU_SUBTYPE_SH5_103 is not set 163 + 164 + # 165 + # Memory management options 166 + # 167 + CONFIG_QUICKLIST=y 168 + CONFIG_MMU=y 169 + CONFIG_PAGE_OFFSET=0x80000000 170 + CONFIG_MEMORY_START=0x08000000 171 + CONFIG_MEMORY_SIZE=0x08000000 172 + CONFIG_29BIT=y 173 + # CONFIG_PMB is not set 174 + # CONFIG_X2TLB is not set 175 + CONFIG_VSYSCALL=y 176 + # CONFIG_NUMA is not set 177 + CONFIG_ARCH_FLATMEM_ENABLE=y 178 + CONFIG_ARCH_SPARSEMEM_ENABLE=y 179 + CONFIG_ARCH_SPARSEMEM_DEFAULT=y 180 + CONFIG_MAX_ACTIVE_REGIONS=2 181 + CONFIG_ARCH_POPULATES_NODE_MAP=y 182 + CONFIG_ARCH_SELECT_MEMORY_MODEL=y 183 + CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y 184 + CONFIG_PAGE_SIZE_4KB=y 185 + # CONFIG_PAGE_SIZE_8KB is not set 186 + # CONFIG_PAGE_SIZE_16KB is not set 187 + # CONFIG_PAGE_SIZE_64KB is not set 188 + CONFIG_SELECT_MEMORY_MODEL=y 189 + # CONFIG_FLATMEM_MANUAL is not set 190 + # CONFIG_DISCONTIGMEM_MANUAL is not set 191 + CONFIG_SPARSEMEM_MANUAL=y 192 + CONFIG_SPARSEMEM=y 193 + CONFIG_HAVE_MEMORY_PRESENT=y 194 + CONFIG_SPARSEMEM_STATIC=y 195 + # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set 196 + # CONFIG_MEMORY_HOTPLUG is not set 197 + CONFIG_PAGEFLAGS_EXTENDED=y 198 + CONFIG_SPLIT_PTLOCK_CPUS=4 199 + # CONFIG_RESOURCES_64BIT is not set 200 + CONFIG_ZONE_DMA_FLAG=0 201 + CONFIG_NR_QUICK=2 202 + 203 + # 204 + # Cache configuration 205 + # 206 + # CONFIG_SH_DIRECT_MAPPED is not set 207 + CONFIG_CACHE_WRITEBACK=y 208 + # CONFIG_CACHE_WRITETHROUGH is not set 209 + # CONFIG_CACHE_OFF is not set 210 + 211 + # 212 + # Processor features 213 + # 214 + CONFIG_CPU_LITTLE_ENDIAN=y 215 + # CONFIG_CPU_BIG_ENDIAN is not set 216 + CONFIG_SH_FPU=y 217 + CONFIG_SH_STORE_QUEUES=y 218 + CONFIG_CPU_HAS_INTEVT=y 219 + CONFIG_CPU_HAS_SR_RB=y 220 + CONFIG_CPU_HAS_PTEA=y 221 + CONFIG_CPU_HAS_FPU=y 222 + 223 + # 224 + # Board support 225 + # 226 + # CONFIG_SH_HIGHLANDER is not set 227 + CONFIG_SH_SH7785LCR=y 228 + CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS=y 229 + 230 + # 231 + # Timer and clock configuration 232 + # 233 + CONFIG_SH_TMU=y 234 + CONFIG_SH_TIMER_IRQ=28 235 + CONFIG_SH_PCLK_FREQ=50000000 236 + CONFIG_TICK_ONESHOT=y 237 + # CONFIG_NO_HZ is not set 238 + CONFIG_HIGH_RES_TIMERS=y 239 + CONFIG_GENERIC_CLOCKEVENTS_BUILD=y 240 + 241 + # 242 + # CPU Frequency scaling 243 + # 244 + # CONFIG_CPU_FREQ is not set 245 + 246 + # 247 + # DMA support 248 + # 249 + # CONFIG_SH_DMA is not set 250 + 251 + # 252 + # Companion Chips 253 + # 254 + 255 + # 256 + # Additional SuperH Device Drivers 257 + # 258 + CONFIG_HEARTBEAT=y 259 + # CONFIG_PUSH_SWITCH is not set 260 + 261 + # 262 + # Kernel features 263 + # 264 + # CONFIG_HZ_100 is not set 265 + CONFIG_HZ_250=y 266 + # CONFIG_HZ_300 is not set 267 + # CONFIG_HZ_1000 is not set 268 + CONFIG_HZ=250 269 + # CONFIG_SCHED_HRTICK is not set 270 + CONFIG_KEXEC=y 271 + # CONFIG_CRASH_DUMP is not set 272 + # CONFIG_PREEMPT_NONE is not set 273 + # CONFIG_PREEMPT_VOLUNTARY is not set 274 + CONFIG_PREEMPT=y 275 + # CONFIG_PREEMPT_RCU is not set 276 + CONFIG_GUSA=y 277 + 278 + # 279 + # Boot options 280 + # 281 + CONFIG_ZERO_PAGE_OFFSET=0x00001000 282 + CONFIG_BOOT_LINK_OFFSET=0x00800000 283 + # CONFIG_CMDLINE_BOOL is not set 284 + 285 + # 286 + # Bus options 287 + # 288 + CONFIG_PCI=y 289 + CONFIG_SH_PCIDMA_NONCOHERENT=y 290 + CONFIG_PCI_AUTO=y 291 + CONFIG_PCI_AUTO_UPDATE_RESOURCES=y 292 + # CONFIG_ARCH_SUPPORTS_MSI is not set 293 + CONFIG_PCI_LEGACY=y 294 + # CONFIG_PCI_DEBUG is not set 295 + # CONFIG_PCCARD is not set 296 + # CONFIG_HOTPLUG_PCI is not set 297 + 298 + # 299 + # Executable file formats 300 + # 301 + CONFIG_BINFMT_ELF=y 302 + # CONFIG_BINFMT_MISC is not set 303 + 304 + # 305 + # Networking 306 + # 307 + CONFIG_NET=y 308 + 309 + # 310 + # Networking options 311 + # 312 + CONFIG_PACKET=y 313 + # CONFIG_PACKET_MMAP is not set 314 + CONFIG_UNIX=y 315 + CONFIG_XFRM=y 316 + # CONFIG_XFRM_USER is not set 317 + # CONFIG_XFRM_SUB_POLICY is not set 318 + # CONFIG_XFRM_MIGRATE is not set 319 + # CONFIG_XFRM_STATISTICS is not set 320 + # CONFIG_NET_KEY is not set 321 + CONFIG_INET=y 322 + # CONFIG_IP_MULTICAST is not set 323 + CONFIG_IP_ADVANCED_ROUTER=y 324 + CONFIG_ASK_IP_FIB_HASH=y 325 + # CONFIG_IP_FIB_TRIE is not set 326 + CONFIG_IP_FIB_HASH=y 327 + # CONFIG_IP_MULTIPLE_TABLES is not set 328 + # CONFIG_IP_ROUTE_MULTIPATH is not set 329 + # CONFIG_IP_ROUTE_VERBOSE is not set 330 + CONFIG_IP_PNP=y 331 + CONFIG_IP_PNP_DHCP=y 332 + # CONFIG_IP_PNP_BOOTP is not set 333 + # CONFIG_IP_PNP_RARP is not set 334 + # CONFIG_NET_IPIP is not set 335 + # CONFIG_NET_IPGRE is not set 336 + # CONFIG_ARPD is not set 337 + # CONFIG_SYN_COOKIES is not set 338 + # CONFIG_INET_AH is not set 339 + # CONFIG_INET_ESP is not set 340 + # CONFIG_INET_IPCOMP is not set 341 + # CONFIG_INET_XFRM_TUNNEL is not set 342 + # CONFIG_INET_TUNNEL is not set 343 + CONFIG_INET_XFRM_MODE_TRANSPORT=y 344 + CONFIG_INET_XFRM_MODE_TUNNEL=y 345 + CONFIG_INET_XFRM_MODE_BEET=y 346 + # CONFIG_INET_LRO is not set 347 + CONFIG_INET_DIAG=y 348 + CONFIG_INET_TCP_DIAG=y 349 + # CONFIG_TCP_CONG_ADVANCED is not set 350 + CONFIG_TCP_CONG_CUBIC=y 351 + CONFIG_DEFAULT_TCP_CONG="cubic" 352 + # CONFIG_TCP_MD5SIG is not set 353 + # CONFIG_IPV6 is not set 354 + # CONFIG_NETWORK_SECMARK is not set 355 + # CONFIG_NETFILTER is not set 356 + # CONFIG_IP_DCCP is not set 357 + # CONFIG_IP_SCTP is not set 358 + # CONFIG_TIPC is not set 359 + # CONFIG_ATM is not set 360 + # CONFIG_BRIDGE is not set 361 + # CONFIG_VLAN_8021Q is not set 362 + # CONFIG_DECNET is not set 363 + # CONFIG_LLC2 is not set 364 + # CONFIG_IPX is not set 365 + # CONFIG_ATALK is not set 366 + # CONFIG_X25 is not set 367 + # CONFIG_LAPB is not set 368 + # CONFIG_ECONET is not set 369 + # CONFIG_WAN_ROUTER is not set 370 + # CONFIG_NET_SCHED is not set 371 + 372 + # 373 + # Network testing 374 + # 375 + # CONFIG_NET_PKTGEN is not set 376 + # CONFIG_HAMRADIO is not set 377 + # CONFIG_CAN is not set 378 + # CONFIG_IRDA is not set 379 + # CONFIG_BT is not set 380 + # CONFIG_AF_RXRPC is not set 381 + 382 + # 383 + # Wireless 384 + # 385 + # CONFIG_CFG80211 is not set 386 + CONFIG_WIRELESS_EXT=y 387 + # CONFIG_MAC80211 is not set 388 + # CONFIG_IEEE80211 is not set 389 + # CONFIG_RFKILL is not set 390 + # CONFIG_NET_9P is not set 391 + 392 + # 393 + # Device Drivers 394 + # 395 + 396 + # 397 + # Generic Driver Options 398 + # 399 + CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" 400 + CONFIG_STANDALONE=y 401 + CONFIG_PREVENT_FIRMWARE_BUILD=y 402 + # CONFIG_FW_LOADER is not set 403 + # CONFIG_DEBUG_DRIVER is not set 404 + # CONFIG_DEBUG_DEVRES is not set 405 + # CONFIG_SYS_HYPERVISOR is not set 406 + # CONFIG_CONNECTOR is not set 407 + CONFIG_MTD=y 408 + # CONFIG_MTD_DEBUG is not set 409 + CONFIG_MTD_CONCAT=y 410 + CONFIG_MTD_PARTITIONS=y 411 + # CONFIG_MTD_REDBOOT_PARTS is not set 412 + # CONFIG_MTD_CMDLINE_PARTS is not set 413 + # CONFIG_MTD_AR7_PARTS is not set 414 + 415 + # 416 + # User Modules And Translation Layers 417 + # 418 + CONFIG_MTD_CHAR=y 419 + CONFIG_MTD_BLKDEVS=y 420 + CONFIG_MTD_BLOCK=y 421 + # CONFIG_FTL is not set 422 + # CONFIG_NFTL is not set 423 + # CONFIG_INFTL is not set 424 + # CONFIG_RFD_FTL is not set 425 + # CONFIG_SSFDC is not set 426 + # CONFIG_MTD_OOPS is not set 427 + 428 + # 429 + # RAM/ROM/Flash chip drivers 430 + # 431 + CONFIG_MTD_CFI=y 432 + # CONFIG_MTD_JEDECPROBE is not set 433 + CONFIG_MTD_GEN_PROBE=y 434 + # CONFIG_MTD_CFI_ADV_OPTIONS is not set 435 + CONFIG_MTD_MAP_BANK_WIDTH_1=y 436 + CONFIG_MTD_MAP_BANK_WIDTH_2=y 437 + CONFIG_MTD_MAP_BANK_WIDTH_4=y 438 + # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set 439 + # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set 440 + # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set 441 + CONFIG_MTD_CFI_I1=y 442 + CONFIG_MTD_CFI_I2=y 443 + # CONFIG_MTD_CFI_I4 is not set 444 + # CONFIG_MTD_CFI_I8 is not set 445 + # CONFIG_MTD_CFI_INTELEXT is not set 446 + CONFIG_MTD_CFI_AMDSTD=y 447 + # CONFIG_MTD_CFI_STAA is not set 448 + CONFIG_MTD_CFI_UTIL=y 449 + # CONFIG_MTD_RAM is not set 450 + # CONFIG_MTD_ROM is not set 451 + # CONFIG_MTD_ABSENT is not set 452 + 453 + # 454 + # Mapping drivers for chip access 455 + # 456 + # CONFIG_MTD_COMPLEX_MAPPINGS is not set 457 + CONFIG_MTD_PHYSMAP=y 458 + CONFIG_MTD_PHYSMAP_START=0x00000000 459 + CONFIG_MTD_PHYSMAP_LEN=0x0 460 + CONFIG_MTD_PHYSMAP_BANKWIDTH=0 461 + # CONFIG_MTD_INTEL_VR_NOR is not set 462 + # CONFIG_MTD_PLATRAM is not set 463 + 464 + # 465 + # Self-contained MTD device drivers 466 + # 467 + # CONFIG_MTD_PMC551 is not set 468 + # CONFIG_MTD_SLRAM is not set 469 + # CONFIG_MTD_PHRAM is not set 470 + # CONFIG_MTD_MTDRAM is not set 471 + # CONFIG_MTD_BLOCK2MTD is not set 472 + 473 + # 474 + # Disk-On-Chip Device Drivers 475 + # 476 + # CONFIG_MTD_DOC2000 is not set 477 + # CONFIG_MTD_DOC2001 is not set 478 + # CONFIG_MTD_DOC2001PLUS is not set 479 + # CONFIG_MTD_NAND is not set 480 + # CONFIG_MTD_ONENAND is not set 481 + 482 + # 483 + # UBI - Unsorted block images 484 + # 485 + # CONFIG_MTD_UBI is not set 486 + # CONFIG_PARPORT is not set 487 + CONFIG_BLK_DEV=y 488 + # CONFIG_BLK_CPQ_CISS_DA is not set 489 + # CONFIG_BLK_DEV_DAC960 is not set 490 + # CONFIG_BLK_DEV_UMEM is not set 491 + # CONFIG_BLK_DEV_COW_COMMON is not set 492 + # CONFIG_BLK_DEV_LOOP is not set 493 + # CONFIG_BLK_DEV_NBD is not set 494 + # CONFIG_BLK_DEV_SX8 is not set 495 + # CONFIG_BLK_DEV_UB is not set 496 + CONFIG_BLK_DEV_RAM=y 497 + CONFIG_BLK_DEV_RAM_COUNT=16 498 + CONFIG_BLK_DEV_RAM_SIZE=4096 499 + # CONFIG_BLK_DEV_XIP is not set 500 + # CONFIG_CDROM_PKTCDVD is not set 501 + # CONFIG_ATA_OVER_ETH is not set 502 + # CONFIG_MISC_DEVICES is not set 503 + CONFIG_HAVE_IDE=y 504 + # CONFIG_IDE is not set 505 + 506 + # 507 + # SCSI device support 508 + # 509 + # CONFIG_RAID_ATTRS is not set 510 + CONFIG_SCSI=y 511 + CONFIG_SCSI_DMA=y 512 + # CONFIG_SCSI_TGT is not set 513 + # CONFIG_SCSI_NETLINK is not set 514 + CONFIG_SCSI_PROC_FS=y 515 + 516 + # 517 + # SCSI support type (disk, tape, CD-ROM) 518 + # 519 + CONFIG_BLK_DEV_SD=y 520 + # CONFIG_CHR_DEV_ST is not set 521 + # CONFIG_CHR_DEV_OSST is not set 522 + # CONFIG_BLK_DEV_SR is not set 523 + # CONFIG_CHR_DEV_SG is not set 524 + # CONFIG_CHR_DEV_SCH is not set 525 + 526 + # 527 + # Some SCSI devices (e.g. CD jukebox) support multiple LUNs 528 + # 529 + # CONFIG_SCSI_MULTI_LUN is not set 530 + # CONFIG_SCSI_CONSTANTS is not set 531 + # CONFIG_SCSI_LOGGING is not set 532 + # CONFIG_SCSI_SCAN_ASYNC is not set 533 + CONFIG_SCSI_WAIT_SCAN=m 534 + 535 + # 536 + # SCSI Transports 537 + # 538 + # CONFIG_SCSI_SPI_ATTRS is not set 539 + # CONFIG_SCSI_FC_ATTRS is not set 540 + # CONFIG_SCSI_ISCSI_ATTRS is not set 541 + # CONFIG_SCSI_SAS_LIBSAS is not set 542 + # CONFIG_SCSI_SRP_ATTRS is not set 543 + # CONFIG_SCSI_LOWLEVEL is not set 544 + CONFIG_ATA=y 545 + # CONFIG_ATA_NONSTANDARD is not set 546 + CONFIG_SATA_PMP=y 547 + # CONFIG_SATA_AHCI is not set 548 + # CONFIG_SATA_SIL24 is not set 549 + CONFIG_ATA_SFF=y 550 + # CONFIG_SATA_SVW is not set 551 + # CONFIG_ATA_PIIX is not set 552 + # CONFIG_SATA_MV is not set 553 + # CONFIG_SATA_NV is not set 554 + # CONFIG_PDC_ADMA is not set 555 + # CONFIG_SATA_QSTOR is not set 556 + # CONFIG_SATA_PROMISE is not set 557 + # CONFIG_SATA_SX4 is not set 558 + CONFIG_SATA_SIL=y 559 + # CONFIG_SATA_SIS is not set 560 + # CONFIG_SATA_ULI is not set 561 + # CONFIG_SATA_VIA is not set 562 + # CONFIG_SATA_VITESSE is not set 563 + # CONFIG_SATA_INIC162X is not set 564 + # CONFIG_PATA_ALI is not set 565 + # CONFIG_PATA_AMD is not set 566 + # CONFIG_PATA_ARTOP is not set 567 + # CONFIG_PATA_ATIIXP is not set 568 + # CONFIG_PATA_CMD640_PCI is not set 569 + # CONFIG_PATA_CMD64X is not set 570 + # CONFIG_PATA_CS5520 is not set 571 + # CONFIG_PATA_CS5530 is not set 572 + # CONFIG_PATA_CYPRESS is not set 573 + # CONFIG_PATA_EFAR is not set 574 + # CONFIG_ATA_GENERIC is not set 575 + # CONFIG_PATA_HPT366 is not set 576 + # CONFIG_PATA_HPT37X is not set 577 + # CONFIG_PATA_HPT3X2N is not set 578 + # CONFIG_PATA_HPT3X3 is not set 579 + # CONFIG_PATA_IT821X is not set 580 + # CONFIG_PATA_IT8213 is not set 581 + # CONFIG_PATA_JMICRON is not set 582 + # CONFIG_PATA_TRIFLEX is not set 583 + # CONFIG_PATA_MARVELL is not set 584 + # CONFIG_PATA_MPIIX is not set 585 + # CONFIG_PATA_OLDPIIX is not set 586 + # CONFIG_PATA_NETCELL is not set 587 + # CONFIG_PATA_NINJA32 is not set 588 + # CONFIG_PATA_NS87410 is not set 589 + # CONFIG_PATA_NS87415 is not set 590 + # CONFIG_PATA_OPTI is not set 591 + # CONFIG_PATA_OPTIDMA is not set 592 + # CONFIG_PATA_PDC_OLD is not set 593 + # CONFIG_PATA_RADISYS is not set 594 + # CONFIG_PATA_RZ1000 is not set 595 + # CONFIG_PATA_SC1200 is not set 596 + # CONFIG_PATA_SERVERWORKS is not set 597 + # CONFIG_PATA_PDC2027X is not set 598 + # CONFIG_PATA_SIL680 is not set 599 + # CONFIG_PATA_SIS is not set 600 + # CONFIG_PATA_VIA is not set 601 + # CONFIG_PATA_WINBOND is not set 602 + # CONFIG_PATA_PLATFORM is not set 603 + # CONFIG_PATA_SCH is not set 604 + # CONFIG_MD is not set 605 + # CONFIG_FUSION is not set 606 + 607 + # 608 + # IEEE 1394 (FireWire) support 609 + # 610 + 611 + # 612 + # Enable only one of the two stacks, unless you know what you are doing 613 + # 614 + # CONFIG_FIREWIRE is not set 615 + # CONFIG_IEEE1394 is not set 616 + # CONFIG_I2O is not set 617 + CONFIG_NETDEVICES=y 618 + # CONFIG_NETDEVICES_MULTIQUEUE is not set 619 + # CONFIG_DUMMY is not set 620 + # CONFIG_BONDING is not set 621 + # CONFIG_MACVLAN is not set 622 + # CONFIG_EQUALIZER is not set 623 + # CONFIG_TUN is not set 624 + # CONFIG_VETH is not set 625 + # CONFIG_ARCNET is not set 626 + # CONFIG_NET_ETHERNET is not set 627 + CONFIG_NETDEV_1000=y 628 + # CONFIG_ACENIC is not set 629 + # CONFIG_DL2K is not set 630 + # CONFIG_E1000 is not set 631 + # CONFIG_E1000E is not set 632 + # CONFIG_E1000E_ENABLED is not set 633 + # CONFIG_IP1000 is not set 634 + # CONFIG_IGB is not set 635 + # CONFIG_NS83820 is not set 636 + # CONFIG_HAMACHI is not set 637 + # CONFIG_YELLOWFIN is not set 638 + CONFIG_R8169=y 639 + # CONFIG_R8169_NAPI is not set 640 + # CONFIG_SIS190 is not set 641 + # CONFIG_SKGE is not set 642 + # CONFIG_SKY2 is not set 643 + # CONFIG_VIA_VELOCITY is not set 644 + # CONFIG_TIGON3 is not set 645 + # CONFIG_BNX2 is not set 646 + # CONFIG_QLA3XXX is not set 647 + # CONFIG_ATL1 is not set 648 + # CONFIG_NETDEV_10000 is not set 649 + # CONFIG_TR is not set 650 + 651 + # 652 + # Wireless LAN 653 + # 654 + # CONFIG_WLAN_PRE80211 is not set 655 + # CONFIG_WLAN_80211 is not set 656 + # CONFIG_IWLWIFI_LEDS is not set 657 + 658 + # 659 + # USB Network Adapters 660 + # 661 + # CONFIG_USB_CATC is not set 662 + # CONFIG_USB_KAWETH is not set 663 + # CONFIG_USB_PEGASUS is not set 664 + # CONFIG_USB_RTL8150 is not set 665 + # CONFIG_USB_USBNET is not set 666 + # CONFIG_WAN is not set 667 + # CONFIG_FDDI is not set 668 + # CONFIG_HIPPI is not set 669 + # CONFIG_PPP is not set 670 + # CONFIG_SLIP is not set 671 + # CONFIG_NET_FC is not set 672 + # CONFIG_NETCONSOLE is not set 673 + # CONFIG_NETPOLL is not set 674 + # CONFIG_NET_POLL_CONTROLLER is not set 675 + # CONFIG_ISDN is not set 676 + # CONFIG_PHONE is not set 677 + 678 + # 679 + # Input device support 680 + # 681 + CONFIG_INPUT=y 682 + # CONFIG_INPUT_FF_MEMLESS is not set 683 + # CONFIG_INPUT_POLLDEV is not set 684 + 685 + # 686 + # Userland interfaces 687 + # 688 + CONFIG_INPUT_MOUSEDEV=y 689 + # CONFIG_INPUT_MOUSEDEV_PSAUX is not set 690 + CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 691 + CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 692 + # CONFIG_INPUT_JOYDEV is not set 693 + # CONFIG_INPUT_EVDEV is not set 694 + # CONFIG_INPUT_EVBUG is not set 695 + 696 + # 697 + # Input Device Drivers 698 + # 699 + CONFIG_INPUT_KEYBOARD=y 700 + # CONFIG_KEYBOARD_ATKBD is not set 701 + # CONFIG_KEYBOARD_SUNKBD is not set 702 + # CONFIG_KEYBOARD_LKKBD is not set 703 + # CONFIG_KEYBOARD_XTKBD is not set 704 + # CONFIG_KEYBOARD_NEWTON is not set 705 + # CONFIG_KEYBOARD_STOWAWAY is not set 706 + # CONFIG_KEYBOARD_SH_KEYSC is not set 707 + # CONFIG_INPUT_MOUSE is not set 708 + # CONFIG_INPUT_JOYSTICK is not set 709 + # CONFIG_INPUT_TABLET is not set 710 + # CONFIG_INPUT_TOUCHSCREEN is not set 711 + # CONFIG_INPUT_MISC is not set 712 + 713 + # 714 + # Hardware I/O ports 715 + # 716 + # CONFIG_SERIO is not set 717 + # CONFIG_GAMEPORT is not set 718 + 719 + # 720 + # Character devices 721 + # 722 + CONFIG_VT=y 723 + CONFIG_VT_CONSOLE=y 724 + CONFIG_HW_CONSOLE=y 725 + CONFIG_VT_HW_CONSOLE_BINDING=y 726 + CONFIG_DEVKMEM=y 727 + # CONFIG_SERIAL_NONSTANDARD is not set 728 + # CONFIG_NOZOMI is not set 729 + 730 + # 731 + # Serial drivers 732 + # 733 + # CONFIG_SERIAL_8250 is not set 734 + 735 + # 736 + # Non-8250 serial port support 737 + # 738 + CONFIG_SERIAL_SH_SCI=y 739 + CONFIG_SERIAL_SH_SCI_NR_UARTS=6 740 + CONFIG_SERIAL_SH_SCI_CONSOLE=y 741 + CONFIG_SERIAL_CORE=y 742 + CONFIG_SERIAL_CORE_CONSOLE=y 743 + # CONFIG_SERIAL_JSM is not set 744 + CONFIG_UNIX98_PTYS=y 745 + CONFIG_LEGACY_PTYS=y 746 + CONFIG_LEGACY_PTY_COUNT=256 747 + # CONFIG_IPMI_HANDLER is not set 748 + CONFIG_HW_RANDOM=y 749 + # CONFIG_R3964 is not set 750 + # CONFIG_APPLICOM is not set 751 + # CONFIG_RAW_DRIVER is not set 752 + # CONFIG_TCG_TPM is not set 753 + CONFIG_DEVPORT=y 754 + CONFIG_I2C=y 755 + CONFIG_I2C_BOARDINFO=y 756 + # CONFIG_I2C_CHARDEV is not set 757 + CONFIG_I2C_ALGOPCA=y 758 + 759 + # 760 + # I2C Hardware Bus support 761 + # 762 + # CONFIG_I2C_ALI1535 is not set 763 + # CONFIG_I2C_ALI1563 is not set 764 + # CONFIG_I2C_ALI15X3 is not set 765 + # CONFIG_I2C_AMD756 is not set 766 + # CONFIG_I2C_AMD8111 is not set 767 + # CONFIG_I2C_I801 is not set 768 + # CONFIG_I2C_I810 is not set 769 + # CONFIG_I2C_PIIX4 is not set 770 + # CONFIG_I2C_NFORCE2 is not set 771 + # CONFIG_I2C_OCORES is not set 772 + # CONFIG_I2C_PARPORT_LIGHT is not set 773 + # CONFIG_I2C_PROSAVAGE is not set 774 + # CONFIG_I2C_SAVAGE4 is not set 775 + # CONFIG_I2C_SIMTEC is not set 776 + # CONFIG_I2C_SIS5595 is not set 777 + # CONFIG_I2C_SIS630 is not set 778 + # CONFIG_I2C_SIS96X is not set 779 + # CONFIG_I2C_TAOS_EVM is not set 780 + # CONFIG_I2C_STUB is not set 781 + # CONFIG_I2C_TINY_USB is not set 782 + # CONFIG_I2C_VIA is not set 783 + # CONFIG_I2C_VIAPRO is not set 784 + # CONFIG_I2C_VOODOO3 is not set 785 + CONFIG_I2C_PCA_PLATFORM=y 786 + # CONFIG_I2C_SH_MOBILE is not set 787 + 788 + # 789 + # Miscellaneous I2C Chip support 790 + # 791 + # CONFIG_DS1682 is not set 792 + # CONFIG_SENSORS_EEPROM is not set 793 + # CONFIG_SENSORS_PCF8574 is not set 794 + # CONFIG_PCF8575 is not set 795 + # CONFIG_SENSORS_PCF8591 is not set 796 + # CONFIG_SENSORS_MAX6875 is not set 797 + # CONFIG_SENSORS_TSL2550 is not set 798 + # CONFIG_I2C_DEBUG_CORE is not set 799 + # CONFIG_I2C_DEBUG_ALGO is not set 800 + # CONFIG_I2C_DEBUG_BUS is not set 801 + # CONFIG_I2C_DEBUG_CHIP is not set 802 + # CONFIG_SPI is not set 803 + # CONFIG_W1 is not set 804 + # CONFIG_POWER_SUPPLY is not set 805 + # CONFIG_HWMON is not set 806 + # CONFIG_THERMAL is not set 807 + # CONFIG_THERMAL_HWMON is not set 808 + # CONFIG_WATCHDOG is not set 809 + 810 + # 811 + # Sonics Silicon Backplane 812 + # 813 + CONFIG_SSB_POSSIBLE=y 814 + # CONFIG_SSB is not set 815 + 816 + # 817 + # Multifunction device drivers 818 + # 819 + CONFIG_MFD_SM501=y 820 + # CONFIG_HTC_PASIC3 is not set 821 + 822 + # 823 + # Multimedia devices 824 + # 825 + 826 + # 827 + # Multimedia core support 828 + # 829 + # CONFIG_VIDEO_DEV is not set 830 + # CONFIG_DVB_CORE is not set 831 + # CONFIG_VIDEO_MEDIA is not set 832 + 833 + # 834 + # Multimedia drivers 835 + # 836 + # CONFIG_DAB is not set 837 + 838 + # 839 + # Graphics support 840 + # 841 + # CONFIG_DRM is not set 842 + # CONFIG_VGASTATE is not set 843 + # CONFIG_VIDEO_OUTPUT_CONTROL is not set 844 + CONFIG_FB=y 845 + # CONFIG_FIRMWARE_EDID is not set 846 + # CONFIG_FB_DDC is not set 847 + CONFIG_FB_CFB_FILLRECT=y 848 + CONFIG_FB_CFB_COPYAREA=y 849 + CONFIG_FB_CFB_IMAGEBLIT=y 850 + # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set 851 + # CONFIG_FB_SYS_FILLRECT is not set 852 + # CONFIG_FB_SYS_COPYAREA is not set 853 + # CONFIG_FB_SYS_IMAGEBLIT is not set 854 + # CONFIG_FB_FOREIGN_ENDIAN is not set 855 + # CONFIG_FB_SYS_FOPS is not set 856 + # CONFIG_FB_SVGALIB is not set 857 + # CONFIG_FB_MACMODES is not set 858 + # CONFIG_FB_BACKLIGHT is not set 859 + # CONFIG_FB_MODE_HELPERS is not set 860 + # CONFIG_FB_TILEBLITTING is not set 861 + 862 + # 863 + # Frame buffer hardware drivers 864 + # 865 + # CONFIG_FB_CIRRUS is not set 866 + # CONFIG_FB_PM2 is not set 867 + # CONFIG_FB_CYBER2000 is not set 868 + # CONFIG_FB_ASILIANT is not set 869 + # CONFIG_FB_IMSTT is not set 870 + # CONFIG_FB_S1D13XXX is not set 871 + # CONFIG_FB_NVIDIA is not set 872 + # CONFIG_FB_RIVA is not set 873 + # CONFIG_FB_MATROX is not set 874 + # CONFIG_FB_RADEON is not set 875 + # CONFIG_FB_ATY128 is not set 876 + # CONFIG_FB_ATY is not set 877 + # CONFIG_FB_S3 is not set 878 + # CONFIG_FB_SAVAGE is not set 879 + # CONFIG_FB_SIS is not set 880 + # CONFIG_FB_NEOMAGIC is not set 881 + # CONFIG_FB_KYRO is not set 882 + # CONFIG_FB_3DFX is not set 883 + # CONFIG_FB_VOODOO1 is not set 884 + # CONFIG_FB_VT8623 is not set 885 + # CONFIG_FB_TRIDENT is not set 886 + # CONFIG_FB_ARK is not set 887 + # CONFIG_FB_PM3 is not set 888 + CONFIG_FB_SM501=y 889 + # CONFIG_FB_VIRTUAL is not set 890 + # CONFIG_BACKLIGHT_LCD_SUPPORT is not set 891 + 892 + # 893 + # Display device support 894 + # 895 + # CONFIG_DISPLAY_SUPPORT is not set 896 + 897 + # 898 + # Console display driver support 899 + # 900 + CONFIG_DUMMY_CONSOLE=y 901 + CONFIG_FRAMEBUFFER_CONSOLE=y 902 + # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set 903 + # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set 904 + # CONFIG_FONTS is not set 905 + CONFIG_FONT_8x8=y 906 + CONFIG_FONT_8x16=y 907 + CONFIG_LOGO=y 908 + # CONFIG_LOGO_LINUX_MONO is not set 909 + # CONFIG_LOGO_LINUX_VGA16 is not set 910 + CONFIG_LOGO_LINUX_CLUT224=y 911 + # CONFIG_LOGO_SUPERH_MONO is not set 912 + # CONFIG_LOGO_SUPERH_VGA16 is not set 913 + # CONFIG_LOGO_SUPERH_CLUT224 is not set 914 + 915 + # 916 + # Sound 917 + # 918 + # CONFIG_SOUND is not set 919 + CONFIG_HID_SUPPORT=y 920 + CONFIG_HID=y 921 + # CONFIG_HID_DEBUG is not set 922 + # CONFIG_HIDRAW is not set 923 + 924 + # 925 + # USB Input Devices 926 + # 927 + CONFIG_USB_HID=y 928 + # CONFIG_USB_HIDINPUT_POWERBOOK is not set 929 + # CONFIG_HID_FF is not set 930 + # CONFIG_USB_HIDDEV is not set 931 + CONFIG_USB_SUPPORT=y 932 + CONFIG_USB_ARCH_HAS_HCD=y 933 + CONFIG_USB_ARCH_HAS_OHCI=y 934 + CONFIG_USB_ARCH_HAS_EHCI=y 935 + CONFIG_USB=y 936 + # CONFIG_USB_DEBUG is not set 937 + # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set 938 + 939 + # 940 + # Miscellaneous USB options 941 + # 942 + CONFIG_USB_DEVICEFS=y 943 + CONFIG_USB_DEVICE_CLASS=y 944 + # CONFIG_USB_DYNAMIC_MINORS is not set 945 + # CONFIG_USB_OTG is not set 946 + # CONFIG_USB_OTG_WHITELIST is not set 947 + # CONFIG_USB_OTG_BLACKLIST_HUB is not set 948 + 949 + # 950 + # USB Host Controller Drivers 951 + # 952 + # CONFIG_USB_C67X00_HCD is not set 953 + CONFIG_USB_EHCI_HCD=m 954 + # CONFIG_USB_EHCI_ROOT_HUB_TT is not set 955 + # CONFIG_USB_EHCI_TT_NEWSCHED is not set 956 + # CONFIG_USB_ISP116X_HCD is not set 957 + # CONFIG_USB_ISP1760_HCD is not set 958 + CONFIG_USB_OHCI_HCD=m 959 + # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set 960 + # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set 961 + CONFIG_USB_OHCI_LITTLE_ENDIAN=y 962 + # CONFIG_USB_UHCI_HCD is not set 963 + # CONFIG_USB_SL811_HCD is not set 964 + CONFIG_USB_R8A66597_HCD=y 965 + 966 + # 967 + # USB Device Class drivers 968 + # 969 + # CONFIG_USB_ACM is not set 970 + # CONFIG_USB_PRINTER is not set 971 + # CONFIG_USB_WDM is not set 972 + 973 + # 974 + # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 975 + # 976 + 977 + # 978 + # may also be needed; see USB_STORAGE Help for more information 979 + # 980 + CONFIG_USB_STORAGE=y 981 + # CONFIG_USB_STORAGE_DEBUG is not set 982 + # CONFIG_USB_STORAGE_DATAFAB is not set 983 + # CONFIG_USB_STORAGE_FREECOM is not set 984 + # CONFIG_USB_STORAGE_ISD200 is not set 985 + # CONFIG_USB_STORAGE_DPCM is not set 986 + # CONFIG_USB_STORAGE_USBAT is not set 987 + # CONFIG_USB_STORAGE_SDDR09 is not set 988 + # CONFIG_USB_STORAGE_SDDR55 is not set 989 + # CONFIG_USB_STORAGE_JUMPSHOT is not set 990 + # CONFIG_USB_STORAGE_ALAUDA is not set 991 + # CONFIG_USB_STORAGE_ONETOUCH is not set 992 + # CONFIG_USB_STORAGE_KARMA is not set 993 + # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set 994 + # CONFIG_USB_LIBUSUAL is not set 995 + 996 + # 997 + # USB Imaging devices 998 + # 999 + # CONFIG_USB_MDC800 is not set 1000 + # CONFIG_USB_MICROTEK is not set 1001 + CONFIG_USB_MON=y 1002 + 1003 + # 1004 + # USB port drivers 1005 + # 1006 + # CONFIG_USB_SERIAL is not set 1007 + 1008 + # 1009 + # USB Miscellaneous drivers 1010 + # 1011 + # CONFIG_USB_EMI62 is not set 1012 + # CONFIG_USB_EMI26 is not set 1013 + # CONFIG_USB_ADUTUX is not set 1014 + # CONFIG_USB_AUERSWALD is not set 1015 + # CONFIG_USB_RIO500 is not set 1016 + # CONFIG_USB_LEGOTOWER is not set 1017 + # CONFIG_USB_LCD is not set 1018 + # CONFIG_USB_BERRY_CHARGE is not set 1019 + # CONFIG_USB_LED is not set 1020 + # CONFIG_USB_CYPRESS_CY7C63 is not set 1021 + # CONFIG_USB_CYTHERM is not set 1022 + # CONFIG_USB_PHIDGET is not set 1023 + # CONFIG_USB_IDMOUSE is not set 1024 + # CONFIG_USB_FTDI_ELAN is not set 1025 + # CONFIG_USB_APPLEDISPLAY is not set 1026 + # CONFIG_USB_SISUSBVGA is not set 1027 + # CONFIG_USB_LD is not set 1028 + # CONFIG_USB_TRANCEVIBRATOR is not set 1029 + # CONFIG_USB_IOWARRIOR is not set 1030 + CONFIG_USB_TEST=m 1031 + # CONFIG_USB_ISIGHTFW is not set 1032 + # CONFIG_USB_GADGET is not set 1033 + # CONFIG_MMC is not set 1034 + # CONFIG_MEMSTICK is not set 1035 + # CONFIG_NEW_LEDS is not set 1036 + # CONFIG_ACCESSIBILITY is not set 1037 + # CONFIG_INFINIBAND is not set 1038 + CONFIG_RTC_LIB=y 1039 + CONFIG_RTC_CLASS=y 1040 + CONFIG_RTC_HCTOSYS=y 1041 + CONFIG_RTC_HCTOSYS_DEVICE="rtc0" 1042 + # CONFIG_RTC_DEBUG is not set 1043 + 1044 + # 1045 + # RTC interfaces 1046 + # 1047 + CONFIG_RTC_INTF_SYSFS=y 1048 + CONFIG_RTC_INTF_PROC=y 1049 + CONFIG_RTC_INTF_DEV=y 1050 + # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set 1051 + # CONFIG_RTC_DRV_TEST is not set 1052 + 1053 + # 1054 + # I2C RTC drivers 1055 + # 1056 + # CONFIG_RTC_DRV_DS1307 is not set 1057 + # CONFIG_RTC_DRV_DS1374 is not set 1058 + # CONFIG_RTC_DRV_DS1672 is not set 1059 + # CONFIG_RTC_DRV_MAX6900 is not set 1060 + CONFIG_RTC_DRV_RS5C372=y 1061 + # CONFIG_RTC_DRV_ISL1208 is not set 1062 + # CONFIG_RTC_DRV_X1205 is not set 1063 + # CONFIG_RTC_DRV_PCF8563 is not set 1064 + # CONFIG_RTC_DRV_PCF8583 is not set 1065 + # CONFIG_RTC_DRV_M41T80 is not set 1066 + # CONFIG_RTC_DRV_S35390A is not set 1067 + # CONFIG_RTC_DRV_FM3130 is not set 1068 + 1069 + # 1070 + # SPI RTC drivers 1071 + # 1072 + 1073 + # 1074 + # Platform RTC drivers 1075 + # 1076 + # CONFIG_RTC_DRV_DS1511 is not set 1077 + # CONFIG_RTC_DRV_DS1553 is not set 1078 + # CONFIG_RTC_DRV_DS1742 is not set 1079 + # CONFIG_RTC_DRV_STK17TA8 is not set 1080 + # CONFIG_RTC_DRV_M48T86 is not set 1081 + # CONFIG_RTC_DRV_M48T59 is not set 1082 + # CONFIG_RTC_DRV_V3020 is not set 1083 + 1084 + # 1085 + # on-CPU RTC drivers 1086 + # 1087 + # CONFIG_RTC_DRV_SH is not set 1088 + # CONFIG_UIO is not set 1089 + 1090 + # 1091 + # File systems 1092 + # 1093 + CONFIG_EXT2_FS=y 1094 + # CONFIG_EXT2_FS_XATTR is not set 1095 + # CONFIG_EXT2_FS_XIP is not set 1096 + CONFIG_EXT3_FS=y 1097 + CONFIG_EXT3_FS_XATTR=y 1098 + # CONFIG_EXT3_FS_POSIX_ACL is not set 1099 + # CONFIG_EXT3_FS_SECURITY is not set 1100 + # CONFIG_EXT4DEV_FS is not set 1101 + CONFIG_JBD=y 1102 + CONFIG_FS_MBCACHE=y 1103 + # CONFIG_REISERFS_FS is not set 1104 + # CONFIG_JFS_FS is not set 1105 + CONFIG_FS_POSIX_ACL=y 1106 + # CONFIG_XFS_FS is not set 1107 + # CONFIG_OCFS2_FS is not set 1108 + CONFIG_DNOTIFY=y 1109 + CONFIG_INOTIFY=y 1110 + CONFIG_INOTIFY_USER=y 1111 + # CONFIG_QUOTA is not set 1112 + # CONFIG_AUTOFS_FS is not set 1113 + # CONFIG_AUTOFS4_FS is not set 1114 + # CONFIG_FUSE_FS is not set 1115 + 1116 + # 1117 + # CD-ROM/DVD Filesystems 1118 + # 1119 + # CONFIG_ISO9660_FS is not set 1120 + # CONFIG_UDF_FS is not set 1121 + 1122 + # 1123 + # DOS/FAT/NT Filesystems 1124 + # 1125 + CONFIG_FAT_FS=y 1126 + CONFIG_MSDOS_FS=y 1127 + CONFIG_VFAT_FS=y 1128 + CONFIG_FAT_DEFAULT_CODEPAGE=437 1129 + CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" 1130 + CONFIG_NTFS_FS=y 1131 + # CONFIG_NTFS_DEBUG is not set 1132 + CONFIG_NTFS_RW=y 1133 + 1134 + # 1135 + # Pseudo filesystems 1136 + # 1137 + CONFIG_PROC_FS=y 1138 + CONFIG_PROC_KCORE=y 1139 + CONFIG_PROC_SYSCTL=y 1140 + CONFIG_SYSFS=y 1141 + CONFIG_TMPFS=y 1142 + # CONFIG_TMPFS_POSIX_ACL is not set 1143 + # CONFIG_HUGETLBFS is not set 1144 + # CONFIG_HUGETLB_PAGE is not set 1145 + # CONFIG_CONFIGFS_FS is not set 1146 + 1147 + # 1148 + # Miscellaneous filesystems 1149 + # 1150 + # CONFIG_ADFS_FS is not set 1151 + # CONFIG_AFFS_FS is not set 1152 + # CONFIG_HFS_FS is not set 1153 + # CONFIG_HFSPLUS_FS is not set 1154 + # CONFIG_BEFS_FS is not set 1155 + # CONFIG_BFS_FS is not set 1156 + # CONFIG_EFS_FS is not set 1157 + # CONFIG_JFFS2_FS is not set 1158 + # CONFIG_CRAMFS is not set 1159 + # CONFIG_VXFS_FS is not set 1160 + CONFIG_MINIX_FS=y 1161 + # CONFIG_HPFS_FS is not set 1162 + # CONFIG_QNX4FS_FS is not set 1163 + # CONFIG_ROMFS_FS is not set 1164 + # CONFIG_SYSV_FS is not set 1165 + # CONFIG_UFS_FS is not set 1166 + CONFIG_NETWORK_FILESYSTEMS=y 1167 + CONFIG_NFS_FS=y 1168 + CONFIG_NFS_V3=y 1169 + # CONFIG_NFS_V3_ACL is not set 1170 + CONFIG_NFS_V4=y 1171 + CONFIG_NFSD=y 1172 + CONFIG_NFSD_V3=y 1173 + # CONFIG_NFSD_V3_ACL is not set 1174 + CONFIG_NFSD_V4=y 1175 + CONFIG_ROOT_NFS=y 1176 + CONFIG_LOCKD=y 1177 + CONFIG_LOCKD_V4=y 1178 + CONFIG_EXPORTFS=y 1179 + CONFIG_NFS_COMMON=y 1180 + CONFIG_SUNRPC=y 1181 + CONFIG_SUNRPC_GSS=y 1182 + # CONFIG_SUNRPC_BIND34 is not set 1183 + CONFIG_RPCSEC_GSS_KRB5=y 1184 + # CONFIG_RPCSEC_GSS_SPKM3 is not set 1185 + # CONFIG_SMB_FS is not set 1186 + # CONFIG_CIFS is not set 1187 + # CONFIG_NCP_FS is not set 1188 + # CONFIG_CODA_FS is not set 1189 + # CONFIG_AFS_FS is not set 1190 + 1191 + # 1192 + # Partition Types 1193 + # 1194 + # CONFIG_PARTITION_ADVANCED is not set 1195 + CONFIG_MSDOS_PARTITION=y 1196 + CONFIG_NLS=y 1197 + CONFIG_NLS_DEFAULT="iso8859-1" 1198 + CONFIG_NLS_CODEPAGE_437=y 1199 + # CONFIG_NLS_CODEPAGE_737 is not set 1200 + # CONFIG_NLS_CODEPAGE_775 is not set 1201 + # CONFIG_NLS_CODEPAGE_850 is not set 1202 + # CONFIG_NLS_CODEPAGE_852 is not set 1203 + # CONFIG_NLS_CODEPAGE_855 is not set 1204 + # CONFIG_NLS_CODEPAGE_857 is not set 1205 + # CONFIG_NLS_CODEPAGE_860 is not set 1206 + # CONFIG_NLS_CODEPAGE_861 is not set 1207 + # CONFIG_NLS_CODEPAGE_862 is not set 1208 + # CONFIG_NLS_CODEPAGE_863 is not set 1209 + # CONFIG_NLS_CODEPAGE_864 is not set 1210 + # CONFIG_NLS_CODEPAGE_865 is not set 1211 + # CONFIG_NLS_CODEPAGE_866 is not set 1212 + # CONFIG_NLS_CODEPAGE_869 is not set 1213 + # CONFIG_NLS_CODEPAGE_936 is not set 1214 + # CONFIG_NLS_CODEPAGE_950 is not set 1215 + CONFIG_NLS_CODEPAGE_932=y 1216 + # CONFIG_NLS_CODEPAGE_949 is not set 1217 + # CONFIG_NLS_CODEPAGE_874 is not set 1218 + # CONFIG_NLS_ISO8859_8 is not set 1219 + # CONFIG_NLS_CODEPAGE_1250 is not set 1220 + # CONFIG_NLS_CODEPAGE_1251 is not set 1221 + # CONFIG_NLS_ASCII is not set 1222 + CONFIG_NLS_ISO8859_1=y 1223 + # CONFIG_NLS_ISO8859_2 is not set 1224 + # CONFIG_NLS_ISO8859_3 is not set 1225 + # CONFIG_NLS_ISO8859_4 is not set 1226 + # CONFIG_NLS_ISO8859_5 is not set 1227 + # CONFIG_NLS_ISO8859_6 is not set 1228 + # CONFIG_NLS_ISO8859_7 is not set 1229 + # CONFIG_NLS_ISO8859_9 is not set 1230 + # CONFIG_NLS_ISO8859_13 is not set 1231 + # CONFIG_NLS_ISO8859_14 is not set 1232 + # CONFIG_NLS_ISO8859_15 is not set 1233 + # CONFIG_NLS_KOI8_R is not set 1234 + # CONFIG_NLS_KOI8_U is not set 1235 + # CONFIG_NLS_UTF8 is not set 1236 + # CONFIG_DLM is not set 1237 + 1238 + # 1239 + # Kernel hacking 1240 + # 1241 + CONFIG_TRACE_IRQFLAGS_SUPPORT=y 1242 + # CONFIG_PRINTK_TIME is not set 1243 + # CONFIG_ENABLE_WARN_DEPRECATED is not set 1244 + # CONFIG_ENABLE_MUST_CHECK is not set 1245 + CONFIG_FRAME_WARN=1024 1246 + # CONFIG_MAGIC_SYSRQ is not set 1247 + # CONFIG_UNUSED_SYMBOLS is not set 1248 + # CONFIG_DEBUG_FS is not set 1249 + # CONFIG_HEADERS_CHECK is not set 1250 + CONFIG_DEBUG_KERNEL=y 1251 + # CONFIG_DEBUG_SHIRQ is not set 1252 + CONFIG_DETECT_SOFTLOCKUP=y 1253 + CONFIG_SCHED_DEBUG=y 1254 + # CONFIG_SCHEDSTATS is not set 1255 + # CONFIG_TIMER_STATS is not set 1256 + # CONFIG_DEBUG_OBJECTS is not set 1257 + # CONFIG_DEBUG_SLAB is not set 1258 + CONFIG_DEBUG_PREEMPT=y 1259 + # CONFIG_DEBUG_RT_MUTEXES is not set 1260 + # CONFIG_RT_MUTEX_TESTER is not set 1261 + # CONFIG_DEBUG_SPINLOCK is not set 1262 + # CONFIG_DEBUG_MUTEXES is not set 1263 + # CONFIG_DEBUG_LOCK_ALLOC is not set 1264 + # CONFIG_PROVE_LOCKING is not set 1265 + # CONFIG_LOCK_STAT is not set 1266 + # CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1267 + # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1268 + # CONFIG_DEBUG_KOBJECT is not set 1269 + # CONFIG_DEBUG_BUGVERBOSE is not set 1270 + # CONFIG_DEBUG_INFO is not set 1271 + # CONFIG_DEBUG_VM is not set 1272 + # CONFIG_DEBUG_WRITECOUNT is not set 1273 + # CONFIG_DEBUG_LIST is not set 1274 + # CONFIG_DEBUG_SG is not set 1275 + # CONFIG_FRAME_POINTER is not set 1276 + # CONFIG_BOOT_PRINTK_DELAY is not set 1277 + # CONFIG_RCU_TORTURE_TEST is not set 1278 + # CONFIG_BACKTRACE_SELF_TEST is not set 1279 + # CONFIG_FAULT_INJECTION is not set 1280 + # CONFIG_SAMPLES is not set 1281 + # CONFIG_SH_STANDARD_BIOS is not set 1282 + # CONFIG_EARLY_SCIF_CONSOLE is not set 1283 + # CONFIG_DEBUG_BOOTMEM is not set 1284 + # CONFIG_DEBUG_STACKOVERFLOW is not set 1285 + # CONFIG_DEBUG_STACK_USAGE is not set 1286 + # CONFIG_4KSTACKS is not set 1287 + # CONFIG_IRQSTACKS is not set 1288 + # CONFIG_SH_KGDB is not set 1289 + 1290 + # 1291 + # Security options 1292 + # 1293 + # CONFIG_KEYS is not set 1294 + # CONFIG_SECURITY is not set 1295 + # CONFIG_SECURITY_FILE_CAPABILITIES is not set 1296 + CONFIG_CRYPTO=y 1297 + 1298 + # 1299 + # Crypto core or helper 1300 + # 1301 + CONFIG_CRYPTO_ALGAPI=y 1302 + CONFIG_CRYPTO_BLKCIPHER=y 1303 + CONFIG_CRYPTO_HASH=y 1304 + CONFIG_CRYPTO_MANAGER=y 1305 + # CONFIG_CRYPTO_GF128MUL is not set 1306 + # CONFIG_CRYPTO_NULL is not set 1307 + # CONFIG_CRYPTO_CRYPTD is not set 1308 + # CONFIG_CRYPTO_AUTHENC is not set 1309 + # CONFIG_CRYPTO_TEST is not set 1310 + 1311 + # 1312 + # Authenticated Encryption with Associated Data 1313 + # 1314 + # CONFIG_CRYPTO_CCM is not set 1315 + # CONFIG_CRYPTO_GCM is not set 1316 + # CONFIG_CRYPTO_SEQIV is not set 1317 + 1318 + # 1319 + # Block modes 1320 + # 1321 + CONFIG_CRYPTO_CBC=y 1322 + # CONFIG_CRYPTO_CTR is not set 1323 + # CONFIG_CRYPTO_CTS is not set 1324 + # CONFIG_CRYPTO_ECB is not set 1325 + # CONFIG_CRYPTO_LRW is not set 1326 + # CONFIG_CRYPTO_PCBC is not set 1327 + # CONFIG_CRYPTO_XTS is not set 1328 + 1329 + # 1330 + # Hash modes 1331 + # 1332 + CONFIG_CRYPTO_HMAC=y 1333 + # CONFIG_CRYPTO_XCBC is not set 1334 + 1335 + # 1336 + # Digest 1337 + # 1338 + # CONFIG_CRYPTO_CRC32C is not set 1339 + # CONFIG_CRYPTO_MD4 is not set 1340 + CONFIG_CRYPTO_MD5=y 1341 + # CONFIG_CRYPTO_MICHAEL_MIC is not set 1342 + # CONFIG_CRYPTO_SHA1 is not set 1343 + # CONFIG_CRYPTO_SHA256 is not set 1344 + # CONFIG_CRYPTO_SHA512 is not set 1345 + # CONFIG_CRYPTO_TGR192 is not set 1346 + # CONFIG_CRYPTO_WP512 is not set 1347 + 1348 + # 1349 + # Ciphers 1350 + # 1351 + # CONFIG_CRYPTO_AES is not set 1352 + # CONFIG_CRYPTO_ANUBIS is not set 1353 + # CONFIG_CRYPTO_ARC4 is not set 1354 + # CONFIG_CRYPTO_BLOWFISH is not set 1355 + # CONFIG_CRYPTO_CAMELLIA is not set 1356 + # CONFIG_CRYPTO_CAST5 is not set 1357 + # CONFIG_CRYPTO_CAST6 is not set 1358 + CONFIG_CRYPTO_DES=y 1359 + # CONFIG_CRYPTO_FCRYPT is not set 1360 + # CONFIG_CRYPTO_KHAZAD is not set 1361 + # CONFIG_CRYPTO_SALSA20 is not set 1362 + # CONFIG_CRYPTO_SEED is not set 1363 + # CONFIG_CRYPTO_SERPENT is not set 1364 + # CONFIG_CRYPTO_TEA is not set 1365 + # CONFIG_CRYPTO_TWOFISH is not set 1366 + 1367 + # 1368 + # Compression 1369 + # 1370 + # CONFIG_CRYPTO_DEFLATE is not set 1371 + # CONFIG_CRYPTO_LZO is not set 1372 + # CONFIG_CRYPTO_HW is not set 1373 + 1374 + # 1375 + # Library routines 1376 + # 1377 + CONFIG_BITREVERSE=y 1378 + # CONFIG_GENERIC_FIND_FIRST_BIT is not set 1379 + # CONFIG_CRC_CCITT is not set 1380 + # CONFIG_CRC16 is not set 1381 + # CONFIG_CRC_ITU_T is not set 1382 + CONFIG_CRC32=y 1383 + # CONFIG_CRC7 is not set 1384 + # CONFIG_LIBCRC32C is not set 1385 + CONFIG_PLIST=y 1386 + CONFIG_HAS_IOMEM=y 1387 + CONFIG_HAS_IOPORT=y 1388 + CONFIG_HAS_DMA=y
+1
arch/sh/drivers/pci/Makefile
··· 23 23 obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o 24 24 obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-se7780.o 25 25 obj-$(CONFIG_SH_CAYMAN) += ops-cayman.o 26 + obj-$(CONFIG_SH_SH7785LCR) += ops-sh7785lcr.o fixups-sh7785lcr.o
+46
arch/sh/drivers/pci/fixups-sh7785lcr.c
··· 1 + /* 2 + * arch/sh/drivers/pci/fixups-sh7785lcr.c 3 + * 4 + * R0P7785LC0011RL PCI fixups 5 + * Copyright (C) 2008 Yoshihiro Shimoda 6 + * 7 + * Based on arch/sh/drivers/pci/fixups-r7780rp.c 8 + * Copyright (C) 2003 Lineo uSolutions, Inc. 9 + * Copyright (C) 2004 - 2006 Paul Mundt 10 + * 11 + * This file is subject to the terms and conditions of the GNU General Public 12 + * License. See the file "COPYING" in the main directory of this archive 13 + * for more details. 14 + */ 15 + #include <linux/pci.h> 16 + #include "pci-sh4.h" 17 + 18 + int pci_fixup_pcic(void) 19 + { 20 + pci_write_reg(0x000043ff, SH4_PCIINTM); 21 + pci_write_reg(0x0000380f, SH4_PCIAINTM); 22 + 23 + pci_write_reg(0xfbb00047, SH7780_PCICMD); 24 + pci_write_reg(0x00000000, SH7780_PCIIBAR); 25 + 26 + pci_write_reg(0x00011912, SH7780_PCISVID); 27 + pci_write_reg(0x08000000, SH7780_PCICSCR0); 28 + pci_write_reg(0x0000001b, SH7780_PCICSAR0); 29 + pci_write_reg(0xfd000000, SH7780_PCICSCR1); 30 + pci_write_reg(0x0000000f, SH7780_PCICSAR1); 31 + 32 + pci_write_reg(0xfd000000, SH7780_PCIMBR0); 33 + pci_write_reg(0x00fc0000, SH7780_PCIMBMR0); 34 + 35 + #ifdef CONFIG_32BIT 36 + pci_write_reg(0xc0000000, SH7780_PCIMBR2); 37 + pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2); 38 + #endif 39 + 40 + /* Set IOBR for windows containing area specified in pci.h */ 41 + pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)), 42 + SH7780_PCIIOBR); 43 + pci_write_reg(((SH7780_PCI_IO_SIZE - 1) & (7 << 18)), SH7780_PCIIOBMR); 44 + 45 + return 0; 46 + }
+2
arch/sh/drivers/pci/ops-dreamcast.c
··· 22 22 #include <linux/init.h> 23 23 #include <linux/irq.h> 24 24 #include <linux/pci.h> 25 + #include <linux/module.h> 25 26 26 27 #include <asm/io.h> 27 28 #include <asm/irq.h> ··· 49 48 &gapspci_mem_resource, 0, 1 }, 50 49 { 0, } 51 50 }; 51 + EXPORT_SYMBOL(board_pci_channels); 52 52 53 53 /* 54 54 * The !gapspci_config_access case really shouldn't happen, ever, unless
+66
arch/sh/drivers/pci/ops-sh7785lcr.c
··· 1 + /* 2 + * Author: Ian DaSilva (idasilva@mvista.com) 3 + * 4 + * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. 5 + * 6 + * May be copied or modified under the terms of the GNU General Public 7 + * License. See linux/COPYING for more information. 8 + * 9 + * PCI initialization for the Renesas R0P7785LC0011RL board 10 + * Based on arch/sh/drivers/pci/ops-r7780rp.c 11 + * 12 + */ 13 + #include <linux/kernel.h> 14 + #include <linux/types.h> 15 + #include <linux/init.h> 16 + #include <linux/delay.h> 17 + #include <linux/pci.h> 18 + #include "pci-sh4.h" 19 + 20 + static char irq_tab[] __initdata = { 21 + 65, 66, 67, 68, 22 + }; 23 + 24 + int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) 25 + { 26 + return irq_tab[slot]; 27 + } 28 + 29 + static struct resource sh7785_io_resource = { 30 + .name = "SH7785_IO", 31 + .start = SH7780_PCI_IO_BASE, 32 + .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1, 33 + .flags = IORESOURCE_IO 34 + }; 35 + 36 + static struct resource sh7785_mem_resource = { 37 + .name = "SH7785_mem", 38 + .start = SH7780_PCI_MEMORY_BASE, 39 + .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1, 40 + .flags = IORESOURCE_MEM 41 + }; 42 + 43 + struct pci_channel board_pci_channels[] = { 44 + { &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff }, 45 + { NULL, NULL, NULL, 0, 0 }, 46 + }; 47 + EXPORT_SYMBOL(board_pci_channels); 48 + 49 + static struct sh4_pci_address_map sh7785_pci_map = { 50 + .window0 = { 51 + .base = SH7780_CS2_BASE_ADDR, 52 + .size = 0x04000000, 53 + }, 54 + 55 + .window1 = { 56 + .base = SH7780_CS3_BASE_ADDR, 57 + .size = 0x04000000, 58 + }, 59 + 60 + .flags = SH4_PCIC_NO_RESET, 61 + }; 62 + 63 + int __init pcibios_init_platform(void) 64 + { 65 + return sh7780_pcic_init(&sh7785_pci_map); 66 + }
+1 -1
arch/sh/drivers/pci/pci-auto.c
··· 78 78 } 79 79 80 80 #define EARLY_PCI_OP(rw, size, type) \ 81 - int early_##rw##_config_##size(struct pci_channel *hose, \ 81 + static int early_##rw##_config_##size(struct pci_channel *hose, \ 82 82 int top_bus, int bus, int devfn, int offset, type value) \ 83 83 { \ 84 84 return pci_##rw##_config_##size( \
+1 -1
arch/sh/drivers/pci/pci.c
··· 135 135 * If we set up a device for bus mastering, we need to check and set 136 136 * the latency timer as it may not be properly set. 137 137 */ 138 - unsigned int pcibios_max_latency = 255; 138 + static unsigned int pcibios_max_latency = 255; 139 139 140 140 void pcibios_set_master(struct pci_dev *dev) 141 141 {
+1 -1
arch/sh/kernel/Makefile_32
··· 21 21 obj-$(CONFIG_CRASH_DUMP) += crash_dump.o 22 22 obj-$(CONFIG_PM) += pm.o 23 23 obj-$(CONFIG_STACKTRACE) += stacktrace.o 24 - obj-$(CONFIG_BINFMT_ELF) += dump_task.o 24 + obj-$(CONFIG_ELF_CORE) += dump_task.o 25 25 obj-$(CONFIG_IO_TRAPPED) += io_trapped.o 26 26 27 27 EXTRA_CFLAGS += -Werror
+1 -1
arch/sh/kernel/cf-enabler.c
··· 157 157 } 158 158 #endif 159 159 160 - int __init cf_init(void) 160 + static int __init cf_init(void) 161 161 { 162 162 if (mach_is_se() || mach_is_7722se() || mach_is_7721se()) 163 163 return cf_init_se();
+7 -13
arch/sh/kernel/cpu/clock.c
··· 88 88 } 89 89 } 90 90 91 - int __clk_enable(struct clk *clk) 91 + static int __clk_enable(struct clk *clk) 92 92 { 93 93 /* 94 94 * See if this is the first time we're enabling the clock, some ··· 111 111 112 112 return 0; 113 113 } 114 - EXPORT_SYMBOL_GPL(__clk_enable); 115 114 116 115 int clk_enable(struct clk *clk) 117 116 { ··· 130 131 /* Nothing to do */ 131 132 } 132 133 133 - void __clk_disable(struct clk *clk) 134 + static void __clk_disable(struct clk *clk) 134 135 { 135 136 int count = kref_put(&clk->kref, clk_kref_release); 136 137 ··· 142 143 clk->ops->disable(clk); 143 144 } 144 145 } 145 - EXPORT_SYMBOL_GPL(__clk_disable); 146 146 147 147 void clk_disable(struct clk *clk) 148 148 { ··· 308 310 list_for_each_entry_reverse(clk, &clock_list, node) { 309 311 unsigned long rate = clk_get_rate(clk); 310 312 311 - /* 312 - * Don't bother listing dummy clocks with no ancestry 313 - * that only support enable and disable ops. 314 - */ 315 - if (unlikely(!rate && !clk->parent)) 316 - continue; 317 - 318 - p += sprintf(p, "%-12s\t: %ld.%02ldMHz\n", clk->name, 319 - rate / 1000000, (rate % 1000000) / 10000); 313 + p += sprintf(p, "%-12s\t: %ld.%02ldMHz\t%s\n", clk->name, 314 + rate / 1000000, (rate % 1000000) / 10000, 315 + ((clk->flags & CLK_ALWAYS_ENABLED) || 316 + (atomic_read(&clk->kref.refcount) != 1)) ? 317 + "enabled" : "disabled"); 320 318 } 321 319 322 320 return p - buf;
+23 -8
arch/sh/kernel/cpu/irq/intc.c
··· 62 62 #endif 63 63 64 64 static unsigned int intc_prio_level[NR_IRQS]; /* for now */ 65 - #ifdef CONFIG_CPU_SH3 65 + #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) 66 66 static unsigned long ack_handle[NR_IRQS]; 67 67 #endif 68 68 ··· 231 231 } 232 232 } 233 233 234 - #ifdef CONFIG_CPU_SH3 234 + #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) 235 235 static void intc_mask_ack(unsigned int irq) 236 236 { 237 237 struct intc_desc_int *d = get_intc_desc(irq); ··· 244 244 245 245 if (handle) { 246 246 addr = INTC_REG(d, _INTC_ADDR_D(handle), 0); 247 - ctrl_inb(addr); 248 - ctrl_outb(0x3f ^ set_field(0, 1, handle), addr); 247 + switch (_INTC_FN(handle)) { 248 + case REG_FN_MODIFY_BASE + 0: /* 8bit */ 249 + ctrl_inb(addr); 250 + ctrl_outb(0xff ^ set_field(0, 1, handle), addr); 251 + break; 252 + case REG_FN_MODIFY_BASE + 1: /* 16bit */ 253 + ctrl_inw(addr); 254 + ctrl_outw(0xffff ^ set_field(0, 1, handle), addr); 255 + break; 256 + case REG_FN_MODIFY_BASE + 3: /* 32bit */ 257 + ctrl_inl(addr); 258 + ctrl_outl(0xffffffff ^ set_field(0, 1, handle), addr); 259 + break; 260 + default: 261 + BUG(); 262 + break; 263 + } 249 264 } 250 265 } 251 266 #endif ··· 481 466 return 0; 482 467 } 483 468 484 - #ifdef CONFIG_CPU_SH3 469 + #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) 485 470 static unsigned int __init intc_ack_data(struct intc_desc *desc, 486 471 struct intc_desc_int *d, 487 472 intc_enum enum_id) ··· 616 601 /* irq should be disabled by default */ 617 602 d->chip.mask(irq); 618 603 619 - #ifdef CONFIG_CPU_SH3 604 + #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) 620 605 if (desc->ack_regs) 621 606 ack_handle[irq] = intc_ack_data(desc, d, enum_id); 622 607 #endif ··· 650 635 d->nr_reg += desc->prio_regs ? desc->nr_prio_regs * 2 : 0; 651 636 d->nr_reg += desc->sense_regs ? desc->nr_sense_regs : 0; 652 637 653 - #ifdef CONFIG_CPU_SH3 638 + #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) 654 639 d->nr_reg += desc->ack_regs ? desc->nr_ack_regs : 0; 655 640 #endif 656 641 d->reg = alloc_bootmem(d->nr_reg * sizeof(*d->reg)); ··· 691 676 d->chip.mask_ack = intc_disable; 692 677 d->chip.set_type = intc_set_sense; 693 678 694 - #ifdef CONFIG_CPU_SH3 679 + #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) 695 680 if (desc->ack_regs) { 696 681 for (i = 0; i < desc->nr_ack_regs; i++) 697 682 k += save_reg(d, k, desc->ack_regs[i].set_reg, 0);
+51 -82
arch/sh/kernel/cpu/sh2/entry.S
··· 3 3 * 4 4 * The SH-2 exception entry 5 5 * 6 - * Copyright (C) 2005,2006 Yoshinori Sato 6 + * Copyright (C) 2005-2008 Yoshinori Sato 7 7 * Copyright (C) 2005 AXE,Inc. 8 8 * 9 9 * This file is subject to the terms and conditions of the GNU General Public ··· 36 36 #include <asm/entry-macros.S> 37 37 38 38 ENTRY(exception_handler) 39 - ! already saved r0/r1 39 + ! stack 40 + ! r0 <- point sp 41 + ! r1 42 + ! pc 43 + ! sr 44 + ! r0 = temporary 45 + ! r1 = vector (pseudo EXPEVT / INTEVT / TRA) 40 46 mov.l r2,@-sp 41 47 mov.l r3,@-sp 42 - mov r0,r1 43 48 cli 44 49 mov.l $cpu_mode,r2 45 50 mov.l @r2,r0 46 51 mov.l @(5*4,r15),r3 ! previous SR 47 - shll2 r3 ! set "S" flag 48 - rotl r0 ! T <- "S" flag 49 - rotl r0 ! "S" flag is LSB 50 - rotcr r3 ! T -> r3:b30 51 - shlr r3 52 - shlr r0 53 - bt/s 1f 54 - mov.l r3,@(5*4,r15) ! copy cpu mode to SR 52 + or r0,r3 ! set MD 53 + tst r0,r0 54 + bf/s 1f ! previous mode check 55 + mov.l r3,@(5*4,r15) ! update SR 55 56 ! switch to kernel mode 56 - mov #1,r0 57 - rotr r0 58 - rotr r0 57 + mov.l __md_bit,r0 59 58 mov.l r0,@r2 ! enter kernel mode 60 59 mov.l $current_thread_info,r2 61 60 mov.l @r2,r2 62 - mov #0x20,r0 61 + mov #(THREAD_SIZE >> 8),r0 63 62 shll8 r0 64 63 add r2,r0 65 64 mov r15,r2 ! r2 = user stack top 66 65 mov r0,r15 ! switch kernel stack 67 - add #-4,r15 ! dummy 68 66 mov.l r1,@-r15 ! TRA 69 67 sts.l macl, @-r15 70 68 sts.l mach, @-r15 71 69 stc.l gbr, @-r15 72 - mov.l @(4*4,r2),r0 73 - mov.l @(5*4,r2),r1 74 - mov.l r1,@-r15 ! original SR 70 + mov.l @(5*4,r2),r0 71 + mov.l r0,@-r15 ! original SR 75 72 sts.l pr,@-r15 73 + mov.l @(4*4,r2),r0 76 74 mov.l r0,@-r15 ! original PC 77 75 mov r2,r3 78 76 add #(4+2)*4,r3 ! rewind r0 - r3 + exception frame ··· 86 88 mov.l r6,@-r15 87 89 mov.l r5,@-r15 88 90 mov.l r4,@-r15 91 + mov r1,r9 ! save TRA 89 92 mov r2,r8 ! copy user -> kernel stack 90 - mov.l @r8+,r3 93 + mov.l @(0,r8),r3 91 94 mov.l r3,@-r15 92 - mov.l @r8+,r2 95 + mov.l @(4,r8),r2 93 96 mov.l r2,@-r15 94 - mov.l @r8+,r1 97 + mov.l @(12,r8),r1 95 98 mov.l r1,@-r15 96 - mov.l @r8+,r0 99 + mov.l @(8,r8),r0 97 100 bra 2f 98 101 mov.l r0,@-r15 99 102 1: ··· 106 107 mov.l r0,@-r15 107 108 mov.l @r2+,r0 ! old R2 108 109 mov.l r0,@-r15 109 - mov.l @r2+,r0 ! old R1 110 + mov.l @(4,r2),r0 ! old R1 110 111 mov.l r0,@-r15 111 - mov.l @r2+,r0 ! old R0 112 - mov.l r0,@-r15 112 + mov.l @r2,r0 ! old R0 113 + mov.l r0,@-r15 114 + add #8,r2 113 115 mov.l @r2+,r3 ! old PC 114 116 mov.l @r2+,r0 ! old SR 115 117 add #-4,r2 ! exception frame stub (sr) ··· 135 135 mov.l r6,@-r2 136 136 mov.l r5,@-r2 137 137 mov.l r4,@-r2 138 + mov r1,r9 138 139 mov.l @(OFF_R0,r15),r0 139 140 mov.l @(OFF_R1,r15),r1 140 141 mov.l @(OFF_R2,r15),r2 141 142 mov.l @(OFF_R3,r15),r3 142 143 2: 143 - mov #OFF_TRA,r8 144 - add r15,r8 145 - mov.l @r8,r9 146 144 mov #64,r8 147 145 cmp/hs r8,r9 148 146 bt interrupt_entry ! vec >= 64 is interrupt ··· 148 150 cmp/hs r8,r9 149 151 bt trap_entry ! 64 > vec >= 32 is trap 150 152 151 - #if defined(CONFIG_SH_FPU) 152 - mov #13,r8 153 - cmp/eq r8,r9 154 - bt 10f ! fpu 155 - nop 156 - #endif 157 - 158 153 mov.l 4f,r8 159 154 mov r9,r4 160 155 shll2 r9 161 156 add r9,r8 162 - mov.l @r8,r8 163 - mov #0,r9 164 - cmp/eq r9,r8 157 + mov.l @r8,r8 ! exception handler address 158 + tst r8,r8 165 159 bf 3f 166 160 mov.l 8f,r8 ! unhandled exception 167 - #if defined(CONFIG_SH_FPU) 168 - 10: 169 - mov.l 9f, r8 ! unhandled exception 170 - #endif 171 161 3: 172 162 mov.l 5f,r10 173 163 jmp @r8 ··· 174 188 5: .long ret_from_exception 175 189 6: .long ret_from_irq 176 190 7: .long do_IRQ 177 - 8: .long do_exception_error 178 - #ifdef CONFIG_SH_FPU 179 - 9: .long fpu_error_trap_handler 180 - #endif 191 + 8: .long exception_error 181 192 182 193 trap_entry: 183 194 mov #0x30,r8 ··· 183 200 add #-0x10,r9 ! convert SH2 to SH3/4 ABI 184 201 1: 185 202 shll2 r9 ! TRA 186 - mov #OFF_TRA,r8 187 - add r15,r8 188 - mov.l r9,@r8 189 - mov r9,r8 190 - #ifdef CONFIG_TRACE_IRQFLAGS 191 - mov.l 2f, r9 192 - jsr @r9 193 - nop 194 - #endif 195 - sti 196 - bra system_call 197 - nop 203 + bra system_call ! jump common systemcall entry 204 + mov r9,r8 198 205 199 - .align 2 200 - #ifdef CONFIG_TRACE_IRQFLAGS 201 - 2: .long trace_hardirqs_on 202 - #endif 203 - 204 206 #if defined(CONFIG_SH_STANDARD_BIOS) 205 207 /* Unwind the stack and jmp to the debug entry */ 206 208 ENTRY(sh_bios_handler) ··· 208 240 mov.l @r2,r2 209 241 stc sr,r3 210 242 mov.l r2,@r0 211 - mov.l r3,@r0 243 + mov.l r3,@(4,r0) 212 244 mov.l r1,@(8,r0) 213 245 mov.l @r15+, r0 214 246 mov.l @r15+, r1 ··· 240 272 mov.l 1f,r0 241 273 jmp @r0 242 274 mov #0,r5 ! writeaccess is unknown 243 - .align 2 244 275 276 + .align 2 245 277 1: .long do_address_error 246 278 247 279 restore_all: 248 - cli 249 - #ifdef CONFIG_TRACE_IRQFLAGS 250 - mov.l 1f, r0 251 - jsr @r0 252 - nop 253 - #endif 280 + stc sr,r0 281 + or #0xf0,r0 282 + ldc r0,sr ! all interrupt block (same BL = 1) 283 + ! restore special register 284 + ! overlap exception frame 285 + mov r15,r0 286 + add #17*4,r0 287 + lds.l @r0+,pr 288 + add #4,r0 289 + ldc.l @r0+,gbr 290 + lds.l @r0+,mach 291 + lds.l @r0+,macl 254 292 mov r15,r0 255 293 mov.l $cpu_mode,r2 256 294 mov #OFF_SR,r3 257 295 mov.l @(r0,r3),r1 258 - mov.l r1,@r2 296 + mov.l __md_bit,r3 297 + and r1,r3 ! copy MD bit 298 + mov.l r3,@r2 259 299 shll2 r1 ! clear MD bit 260 300 shlr2 r1 261 301 mov.l @(OFF_SP,r0),r2 ··· 273 297 mov #OFF_PC,r3 274 298 mov.l @(r0,r3),r1 275 299 mov.l r1,@r2 ! set pc 276 - add #4*16+4,r0 277 - lds.l @r0+,pr 278 - add #4,r0 ! skip sr 279 - ldc.l @r0+,gbr 280 - lds.l @r0+,mach 281 - lds.l @r0+,macl 282 300 get_current_thread_info r0, r1 283 301 mov.l $current_thread_info,r1 284 302 mov.l r0,@r1 ··· 296 326 nop 297 327 298 328 .align 2 299 - #ifdef CONFIG_TRACE_IRQFLAGS 300 - 1: .long trace_hardirqs_off 301 - #endif 329 + __md_bit: 330 + .long 0x40000000 302 331 $current_thread_info: 303 332 .long __current_thread_info 304 333 $cpu_mode:
+8 -7
arch/sh/kernel/cpu/sh2/ex.S
··· 18 18 exception_entry: 19 19 no = 0 20 20 .rept 256 21 - mov.l r0,@-sp 22 - mov #no,r0 21 + mov.l r1,@-sp 23 22 bra exception_trampoline 24 - and #0xff,r0 23 + mov #no,r1 25 24 no = no + 1 26 25 .endr 27 26 exception_trampoline: 28 - mov.l r1,@-sp 29 - mov.l $exception_handler,r1 30 - jmp @r1 27 + mov.l r0,@-sp 28 + mov.l $exception_handler,r0 29 + extu.b r1,r1 30 + jmp @r0 31 + extu.w r1,r1 31 32 32 33 .align 2 33 34 $exception_entry: ··· 42 41 ENTRY(vbr_base) 43 42 vector = 0 44 43 .rept 256 45 - .long exception_entry + vector * 8 44 + .long exception_entry + vector * 6 46 45 vector = vector + 1 47 46 .endr
+24
arch/sh/kernel/cpu/sh2/setup-sh7619.c
··· 96 96 }, 97 97 }; 98 98 99 + static struct resource eth_resources[] = { 100 + [0] = { 101 + .start = 0xfb000000, 102 + .end = 0xfb0001c8, 103 + .flags = IORESOURCE_MEM, 104 + }, 105 + [1] = { 106 + .start = 85, 107 + .end = 85, 108 + .flags = IORESOURCE_IRQ, 109 + }, 110 + }; 111 + 112 + static struct platform_device eth_device = { 113 + .name = "sh-eth", 114 + .id = -1, 115 + .dev = { 116 + .platform_data = (void *)1, 117 + }, 118 + .num_resources = ARRAY_SIZE(eth_resources), 119 + .resource = eth_resources, 120 + }; 121 + 99 122 static struct platform_device *sh7619_devices[] __initdata = { 100 123 &sci_device, 124 + &eth_device, 101 125 }; 102 126 103 127 static int __init sh7619_devices_setup(void)
+1 -1
arch/sh/kernel/cpu/sh2a/Makefile
··· 4 4 5 5 obj-y := common.o probe.o opcode_helper.o 6 6 7 - common-y += $(addprefix ../sh2/, ex.o entry.o) 7 + common-y += ex.o entry.o 8 8 9 9 obj-$(CONFIG_SH_FPU) += fpu.o 10 10
+249
arch/sh/kernel/cpu/sh2a/entry.S
··· 1 + /* 2 + * arch/sh/kernel/cpu/sh2a/entry.S 3 + * 4 + * The SH-2A exception entry 5 + * 6 + * Copyright (C) 2008 Yoshinori Sato 7 + * Based on arch/sh/kernel/cpu/sh2/entry.S 8 + * 9 + * This file is subject to the terms and conditions of the GNU General Public 10 + * License. See the file "COPYING" in the main directory of this archive 11 + * for more details. 12 + */ 13 + 14 + #include <linux/linkage.h> 15 + #include <asm/asm-offsets.h> 16 + #include <asm/thread_info.h> 17 + #include <asm/cpu/mmu_context.h> 18 + #include <asm/unistd.h> 19 + #include <asm/errno.h> 20 + #include <asm/page.h> 21 + 22 + /* Offsets to the stack */ 23 + OFF_R0 = 0 /* Return value. New ABI also arg4 */ 24 + OFF_R1 = 4 /* New ABI: arg5 */ 25 + OFF_R2 = 8 /* New ABI: arg6 */ 26 + OFF_R3 = 12 /* New ABI: syscall_nr */ 27 + OFF_R4 = 16 /* New ABI: arg0 */ 28 + OFF_R5 = 20 /* New ABI: arg1 */ 29 + OFF_R6 = 24 /* New ABI: arg2 */ 30 + OFF_R7 = 28 /* New ABI: arg3 */ 31 + OFF_SP = (15*4) 32 + OFF_PC = (16*4) 33 + OFF_SR = (16*4+2*4) 34 + OFF_TRA = (16*4+6*4) 35 + 36 + #include <asm/entry-macros.S> 37 + 38 + ENTRY(exception_handler) 39 + ! stack 40 + ! r0 <- point sp 41 + ! r1 42 + ! pc 43 + ! sr 44 + ! r0 = temporary 45 + ! r1 = vector (pseudo EXPEVT / INTEVT / TRA) 46 + mov.l r2,@-sp 47 + cli 48 + mov.l $cpu_mode,r2 49 + bld.b #6,@(0,r2) !previus SR.MD 50 + bst.b #6,@(4*4,r15) !set cpu mode to SR.MD 51 + bt 1f 52 + ! switch to kernel mode 53 + bset.b #6,@(0,r2) !set SR.MD 54 + mov.l $current_thread_info,r2 55 + mov.l @r2,r2 56 + mov #(THREAD_SIZE >> 8),r0 57 + shll8 r0 58 + add r2,r0 ! r0 = kernel stack tail 59 + mov r15,r2 ! r2 = user stack top 60 + mov r0,r15 ! switch kernel stack 61 + mov.l r1,@-r15 ! TRA 62 + sts.l macl, @-r15 63 + sts.l mach, @-r15 64 + stc.l gbr, @-r15 65 + mov.l @(4*4,r2),r0 66 + mov.l r0,@-r15 ! original SR 67 + sts.l pr,@-r15 68 + mov.l @(3*4,r2),r0 69 + mov.l r0,@-r15 ! original PC 70 + mov r2,r0 71 + add #(3+2)*4,r0 ! rewind r0 - r3 + exception frame 72 + lds r0,pr ! pr = original SP 73 + movmu.l r3,@-r15 ! save regs 74 + mov r2,r8 ! r8 = previus stack top 75 + mov r1,r9 ! r9 = interrupt vector 76 + ! restore previous stack 77 + mov.l @r8+,r2 78 + mov.l @r8+,r0 79 + mov.l @r8+,r1 80 + bra 2f 81 + movml.l r2,@-r15 82 + 1: 83 + ! in kernel exception 84 + mov r15,r2 85 + add #-((OFF_TRA + 4) - OFF_PC) + 5*4,r15 86 + movmu.l r3,@-r15 87 + mov r2,r8 ! r8 = previous stack top 88 + mov r1,r9 ! r9 = interrupt vector 89 + ! restore exception frame & regs 90 + mov.l @r8+,r2 ! old R2 91 + mov.l @r8+,r0 ! old R0 92 + mov.l @r8+,r1 ! old R1 93 + mov.l @r8+,r10 ! old PC 94 + mov.l @r8+,r11 ! old SR 95 + movml.l r2,@-r15 96 + mov.l r10,@(OFF_PC,r15) 97 + mov.l r11,@(OFF_SR,r15) 98 + mov.l r8,@(OFF_SP,r15) ! save old sp 99 + mov r15,r8 100 + add #OFF_TRA + 4,r8 101 + mov.l r9,@-r8 102 + sts.l macl,@-r8 103 + sts.l mach,@-r8 104 + stc.l gbr,@-r8 105 + add #-4,r8 106 + sts.l pr,@-r8 107 + 2: 108 + ! dispatch exception / interrupt 109 + mov #64,r8 110 + cmp/hs r8,r9 111 + bt interrupt_entry ! vec >= 64 is interrupt 112 + mov #32,r8 113 + cmp/hs r8,r9 114 + bt trap_entry ! 64 > vec >= 32 is trap 115 + 116 + mov.l 4f,r8 117 + mov r9,r4 118 + shll2 r9 119 + add r9,r8 120 + mov.l @r8,r8 ! exception handler address 121 + tst r8,r8 122 + bf 3f 123 + mov.l 8f,r8 ! unhandled exception 124 + 3: 125 + mov.l 5f,r10 126 + jmp @r8 127 + lds r10,pr 128 + 129 + interrupt_entry: 130 + mov r9,r4 131 + mov r15,r5 132 + mov.l 7f,r8 133 + mov.l 6f,r9 134 + jmp @r8 135 + lds r9,pr 136 + 137 + .align 2 138 + 4: .long exception_handling_table 139 + 5: .long ret_from_exception 140 + 6: .long ret_from_irq 141 + 7: .long do_IRQ 142 + 8: .long exception_error 143 + 144 + trap_entry: 145 + mov #0x30,r8 146 + cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall 147 + bt 1f 148 + add #-0x10,r9 ! convert SH2 to SH3/4 ABI 149 + 1: 150 + shll2 r9 ! TRA 151 + bra system_call ! jump common systemcall entry 152 + mov r9,r8 153 + 154 + #if defined(CONFIG_SH_STANDARD_BIOS) 155 + /* Unwind the stack and jmp to the debug entry */ 156 + ENTRY(sh_bios_handler) 157 + mov r15,r0 158 + add #(22-4)*4-4,r0 159 + ldc.l @r0+,gbr 160 + lds.l @r0+,mach 161 + lds.l @r0+,macl 162 + mov r15,r0 163 + mov.l @(OFF_SP,r0),r1 164 + mov.l @(OFF_SR,r2),r3 165 + mov.l r3,@-r1 166 + mov.l @(OFF_SP,r2),r3 167 + mov.l r3,@-r1 168 + mov r15,r0 169 + add #(22-4)*4-8,r0 170 + mov.l 1f,r2 171 + mov.l @r2,r2 172 + stc sr,r3 173 + mov.l r2,@r0 174 + mov.l r3,@(4,r0) 175 + mov.l r1,@(8,r0) 176 + movml.l @r15+,r14 177 + add #8,r15 178 + lds.l @r15+, pr 179 + rte 180 + mov.l @r15+,r15 181 + .align 2 182 + 1: .long gdb_vbr_vector 183 + #endif /* CONFIG_SH_STANDARD_BIOS */ 184 + 185 + ENTRY(address_error_trap_handler) 186 + mov r15,r4 ! regs 187 + mov.l @(OFF_PC,r15),r6 ! pc 188 + mov.l 1f,r0 189 + jmp @r0 190 + mov #0,r5 ! writeaccess is unknown 191 + 192 + .align 2 193 + 1: .long do_address_error 194 + 195 + restore_all: 196 + stc sr,r0 197 + or #0xf0,r0 198 + ldc r0,sr ! all interrupt block (same BL = 1) 199 + ! restore special register 200 + ! overlap exception frame 201 + mov r15,r0 202 + add #17*4,r0 203 + lds.l @r0+,pr 204 + add #4,r0 205 + ldc.l @r0+,gbr 206 + lds.l @r0+,mach 207 + lds.l @r0+,macl 208 + mov r15,r0 209 + mov.l $cpu_mode,r2 210 + bld.b #6,@(OFF_SR,r15) 211 + bst.b #6,@(0,r2) ! save CPU mode 212 + mov.l @(OFF_SR,r0),r1 213 + shll2 r1 214 + shlr2 r1 ! clear MD bit 215 + mov.l @(OFF_SP,r0),r2 216 + add #-8,r2 217 + mov.l r2,@(OFF_SP,r0) ! point exception frame top 218 + mov.l r1,@(4,r2) ! set sr 219 + mov.l @(OFF_PC,r0),r1 220 + mov.l r1,@r2 ! set pc 221 + get_current_thread_info r0, r1 222 + mov.l $current_thread_info,r1 223 + mov.l r0,@r1 224 + movml.l @r15+,r14 225 + mov.l @r15,r15 226 + rte 227 + nop 228 + 229 + .align 2 230 + $current_thread_info: 231 + .long __current_thread_info 232 + $cpu_mode: 233 + .long __cpu_mode 234 + 235 + ! common exception handler 236 + #include "../../entry-common.S" 237 + 238 + .data 239 + ! cpu operation mode 240 + ! bit30 = MD (compatible SH3/4) 241 + __cpu_mode: 242 + .long 0x40000000 243 + 244 + .section .bss 245 + __current_thread_info: 246 + .long 0 247 + 248 + ENTRY(exception_handling_table) 249 + .space 4*32
+72
arch/sh/kernel/cpu/sh2a/ex.S
··· 1 + /* 2 + * arch/sh/kernel/cpu/sh2a/ex.S 3 + * 4 + * The SH-2A exception vector table 5 + * 6 + * Copyright (C) 2008 Yoshinori Sato 7 + * 8 + * This file is subject to the terms and conditions of the GNU General Public 9 + * License. See the file "COPYING" in the main directory of this archive 10 + * for more details. 11 + */ 12 + 13 + #include <linux/linkage.h> 14 + 15 + ! 16 + ! convert Exception Vector to Exception Number 17 + ! 18 + 19 + ! exception no 0 to 255 20 + exception_entry0: 21 + no = 0 22 + .rept 256 23 + mov.l r1,@-sp 24 + bra exception_trampoline0 25 + mov #no,r1 26 + no = no + 1 27 + .endr 28 + exception_trampoline0: 29 + mov.l r0,@-sp 30 + mov.l 1f,r0 31 + extu.b r1,r1 32 + jmp @r0 33 + extu.w r1,r1 34 + 35 + .align 2 36 + 1: .long exception_handler 37 + 38 + ! exception no 256 to 511 39 + exception_entry1: 40 + no = 0 41 + .rept 256 42 + mov.l r1,@-sp 43 + bra exception_trampoline1 44 + mov #no,r1 45 + no = no + 1 46 + .endr 47 + exception_trampoline1: 48 + mov.l r0,@-sp 49 + extu.b r1,r1 50 + movi20 #0x100,r0 51 + add r0,r1 52 + mov.l 1f,r0 53 + jmp @r0 54 + extu.w r1,r1 55 + 56 + .align 2 57 + 1: .long exception_handler 58 + 59 + ! 60 + ! Exception Vector Base 61 + ! 62 + .align 2 63 + ENTRY(vbr_base) 64 + vector = 0 65 + .rept 256 66 + .long exception_entry0 + vector * 6 67 + vector = vector + 1 68 + .endr 69 + .rept 256 70 + .long exception_entry1 + vector * 6 71 + vector = vector + 1 72 + .endr
+19 -19
arch/sh/kernel/cpu/sh3/ex.S
··· 4 4 * The SH-3 and SH-4 exception vector table. 5 5 6 6 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 7 - * Copyright (C) 2003 - 2006 Paul Mundt 7 + * Copyright (C) 2003 - 2008 Paul Mundt 8 8 * 9 9 * This file is subject to the terms and conditions of the GNU General Public 10 10 * License. See the file "COPYING" in the main directory of this archive ··· 12 12 */ 13 13 #include <linux/linkage.h> 14 14 15 + #if !defined(CONFIG_MMU) 16 + #define tlb_miss_load exception_error 17 + #define tlb_miss_store exception_error 18 + #define initial_page_write exception_error 19 + #define tlb_protection_violation_load exception_error 20 + #define tlb_protection_violation_store exception_error 21 + #define address_error_load exception_error 22 + #define address_error_store exception_error 23 + #endif 24 + 25 + #if !defined(CONFIG_SH_FPU) 26 + #define fpu_error_trap_handler exception_error 27 + #endif 28 + 29 + #if !defined(CONFIG_KGDB_NMI) 30 + #define kgdb_handle_exception exception_error 31 + #endif 32 + 15 33 .align 2 16 34 .data 17 35 18 36 ENTRY(exception_handling_table) 19 37 .long exception_error /* 000 */ 20 38 .long exception_error 21 - #if defined(CONFIG_MMU) 22 39 .long tlb_miss_load /* 040 */ 23 40 .long tlb_miss_store 24 41 .long initial_page_write ··· 43 26 .long tlb_protection_violation_store 44 27 .long address_error_load 45 28 .long address_error_store /* 100 */ 46 - #else 47 - .long exception_error ! tlb miss load /* 040 */ 48 - .long exception_error ! tlb miss store 49 - .long exception_error ! initial page write 50 - .long exception_error ! tlb prot violation load 51 - .long exception_error ! tlb prot violation store 52 - .long exception_error ! address error load 53 - .long exception_error ! address error store /* 100 */ 54 - #endif 55 - #if defined(CONFIG_SH_FPU) 56 29 .long fpu_error_trap_handler /* 120 */ 57 - #else 58 - .long exception_error /* 120 */ 59 - #endif 60 30 .long exception_error /* 140 */ 61 31 .long system_call ! Unconditional Trap /* 160 */ 62 32 .long exception_error ! reserved_instruction (filled by trap_init) /* 180 */ 63 33 .long exception_error ! illegal_slot_instruction (filled by trap_init) /*1A0*/ 64 34 ENTRY(nmi_slot) 65 - #if defined (CONFIG_KGDB_NMI) 66 35 .long kgdb_handle_exception /* 1C0 */ ! Allow trap to debugger 67 - #else 68 - .long exception_none /* 1C0 */ ! Not implemented yet 69 - #endif 70 36 ENTRY(user_break_point_trap) 71 37 .long break_point_trap /* 1E0 */ 72 38
+5 -1
arch/sh/kernel/cpu/sh4/probe.c
··· 50 50 boot_cpu_data.dcache.ways = 1; 51 51 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; 52 52 53 + /* We don't know the chip cut */ 54 + boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1; 55 + 53 56 /* 54 57 * Setup some generic flags we can probe on SH-4A parts 55 58 */ 56 - if (((pvr >> 24) & 0xff) == 0x10) { 59 + if (((pvr >> 16) & 0xff) == 0x10) { 57 60 if ((cvr & 0x10000000) == 0) 58 61 boot_cpu_data.flags |= CPU_HAS_DSP; 59 62 60 63 boot_cpu_data.flags |= CPU_HAS_LLSC; 64 + boot_cpu_data.cut_major = pvr & 0x7f; 61 65 } 62 66 63 67 /* FPU detection works for everyone */
+1 -1
arch/sh/kernel/cpu/sh4a/Makefile
··· 21 21 clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o 22 22 clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o 23 23 clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o 24 - clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o 24 + clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7722.o 25 25 clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o 26 26 clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7722.o 27 27 clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7722.o
-99
arch/sh/kernel/cpu/sh4a/clock-sh7343.c
··· 1 - /* 2 - * arch/sh/kernel/cpu/sh4a/clock-sh7343.c 3 - * 4 - * SH7343/SH7722 support for the clock framework 5 - * 6 - * Copyright (C) 2006 Paul Mundt 7 - * 8 - * This file is subject to the terms and conditions of the GNU General Public 9 - * License. See the file "COPYING" in the main directory of this archive 10 - * for more details. 11 - */ 12 - #include <linux/init.h> 13 - #include <linux/kernel.h> 14 - #include <linux/io.h> 15 - #include <asm/clock.h> 16 - #include <asm/freq.h> 17 - 18 - /* 19 - * SH7343/SH7722 uses a common set of multipliers and divisors, so this 20 - * is quite simple.. 21 - */ 22 - static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 }; 23 - static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 }; 24 - 25 - #define pll_calc() (((ctrl_inl(FRQCR) >> 24) & 0x1f) + 1) 26 - 27 - static void master_clk_init(struct clk *clk) 28 - { 29 - clk->parent = clk_get(NULL, "cpu_clk"); 30 - } 31 - 32 - static void master_clk_recalc(struct clk *clk) 33 - { 34 - int idx = (ctrl_inl(FRQCR) & 0x000f); 35 - clk->rate *= clk->parent->rate * multipliers[idx] / divisors[idx]; 36 - } 37 - 38 - static struct clk_ops sh7343_master_clk_ops = { 39 - .init = master_clk_init, 40 - .recalc = master_clk_recalc, 41 - }; 42 - 43 - static void module_clk_init(struct clk *clk) 44 - { 45 - clk->parent = NULL; 46 - clk->rate = CONFIG_SH_PCLK_FREQ; 47 - } 48 - 49 - static struct clk_ops sh7343_module_clk_ops = { 50 - .init = module_clk_init, 51 - }; 52 - 53 - static void bus_clk_init(struct clk *clk) 54 - { 55 - clk->parent = clk_get(NULL, "cpu_clk"); 56 - } 57 - 58 - static void bus_clk_recalc(struct clk *clk) 59 - { 60 - int idx = (ctrl_inl(FRQCR) >> 8) & 0x000f; 61 - clk->rate = clk->parent->rate * multipliers[idx] / divisors[idx]; 62 - } 63 - 64 - static struct clk_ops sh7343_bus_clk_ops = { 65 - .init = bus_clk_init, 66 - .recalc = bus_clk_recalc, 67 - }; 68 - 69 - static void cpu_clk_init(struct clk *clk) 70 - { 71 - clk->parent = clk_get(NULL, "module_clk"); 72 - clk->flags |= CLK_RATE_PROPAGATES; 73 - clk_set_rate(clk, clk_get_rate(clk)); 74 - } 75 - 76 - static void cpu_clk_recalc(struct clk *clk) 77 - { 78 - int idx = (ctrl_inl(FRQCR) >> 20) & 0x000f; 79 - clk->rate = clk->parent->rate * pll_calc() * 80 - multipliers[idx] / divisors[idx]; 81 - } 82 - 83 - static struct clk_ops sh7343_cpu_clk_ops = { 84 - .init = cpu_clk_init, 85 - .recalc = cpu_clk_recalc, 86 - }; 87 - 88 - static struct clk_ops *sh7343_clk_ops[] = { 89 - &sh7343_master_clk_ops, 90 - &sh7343_module_clk_ops, 91 - &sh7343_bus_clk_ops, 92 - &sh7343_cpu_clk_ops, 93 - }; 94 - 95 - void __init arch_init_clk_ops(struct clk_ops **ops, int idx) 96 - { 97 - if (idx < ARRAY_SIZE(sh7343_clk_ops)) 98 - *ops = sh7343_clk_ops[idx]; 99 - }
+159 -62
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
··· 1 1 /* 2 2 * arch/sh/kernel/cpu/sh4a/clock-sh7722.c 3 3 * 4 - * SH7722 & SH7366 support for the clock framework 4 + * SH7343, SH7722, SH7723 & SH7366 support for the clock framework 5 5 * 6 6 * Copyright (c) 2006-2007 Nomad Global Solutions Inc 7 7 * Based on code for sh7343 by Paul Mundt ··· 14 14 #include <linux/kernel.h> 15 15 #include <linux/io.h> 16 16 #include <linux/errno.h> 17 + #include <linux/stringify.h> 17 18 #include <asm/clock.h> 18 19 #include <asm/freq.h> 19 20 ··· 412 411 * clock ops methods for SIU A/B and IrDA clock 413 412 * 414 413 */ 415 - static int sh7722_siu_which(struct clk *clk) 414 + 415 + #ifndef CONFIG_CPU_SUBTYPE_SH7343 416 + 417 + static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id) 416 418 { 417 - if (!strcmp(clk->name, "siu_a_clk")) 418 - return 0; 419 - if (!strcmp(clk->name, "siu_b_clk")) 420 - return 1; 421 - #if defined(CONFIG_CPU_SUBTYPE_SH7722) 422 - if (!strcmp(clk->name, "irda_clk")) 423 - return 2; 424 - #endif 425 - return -EINVAL; 419 + unsigned long r; 420 + int div; 421 + 422 + r = ctrl_inl(clk->arch_flags); 423 + div = sh7722_find_divisors(clk->parent->rate, rate); 424 + if (div < 0) 425 + return div; 426 + r = (r & ~0xF) | div; 427 + ctrl_outl(r, clk->arch_flags); 428 + return 0; 426 429 } 427 430 428 - static unsigned long sh7722_siu_regs[] = { 429 - [0] = SCLKACR, 430 - [1] = SCLKBCR, 431 - #if defined(CONFIG_CPU_SUBTYPE_SH7722) 432 - [2] = IrDACLKCR, 433 - #endif 434 - }; 431 + static void sh7722_siu_recalc(struct clk *clk) 432 + { 433 + unsigned long r; 434 + 435 + r = ctrl_inl(clk->arch_flags); 436 + clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF]; 437 + } 435 438 436 439 static int sh7722_siu_start_stop(struct clk *clk, int enable) 437 440 { 438 - int siu = sh7722_siu_which(clk); 439 441 unsigned long r; 440 442 441 - if (siu < 0) 442 - return siu; 443 - BUG_ON(siu > 2); 444 - r = ctrl_inl(sh7722_siu_regs[siu]); 443 + r = ctrl_inl(clk->arch_flags); 445 444 if (enable) 446 - ctrl_outl(r & ~(1 << 8), sh7722_siu_regs[siu]); 445 + ctrl_outl(r & ~(1 << 8), clk->arch_flags); 447 446 else 448 - ctrl_outl(r | (1 << 8), sh7722_siu_regs[siu]); 447 + ctrl_outl(r | (1 << 8), clk->arch_flags); 449 448 return 0; 450 449 } 451 450 ··· 458 457 { 459 458 sh7722_siu_start_stop(clk, 0); 460 459 } 460 + 461 + static struct clk_ops sh7722_siu_clk_ops = { 462 + .recalc = sh7722_siu_recalc, 463 + .set_rate = sh7722_siu_set_rate, 464 + .enable = sh7722_siu_enable, 465 + .disable = sh7722_siu_disable, 466 + }; 467 + 468 + #endif /* CONFIG_CPU_SUBTYPE_SH7343 */ 461 469 462 470 static void sh7722_video_enable(struct clk *clk) 463 471 { ··· 504 494 clk->rate = clk->parent->rate / ((r & 0x3F) + 1); 505 495 } 506 496 507 - static int sh7722_siu_set_rate(struct clk *clk, unsigned long rate, int algo_id) 508 - { 509 - int siu = sh7722_siu_which(clk); 510 - unsigned long r; 511 - int div; 512 - 513 - if (siu < 0) 514 - return siu; 515 - BUG_ON(siu > 2); 516 - r = ctrl_inl(sh7722_siu_regs[siu]); 517 - div = sh7722_find_divisors(clk->parent->rate, rate); 518 - if (div < 0) 519 - return div; 520 - r = (r & ~0xF) | div; 521 - ctrl_outl(r, sh7722_siu_regs[siu]); 522 - return 0; 523 - } 524 - 525 - static void sh7722_siu_recalc(struct clk *clk) 526 - { 527 - int siu = sh7722_siu_which(clk); 528 - unsigned long r; 529 - 530 - if (siu < 0) 531 - return /* siu */ ; 532 - BUG_ON(siu > 2); 533 - r = ctrl_inl(sh7722_siu_regs[siu]); 534 - clk->rate = clk->parent->rate * 2 / divisors2[r & 0xF]; 535 - } 536 - 537 - static struct clk_ops sh7722_siu_clk_ops = { 538 - .recalc = sh7722_siu_recalc, 539 - .set_rate = sh7722_siu_set_rate, 540 - .enable = sh7722_siu_enable, 541 - .disable = sh7722_siu_disable, 542 - }; 543 - 544 497 static struct clk_ops sh7722_video_clk_ops = { 545 498 .recalc = sh7722_video_recalc, 546 499 .set_rate = sh7722_video_set_rate, ··· 533 560 .ops = &sh7722_frqcr_clk_ops, 534 561 }; 535 562 563 + 564 + #ifndef CONFIG_CPU_SUBTYPE_SH7343 565 + 536 566 /* 537 567 * these three clocks - SIU A, SIU B, IrDA - share the same clk_ops 538 568 * methods of clk_ops determine which register they should access by ··· 543 567 */ 544 568 static struct clk sh7722_siu_a_clock = { 545 569 .name = "siu_a_clk", 570 + .arch_flags = SCLKACR, 546 571 .ops = &sh7722_siu_clk_ops, 547 572 }; 548 573 549 574 static struct clk sh7722_siu_b_clock = { 550 575 .name = "siu_b_clk", 576 + .arch_flags = SCLKBCR, 551 577 .ops = &sh7722_siu_clk_ops, 552 578 }; 553 579 554 580 #if defined(CONFIG_CPU_SUBTYPE_SH7722) 555 581 static struct clk sh7722_irda_clock = { 556 582 .name = "irda_clk", 583 + .arch_flags = IrDACLKCR, 557 584 .ops = &sh7722_siu_clk_ops, 558 585 }; 559 586 #endif 587 + #endif /* CONFIG_CPU_SUBTYPE_SH7343 */ 560 588 561 589 static struct clk sh7722_video_clock = { 562 590 .name = "video_clk", 563 591 .ops = &sh7722_video_clk_ops, 592 + }; 593 + 594 + static int sh7722_mstpcr_start_stop(struct clk *clk, unsigned long reg, 595 + int enable) 596 + { 597 + unsigned long bit = clk->arch_flags; 598 + unsigned long r; 599 + 600 + r = ctrl_inl(reg); 601 + 602 + if (enable) 603 + r &= ~(1 << bit); 604 + else 605 + r |= (1 << bit); 606 + 607 + ctrl_outl(r, reg); 608 + return 0; 609 + } 610 + 611 + static void sh7722_mstpcr0_enable(struct clk *clk) 612 + { 613 + sh7722_mstpcr_start_stop(clk, MSTPCR0, 1); 614 + } 615 + 616 + static void sh7722_mstpcr0_disable(struct clk *clk) 617 + { 618 + sh7722_mstpcr_start_stop(clk, MSTPCR0, 0); 619 + } 620 + 621 + static void sh7722_mstpcr1_enable(struct clk *clk) 622 + { 623 + sh7722_mstpcr_start_stop(clk, MSTPCR1, 1); 624 + } 625 + 626 + static void sh7722_mstpcr1_disable(struct clk *clk) 627 + { 628 + sh7722_mstpcr_start_stop(clk, MSTPCR1, 0); 629 + } 630 + 631 + static void sh7722_mstpcr2_enable(struct clk *clk) 632 + { 633 + sh7722_mstpcr_start_stop(clk, MSTPCR2, 1); 634 + } 635 + 636 + static void sh7722_mstpcr2_disable(struct clk *clk) 637 + { 638 + sh7722_mstpcr_start_stop(clk, MSTPCR2, 0); 639 + } 640 + 641 + static struct clk_ops sh7722_mstpcr0_clk_ops = { 642 + .enable = sh7722_mstpcr0_enable, 643 + .disable = sh7722_mstpcr0_disable, 644 + }; 645 + 646 + static struct clk_ops sh7722_mstpcr1_clk_ops = { 647 + .enable = sh7722_mstpcr1_enable, 648 + .disable = sh7722_mstpcr1_disable, 649 + }; 650 + 651 + static struct clk_ops sh7722_mstpcr2_clk_ops = { 652 + .enable = sh7722_mstpcr2_enable, 653 + .disable = sh7722_mstpcr2_disable, 654 + }; 655 + 656 + #define DECLARE_MSTPCRN(regnr, bitnr, bitstr) \ 657 + { \ 658 + .name = "mstp" __stringify(regnr) bitstr, \ 659 + .arch_flags = bitnr, \ 660 + .ops = &sh7722_mstpcr ## regnr ## _clk_ops, \ 661 + } 662 + 663 + #define DECLARE_MSTPCR(regnr) \ 664 + DECLARE_MSTPCRN(regnr, 31, "31"), \ 665 + DECLARE_MSTPCRN(regnr, 30, "30"), \ 666 + DECLARE_MSTPCRN(regnr, 29, "29"), \ 667 + DECLARE_MSTPCRN(regnr, 28, "28"), \ 668 + DECLARE_MSTPCRN(regnr, 27, "27"), \ 669 + DECLARE_MSTPCRN(regnr, 26, "26"), \ 670 + DECLARE_MSTPCRN(regnr, 25, "25"), \ 671 + DECLARE_MSTPCRN(regnr, 24, "24"), \ 672 + DECLARE_MSTPCRN(regnr, 23, "23"), \ 673 + DECLARE_MSTPCRN(regnr, 22, "22"), \ 674 + DECLARE_MSTPCRN(regnr, 21, "21"), \ 675 + DECLARE_MSTPCRN(regnr, 20, "20"), \ 676 + DECLARE_MSTPCRN(regnr, 19, "19"), \ 677 + DECLARE_MSTPCRN(regnr, 18, "18"), \ 678 + DECLARE_MSTPCRN(regnr, 17, "17"), \ 679 + DECLARE_MSTPCRN(regnr, 16, "16"), \ 680 + DECLARE_MSTPCRN(regnr, 15, "15"), \ 681 + DECLARE_MSTPCRN(regnr, 14, "14"), \ 682 + DECLARE_MSTPCRN(regnr, 13, "13"), \ 683 + DECLARE_MSTPCRN(regnr, 12, "12"), \ 684 + DECLARE_MSTPCRN(regnr, 11, "11"), \ 685 + DECLARE_MSTPCRN(regnr, 10, "10"), \ 686 + DECLARE_MSTPCRN(regnr, 9, "09"), \ 687 + DECLARE_MSTPCRN(regnr, 8, "08"), \ 688 + DECLARE_MSTPCRN(regnr, 7, "07"), \ 689 + DECLARE_MSTPCRN(regnr, 6, "06"), \ 690 + DECLARE_MSTPCRN(regnr, 5, "05"), \ 691 + DECLARE_MSTPCRN(regnr, 4, "04"), \ 692 + DECLARE_MSTPCRN(regnr, 3, "03"), \ 693 + DECLARE_MSTPCRN(regnr, 2, "02"), \ 694 + DECLARE_MSTPCRN(regnr, 1, "01"), \ 695 + DECLARE_MSTPCRN(regnr, 0, "00") 696 + 697 + static struct clk sh7722_mstpcr[] = { 698 + DECLARE_MSTPCR(0), 699 + DECLARE_MSTPCR(1), 700 + DECLARE_MSTPCR(2), 564 701 }; 565 702 566 703 static struct clk *sh7722_clocks[] = { ··· 681 592 &sh7722_sh_clock, 682 593 &sh7722_peripheral_clock, 683 594 &sh7722_sdram_clock, 595 + #ifndef CONFIG_CPU_SUBTYPE_SH7343 684 596 &sh7722_siu_a_clock, 685 597 &sh7722_siu_b_clock, 686 598 #if defined(CONFIG_CPU_SUBTYPE_SH7722) 687 599 &sh7722_irda_clock, 600 + #endif 688 601 #endif 689 602 &sh7722_video_clock, 690 603 }; ··· 720 629 clk_register(sh7722_clocks[i]); 721 630 } 722 631 clk_put(master); 632 + 633 + for (i = 0; i < ARRAY_SIZE(sh7722_mstpcr); i++) { 634 + pr_debug( "Registering mstpcr '%s'\n", sh7722_mstpcr[i].name); 635 + clk_register(&sh7722_mstpcr[i]); 636 + } 637 + 723 638 return 0; 724 639 }
+253
arch/sh/kernel/cpu/sh4a/setup-sh7343.c
··· 11 11 #include <linux/init.h> 12 12 #include <linux/serial.h> 13 13 #include <linux/serial_sci.h> 14 + #include <linux/uio_driver.h> 15 + #include <asm/clock.h> 16 + 17 + static struct resource iic0_resources[] = { 18 + [0] = { 19 + .name = "IIC0", 20 + .start = 0x04470000, 21 + .end = 0x04470017, 22 + .flags = IORESOURCE_MEM, 23 + }, 24 + [1] = { 25 + .start = 96, 26 + .end = 99, 27 + .flags = IORESOURCE_IRQ, 28 + }, 29 + }; 30 + 31 + static struct platform_device iic0_device = { 32 + .name = "i2c-sh_mobile", 33 + .num_resources = ARRAY_SIZE(iic0_resources), 34 + .resource = iic0_resources, 35 + }; 36 + 37 + static struct resource iic1_resources[] = { 38 + [0] = { 39 + .name = "IIC1", 40 + .start = 0x04750000, 41 + .end = 0x04750017, 42 + .flags = IORESOURCE_MEM, 43 + }, 44 + [1] = { 45 + .start = 44, 46 + .end = 47, 47 + .flags = IORESOURCE_IRQ, 48 + }, 49 + }; 50 + 51 + static struct platform_device iic1_device = { 52 + .name = "i2c-sh_mobile", 53 + .num_resources = ARRAY_SIZE(iic1_resources), 54 + .resource = iic1_resources, 55 + }; 56 + 57 + static struct uio_info vpu_platform_data = { 58 + .name = "VPU4", 59 + .version = "0", 60 + .irq = 60, 61 + }; 62 + 63 + static struct resource vpu_resources[] = { 64 + [0] = { 65 + .name = "VPU", 66 + .start = 0xfe900000, 67 + .end = 0xfe9022eb, 68 + .flags = IORESOURCE_MEM, 69 + }, 70 + [1] = { 71 + /* place holder for contiguous memory */ 72 + }, 73 + }; 74 + 75 + static struct platform_device vpu_device = { 76 + .name = "uio_pdrv_genirq", 77 + .id = 0, 78 + .dev = { 79 + .platform_data = &vpu_platform_data, 80 + }, 81 + .resource = vpu_resources, 82 + .num_resources = ARRAY_SIZE(vpu_resources), 83 + }; 84 + 85 + static struct uio_info veu_platform_data = { 86 + .name = "VEU", 87 + .version = "0", 88 + .irq = 54, 89 + }; 90 + 91 + static struct resource veu_resources[] = { 92 + [0] = { 93 + .name = "VEU", 94 + .start = 0xfe920000, 95 + .end = 0xfe9200b7, 96 + .flags = IORESOURCE_MEM, 97 + }, 98 + [1] = { 99 + /* place holder for contiguous memory */ 100 + }, 101 + }; 102 + 103 + static struct platform_device veu_device = { 104 + .name = "uio_pdrv_genirq", 105 + .id = 1, 106 + .dev = { 107 + .platform_data = &veu_platform_data, 108 + }, 109 + .resource = veu_resources, 110 + .num_resources = ARRAY_SIZE(veu_resources), 111 + }; 14 112 15 113 static struct plat_sci_port sci_platform_data[] = { 16 114 { ··· 130 32 }; 131 33 132 34 static struct platform_device *sh7343_devices[] __initdata = { 35 + &iic0_device, 36 + &iic1_device, 133 37 &sci_device, 38 + &vpu_device, 39 + &veu_device, 134 40 }; 135 41 136 42 static int __init sh7343_devices_setup(void) 137 43 { 44 + clk_always_enable("mstp031"); /* TLB */ 45 + clk_always_enable("mstp030"); /* IC */ 46 + clk_always_enable("mstp029"); /* OC */ 47 + clk_always_enable("mstp028"); /* URAM */ 48 + clk_always_enable("mstp026"); /* XYMEM */ 49 + clk_always_enable("mstp023"); /* INTC3 */ 50 + clk_always_enable("mstp022"); /* INTC */ 51 + clk_always_enable("mstp020"); /* SuperHyway */ 52 + clk_always_enable("mstp109"); /* I2C0 */ 53 + clk_always_enable("mstp108"); /* I2C1 */ 54 + clk_always_enable("mstp202"); /* VEU */ 55 + clk_always_enable("mstp201"); /* VPU */ 56 + 57 + platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); 58 + platform_resource_setup_memory(&veu_device, "veu", 2 << 20); 59 + 138 60 return platform_add_devices(sh7343_devices, 139 61 ARRAY_SIZE(sh7343_devices)); 140 62 } 141 63 __initcall(sh7343_devices_setup); 142 64 65 + enum { 66 + UNUSED = 0, 67 + 68 + /* interrupt sources */ 69 + IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7, 70 + DMAC0, DMAC1, DMAC2, DMAC3, 71 + VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU, 72 + MFI, VPU, TPU, Z3D4, USBI0, USBI1, 73 + MMC_ERR, MMC_TRAN, MMC_FSTAT, MMC_FRDY, 74 + DMAC4, DMAC5, DMAC_DADERR, 75 + KEYSC, 76 + SCIF, SCIF1, SCIF2, SCIF3, SCIF4, 77 + SIOF0, SIOF1, SIO, 78 + FLCTL_FLSTEI, FLCTL_FLENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I, 79 + I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI, 80 + I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI, 81 + SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, 82 + IRDA, 83 + SDHI0, SDHI1, SDHI2, SDHI3, 84 + CMT, TSIF, SIU, 85 + TMU0, TMU1, TMU2, 86 + JPU, LCDC, 87 + 88 + /* interrupt groups */ 89 + 90 + DMAC0123, VIOVOU, MMC, DMAC45, FLCTL, I2C0, I2C1, SIM, SDHI, USB, 91 + }; 92 + 93 + static struct intc_vect vectors[] __initdata = { 94 + INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), 95 + INTC_VECT(IRQ2, 0x640), INTC_VECT(IRQ3, 0x660), 96 + INTC_VECT(IRQ4, 0x680), INTC_VECT(IRQ5, 0x6a0), 97 + INTC_VECT(IRQ6, 0x6c0), INTC_VECT(IRQ7, 0x6e0), 98 + INTC_VECT(I2C1_ALI, 0x780), INTC_VECT(I2C1_TACKI, 0x7a0), 99 + INTC_VECT(I2C1_WAITI, 0x7c0), INTC_VECT(I2C1_DTEI, 0x7e0), 100 + INTC_VECT(DMAC0, 0x800), INTC_VECT(DMAC1, 0x820), 101 + INTC_VECT(DMAC2, 0x840), INTC_VECT(DMAC3, 0x860), 102 + INTC_VECT(VIO_CEUI, 0x880), INTC_VECT(VIO_BEUI, 0x8a0), 103 + INTC_VECT(VIO_VEUI, 0x8c0), INTC_VECT(VOU, 0x8e0), 104 + INTC_VECT(MFI, 0x900), INTC_VECT(VPU, 0x980), 105 + INTC_VECT(TPU, 0x9a0), INTC_VECT(Z3D4, 0x9e0), 106 + INTC_VECT(USBI0, 0xa20), INTC_VECT(USBI1, 0xa40), 107 + INTC_VECT(MMC_ERR, 0xb00), INTC_VECT(MMC_TRAN, 0xb20), 108 + INTC_VECT(MMC_FSTAT, 0xb40), INTC_VECT(MMC_FRDY, 0xb60), 109 + INTC_VECT(DMAC4, 0xb80), INTC_VECT(DMAC5, 0xba0), 110 + INTC_VECT(DMAC_DADERR, 0xbc0), INTC_VECT(KEYSC, 0xbe0), 111 + INTC_VECT(SCIF, 0xc00), INTC_VECT(SCIF1, 0xc20), 112 + INTC_VECT(SCIF2, 0xc40), INTC_VECT(SCIF3, 0xc60), 113 + INTC_VECT(SIOF0, 0xc80), INTC_VECT(SIOF1, 0xca0), 114 + INTC_VECT(SIO, 0xd00), 115 + INTC_VECT(FLCTL_FLSTEI, 0xd80), INTC_VECT(FLCTL_FLENDI, 0xda0), 116 + INTC_VECT(FLCTL_FLTREQ0I, 0xdc0), INTC_VECT(FLCTL_FLTREQ1I, 0xde0), 117 + INTC_VECT(I2C0_ALI, 0xe00), INTC_VECT(I2C0_TACKI, 0xe20), 118 + INTC_VECT(I2C0_WAITI, 0xe40), INTC_VECT(I2C0_DTEI, 0xe60), 119 + INTC_VECT(SDHI0, 0xe80), INTC_VECT(SDHI1, 0xea0), 120 + INTC_VECT(SDHI2, 0xec0), INTC_VECT(SDHI3, 0xee0), 121 + INTC_VECT(CMT, 0xf00), INTC_VECT(TSIF, 0xf20), 122 + INTC_VECT(SIU, 0xf80), 123 + INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 124 + INTC_VECT(TMU2, 0x440), 125 + INTC_VECT(JPU, 0x560), INTC_VECT(LCDC, 0x580), 126 + }; 127 + 128 + static struct intc_group groups[] __initdata = { 129 + INTC_GROUP(DMAC0123, DMAC0, DMAC1, DMAC2, DMAC3), 130 + INTC_GROUP(VIOVOU, VIO_CEUI, VIO_BEUI, VIO_VEUI, VOU), 131 + INTC_GROUP(MMC, MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR), 132 + INTC_GROUP(DMAC45, DMAC4, DMAC5, DMAC_DADERR), 133 + INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLENDI, 134 + FLCTL_FLTREQ0I, FLCTL_FLTREQ1I), 135 + INTC_GROUP(I2C0, I2C0_ALI, I2C0_TACKI, I2C0_WAITI, I2C0_DTEI), 136 + INTC_GROUP(I2C1, I2C1_ALI, I2C1_TACKI, I2C1_WAITI, I2C1_DTEI), 137 + INTC_GROUP(SIM, SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI), 138 + INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), 139 + INTC_GROUP(USB, USBI0, USBI1), 140 + }; 141 + 142 + static struct intc_mask_reg mask_registers[] __initdata = { 143 + { 0xa4080084, 0xa40800c4, 8, /* IMR1 / IMCR1 */ 144 + { VOU, VIO_VEUI, VIO_BEUI, VIO_CEUI, DMAC3, DMAC2, DMAC1, DMAC0 } }, 145 + { 0xa4080088, 0xa40800c8, 8, /* IMR2 / IMCR2 */ 146 + { 0, 0, 0, VPU, 0, 0, 0, MFI } }, 147 + { 0xa408008c, 0xa40800cc, 8, /* IMR3 / IMCR3 */ 148 + { SIM_TEI, SIM_TXI, SIM_RXI, SIM_ERI, 0, 0, 0, IRDA } }, 149 + { 0xa4080090, 0xa40800d0, 8, /* IMR4 / IMCR4 */ 150 + { 0, TMU2, TMU1, TMU0, JPU, 0, 0, LCDC } }, 151 + { 0xa4080094, 0xa40800d4, 8, /* IMR5 / IMCR5 */ 152 + { KEYSC, DMAC_DADERR, DMAC5, DMAC4, SCIF3, SCIF2, SCIF1, SCIF } }, 153 + { 0xa4080098, 0xa40800d8, 8, /* IMR6 / IMCR6 */ 154 + { 0, 0, 0, SIO, Z3D4, 0, SIOF1, SIOF0 } }, 155 + { 0xa408009c, 0xa40800dc, 8, /* IMR7 / IMCR7 */ 156 + { I2C0_DTEI, I2C0_WAITI, I2C0_TACKI, I2C0_ALI, 157 + FLCTL_FLTREQ1I, FLCTL_FLTREQ0I, FLCTL_FLENDI, FLCTL_FLSTEI } }, 158 + { 0xa40800a0, 0xa40800e0, 8, /* IMR8 / IMCR8 */ 159 + { SDHI3, SDHI2, SDHI1, SDHI0, 0, 0, 0, SIU } }, 160 + { 0xa40800a4, 0xa40800e4, 8, /* IMR9 / IMCR9 */ 161 + { 0, 0, 0, CMT, 0, USBI1, USBI0 } }, 162 + { 0xa40800a8, 0xa40800e8, 8, /* IMR10 / IMCR10 */ 163 + { MMC_FRDY, MMC_FSTAT, MMC_TRAN, MMC_ERR } }, 164 + { 0xa40800ac, 0xa40800ec, 8, /* IMR11 / IMCR11 */ 165 + { I2C1_DTEI, I2C1_WAITI, I2C1_TACKI, I2C1_ALI, TPU, 0, 0, TSIF } }, 166 + { 0xa4140044, 0xa4140064, 8, /* INTMSK00 / INTMSKCLR00 */ 167 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 168 + }; 169 + 170 + static struct intc_prio_reg prio_registers[] __initdata = { 171 + { 0xa4080000, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2 } }, 172 + { 0xa4080004, 0, 16, 4, /* IPRB */ { JPU, LCDC, SIM } }, 173 + { 0xa4080010, 0, 16, 4, /* IPRE */ { DMAC0123, VIOVOU, MFI, VPU } }, 174 + { 0xa4080014, 0, 16, 4, /* IPRF */ { KEYSC, DMAC45, USB, CMT } }, 175 + { 0xa4080018, 0, 16, 4, /* IPRG */ { SCIF, SCIF1, SCIF2, SCIF3 } }, 176 + { 0xa408001c, 0, 16, 4, /* IPRH */ { SIOF0, SIOF1, FLCTL, I2C0 } }, 177 + { 0xa4080020, 0, 16, 4, /* IPRI */ { SIO, 0, TSIF, I2C1 } }, 178 + { 0xa4080024, 0, 16, 4, /* IPRJ */ { Z3D4, 0, SIU } }, 179 + { 0xa4080028, 0, 16, 4, /* IPRK */ { 0, MMC, 0, SDHI } }, 180 + { 0xa408002c, 0, 16, 4, /* IPRL */ { 0, 0, TPU } }, 181 + { 0xa4140010, 0, 32, 4, /* INTPRI00 */ 182 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 183 + }; 184 + 185 + static struct intc_sense_reg sense_registers[] __initdata = { 186 + { 0xa414001c, 16, 2, /* ICR1 */ 187 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 188 + }; 189 + 190 + static struct intc_mask_reg ack_registers[] __initdata = { 191 + { 0xa4140024, 0, 8, /* INTREQ00 */ 192 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 193 + }; 194 + 195 + static DECLARE_INTC_DESC_ACK(intc_desc, "sh7343", vectors, groups, 196 + mask_registers, prio_registers, sense_registers, 197 + ack_registers); 198 + 143 199 void __init plat_irq_setup(void) 144 200 { 201 + register_intc_controller(&intc_desc); 145 202 }
+136 -3
arch/sh/kernel/cpu/sh4a/setup-sh7366.c
··· 13 13 #include <linux/init.h> 14 14 #include <linux/serial.h> 15 15 #include <linux/serial_sci.h> 16 + #include <linux/uio_driver.h> 17 + #include <asm/clock.h> 18 + 19 + static struct resource iic_resources[] = { 20 + [0] = { 21 + .name = "IIC", 22 + .start = 0x04470000, 23 + .end = 0x04470017, 24 + .flags = IORESOURCE_MEM, 25 + }, 26 + [1] = { 27 + .start = 96, 28 + .end = 99, 29 + .flags = IORESOURCE_IRQ, 30 + }, 31 + }; 32 + 33 + static struct platform_device iic_device = { 34 + .name = "i2c-sh_mobile", 35 + .num_resources = ARRAY_SIZE(iic_resources), 36 + .resource = iic_resources, 37 + }; 38 + 39 + static struct uio_info vpu_platform_data = { 40 + .name = "VPU5", 41 + .version = "0", 42 + .irq = 60, 43 + }; 44 + 45 + static struct resource vpu_resources[] = { 46 + [0] = { 47 + .name = "VPU", 48 + .start = 0xfe900000, 49 + .end = 0xfe902807, 50 + .flags = IORESOURCE_MEM, 51 + }, 52 + [1] = { 53 + /* place holder for contiguous memory */ 54 + }, 55 + }; 56 + 57 + static struct platform_device vpu_device = { 58 + .name = "uio_pdrv_genirq", 59 + .id = 0, 60 + .dev = { 61 + .platform_data = &vpu_platform_data, 62 + }, 63 + .resource = vpu_resources, 64 + .num_resources = ARRAY_SIZE(vpu_resources), 65 + }; 66 + 67 + static struct uio_info veu0_platform_data = { 68 + .name = "VEU", 69 + .version = "0", 70 + .irq = 54, 71 + }; 72 + 73 + static struct resource veu0_resources[] = { 74 + [0] = { 75 + .name = "VEU(1)", 76 + .start = 0xfe920000, 77 + .end = 0xfe9200b7, 78 + .flags = IORESOURCE_MEM, 79 + }, 80 + [1] = { 81 + /* place holder for contiguous memory */ 82 + }, 83 + }; 84 + 85 + static struct platform_device veu0_device = { 86 + .name = "uio_pdrv_genirq", 87 + .id = 1, 88 + .dev = { 89 + .platform_data = &veu0_platform_data, 90 + }, 91 + .resource = veu0_resources, 92 + .num_resources = ARRAY_SIZE(veu0_resources), 93 + }; 94 + 95 + static struct uio_info veu1_platform_data = { 96 + .name = "VEU", 97 + .version = "0", 98 + .irq = 27, 99 + }; 100 + 101 + static struct resource veu1_resources[] = { 102 + [0] = { 103 + .name = "VEU(2)", 104 + .start = 0xfe924000, 105 + .end = 0xfe9240b7, 106 + .flags = IORESOURCE_MEM, 107 + }, 108 + [1] = { 109 + /* place holder for contiguous memory */ 110 + }, 111 + }; 112 + 113 + static struct platform_device veu1_device = { 114 + .name = "uio_pdrv_genirq", 115 + .id = 2, 116 + .dev = { 117 + .platform_data = &veu1_platform_data, 118 + }, 119 + .resource = veu1_resources, 120 + .num_resources = ARRAY_SIZE(veu1_resources), 121 + }; 16 122 17 123 static struct plat_sci_port sci_platform_data[] = { 18 124 { ··· 140 34 }; 141 35 142 36 static struct platform_device *sh7366_devices[] __initdata = { 37 + &iic_device, 143 38 &sci_device, 39 + &vpu_device, 40 + &veu0_device, 41 + &veu1_device, 144 42 }; 145 43 146 44 static int __init sh7366_devices_setup(void) 147 45 { 46 + clk_always_enable("mstp031"); /* TLB */ 47 + clk_always_enable("mstp030"); /* IC */ 48 + clk_always_enable("mstp029"); /* OC */ 49 + clk_always_enable("mstp028"); /* RSMEM */ 50 + clk_always_enable("mstp026"); /* XYMEM */ 51 + clk_always_enable("mstp023"); /* INTC3 */ 52 + clk_always_enable("mstp022"); /* INTC */ 53 + clk_always_enable("mstp020"); /* SuperHyway */ 54 + clk_always_enable("mstp109"); /* I2C */ 55 + clk_always_enable("mstp207"); /* VEU-2 */ 56 + clk_always_enable("mstp202"); /* VEU-1 */ 57 + clk_always_enable("mstp201"); /* VPU */ 58 + 59 + platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); 60 + platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); 61 + platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20); 62 + 148 63 return platform_add_devices(sh7366_devices, 149 64 ARRAY_SIZE(sh7366_devices)); 150 65 } ··· 224 97 INTC_VECT(SIU, 0xf80), 225 98 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420), 226 99 INTC_VECT(TMU2, 0x440), 227 - INTC_VECT(VEU2, 0x580), INTC_VECT(LCDC, 0x580), 100 + INTC_VECT(VEU2, 0x560), INTC_VECT(LCDC, 0x580), 228 101 }; 229 102 230 103 static struct intc_group groups[] __initdata = { ··· 290 163 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 291 164 }; 292 165 293 - static DECLARE_INTC_DESC(intc_desc, "sh7366", vectors, groups, 294 - mask_registers, prio_registers, sense_registers); 166 + static struct intc_mask_reg ack_registers[] __initdata = { 167 + { 0xa4140024, 0, 8, /* INTREQ00 */ 168 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 169 + }; 170 + 171 + static DECLARE_INTC_DESC_ACK(intc_desc, "sh7366", vectors, groups, 172 + mask_registers, prio_registers, sense_registers, 173 + ack_registers); 295 174 296 175 void __init plat_irq_setup(void) 297 176 {
+83 -2
arch/sh/kernel/cpu/sh4a/setup-sh7722.c
··· 12 12 #include <linux/serial.h> 13 13 #include <linux/serial_sci.h> 14 14 #include <linux/mm.h> 15 + #include <linux/uio_driver.h> 16 + #include <asm/clock.h> 15 17 #include <asm/mmzone.h> 16 18 17 19 static struct resource usbf_resources[] = { ··· 61 59 .resource = iic_resources, 62 60 }; 63 61 62 + static struct uio_info vpu_platform_data = { 63 + .name = "VPU4", 64 + .version = "0", 65 + .irq = 60, 66 + }; 67 + 68 + static struct resource vpu_resources[] = { 69 + [0] = { 70 + .name = "VPU", 71 + .start = 0xfe900000, 72 + .end = 0xfe9022eb, 73 + .flags = IORESOURCE_MEM, 74 + }, 75 + [1] = { 76 + /* place holder for contiguous memory */ 77 + }, 78 + }; 79 + 80 + static struct platform_device vpu_device = { 81 + .name = "uio_pdrv_genirq", 82 + .id = 0, 83 + .dev = { 84 + .platform_data = &vpu_platform_data, 85 + }, 86 + .resource = vpu_resources, 87 + .num_resources = ARRAY_SIZE(vpu_resources), 88 + }; 89 + 90 + static struct uio_info veu_platform_data = { 91 + .name = "VEU", 92 + .version = "0", 93 + .irq = 54, 94 + }; 95 + 96 + static struct resource veu_resources[] = { 97 + [0] = { 98 + .name = "VEU", 99 + .start = 0xfe920000, 100 + .end = 0xfe9200b7, 101 + .flags = IORESOURCE_MEM, 102 + }, 103 + [1] = { 104 + /* place holder for contiguous memory */ 105 + }, 106 + }; 107 + 108 + static struct platform_device veu_device = { 109 + .name = "uio_pdrv_genirq", 110 + .id = 1, 111 + .dev = { 112 + .platform_data = &veu_platform_data, 113 + }, 114 + .resource = veu_resources, 115 + .num_resources = ARRAY_SIZE(veu_resources), 116 + }; 117 + 64 118 static struct plat_sci_port sci_platform_data[] = { 65 119 { 66 120 .mapbase = 0xffe00000, ··· 153 95 &usbf_device, 154 96 &iic_device, 155 97 &sci_device, 98 + &vpu_device, 99 + &veu_device, 156 100 }; 157 101 158 102 static int __init sh7722_devices_setup(void) 159 103 { 104 + clk_always_enable("mstp031"); /* TLB */ 105 + clk_always_enable("mstp030"); /* IC */ 106 + clk_always_enable("mstp029"); /* OC */ 107 + clk_always_enable("mstp028"); /* URAM */ 108 + clk_always_enable("mstp026"); /* XYMEM */ 109 + clk_always_enable("mstp022"); /* INTC */ 110 + clk_always_enable("mstp020"); /* SuperHyway */ 111 + clk_always_enable("mstp109"); /* I2C */ 112 + clk_always_enable("mstp211"); /* USB */ 113 + clk_always_enable("mstp202"); /* VEU */ 114 + clk_always_enable("mstp201"); /* VPU */ 115 + 116 + platform_resource_setup_memory(&vpu_device, "vpu", 1 << 20); 117 + platform_resource_setup_memory(&veu_device, "veu", 2 << 20); 118 + 160 119 return platform_add_devices(sh7722_devices, 161 120 ARRAY_SIZE(sh7722_devices)); 162 121 } ··· 304 229 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 305 230 }; 306 231 307 - static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups, 308 - mask_registers, prio_registers, sense_registers); 232 + static struct intc_mask_reg ack_registers[] __initdata = { 233 + { 0xa4140024, 0, 8, /* INTREQ00 */ 234 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 235 + }; 236 + 237 + static DECLARE_INTC_DESC_ACK(intc_desc, "sh7722", vectors, groups, 238 + mask_registers, prio_registers, sense_registers, 239 + ack_registers); 309 240 310 241 void __init plat_irq_setup(void) 311 242 {
+136 -2
arch/sh/kernel/cpu/sh4a/setup-sh7723.c
··· 12 12 #include <linux/serial.h> 13 13 #include <linux/mm.h> 14 14 #include <linux/serial_sci.h> 15 + #include <linux/uio_driver.h> 16 + #include <asm/clock.h> 15 17 #include <asm/mmzone.h> 18 + 19 + static struct uio_info vpu_platform_data = { 20 + .name = "VPU5", 21 + .version = "0", 22 + .irq = 60, 23 + }; 24 + 25 + static struct resource vpu_resources[] = { 26 + [0] = { 27 + .name = "VPU", 28 + .start = 0xfe900000, 29 + .end = 0xfe902807, 30 + .flags = IORESOURCE_MEM, 31 + }, 32 + [1] = { 33 + /* place holder for contiguous memory */ 34 + }, 35 + }; 36 + 37 + static struct platform_device vpu_device = { 38 + .name = "uio_pdrv_genirq", 39 + .id = 0, 40 + .dev = { 41 + .platform_data = &vpu_platform_data, 42 + }, 43 + .resource = vpu_resources, 44 + .num_resources = ARRAY_SIZE(vpu_resources), 45 + }; 46 + 47 + static struct uio_info veu0_platform_data = { 48 + .name = "VEU", 49 + .version = "0", 50 + .irq = 54, 51 + }; 52 + 53 + static struct resource veu0_resources[] = { 54 + [0] = { 55 + .name = "VEU2H0", 56 + .start = 0xfe920000, 57 + .end = 0xfe92027b, 58 + .flags = IORESOURCE_MEM, 59 + }, 60 + [1] = { 61 + /* place holder for contiguous memory */ 62 + }, 63 + }; 64 + 65 + static struct platform_device veu0_device = { 66 + .name = "uio_pdrv_genirq", 67 + .id = 1, 68 + .dev = { 69 + .platform_data = &veu0_platform_data, 70 + }, 71 + .resource = veu0_resources, 72 + .num_resources = ARRAY_SIZE(veu0_resources), 73 + }; 74 + 75 + static struct uio_info veu1_platform_data = { 76 + .name = "VEU", 77 + .version = "0", 78 + .irq = 27, 79 + }; 80 + 81 + static struct resource veu1_resources[] = { 82 + [0] = { 83 + .name = "VEU2H1", 84 + .start = 0xfe924000, 85 + .end = 0xfe92427b, 86 + .flags = IORESOURCE_MEM, 87 + }, 88 + [1] = { 89 + /* place holder for contiguous memory */ 90 + }, 91 + }; 92 + 93 + static struct platform_device veu1_device = { 94 + .name = "uio_pdrv_genirq", 95 + .id = 2, 96 + .dev = { 97 + .platform_data = &veu1_platform_data, 98 + }, 99 + .resource = veu1_resources, 100 + .num_resources = ARRAY_SIZE(veu1_resources), 101 + }; 16 102 17 103 static struct plat_sci_port sci_platform_data[] = { 18 104 { ··· 199 113 .resource = sh7723_usb_host_resources, 200 114 }; 201 115 116 + static struct resource iic_resources[] = { 117 + [0] = { 118 + .name = "IIC", 119 + .start = 0x04470000, 120 + .end = 0x04470017, 121 + .flags = IORESOURCE_MEM, 122 + }, 123 + [1] = { 124 + .start = 96, 125 + .end = 99, 126 + .flags = IORESOURCE_IRQ, 127 + }, 128 + }; 129 + 130 + static struct platform_device iic_device = { 131 + .name = "i2c-sh_mobile", 132 + .num_resources = ARRAY_SIZE(iic_resources), 133 + .resource = iic_resources, 134 + }; 135 + 202 136 static struct platform_device *sh7723_devices[] __initdata = { 203 137 &sci_device, 204 138 &rtc_device, 139 + &iic_device, 205 140 &sh7723_usb_host_device, 141 + &vpu_device, 142 + &veu0_device, 143 + &veu1_device, 206 144 }; 207 145 208 146 static int __init sh7723_devices_setup(void) 209 147 { 148 + clk_always_enable("mstp031"); /* TLB */ 149 + clk_always_enable("mstp030"); /* IC */ 150 + clk_always_enable("mstp029"); /* OC */ 151 + clk_always_enable("mstp024"); /* FPU */ 152 + clk_always_enable("mstp022"); /* INTC */ 153 + clk_always_enable("mstp020"); /* SuperHyway */ 154 + clk_always_enable("mstp000"); /* MERAM */ 155 + clk_always_enable("mstp109"); /* I2C */ 156 + clk_always_enable("mstp108"); /* RTC */ 157 + clk_always_enable("mstp211"); /* USB */ 158 + clk_always_enable("mstp206"); /* VEU2H1 */ 159 + clk_always_enable("mstp202"); /* VEU2H0 */ 160 + clk_always_enable("mstp201"); /* VPU */ 161 + 162 + platform_resource_setup_memory(&vpu_device, "vpu", 2 << 20); 163 + platform_resource_setup_memory(&veu0_device, "veu0", 2 << 20); 164 + platform_resource_setup_memory(&veu1_device, "veu1", 2 << 20); 165 + 210 166 return platform_add_devices(sh7723_devices, 211 167 ARRAY_SIZE(sh7723_devices)); 212 168 } ··· 454 326 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 455 327 }; 456 328 457 - static DECLARE_INTC_DESC(intc_desc, "sh7723", vectors, groups, 458 - mask_registers, prio_registers, sense_registers); 329 + static struct intc_mask_reg ack_registers[] __initdata = { 330 + { 0xa4140024, 0, 8, /* INTREQ00 */ 331 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 332 + }; 333 + 334 + static DECLARE_INTC_DESC_ACK(intc_desc, "sh7723", vectors, groups, 335 + mask_registers, prio_registers, sense_registers, 336 + ack_registers); 459 337 460 338 void __init plat_irq_setup(void) 461 339 {
+16 -5
arch/sh/kernel/cpu/sh4a/setup-sh7763.c
··· 3 3 * 4 4 * Copyright (C) 2006 Paul Mundt 5 5 * Copyright (C) 2007 Yoshihiro Shimoda 6 + * Copyright (C) 2008 Nobuhiro Iwamatsu 6 7 * 7 8 * This file is subject to the terms and conditions of the GNU General Public 8 9 * License. See the file "COPYING" in the main directory of this archive ··· 56 55 .flags = UPF_BOOT_AUTOCONF, 57 56 .type = PORT_SCIF, 58 57 .irqs = { 76, 77, 79, 78 }, 58 + }, { 59 + .mapbase = 0xffe10000, 60 + .flags = UPF_BOOT_AUTOCONF, 61 + .type = PORT_SCIF, 62 + .irqs = { 104, 105, 107, 106 }, 59 63 }, { 60 64 .flags = 0, 61 65 } ··· 214 208 INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60), 215 209 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0), 216 210 INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0), 217 - INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20), 218 - INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60), 211 + INTC_VECT(SCIF2_ERI, 0xf00), INTC_VECT(SCIF2_RXI, 0xf20), 212 + INTC_VECT(SCIF2_BRI, 0xf40), INTC_VECT(SCIF2_TXI, 0xf60), 219 213 INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0), 220 214 INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0), 221 215 }; ··· 296 290 IRQ4, IRQ5, IRQ6, IRQ7 } }, 297 291 }; 298 292 299 - static DECLARE_INTC_DESC(intc_irq_desc, "sh7763-irq", irq_vectors, 300 - NULL, irq_mask_registers, irq_prio_registers, 301 - irq_sense_registers); 293 + static struct intc_mask_reg irq_ack_registers[] __initdata = { 294 + { 0xffd00024, 0, 32, /* INTREQ */ 295 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 296 + }; 297 + 298 + static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7763-irq", irq_vectors, 299 + NULL, irq_mask_registers, irq_prio_registers, 300 + irq_sense_registers, irq_ack_registers); 302 301 303 302 304 303 /* External interrupt pins in IRL mode */
+8 -3
arch/sh/kernel/cpu/sh4a/setup-sh7780.c
··· 217 217 IRQ4, IRQ5, IRQ6, IRQ7 } }, 218 218 }; 219 219 220 - static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors, 221 - NULL, irq_mask_registers, irq_prio_registers, 222 - irq_sense_registers); 220 + static struct intc_mask_reg irq_ack_registers[] __initdata = { 221 + { 0xffd00024, 0, 32, /* INTREQ */ 222 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 223 + }; 224 + 225 + static DECLARE_INTC_DESC_ACK(intc_irq_desc, "sh7780-irq", irq_vectors, 226 + NULL, irq_mask_registers, irq_prio_registers, 227 + irq_sense_registers, irq_ack_registers); 223 228 224 229 /* External interrupt pins in IRL mode */ 225 230
+11 -6
arch/sh/kernel/cpu/sh4a/setup-sh7785.c
··· 238 238 IRQ4, IRQ5, IRQ6, IRQ7 } }, 239 239 }; 240 240 241 - static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123, 242 - NULL, mask_registers, prio_registers, 243 - sense_registers); 241 + static struct intc_mask_reg ack_registers[] __initdata = { 242 + { 0xffd00024, 0, 32, /* INTREQ */ 243 + { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 244 + }; 244 245 245 - static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567, 246 - NULL, mask_registers, prio_registers, 247 - sense_registers); 246 + static DECLARE_INTC_DESC_ACK(intc_desc_irq0123, "sh7785-irq0123", 247 + vectors_irq0123, NULL, mask_registers, 248 + prio_registers, sense_registers, ack_registers); 249 + 250 + static DECLARE_INTC_DESC_ACK(intc_desc_irq4567, "sh7785-irq4567", 251 + vectors_irq4567, NULL, mask_registers, 252 + prio_registers, sense_registers, ack_registers); 248 253 249 254 /* External interrupt pins in IRL mode */ 250 255
+1 -1
arch/sh/kernel/entry-common.S
··· 192 192 .align 2 193 193 1: .long schedule 194 194 2: .long do_notify_resume 195 - 3: .long restore_all 195 + 3: .long resume_userspace 196 196 #ifdef CONFIG_TRACE_IRQFLAGS 197 197 4: .long trace_hardirqs_on 198 198 5: .long trace_hardirqs_off
+1 -13
arch/sh/kernel/process_32.c
··· 34 34 void (*pm_power_off)(void); 35 35 EXPORT_SYMBOL(pm_power_off); 36 36 37 - void disable_hlt(void) 38 - { 39 - hlt_counter++; 40 - } 41 - EXPORT_SYMBOL(disable_hlt); 42 - 43 - void enable_hlt(void) 44 - { 45 - hlt_counter--; 46 - } 47 - EXPORT_SYMBOL(enable_hlt); 48 - 49 37 static int __init nohlt_setup(char *__unused) 50 38 { 51 39 hlt_counter = 1; ··· 48 60 } 49 61 __setup("hlt", hlt_setup); 50 62 51 - void default_idle(void) 63 + static void default_idle(void) 52 64 { 53 65 if (!hlt_counter) { 54 66 clear_thread_flag(TIF_POLLING_NRFLAG);
-10
arch/sh/kernel/process_64.c
··· 36 36 37 37 #define HARD_IDLE_TIMEOUT (HZ / 3) 38 38 39 - void disable_hlt(void) 40 - { 41 - hlt_counter++; 42 - } 43 - 44 - void enable_hlt(void) 45 - { 46 - hlt_counter--; 47 - } 48 - 49 39 static int __init nohlt_setup(char *__unused) 50 40 { 51 41 hlt_counter = 1;
+23
arch/sh/kernel/ptrace_32.c
··· 241 241 break; 242 242 } 243 243 #endif 244 + #ifdef CONFIG_BINFMT_ELF_FDPIC 245 + case PTRACE_GETFDPIC: { 246 + unsigned long tmp = 0; 247 + 248 + switch (addr) { 249 + case PTRACE_GETFDPIC_EXEC: 250 + tmp = child->mm->context.exec_fdpic_loadmap; 251 + break; 252 + case PTRACE_GETFDPIC_INTERP: 253 + tmp = child->mm->context.interp_fdpic_loadmap; 254 + break; 255 + default: 256 + break; 257 + } 258 + 259 + ret = 0; 260 + if (put_user(tmp, (unsigned long *) data)) { 261 + ret = -EFAULT; 262 + break; 263 + } 264 + break; 265 + } 266 + #endif 244 267 default: 245 268 ret = ptrace_request(child, request, addr, data); 246 269 break;
+7
arch/sh/kernel/setup.c
··· 398 398 { 399 399 return cpu_name[c->type]; 400 400 } 401 + EXPORT_SYMBOL(get_cpu_subtype); 401 402 402 403 #ifdef CONFIG_PROC_FS 403 404 /* Symbolic CPU flags, keep in sync with asm/cpu-features.h */ ··· 453 452 seq_printf(m, "processor\t: %d\n", cpu); 454 453 seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine); 455 454 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c)); 455 + if (c->cut_major == -1) 456 + seq_printf(m, "cut\t\t: unknown\n"); 457 + else if (c->cut_minor == -1) 458 + seq_printf(m, "cut\t\t: %d.x\n", c->cut_major); 459 + else 460 + seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor); 456 461 457 462 show_cpuflags(m, c); 458 463
+25 -11
arch/sh/kernel/signal_32.c
··· 33 33 34 34 #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) 35 35 36 + struct fdpic_func_descriptor { 37 + unsigned long text; 38 + unsigned long GOT; 39 + }; 40 + 36 41 /* 37 42 * Atomically swap in the new signal mask, and wait for a signal. 38 43 */ ··· 373 368 err |= __put_user(OR_R0_R0, &frame->retcode[6]); 374 369 err |= __put_user((__NR_sigreturn), &frame->retcode[7]); 375 370 regs->pr = (unsigned long) frame->retcode; 371 + flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode)); 376 372 } 377 373 378 374 if (err) ··· 384 378 regs->regs[4] = signal; /* Arg for signal handler */ 385 379 regs->regs[5] = 0; 386 380 regs->regs[6] = (unsigned long) &frame->sc; 387 - regs->pc = (unsigned long) ka->sa.sa_handler; 381 + 382 + if (current->personality & FDPIC_FUNCPTRS) { 383 + struct fdpic_func_descriptor __user *funcptr = 384 + (struct fdpic_func_descriptor __user *)ka->sa.sa_handler; 385 + 386 + __get_user(regs->pc, &funcptr->text); 387 + __get_user(regs->regs[12], &funcptr->GOT); 388 + } else 389 + regs->pc = (unsigned long)ka->sa.sa_handler; 388 390 389 391 set_fs(USER_DS); 390 392 391 393 pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", 392 394 current->comm, task_pid_nr(current), frame, regs->pc, regs->pr); 393 - 394 - flush_cache_sigtramp(regs->pr); 395 - 396 - if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) 397 - flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); 398 395 399 396 return 0; 400 397 ··· 467 458 regs->regs[4] = signal; /* Arg for signal handler */ 468 459 regs->regs[5] = (unsigned long) &frame->info; 469 460 regs->regs[6] = (unsigned long) &frame->uc; 470 - regs->pc = (unsigned long) ka->sa.sa_handler; 461 + 462 + if (current->personality & FDPIC_FUNCPTRS) { 463 + struct fdpic_func_descriptor __user *funcptr = 464 + (struct fdpic_func_descriptor __user *)ka->sa.sa_handler; 465 + 466 + __get_user(regs->pc, &funcptr->text); 467 + __get_user(regs->regs[12], &funcptr->GOT); 468 + } else 469 + regs->pc = (unsigned long)ka->sa.sa_handler; 471 470 472 471 set_fs(USER_DS); 473 472 474 473 pr_debug("SIG deliver (%s:%d): sp=%p pc=%08lx pr=%08lx\n", 475 474 current->comm, task_pid_nr(current), frame, regs->pc, regs->pr); 476 475 477 - flush_cache_sigtramp(regs->pr); 478 - 479 - if ((-regs->pr & (L1_CACHE_BYTES-1)) < sizeof(frame->retcode)) 480 - flush_cache_sigtramp(regs->pr + L1_CACHE_BYTES); 476 + flush_icache_range(regs->pr, regs->pr + sizeof(frame->retcode)); 481 477 482 478 return 0; 483 479
+6
arch/sh/kernel/syscalls_32.S
··· 343 343 .long sys_fallocate 344 344 .long sys_timerfd_settime /* 325 */ 345 345 .long sys_timerfd_gettime 346 + .long sys_signalfd4 347 + .long sys_eventfd2 348 + .long sys_epoll_create1 349 + .long sys_dup3 /* 330 */ 350 + .long sys_pipe2 351 + .long sys_inotify_init1
+6
arch/sh/kernel/syscalls_64.S
··· 381 381 .long sys_fallocate 382 382 .long sys_timerfd_settime 383 383 .long sys_timerfd_gettime 384 + .long sys_signalfd4 /* 355 */ 385 + .long sys_eventfd2 386 + .long sys_epoll_create1 387 + .long sys_dup3 388 + .long sys_pipe2 389 + .long sys_inotify_init1 /* 360 */
+1 -1
arch/sh/kernel/time_32.c
··· 211 211 212 212 #define NSEC_PER_CYC_SHIFT 10 213 213 214 - struct clocksource clocksource_sh = { 214 + static struct clocksource clocksource_sh = { 215 215 .name = "SuperH", 216 216 .rating = 200, 217 217 .mask = CLOCKSOURCE_MASK(32),
+1 -1
arch/sh/kernel/timers/timer-tmu.c
··· 209 209 return 0; 210 210 } 211 211 212 - struct sys_timer_ops tmu_timer_ops = { 212 + static struct sys_timer_ops tmu_timer_ops = { 213 213 .init = tmu_timer_init, 214 214 .start = tmu_timer_start, 215 215 .stop = tmu_timer_stop,
+4
arch/sh/kernel/traps_32.c
··· 43 43 # define TRAP_ILLEGAL_SLOT_INST 6 44 44 # define TRAP_ADDRESS_ERROR 9 45 45 # ifdef CONFIG_CPU_SH2A 46 + # define TRAP_FPU_ERROR 13 46 47 # define TRAP_DIVZERO_ERROR 17 47 48 # define TRAP_DIVOVF_ERROR 18 48 49 # endif ··· 852 851 #ifdef CONFIG_CPU_SH2A 853 852 set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error); 854 853 set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error); 854 + #ifdef CONFIG_SH_FPU 855 + set_exception_table_vec(TRAP_FPU_ERROR, fpu_error_trap_handler); 856 + #endif 855 857 #endif 856 858 857 859 /* Setup VBR for boot cpu */
+3 -1
arch/sh/lib/Makefile
··· 2 2 # Makefile for SuperH-specific library files.. 3 3 # 4 4 5 - lib-y = delay.o io.o memset.o memmove.o memchr.o \ 5 + lib-y = delay.o memset.o memmove.o memchr.o \ 6 6 checksum.o strlen.o div64.o div64-generic.o 7 + 8 + obj-y += io.o 7 9 8 10 memcpy-y := memcpy.o 9 11 memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o
+17 -3
arch/sh/mm/Kconfig
··· 145 145 146 146 config PAGE_SIZE_4KB 147 147 bool "4kB" 148 - depends on !X2TLB 148 + depends on !MMU || !X2TLB 149 149 help 150 150 This is the default page size used by all SuperH CPUs. 151 151 152 152 config PAGE_SIZE_8KB 153 153 bool "8kB" 154 - depends on X2TLB 154 + depends on !MMU || X2TLB 155 155 help 156 156 This enables 8kB pages as supported by SH-X2 and later MMUs. 157 157 158 + config PAGE_SIZE_16KB 159 + bool "16kB" 160 + depends on !MMU 161 + help 162 + This enables 16kB pages on MMU-less SH systems. 163 + 158 164 config PAGE_SIZE_64KB 159 165 bool "64kB" 160 - depends on CPU_SH4 || CPU_SH5 166 + depends on !MMU || CPU_SH4 || CPU_SH5 161 167 help 162 168 This enables support for 64kB pages, possible on all SH-4 163 169 CPUs and later. 164 170 165 171 endchoice 172 + 173 + config ENTRY_OFFSET 174 + hex 175 + default "0x00001000" if PAGE_SIZE_4KB 176 + default "0x00002000" if PAGE_SIZE_8KB 177 + default "0x00004000" if PAGE_SIZE_16KB 178 + default "0x00010000" if PAGE_SIZE_64KB 179 + default "0x00000000" 166 180 167 181 choice 168 182 prompt "HugeTLB page size"
+1 -1
arch/sh/mm/cache-debugfs.c
··· 120 120 .open = cache_debugfs_open, 121 121 .read = seq_read, 122 122 .llseek = seq_lseek, 123 - .release = seq_release, 123 + .release = single_release, 124 124 }; 125 125 126 126 static int __init cache_debugfs_init(void)
+32 -27
arch/sh/mm/cache-sh4.c
··· 4 4 * Copyright (C) 1999, 2000, 2002 Niibe Yutaka 5 5 * Copyright (C) 2001 - 2007 Paul Mundt 6 6 * Copyright (C) 2003 Richard Curnow 7 + * Copyright (c) 2007 STMicroelectronics (R&D) Ltd. 7 8 * 8 9 * This file is subject to the terms and conditions of the GNU General Public 9 10 * License. See the file "COPYING" in the main directory of this archive ··· 23 22 * entirety. 24 23 */ 25 24 #define MAX_DCACHE_PAGES 64 /* XXX: Tune for ways */ 25 + #define MAX_ICACHE_PAGES 32 26 26 27 27 static void __flush_dcache_segment_1way(unsigned long start, 28 28 unsigned long extent); ··· 180 178 /* 181 179 * Write back the range of D-cache, and purge the I-cache. 182 180 * 183 - * Called from kernel/module.c:sys_init_module and routine for a.out format. 181 + * Called from kernel/module.c:sys_init_module and routine for a.out format, 182 + * signal handler code and kprobes code 184 183 */ 185 184 void flush_icache_range(unsigned long start, unsigned long end) 186 185 { 187 - flush_cache_all(); 188 - } 189 - 190 - /* 191 - * Write back the D-cache and purge the I-cache for signal trampoline. 192 - * .. which happens to be the same behavior as flush_icache_range(). 193 - * So, we simply flush out a line. 194 - */ 195 - void __uses_jump_to_uncached flush_cache_sigtramp(unsigned long addr) 196 - { 197 - unsigned long v, index; 198 - unsigned long flags; 186 + int icacheaddr; 187 + unsigned long flags, v; 199 188 int i; 200 189 201 - v = addr & ~(L1_CACHE_BYTES-1); 202 - asm volatile("ocbwb %0" 203 - : /* no output */ 204 - : "m" (__m(v))); 190 + /* If there are too many pages then just blow the caches */ 191 + if (((end - start) >> PAGE_SHIFT) >= MAX_ICACHE_PAGES) { 192 + flush_cache_all(); 193 + } else { 194 + /* selectively flush d-cache then invalidate the i-cache */ 195 + /* this is inefficient, so only use for small ranges */ 196 + start &= ~(L1_CACHE_BYTES-1); 197 + end += L1_CACHE_BYTES-1; 198 + end &= ~(L1_CACHE_BYTES-1); 205 199 206 - index = CACHE_IC_ADDRESS_ARRAY | 207 - (v & boot_cpu_data.icache.entry_mask); 200 + local_irq_save(flags); 201 + jump_to_uncached(); 208 202 209 - local_irq_save(flags); 210 - jump_to_uncached(); 203 + for (v = start; v < end; v+=L1_CACHE_BYTES) { 204 + asm volatile("ocbwb %0" 205 + : /* no output */ 206 + : "m" (__m(v))); 211 207 212 - for (i = 0; i < boot_cpu_data.icache.ways; 213 - i++, index += boot_cpu_data.icache.way_incr) 214 - ctrl_outl(0, index); /* Clear out Valid-bit */ 208 + icacheaddr = CACHE_IC_ADDRESS_ARRAY | ( 209 + v & cpu_data->icache.entry_mask); 215 210 216 - back_to_cached(); 217 - wmb(); 218 - local_irq_restore(flags); 211 + for (i = 0; i < cpu_data->icache.ways; 212 + i++, icacheaddr += cpu_data->icache.way_incr) 213 + /* Clear i-cache line valid-bit */ 214 + ctrl_outl(0, icacheaddr); 215 + } 216 + 217 + back_to_cached(); 218 + local_irq_restore(flags); 219 + } 219 220 } 220 221 221 222 static inline void flush_cache_4096(unsigned long start,
+30
arch/sh/mm/consistent.c
··· 10 10 * for more details. 11 11 */ 12 12 #include <linux/mm.h> 13 + #include <linux/platform_device.h> 13 14 #include <linux/dma-mapping.h> 14 15 #include <asm/cacheflush.h> 15 16 #include <asm/addrspace.h> ··· 186 185 } 187 186 } 188 187 EXPORT_SYMBOL(dma_cache_sync); 188 + 189 + int platform_resource_setup_memory(struct platform_device *pdev, 190 + char *name, unsigned long memsize) 191 + { 192 + struct resource *r; 193 + dma_addr_t dma_handle; 194 + void *buf; 195 + 196 + r = pdev->resource + pdev->num_resources - 1; 197 + if (r->flags) { 198 + pr_warning("%s: unable to find empty space for resource\n", 199 + name); 200 + return -EINVAL; 201 + } 202 + 203 + buf = dma_alloc_coherent(NULL, memsize, &dma_handle, GFP_KERNEL); 204 + if (!buf) { 205 + pr_warning("%s: unable to allocate memory\n", name); 206 + return -ENOMEM; 207 + } 208 + 209 + memset(buf, 0, memsize); 210 + 211 + r->flags = IORESOURCE_MEM; 212 + r->start = dma_handle; 213 + r->end = r->start + memsize - 1; 214 + r->name = name; 215 + return 0; 216 + }
+8 -4
arch/sh/mm/fault_32.c
··· 37 37 int fault; 38 38 siginfo_t info; 39 39 40 - trace_hardirqs_on(); 41 - local_irq_enable(); 42 - 43 40 #ifdef CONFIG_SH_KGDB 44 41 if (kgdb_nofault && kgdb_bus_err_hook) 45 42 kgdb_bus_err_hook(); 46 43 #endif 47 44 48 45 tsk = current; 49 - mm = tsk->mm; 50 46 si_code = SEGV_MAPERR; 51 47 52 48 if (unlikely(address >= TASK_SIZE)) { ··· 83 87 84 88 return; 85 89 } 90 + 91 + /* Only enable interrupts if they were on before the fault */ 92 + if ((regs->sr & SR_IMASK) != SR_IMASK) { 93 + trace_hardirqs_on(); 94 + local_irq_enable(); 95 + } 96 + 97 + mm = tsk->mm; 86 98 87 99 /* 88 100 * If we're in an interrupt or have no user
+1 -1
arch/sh/mm/pg-sh4.c
··· 111 111 /* 112 112 * For SH-4, we have our own implementation for ptep_get_and_clear 113 113 */ 114 - inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 114 + pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 115 115 { 116 116 pte_t pte = *ptep; 117 117
+1 -1
arch/sh/mm/pg-sh7705.c
··· 118 118 * For SH7705, we have our own implementation for ptep_get_and_clear 119 119 * Copied from pg-sh4.c 120 120 */ 121 - inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 121 + pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 122 122 { 123 123 pte_t pte = *ptep; 124 124
+1 -1
arch/sh/mm/pmb.c
··· 385 385 .open = pmb_debugfs_open, 386 386 .read = seq_read, 387 387 .llseek = seq_lseek, 388 - .release = seq_release, 388 + .release = single_release, 389 389 }; 390 390 391 391 static int __init pmb_debugfs_init(void)
+4
arch/sh/tools/mach-types
··· 46 46 CAYMAN SH_CAYMAN 47 47 SDK7780 SH_SDK7780 48 48 MIGOR SH_MIGOR 49 + RSK7203 SH_RSK7203 50 + AP325RXA SH_AP325RXA 51 + SH7763RDP SH_SH7763RDP 52 + SH7785LCR SH_SH7785LCR
+7 -20
drivers/input/keyboard/sh_keysc.c
··· 158 158 memcpy(&priv->pdata, pdev->dev.platform_data, sizeof(priv->pdata)); 159 159 pdata = &priv->pdata; 160 160 161 - res = request_mem_region(res->start, res_size(res), pdev->name); 162 - if (res == NULL) { 163 - dev_err(&pdev->dev, "failed to request I/O memory\n"); 164 - error = -EBUSY; 165 - goto err1; 166 - } 167 - 168 161 priv->iomem_base = ioremap_nocache(res->start, res_size(res)); 169 162 if (priv->iomem_base == NULL) { 170 163 dev_err(&pdev->dev, "failed to remap I/O memory\n"); 171 164 error = -ENXIO; 172 - goto err2; 165 + goto err1; 173 166 } 174 167 175 168 priv->input = input_allocate_device(); 176 169 if (!priv->input) { 177 170 dev_err(&pdev->dev, "failed to allocate input device\n"); 178 171 error = -ENOMEM; 179 - goto err3; 172 + goto err2; 180 173 } 181 174 182 175 input = priv->input; ··· 187 194 error = request_irq(irq, sh_keysc_isr, 0, pdev->name, pdev); 188 195 if (error) { 189 196 dev_err(&pdev->dev, "failed to request IRQ\n"); 190 - goto err4; 197 + goto err3; 191 198 } 192 199 193 200 for (i = 0; i < SH_KEYSC_MAXKEYS; i++) { ··· 199 206 error = input_register_device(input); 200 207 if (error) { 201 208 dev_err(&pdev->dev, "failed to register input device\n"); 202 - goto err5; 209 + goto err4; 203 210 } 204 211 205 212 iowrite16((sh_keysc_mode[pdata->mode].kymd << 8) | ··· 207 214 iowrite16(0, priv->iomem_base + KYOUTDR_OFFS); 208 215 iowrite16(KYCR2_IRQ_LEVEL, priv->iomem_base + KYCR2_OFFS); 209 216 return 0; 210 - err5: 211 - free_irq(irq, pdev); 212 217 err4: 213 - input_free_device(input); 218 + free_irq(irq, pdev); 214 219 err3: 215 - iounmap(priv->iomem_base); 220 + input_free_device(input); 216 221 err2: 217 - release_mem_region(res->start, res_size(res)); 222 + iounmap(priv->iomem_base); 218 223 err1: 219 224 platform_set_drvdata(pdev, NULL); 220 225 kfree(priv); ··· 223 232 static int __devexit sh_keysc_remove(struct platform_device *pdev) 224 233 { 225 234 struct sh_keysc_priv *priv = platform_get_drvdata(pdev); 226 - struct resource *res; 227 235 228 236 iowrite16(KYCR2_IRQ_DISABLED, priv->iomem_base + KYCR2_OFFS); 229 237 230 238 input_unregister_device(priv->input); 231 239 free_irq(platform_get_irq(pdev, 0), pdev); 232 240 iounmap(priv->iomem_base); 233 - 234 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 235 - release_mem_region(res->start, res_size(res)); 236 241 237 242 platform_set_drvdata(pdev, NULL); 238 243 kfree(priv);
+16 -1
drivers/serial/sh-sci.c
··· 410 410 #endif 411 411 412 412 #if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ 413 - defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 414 413 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 415 414 defined(CONFIG_CPU_SUBTYPE_SH7785) 416 415 static inline int scif_txroom(struct uart_port *port) ··· 420 421 static inline int scif_rxroom(struct uart_port *port) 421 422 { 422 423 return sci_in(port, SCRFDR) & 0xff; 424 + } 425 + #elif defined(CONFIG_CPU_SUBTYPE_SH7763) 426 + static inline int scif_txroom(struct uart_port *port) 427 + { 428 + if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/ 429 + return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0xff); 430 + else /* SCIF2 */ 431 + return SCIF2_TXROOM_MAX - (sci_in(port, SCFDR) >> 8); 432 + } 433 + 434 + static inline int scif_rxroom(struct uart_port *port) 435 + { 436 + if((port->mapbase == 0xffe00000) || (port->mapbase == 0xffe08000)) /* SCIF0/1*/ 437 + return sci_in(port, SCRFDR) & 0xff; 438 + else /* SCIF2 */ 439 + return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; 423 440 } 424 441 #else 425 442 static inline int scif_txroom(struct uart_port *port)
+27 -11
drivers/serial/sh-sci.h
··· 123 123 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) 124 124 # define SCSPTR0 0xffe00024 /* 16 bit SCIF */ 125 125 # define SCSPTR1 0xffe08024 /* 16 bit SCIF */ 126 + # define SCSPTR2 0xffe10020 /* 16 bit SCIF/IRDA */ 126 127 # define SCIF_ORER 0x0001 /* overrun error bit */ 127 - # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 128 + # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 128 129 # define SCIF_ONLY 129 130 #elif defined(CONFIG_CPU_SUBTYPE_SH7770) 130 131 # define SCSPTR0 0xff923020 /* 16 bit SCIF */ ··· 189 188 defined(CONFIG_CPU_SUBTYPE_SH7750S) || \ 190 189 defined(CONFIG_CPU_SUBTYPE_SH7751) || \ 191 190 defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ 191 + defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 192 192 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 193 193 defined(CONFIG_CPU_SUBTYPE_SH7785) || \ 194 194 defined(CONFIG_CPU_SUBTYPE_SHX3) ··· 227 225 #if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 228 226 defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 229 227 defined(CONFIG_CPU_SUBTYPE_SH7721) 230 - #define SCIF_ORER 0x0200 231 - #define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) 232 - #define SCIF_RFDC_MASK 0x007f 233 - #define SCIF_TXROOM_MAX 64 228 + # define SCIF_ORER 0x0200 229 + # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) 230 + # define SCIF_RFDC_MASK 0x007f 231 + # define SCIF_TXROOM_MAX 64 232 + #elif defined(CONFIG_CPU_SUBTYPE_SH7763) 233 + # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK ) 234 + # define SCIF_RFDC_MASK 0x007f 235 + # define SCIF_TXROOM_MAX 64 236 + /* SH7763 SCIF2 support */ 237 + # define SCIF2_RFDC_MASK 0x001f 238 + # define SCIF2_TXROOM_MAX 16 234 239 #else 235 - #define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) 236 - #define SCIF_RFDC_MASK 0x001f 237 - #define SCIF_TXROOM_MAX 16 240 + # define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK) 241 + # define SCIF_RFDC_MASK 0x001f 242 + # define SCIF_TXROOM_MAX 16 238 243 #endif 239 244 240 245 #if defined(SCI_ONLY) ··· 454 445 defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 455 446 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 456 447 defined(CONFIG_CPU_SUBTYPE_SH7785) 457 - SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) 458 448 SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) 459 449 SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) 460 450 SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) 461 451 SCIF_FNS(SCLSR, 0, 0, 0x28, 16) 452 + #if defined(CONFIG_CPU_SUBTYPE_SH7763) 453 + /* SH7763 SCIF2 */ 454 + SCIF_FNS(SCFDR, 0, 0, 0x1C, 16) 455 + SCIF_FNS(SCSPTR2, 0, 0, 0x20, 16) 456 + SCIF_FNS(SCLSR2, 0, 0, 0x24, 16) 457 + #endif /* CONFIG_CPU_SUBTYPE_SH7763 */ 462 458 #else 463 459 SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) 464 460 #if defined(CONFIG_CPU_SUBTYPE_SH7722) ··· 666 652 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ 667 653 if (port->mapbase == 0xffe08000) 668 654 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ 655 + if (port->mapbase == 0xffe10000) 656 + return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF/IRDA */ 657 + 669 658 return 1; 670 659 } 671 660 #elif defined(CONFIG_CPU_SUBTYPE_SH7770) ··· 781 764 * -- Mitch Davis - 15 Jul 2000 782 765 */ 783 766 784 - #if defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 785 - defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 767 + #if defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 786 768 defined(CONFIG_CPU_SUBTYPE_SH7785) 787 769 #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) 788 770 #elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
+1 -1
fs/Kconfig.binfmt
··· 30 30 config BINFMT_ELF_FDPIC 31 31 bool "Kernel support for FDPIC ELF binaries" 32 32 default y 33 - depends on (FRV || BLACKFIN) 33 + depends on (FRV || BLACKFIN || (SUPERH32 && !MMU)) 34 34 help 35 35 ELF FDPIC binaries are based on ELF, but allow the individual load 36 36 segments of a binary to be located in memory independently of each
+25 -20
fs/binfmt_elf_fdpic.c
··· 470 470 char __user *u_platform, *p; 471 471 long hwcap; 472 472 int loop; 473 + int nr; /* reset for each csp adjustment */ 473 474 474 475 /* we're going to shovel a whole load of stuff onto the stack */ 475 476 #ifdef CONFIG_MMU ··· 543 542 /* force 16 byte _final_ alignment here for generality */ 544 543 #define DLINFO_ITEMS 13 545 544 546 - nitems = 1 + DLINFO_ITEMS + (k_platform ? 1 : 0); 547 - #ifdef DLINFO_ARCH_ITEMS 548 - nitems += DLINFO_ARCH_ITEMS; 549 - #endif 545 + nitems = 1 + DLINFO_ITEMS + (k_platform ? 1 : 0) + AT_VECTOR_SIZE_ARCH; 550 546 551 547 csp = sp; 552 548 sp -= nitems * 2 * sizeof(unsigned long); ··· 555 557 sp -= sp & 15UL; 556 558 557 559 /* put the ELF interpreter info on the stack */ 558 - #define NEW_AUX_ENT(nr, id, val) \ 560 + #define NEW_AUX_ENT(id, val) \ 559 561 do { \ 560 562 struct { unsigned long _id, _val; } __user *ent; \ 561 563 \ 562 564 ent = (void __user *) csp; \ 563 565 __put_user((id), &ent[nr]._id); \ 564 566 __put_user((val), &ent[nr]._val); \ 567 + nr++; \ 565 568 } while (0) 566 569 570 + nr = 0; 567 571 csp -= 2 * sizeof(unsigned long); 568 - NEW_AUX_ENT(0, AT_NULL, 0); 572 + NEW_AUX_ENT(AT_NULL, 0); 569 573 if (k_platform) { 574 + nr = 0; 570 575 csp -= 2 * sizeof(unsigned long); 571 - NEW_AUX_ENT(0, AT_PLATFORM, 576 + NEW_AUX_ENT(AT_PLATFORM, 572 577 (elf_addr_t) (unsigned long) u_platform); 573 578 } 574 579 580 + nr = 0; 575 581 csp -= DLINFO_ITEMS * 2 * sizeof(unsigned long); 576 - NEW_AUX_ENT( 0, AT_HWCAP, hwcap); 577 - NEW_AUX_ENT( 1, AT_PAGESZ, PAGE_SIZE); 578 - NEW_AUX_ENT( 2, AT_CLKTCK, CLOCKS_PER_SEC); 579 - NEW_AUX_ENT( 3, AT_PHDR, exec_params->ph_addr); 580 - NEW_AUX_ENT( 4, AT_PHENT, sizeof(struct elf_phdr)); 581 - NEW_AUX_ENT( 5, AT_PHNUM, exec_params->hdr.e_phnum); 582 - NEW_AUX_ENT( 6, AT_BASE, interp_params->elfhdr_addr); 583 - NEW_AUX_ENT( 7, AT_FLAGS, 0); 584 - NEW_AUX_ENT( 8, AT_ENTRY, exec_params->entry_addr); 585 - NEW_AUX_ENT( 9, AT_UID, (elf_addr_t) current->uid); 586 - NEW_AUX_ENT(10, AT_EUID, (elf_addr_t) current->euid); 587 - NEW_AUX_ENT(11, AT_GID, (elf_addr_t) current->gid); 588 - NEW_AUX_ENT(12, AT_EGID, (elf_addr_t) current->egid); 582 + NEW_AUX_ENT(AT_HWCAP, hwcap); 583 + NEW_AUX_ENT(AT_PAGESZ, PAGE_SIZE); 584 + NEW_AUX_ENT(AT_CLKTCK, CLOCKS_PER_SEC); 585 + NEW_AUX_ENT(AT_PHDR, exec_params->ph_addr); 586 + NEW_AUX_ENT(AT_PHENT, sizeof(struct elf_phdr)); 587 + NEW_AUX_ENT(AT_PHNUM, exec_params->hdr.e_phnum); 588 + NEW_AUX_ENT(AT_BASE, interp_params->elfhdr_addr); 589 + NEW_AUX_ENT(AT_FLAGS, 0); 590 + NEW_AUX_ENT(AT_ENTRY, exec_params->entry_addr); 591 + NEW_AUX_ENT(AT_UID, (elf_addr_t) current->uid); 592 + NEW_AUX_ENT(AT_EUID, (elf_addr_t) current->euid); 593 + NEW_AUX_ENT(AT_GID, (elf_addr_t) current->gid); 594 + NEW_AUX_ENT(AT_EGID, (elf_addr_t) current->egid); 589 595 590 596 #ifdef ARCH_DLINFO 597 + nr = 0; 598 + csp -= AT_VECTOR_SIZE_ARCH * 2 * sizeof(unsigned long); 599 + 591 600 /* ARCH_DLINFO must come last so platform specific code can enforce 592 601 * special alignment requirements on the AUXV if necessary (eg. PPC). 593 602 */
+18 -3
include/asm-sh/clock.h
··· 5 5 #include <linux/list.h> 6 6 #include <linux/seq_file.h> 7 7 #include <linux/clk.h> 8 + #include <linux/err.h> 8 9 9 10 struct clk; 10 11 ··· 31 30 32 31 unsigned long rate; 33 32 unsigned long flags; 33 + unsigned long arch_flags; 34 34 }; 35 35 36 36 #define CLK_ALWAYS_ENABLED (1 << 0) ··· 43 41 /* arch/sh/kernel/cpu/clock.c */ 44 42 int clk_init(void); 45 43 46 - int __clk_enable(struct clk *); 47 - void __clk_disable(struct clk *); 48 - 49 44 void clk_recalc_rate(struct clk *); 50 45 51 46 int clk_register(struct clk *); 52 47 void clk_unregister(struct clk *); 48 + 49 + static inline int clk_always_enable(const char *id) 50 + { 51 + struct clk *clk; 52 + int ret; 53 + 54 + clk = clk_get(NULL, id); 55 + if (IS_ERR(clk)) 56 + return PTR_ERR(clk); 57 + 58 + ret = clk_enable(clk); 59 + if (ret) 60 + clk_put(clk); 61 + 62 + return ret; 63 + } 53 64 54 65 /* the exported API, in addition to clk_set_rate */ 55 66 /**
-1
include/asm-sh/cpu-sh4/cacheflush.h
··· 30 30 #define flush_dcache_mmap_unlock(mapping) do { } while (0) 31 31 32 32 void flush_icache_range(unsigned long start, unsigned long end); 33 - void flush_cache_sigtramp(unsigned long addr); 34 33 void flush_icache_user_range(struct vm_area_struct *vma, struct page *page, 35 34 unsigned long addr, int len); 36 35
+4
include/asm-sh/cpu-sh4/freq.h
··· 12 12 13 13 #if defined(CONFIG_CPU_SUBTYPE_SH7722) || \ 14 14 defined(CONFIG_CPU_SUBTYPE_SH7723) || \ 15 + defined(CONFIG_CPU_SUBTYPE_SH7343) || \ 15 16 defined(CONFIG_CPU_SUBTYPE_SH7366) 16 17 #define FRQCR 0xa4150000 17 18 #define VCLKCR 0xa4150004 18 19 #define SCLKACR 0xa4150008 19 20 #define SCLKBCR 0xa415000c 20 21 #define IrDACLKCR 0xa4150010 22 + #define MSTPCR0 0xa4150030 23 + #define MSTPCR1 0xa4150034 24 + #define MSTPCR2 0xa4150038 21 25 #elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 22 26 defined(CONFIG_CPU_SUBTYPE_SH7780) 23 27 #define FRQCR 0xffc80000
+5
include/asm-sh/device.h
··· 5 5 */ 6 6 #include <asm-generic/device.h> 7 7 8 + struct platform_device; 9 + /* allocate contiguous memory chunk and fill in struct resource */ 10 + int platform_resource_setup_memory(struct platform_device *pdev, 11 + char *name, unsigned long memsize); 12 +
+52 -1
include/asm-sh/elf.h
··· 1 1 #ifndef __ASM_SH_ELF_H 2 2 #define __ASM_SH_ELF_H 3 3 4 + #include <linux/utsname.h> 4 5 #include <asm/auxvec.h> 5 6 #include <asm/ptrace.h> 6 7 #include <asm/user.h> 8 + 9 + /* ELF header e_flags defines */ 10 + #define EF_SH_PIC 0x100 /* -fpic */ 11 + #define EF_SH_FDPIC 0x8000 /* -mfdpic */ 7 12 8 13 /* SH (particularly SHcompact) relocation types */ 9 14 #define R_SH_NONE 0 ··· 48 43 #define R_SH_RELATIVE 165 49 44 #define R_SH_GOTOFF 166 50 45 #define R_SH_GOTPC 167 46 + 47 + /* FDPIC relocs */ 48 + #define R_SH_GOT20 70 49 + #define R_SH_GOTOFF20 71 50 + #define R_SH_GOTFUNCDESC 72 51 + #define R_SH_GOTFUNCDESC20 73 52 + #define R_SH_GOTOFFFUNCDESC 74 53 + #define R_SH_GOTOFFFUNCDESC20 75 54 + #define R_SH_FUNCDESC 76 55 + #define R_SH_FUNCDESC_VALUE 77 56 + 57 + #if 0 /* XXX - later .. */ 58 + #define R_SH_GOT20 198 59 + #define R_SH_GOTOFF20 199 60 + #define R_SH_GOTFUNCDESC 200 61 + #define R_SH_GOTFUNCDESC20 201 62 + #define R_SH_GOTOFFFUNCDESC 202 63 + #define R_SH_GOTOFFFUNCDESC20 203 64 + #define R_SH_FUNCDESC 204 65 + #define R_SH_FUNCDESC_VALUE 205 66 + #endif 67 + 51 68 /* SHmedia relocs */ 52 69 #define R_SH_IMM_LOW16 246 53 70 #define R_SH_IMM_LOW16_PCREL 247 ··· 104 77 /* 105 78 * This is used to ensure we don't load something for the wrong architecture. 106 79 */ 107 - #define elf_check_arch(x) ( (x)->e_machine == EM_SH ) 80 + #define elf_check_arch(x) ((x)->e_machine == EM_SH) 81 + #define elf_check_fdpic(x) ((x)->e_flags & EF_SH_FDPIC) 82 + #define elf_check_const_displacement(x) ((x)->e_flags & EF_SH_PIC) 108 83 109 84 #define USE_ELF_CORE_DUMP 85 + #define ELF_FDPIC_CORE_EFLAGS EF_SH_FDPIC 110 86 #define ELF_EXEC_PAGESIZE PAGE_SIZE 111 87 112 88 /* This is the location that an ET_DYN program is loaded if exec'ed. Typical ··· 166 136 _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \ 167 137 _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; \ 168 138 _r->sr = SR_FD; } while (0) 139 + 140 + #define ELF_FDPIC_PLAT_INIT(_r, _exec_map_addr, _interp_map_addr, \ 141 + _dynamic_addr) \ 142 + do { \ 143 + _r->regs[0] = 0; \ 144 + _r->regs[1] = 0; \ 145 + _r->regs[2] = 0; \ 146 + _r->regs[3] = 0; \ 147 + _r->regs[4] = 0; \ 148 + _r->regs[5] = 0; \ 149 + _r->regs[6] = 0; \ 150 + _r->regs[7] = 0; \ 151 + _r->regs[8] = _exec_map_addr; \ 152 + _r->regs[9] = _interp_map_addr; \ 153 + _r->regs[10] = _dynamic_addr; \ 154 + _r->regs[11] = 0; \ 155 + _r->regs[12] = 0; \ 156 + _r->regs[13] = 0; \ 157 + _r->regs[14] = 0; \ 158 + _r->sr = SR_FD; \ 159 + } while (0) 169 160 #endif 170 161 171 162 #define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
+2 -2
include/asm-sh/hw_irq.h
··· 79 79 struct intc_sense_reg *sense_regs; 80 80 unsigned int nr_sense_regs; 81 81 char *name; 82 - #ifdef CONFIG_CPU_SH3 82 + #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) 83 83 struct intc_mask_reg *ack_regs; 84 84 unsigned int nr_ack_regs; 85 85 #endif ··· 95 95 chipname, \ 96 96 } 97 97 98 - #ifdef CONFIG_CPU_SH3 98 + #if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) 99 99 #define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ 100 100 mask_regs, prio_regs, sense_regs, ack_regs) \ 101 101 struct intc_desc symbol __initdata = { \
+11 -4
include/asm-sh/migor.h
··· 16 16 #include <asm/addrspace.h> 17 17 18 18 /* GPIO */ 19 - #define MSTPCR0 0xa4150030 20 - #define MSTPCR1 0xa4150034 21 - #define MSTPCR2 0xa4150038 22 - 23 19 #define PORT_PACR 0xa4050100 24 20 #define PORT_PDCR 0xa4050106 25 21 #define PORT_PECR 0xa4050108 ··· 25 29 #define PORT_PLCR 0xa4050114 26 30 #define PORT_PMCR 0xa4050116 27 31 #define PORT_PRCR 0xa405011c 32 + #define PORT_PTCR 0xa4050140 33 + #define PORT_PUCR 0xa4050142 34 + #define PORT_PVCR 0xa4050144 28 35 #define PORT_PWCR 0xa4050146 29 36 #define PORT_PXCR 0xa4050148 30 37 #define PORT_PYCR 0xa405014a 31 38 #define PORT_PZCR 0xa405014c 32 39 #define PORT_PADR 0xa4050120 40 + #define PORT_PHDR 0xa405012e 41 + #define PORT_PTDR 0xa4050160 33 42 #define PORT_PWDR 0xa4050166 34 43 35 44 #define PORT_HIZCRA 0xa4050158 ··· 49 48 #define PORT_PSELB 0xa4050150 50 49 #define PORT_PSELC 0xa4050152 51 50 #define PORT_PSELD 0xa4050154 51 + #define PORT_PSELE 0xa4050156 52 52 53 53 #define PORT_HIZCRA 0xa4050158 54 54 #define PORT_HIZCRB 0xa405015a 55 55 #define PORT_HIZCRC 0xa405015c 56 56 57 57 #define BSC_CS6ABCR 0xfec1001c 58 + 59 + #include <asm/sh_mobile_lcdc.h> 60 + 61 + int migor_lcd_qvga_setup(void *board_data, void *sys_ops_handle, 62 + struct sh_mobile_lcdc_sys_bus_ops *sys_ops); 58 63 59 64 #endif /* __ASM_SH_MIGOR_H */
+4
include/asm-sh/mmu.h
··· 12 12 struct vm_list_struct *vmlist; 13 13 unsigned long end_brk; 14 14 #endif 15 + #ifdef CONFIG_BINFMT_ELF_FDPIC 16 + unsigned long exec_fdpic_loadmap; 17 + unsigned long interp_fdpic_loadmap; 18 + #endif 15 19 } mm_context_t; 16 20 17 21 /*
+2 -1
include/asm-sh/mmu_context.h
··· 27 27 /* ASID is 8-bit value, so it can't be 0x100 */ 28 28 #define MMU_NO_ASID 0x100 29 29 30 - #ifdef CONFIG_MMU 31 30 #define asid_cache(cpu) (cpu_data[cpu].asid_cache) 31 + 32 + #ifdef CONFIG_MMU 32 33 #define cpu_context(cpu, mm) ((mm)->context.id[cpu]) 33 34 34 35 #define cpu_asid(cpu, mm) \
+2
include/asm-sh/page.h
··· 12 12 # define PAGE_SHIFT 12 13 13 #elif defined(CONFIG_PAGE_SIZE_8KB) 14 14 # define PAGE_SHIFT 13 15 + #elif defined(CONFIG_PAGE_SIZE_16KB) 16 + # define PAGE_SHIFT 14 15 17 #elif defined(CONFIG_PAGE_SIZE_64KB) 16 18 # define PAGE_SHIFT 16 17 19 #else
+3 -1
include/asm-sh/pgtable_32.h
··· 102 102 #define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS)) 103 103 104 104 /* Hardware flags, page size encoding */ 105 - #if defined(CONFIG_X2TLB) 105 + #if !defined(CONFIG_MMU) 106 + # define _PAGE_FLAGS_HARD 0ULL 107 + #elif defined(CONFIG_X2TLB) 106 108 # if defined(CONFIG_PAGE_SIZE_4KB) 107 109 # define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0) 108 110 # elif defined(CONFIG_PAGE_SIZE_8KB)
+1
include/asm-sh/processor.h
··· 2 2 #define __ASM_SH_PROCESSOR_H 3 3 4 4 #include <asm/cpu-features.h> 5 + #include <asm/segment.h> 5 6 6 7 #ifndef __ASSEMBLY__ 7 8 /*
+1 -4
include/asm-sh/processor_32.h
··· 28 28 29 29 struct sh_cpuinfo { 30 30 unsigned int type; 31 + int cut_major, cut_minor; 31 32 unsigned long loops_per_jiffy; 32 33 unsigned long asid_cache; 33 34 ··· 113 112 /* floating point info */ 114 113 union sh_fpu_union fpu; 115 114 }; 116 - 117 - typedef struct { 118 - unsigned long seg; 119 - } mm_segment_t; 120 115 121 116 /* Count of active tasks with UBC settings */ 122 117 extern int ubc_usercnt;
-4
include/asm-sh/processor_64.h
··· 166 166 union sh_fpu_union fpu; 167 167 }; 168 168 169 - typedef struct { 170 - unsigned long seg; 171 - } mm_segment_t; 172 - 173 169 #define INIT_MMAP \ 174 170 { &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } 175 171
+5
include/asm-sh/ptrace.h
··· 87 87 unsigned long mod; 88 88 }; 89 89 90 + #define PTRACE_GETFDPIC 31 /* get the ELF fdpic loadmap address */ 91 + 92 + #define PTRACE_GETFDPIC_EXEC 0 /* [addr] request the executable loadmap */ 93 + #define PTRACE_GETFDPIC_INTERP 1 /* [addr] request the interpreter loadmap */ 94 + 90 95 #define PTRACE_GETDSPREGS 55 91 96 #define PTRACE_SETDSPREGS 56 92 97 #endif
+17
include/asm-sh/se.h
··· 76 76 #define IRQ_CFCARD 7 77 77 #endif 78 78 79 + /* SH Ether support (SH7710/SH7712) */ 80 + /* Base address */ 81 + #define SH_ETH0_BASE 0xA7000000 82 + #define SH_ETH1_BASE 0xA7000400 83 + /* PHY ID */ 84 + #if defined(CONFIG_CPU_SUBTYPE_SH7710) 85 + # define PHY_ID 0x00 86 + #elif defined(CONFIG_CPU_SUBTYPE_SH7712) 87 + # define PHY_ID 0x01 88 + #endif 89 + /* Ether IRQ */ 90 + #define SH_ETH0_IRQ 80 91 + #define SH_ETH1_IRQ 81 92 + #define SH_TSU_IRQ 82 93 + 94 + void init_se_IRQ(void); 95 + 79 96 #define __IO_PREFIX se 80 97 #include <asm/io_generic.h> 81 98
+80 -13
include/asm-sh/se7343.h
··· 59 59 #define PA_LCD1 0xb8000000 60 60 #define PA_LCD2 0xb8800000 61 61 62 + #define PORT_PACR 0xA4050100 63 + #define PORT_PBCR 0xA4050102 64 + #define PORT_PCCR 0xA4050104 65 + #define PORT_PDCR 0xA4050106 66 + #define PORT_PECR 0xA4050108 67 + #define PORT_PFCR 0xA405010A 68 + #define PORT_PGCR 0xA405010C 69 + #define PORT_PHCR 0xA405010E 70 + #define PORT_PJCR 0xA4050110 71 + #define PORT_PKCR 0xA4050112 72 + #define PORT_PLCR 0xA4050114 73 + #define PORT_PMCR 0xA4050116 74 + #define PORT_PNCR 0xA4050118 75 + #define PORT_PQCR 0xA405011A 76 + #define PORT_PRCR 0xA405011C 77 + #define PORT_PSCR 0xA405011E 78 + #define PORT_PTCR 0xA4050140 79 + #define PORT_PUCR 0xA4050142 80 + #define PORT_PVCR 0xA4050144 81 + #define PORT_PWCR 0xA4050146 82 + #define PORT_PYCR 0xA4050148 83 + #define PORT_PZCR 0xA405014A 84 + 85 + #define PORT_PSELA 0xA405014C 86 + #define PORT_PSELB 0xA405014E 87 + #define PORT_PSELC 0xA4050150 88 + #define PORT_PSELD 0xA4050152 89 + #define PORT_PSELE 0xA4050154 90 + 91 + #define PORT_HIZCRA 0xA4050156 92 + #define PORT_HIZCRB 0xA4050158 93 + #define PORT_HIZCRC 0xA405015C 94 + 95 + #define PORT_DRVCR 0xA4050180 96 + 97 + #define PORT_PADR 0xA4050120 98 + #define PORT_PBDR 0xA4050122 99 + #define PORT_PCDR 0xA4050124 100 + #define PORT_PDDR 0xA4050126 101 + #define PORT_PEDR 0xA4050128 102 + #define PORT_PFDR 0xA405012A 103 + #define PORT_PGDR 0xA405012C 104 + #define PORT_PHDR 0xA405012E 105 + #define PORT_PJDR 0xA4050130 106 + #define PORT_PKDR 0xA4050132 107 + #define PORT_PLDR 0xA4050134 108 + #define PORT_PMDR 0xA4050136 109 + #define PORT_PNDR 0xA4050138 110 + #define PORT_PQDR 0xA405013A 111 + #define PORT_PRDR 0xA405013C 112 + #define PORT_PTDR 0xA4050160 113 + #define PORT_PUDR 0xA4050162 114 + #define PORT_PVDR 0xA4050164 115 + #define PORT_PWDR 0xA4050166 116 + #define PORT_PYDR 0xA4050168 117 + 118 + #define FPGA_IN 0xb1400000 119 + #define FPGA_OUT 0xb1400002 120 + 62 121 #define __IO_PREFIX sh7343se 63 122 #include <asm/io_generic.h> 64 123 65 - /* External Multiplexed interrupts */ 66 - #define PC_IRQ0 OFFCHIP_IRQ_BASE 67 - #define PC_IRQ1 (PC_IRQ0 + 1) 68 - #define PC_IRQ2 (PC_IRQ1 + 1) 69 - #define PC_IRQ3 (PC_IRQ2 + 1) 124 + #define IRQ0_IRQ 32 125 + #define IRQ1_IRQ 33 126 + #define IRQ4_IRQ 36 127 + #define IRQ5_IRQ 37 70 128 71 - #define EXT_IRQ0 (PC_IRQ3 + 1) 72 - #define EXT_IRQ1 (EXT_IRQ0 + 1) 73 - #define EXT_IRQ2 (EXT_IRQ1 + 1) 74 - #define EXT_IRQ3 (EXT_IRQ2 + 1) 129 + #define SE7343_FPGA_IRQ_MRSHPC0 0 130 + #define SE7343_FPGA_IRQ_MRSHPC1 1 131 + #define SE7343_FPGA_IRQ_MRSHPC2 2 132 + #define SE7343_FPGA_IRQ_MRSHPC3 3 133 + #define SE7343_FPGA_IRQ_SMC 6 /* EXT_IRQ2 */ 134 + #define SE7343_FPGA_IRQ_USB 8 75 135 76 - #define USB_IRQ0 (EXT_IRQ3 + 1) 77 - #define USB_IRQ1 (USB_IRQ0 + 1) 136 + #define SE7343_FPGA_IRQ_NR 11 137 + #define SE7343_FPGA_IRQ_BASE 120 78 138 79 - #define UART_IRQ0 (USB_IRQ1 + 1) 80 - #define UART_IRQ1 (UART_IRQ0 + 1) 139 + #define MRSHPC_IRQ3 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC3) 140 + #define MRSHPC_IRQ2 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC2) 141 + #define MRSHPC_IRQ1 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC1) 142 + #define MRSHPC_IRQ0 (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_MRSHPC0) 143 + #define SMC_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_SMC) 144 + #define USB_IRQ (SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_USB) 145 + 146 + /* arch/sh/boards/se/7343/irq.c */ 147 + void init_7343se_IRQ(void); 81 148 82 149 #endif /* __ASM_SH_HITACHI_SE7343_H */
-4
include/asm-sh/se7722.h
··· 55 55 56 56 #define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */ 57 57 /* GPIO */ 58 - #define MSTPCR0 0xA4150030UL 59 - #define MSTPCR1 0xA4150034UL 60 - #define MSTPCR2 0xA4150038UL 61 - 62 58 #define FPGA_IN 0xb1840000UL 63 59 #define FPGA_OUT 0xb1840004UL 64 60
+29 -1
include/asm-sh/segment.h
··· 1 1 #ifndef __ASM_SH_SEGMENT_H 2 2 #define __ASM_SH_SEGMENT_H 3 3 4 - /* Only here because we have some old header files that expect it.. */ 4 + #ifndef __ASSEMBLY__ 5 5 6 + typedef struct { 7 + unsigned long seg; 8 + } mm_segment_t; 9 + 10 + #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) 11 + 12 + /* 13 + * The fs value determines whether argument validity checking should be 14 + * performed or not. If get_fs() == USER_DS, checking is performed, with 15 + * get_fs() == KERNEL_DS, checking is bypassed. 16 + * 17 + * For historical reasons, these macros are grossly misnamed. 18 + */ 19 + #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL) 20 + #ifdef CONFIG_MMU 21 + #define USER_DS MAKE_MM_SEG(PAGE_OFFSET) 22 + #else 23 + #define USER_DS KERNEL_DS 24 + #endif 25 + 26 + #define segment_eq(a,b) ((a).seg == (b).seg) 27 + 28 + #define get_ds() (KERNEL_DS) 29 + 30 + #define get_fs() (current_thread_info()->addr_limit) 31 + #define set_fs(x) (current_thread_info()->addr_limit = (x)) 32 + 33 + #endif /* __ASSEMBLY__ */ 6 34 #endif /* __ASM_SH_SEGMENT_H */
+54
include/asm-sh/sh7763rdp.h
··· 1 + #ifndef __ASM_SH_SH7763RDP_H 2 + #define __ASM_SH_SH7763RDP_H 3 + 4 + /* 5 + * linux/include/asm-sh/sh7763drp.h 6 + * 7 + * Copyright (C) 2008 Renesas Solutions 8 + * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> 9 + * 10 + * This file is subject to the terms and conditions of the GNU General Public 11 + * License. See the file "COPYING" in the main directory of this archive 12 + * for more details. 13 + * 14 + */ 15 + #include <asm/addrspace.h> 16 + 17 + /* clock control */ 18 + #define MSTPCR1 0xFFC80038 19 + 20 + /* PORT */ 21 + #define PORT_PSEL0 0xFFEF0070 22 + #define PORT_PSEL1 0xFFEF0072 23 + #define PORT_PSEL2 0xFFEF0074 24 + #define PORT_PSEL3 0xFFEF0076 25 + #define PORT_PSEL4 0xFFEF0078 26 + 27 + #define PORT_PACR 0xFFEF0000 28 + #define PORT_PCCR 0xFFEF0004 29 + #define PORT_PFCR 0xFFEF000A 30 + #define PORT_PGCR 0xFFEF000C 31 + #define PORT_PHCR 0xFFEF000E 32 + #define PORT_PICR 0xFFEF0010 33 + #define PORT_PJCR 0xFFEF0012 34 + #define PORT_PKCR 0xFFEF0014 35 + #define PORT_PLCR 0xFFEF0016 36 + #define PORT_PMCR 0xFFEF0018 37 + #define PORT_PNCR 0xFFEF001A 38 + 39 + /* FPGA */ 40 + #define CPLD_BOARD_ID_ERV_REG 0xB1000000 41 + #define CPLD_CPLD_CMD_REG 0xB1000006 42 + 43 + /* 44 + * USB SH7763RDP board can use Host only. 45 + */ 46 + #define USB_USBHSC 0xFFEC80f0 47 + 48 + /* arch/sh/boards/renesas/sh7763rdp/irq.c */ 49 + void init_sh7763rdp_IRQ(void); 50 + int sh7763rdp_irq_demux(int irq); 51 + #define __IO_PREFIX sh7763rdp 52 + #include <asm/io_generic.h> 53 + 54 + #endif /* __ASM_SH_SH7763RDP_H */
+55
include/asm-sh/sh7785lcr.h
··· 1 + #ifndef __ASM_SH_RENESAS_SH7785LCR_H 2 + #define __ASM_SH_RENESAS_SH7785LCR_H 3 + 4 + /* 5 + * This board has 2 physical memory maps. 6 + * It can be changed with DIP switch(S2-5). 7 + * 8 + * phys address | S2-5 = OFF | S2-5 = ON 9 + * -----------------------------+---------------+--------------- 10 + * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash 11 + * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD 12 + * 0x06000000 - 0x07ffffff(CS1) | reserved | I2C 13 + * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM 14 + * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM 15 + * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107 16 + * 0x14000000 - 0x17ffffff(CS5) | I2C | USB 17 + * 0x18000000 - 0x1bffffff(CS6) | reserved | SD 18 + * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use) 19 + * 20 + */ 21 + 22 + #define NOR_FLASH_ADDR 0x00000000 23 + #define NOR_FLASH_SIZE 0x04000000 24 + 25 + #define PLD_BASE_ADDR 0x04000000 26 + #define PLD_PCICR (PLD_BASE_ADDR + 0x00) 27 + #define PLD_LCD_BK_CONTR (PLD_BASE_ADDR + 0x02) 28 + #define PLD_LOCALCR (PLD_BASE_ADDR + 0x04) 29 + #define PLD_POFCR (PLD_BASE_ADDR + 0x06) 30 + #define PLD_LEDCR (PLD_BASE_ADDR + 0x08) 31 + #define PLD_SWSR (PLD_BASE_ADDR + 0x0a) 32 + #define PLD_VERSR (PLD_BASE_ADDR + 0x0c) 33 + #define PLD_MMSR (PLD_BASE_ADDR + 0x0e) 34 + 35 + #define SM107_MEM_ADDR 0x10000000 36 + #define SM107_MEM_SIZE 0x00e00000 37 + #define SM107_REG_ADDR 0x13e00000 38 + #define SM107_REG_SIZE 0x00200000 39 + 40 + #if defined(CONFIG_SH_SH7785LCR_29BIT_PHYSMAPS) 41 + #define R8A66597_ADDR 0x14000000 /* USB */ 42 + #define CG200_ADDR 0x18000000 /* SD */ 43 + #define PCA9564_ADDR 0x06000000 /* I2C */ 44 + #else 45 + #define R8A66597_ADDR 0x08000000 46 + #define CG200_ADDR 0x0c000000 47 + #define PCA9564_ADDR 0x14000000 48 + #endif 49 + 50 + #define R8A66597_SIZE 0x00000100 51 + #define CG200_SIZE 0x00010000 52 + #define PCA9564_SIZE 0x00000100 53 + 54 + #endif /* __ASM_SH_RENESAS_SH7785LCR_H */ 55 +
-8
include/asm-sh/system.h
··· 148 148 149 149 extern struct dentry *sh_debugfs_root; 150 150 151 - /* XXX 152 - * disable hlt during certain critical i/o operations 153 - */ 154 - #define HAVE_DISABLE_HLT 155 - void disable_hlt(void); 156 - void enable_hlt(void); 157 - 158 - void default_idle(void); 159 151 void per_cpu_trap_init(void); 160 152 161 153 asmlinkage void break_point_trap(void);
+2
include/asm-sh/thread_info.h
··· 38 38 #define THREAD_SIZE_ORDER (1) 39 39 #elif defined(CONFIG_PAGE_SIZE_8KB) 40 40 #define THREAD_SIZE_ORDER (1) 41 + #elif defined(CONFIG_PAGE_SIZE_16KB) 42 + #define THREAD_SIZE_ORDER (0) 41 43 #elif defined(CONFIG_PAGE_SIZE_64KB) 42 44 #define THREAD_SIZE_ORDER (0) 43 45 #else
-1
include/asm-sh/timer.h
··· 40 40 /* arch/sh/kernel/time.c */ 41 41 void handle_timer_tick(void); 42 42 extern unsigned long sh_hpt_frequency; 43 - extern struct clocksource clocksource_sh; 44 43 45 44 #endif /* __ASM_SH_TIMER_H */
+222
include/asm-sh/uaccess.h
··· 1 1 #ifndef __ASM_SH_UACCESS_H 2 2 #define __ASM_SH_UACCESS_H 3 3 4 + #include <linux/errno.h> 5 + #include <linux/sched.h> 6 + #include <asm/segment.h> 7 + 8 + #define VERIFY_READ 0 9 + #define VERIFY_WRITE 1 10 + 11 + #define __addr_ok(addr) \ 12 + ((unsigned long __force)(addr) < current_thread_info()->addr_limit.seg) 13 + 14 + /* 15 + * __access_ok: Check if address with size is OK or not. 16 + * 17 + * Uhhuh, this needs 33-bit arithmetic. We have a carry.. 18 + * 19 + * sum := addr + size; carry? --> flag = true; 20 + * if (sum >= addr_limit) flag = true; 21 + */ 22 + #define __access_ok(addr, size) \ 23 + (__addr_ok((addr) + (size))) 24 + #define access_ok(type, addr, size) \ 25 + (__chk_user_ptr(addr), \ 26 + __access_ok((unsigned long __force)(addr), (size))) 27 + 28 + /* 29 + * Uh, these should become the main single-value transfer routines ... 30 + * They automatically use the right size if we just have the right 31 + * pointer type ... 32 + * 33 + * As SuperH uses the same address space for kernel and user data, we 34 + * can just do these as direct assignments. 35 + * 36 + * Careful to not 37 + * (a) re-use the arguments for side effects (sizeof is ok) 38 + * (b) require any knowledge of processes at this stage 39 + */ 40 + #define put_user(x,ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) 41 + #define get_user(x,ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) 42 + 43 + /* 44 + * The "__xxx" versions do not do address space checking, useful when 45 + * doing multiple accesses to the same area (the user has to do the 46 + * checks by hand with "access_ok()") 47 + */ 48 + #define __put_user(x,ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) 49 + #define __get_user(x,ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) 50 + 51 + struct __large_struct { unsigned long buf[100]; }; 52 + #define __m(x) (*(struct __large_struct __user *)(x)) 53 + 54 + #define __get_user_nocheck(x,ptr,size) \ 55 + ({ \ 56 + long __gu_err; \ 57 + unsigned long __gu_val; \ 58 + const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ 59 + __chk_user_ptr(ptr); \ 60 + __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ 61 + (x) = (__typeof__(*(ptr)))__gu_val; \ 62 + __gu_err; \ 63 + }) 64 + 65 + #define __get_user_check(x,ptr,size) \ 66 + ({ \ 67 + long __gu_err = -EFAULT; \ 68 + unsigned long __gu_val = 0; \ 69 + const __typeof__(*(ptr)) *__gu_addr = (ptr); \ 70 + if (likely(access_ok(VERIFY_READ, __gu_addr, (size)))) \ 71 + __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ 72 + (x) = (__typeof__(*(ptr)))__gu_val; \ 73 + __gu_err; \ 74 + }) 75 + 76 + #define __put_user_nocheck(x,ptr,size) \ 77 + ({ \ 78 + long __pu_err; \ 79 + __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ 80 + __chk_user_ptr(ptr); \ 81 + __put_user_size((x), __pu_addr, (size), __pu_err); \ 82 + __pu_err; \ 83 + }) 84 + 85 + #define __put_user_check(x,ptr,size) \ 86 + ({ \ 87 + long __pu_err = -EFAULT; \ 88 + __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ 89 + if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) \ 90 + __put_user_size((x), __pu_addr, (size), \ 91 + __pu_err); \ 92 + __pu_err; \ 93 + }) 94 + 4 95 #ifdef CONFIG_SUPERH32 5 96 # include "uaccess_32.h" 6 97 #else 7 98 # include "uaccess_64.h" 8 99 #endif 100 + 101 + /* Generic arbitrary sized copy. */ 102 + /* Return the number of bytes NOT copied */ 103 + __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); 104 + 105 + static __always_inline unsigned long 106 + __copy_from_user(void *to, const void __user *from, unsigned long n) 107 + { 108 + return __copy_user(to, (__force void *)from, n); 109 + } 110 + 111 + static __always_inline unsigned long __must_check 112 + __copy_to_user(void __user *to, const void *from, unsigned long n) 113 + { 114 + return __copy_user((__force void *)to, from, n); 115 + } 116 + 117 + #define __copy_to_user_inatomic __copy_to_user 118 + #define __copy_from_user_inatomic __copy_from_user 119 + 120 + /* 121 + * Clear the area and return remaining number of bytes 122 + * (on failure. Usually it's 0.) 123 + */ 124 + __kernel_size_t __clear_user(void *addr, __kernel_size_t size); 125 + 126 + #define clear_user(addr,n) \ 127 + ({ \ 128 + void __user * __cl_addr = (addr); \ 129 + unsigned long __cl_size = (n); \ 130 + \ 131 + if (__cl_size && access_ok(VERIFY_WRITE, \ 132 + ((unsigned long)(__cl_addr)), __cl_size)) \ 133 + __cl_size = __clear_user(__cl_addr, __cl_size); \ 134 + \ 135 + __cl_size; \ 136 + }) 137 + 138 + /** 139 + * strncpy_from_user: - Copy a NUL terminated string from userspace. 140 + * @dst: Destination address, in kernel space. This buffer must be at 141 + * least @count bytes long. 142 + * @src: Source address, in user space. 143 + * @count: Maximum number of bytes to copy, including the trailing NUL. 144 + * 145 + * Copies a NUL-terminated string from userspace to kernel space. 146 + * 147 + * On success, returns the length of the string (not including the trailing 148 + * NUL). 149 + * 150 + * If access to userspace fails, returns -EFAULT (some data may have been 151 + * copied). 152 + * 153 + * If @count is smaller than the length of the string, copies @count bytes 154 + * and returns @count. 155 + */ 156 + #define strncpy_from_user(dest,src,count) \ 157 + ({ \ 158 + unsigned long __sfu_src = (unsigned long)(src); \ 159 + int __sfu_count = (int)(count); \ 160 + long __sfu_res = -EFAULT; \ 161 + \ 162 + if (__access_ok(__sfu_src, __sfu_count)) \ 163 + __sfu_res = __strncpy_from_user((unsigned long)(dest), \ 164 + __sfu_src, __sfu_count); \ 165 + \ 166 + __sfu_res; \ 167 + }) 9 168 10 169 static inline unsigned long 11 170 copy_from_user(void *to, const void __user *from, unsigned long n) ··· 189 30 190 31 return __copy_size; 191 32 } 33 + 34 + /** 35 + * strnlen_user: - Get the size of a string in user space. 36 + * @s: The string to measure. 37 + * @n: The maximum valid length 38 + * 39 + * Context: User context only. This function may sleep. 40 + * 41 + * Get the size of a NUL-terminated string in user space. 42 + * 43 + * Returns the size of the string INCLUDING the terminating NUL. 44 + * On exception, returns 0. 45 + * If the string is too long, returns a value greater than @n. 46 + */ 47 + static inline long strnlen_user(const char __user *s, long n) 48 + { 49 + if (!__addr_ok(s)) 50 + return 0; 51 + else 52 + return __strnlen_user(s, n); 53 + } 54 + 55 + /** 56 + * strlen_user: - Get the size of a string in user space. 57 + * @str: The string to measure. 58 + * 59 + * Context: User context only. This function may sleep. 60 + * 61 + * Get the size of a NUL-terminated string in user space. 62 + * 63 + * Returns the size of the string INCLUDING the terminating NUL. 64 + * On exception, returns 0. 65 + * 66 + * If there is a limit on the length of a valid string, you may wish to 67 + * consider using strnlen_user() instead. 68 + */ 69 + #define strlen_user(str) strnlen_user(str, ~0UL >> 1) 70 + 71 + /* 72 + * The exception table consists of pairs of addresses: the first is the 73 + * address of an instruction that is allowed to fault, and the second is 74 + * the address at which the program should continue. No registers are 75 + * modified, so it is entirely up to the continuation code to figure out 76 + * what to do. 77 + * 78 + * All the routines below use bits of fixup code that are out of line 79 + * with the main instruction path. This means when everything is well, 80 + * we don't even have to jump over them. Further, they do not intrude 81 + * on our cache or tlb entries. 82 + */ 83 + struct exception_table_entry { 84 + unsigned long insn, fixup; 85 + }; 86 + 87 + #if defined(CONFIG_SUPERH64) && defined(CONFIG_MMU) 88 + #define ARCH_HAS_SEARCH_EXTABLE 89 + #endif 90 + 91 + int fixup_exception(struct pt_regs *regs); 92 + /* Returns 0 if exception not found and fixup.unit otherwise. */ 93 + unsigned long search_exception_table(unsigned long addr); 94 + const struct exception_table_entry *search_exception_tables(unsigned long addr); 95 + 192 96 193 97 #endif /* __ASM_SH_UACCESS_H */
+52 -292
include/asm-sh/uaccess_32.h
··· 1 - /* $Id: uaccess.h,v 1.11 2003/10/13 07:21:20 lethal Exp $ 2 - * 1 + /* 3 2 * User space memory access functions 4 3 * 5 4 * Copyright (C) 1999, 2002 Niibe Yutaka 6 - * Copyright (C) 2003 Paul Mundt 5 + * Copyright (C) 2003 - 2008 Paul Mundt 7 6 * 8 7 * Based on: 9 8 * MIPS implementation version 1.15 by ··· 11 12 */ 12 13 #ifndef __ASM_SH_UACCESS_32_H 13 14 #define __ASM_SH_UACCESS_32_H 14 - 15 - #include <linux/errno.h> 16 - #include <linux/sched.h> 17 - 18 - #define VERIFY_READ 0 19 - #define VERIFY_WRITE 1 20 - 21 - /* 22 - * The fs value determines whether argument validity checking should be 23 - * performed or not. If get_fs() == USER_DS, checking is performed, with 24 - * get_fs() == KERNEL_DS, checking is bypassed. 25 - * 26 - * For historical reasons (Data Segment Register?), these macros are misnamed. 27 - */ 28 - 29 - #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) 30 - 31 - #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL) 32 - #define USER_DS MAKE_MM_SEG(PAGE_OFFSET) 33 - 34 - #define segment_eq(a,b) ((a).seg == (b).seg) 35 - 36 - #define get_ds() (KERNEL_DS) 37 - 38 - #if !defined(CONFIG_MMU) 39 - /* NOMMU is always true */ 40 - #define __addr_ok(addr) (1) 41 - 42 - static inline mm_segment_t get_fs(void) 43 - { 44 - return USER_DS; 45 - } 46 - 47 - static inline void set_fs(mm_segment_t s) 48 - { 49 - } 50 - 51 - /* 52 - * __access_ok: Check if address with size is OK or not. 53 - * 54 - * If we don't have an MMU (or if its disabled) the only thing we really have 55 - * to look out for is if the address resides somewhere outside of what 56 - * available RAM we have. 57 - */ 58 - static inline int __access_ok(unsigned long addr, unsigned long size) 59 - { 60 - return 1; 61 - } 62 - #else /* CONFIG_MMU */ 63 - #define __addr_ok(addr) \ 64 - ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) 65 - 66 - #define get_fs() (current_thread_info()->addr_limit) 67 - #define set_fs(x) (current_thread_info()->addr_limit = (x)) 68 - 69 - /* 70 - * __access_ok: Check if address with size is OK or not. 71 - * 72 - * Uhhuh, this needs 33-bit arithmetic. We have a carry.. 73 - * 74 - * sum := addr + size; carry? --> flag = true; 75 - * if (sum >= addr_limit) flag = true; 76 - */ 77 - static inline int __access_ok(unsigned long addr, unsigned long size) 78 - { 79 - unsigned long flag, sum; 80 - 81 - __asm__("clrt\n\t" 82 - "addc %3, %1\n\t" 83 - "movt %0\n\t" 84 - "cmp/hi %4, %1\n\t" 85 - "rotcl %0" 86 - :"=&r" (flag), "=r" (sum) 87 - :"1" (addr), "r" (size), 88 - "r" (current_thread_info()->addr_limit.seg) 89 - :"t"); 90 - return flag == 0; 91 - } 92 - #endif /* CONFIG_MMU */ 93 - 94 - #define access_ok(type, addr, size) \ 95 - (__chk_user_ptr(addr), \ 96 - __access_ok((unsigned long __force)(addr), (size))) 97 - 98 - /* 99 - * Uh, these should become the main single-value transfer routines ... 100 - * They automatically use the right size if we just have the right 101 - * pointer type ... 102 - * 103 - * As SuperH uses the same address space for kernel and user data, we 104 - * can just do these as direct assignments. 105 - * 106 - * Careful to not 107 - * (a) re-use the arguments for side effects (sizeof is ok) 108 - * (b) require any knowledge of processes at this stage 109 - */ 110 - #define put_user(x,ptr) __put_user_check((x), (ptr), sizeof(*(ptr))) 111 - #define get_user(x,ptr) __get_user_check((x), (ptr), sizeof(*(ptr))) 112 - 113 - /* 114 - * The "__xxx" versions do not do address space checking, useful when 115 - * doing multiple accesses to the same area (the user has to do the 116 - * checks by hand with "access_ok()") 117 - */ 118 - #define __put_user(x,ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr))) 119 - #define __get_user(x,ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr))) 120 - 121 - struct __large_struct { unsigned long buf[100]; }; 122 - #define __m(x) (*(struct __large_struct __user *)(x)) 123 15 124 16 #define __get_user_size(x,ptr,size,retval) \ 125 17 do { \ ··· 31 141 } \ 32 142 } while (0) 33 143 34 - #define __get_user_nocheck(x,ptr,size) \ 35 - ({ \ 36 - long __gu_err; \ 37 - unsigned long __gu_val; \ 38 - const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \ 39 - __chk_user_ptr(ptr); \ 40 - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ 41 - (x) = (__typeof__(*(ptr)))__gu_val; \ 42 - __gu_err; \ 43 - }) 44 - 45 - #define __get_user_check(x,ptr,size) \ 46 - ({ \ 47 - long __gu_err = -EFAULT; \ 48 - unsigned long __gu_val = 0; \ 49 - const __typeof__(*(ptr)) *__gu_addr = (ptr); \ 50 - if (likely(access_ok(VERIFY_READ, __gu_addr, (size)))) \ 51 - __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ 52 - (x) = (__typeof__(*(ptr)))__gu_val; \ 53 - __gu_err; \ 54 - }) 55 - 144 + #ifdef CONFIG_MMU 56 145 #define __get_user_asm(x, addr, err, insn) \ 57 146 ({ \ 58 147 __asm__ __volatile__( \ ··· 52 183 ".previous" \ 53 184 :"=&r" (err), "=&r" (x) \ 54 185 :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); }) 186 + #else 187 + #define __get_user_asm(x, addr, err, insn) \ 188 + do { \ 189 + __asm__ __volatile__ ( \ 190 + "mov." insn " %1, %0\n\t" \ 191 + : "=&r" (x) \ 192 + : "m" (__m(addr)) \ 193 + ); \ 194 + } while (0) 195 + #endif /* CONFIG_MMU */ 55 196 56 197 extern void __get_user_unknown(void); 57 198 ··· 76 197 __put_user_asm(x, ptr, retval, "w"); \ 77 198 break; \ 78 199 case 4: \ 79 - __put_user_asm(x, ptr, retval, "l"); \ 200 + __put_user_asm((u32)x, ptr, \ 201 + retval, "l"); \ 80 202 break; \ 81 203 case 8: \ 82 204 __put_user_u64(x, ptr, retval); \ ··· 87 207 } \ 88 208 } while (0) 89 209 90 - #define __put_user_nocheck(x,ptr,size) \ 91 - ({ \ 92 - long __pu_err; \ 93 - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ 94 - __chk_user_ptr(ptr); \ 95 - __put_user_size((x), __pu_addr, (size), __pu_err); \ 96 - __pu_err; \ 97 - }) 98 - 99 - #define __put_user_check(x,ptr,size) \ 100 - ({ \ 101 - long __pu_err = -EFAULT; \ 102 - __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ 103 - if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) \ 104 - __put_user_size((x), __pu_addr, (size), \ 105 - __pu_err); \ 106 - __pu_err; \ 107 - }) 108 - 109 - #define __put_user_asm(x, addr, err, insn) \ 110 - ({ \ 111 - __asm__ __volatile__( \ 112 - "1:\n\t" \ 113 - "mov." insn " %1, %2\n\t" \ 114 - "2:\n" \ 115 - ".section .fixup,\"ax\"\n" \ 116 - "3:\n\t" \ 117 - "mov.l 4f, %0\n\t" \ 118 - "jmp @%0\n\t" \ 119 - " mov %3, %0\n\t" \ 120 - ".balign 4\n" \ 121 - "4: .long 2b\n\t" \ 122 - ".previous\n" \ 123 - ".section __ex_table,\"a\"\n\t" \ 124 - ".long 1b, 3b\n\t" \ 125 - ".previous" \ 126 - :"=&r" (err) \ 127 - :"r" (x), "m" (__m(addr)), "i" (-EFAULT), "0" (err) \ 128 - :"memory"); }) 210 + #ifdef CONFIG_MMU 211 + #define __put_user_asm(x, addr, err, insn) \ 212 + do { \ 213 + __asm__ __volatile__ ( \ 214 + "1:\n\t" \ 215 + "mov." insn " %1, %2\n\t" \ 216 + "2:\n" \ 217 + ".section .fixup,\"ax\"\n" \ 218 + "3:\n\t" \ 219 + "mov.l 4f, %0\n\t" \ 220 + "jmp @%0\n\t" \ 221 + " mov %3, %0\n\t" \ 222 + ".balign 4\n" \ 223 + "4: .long 2b\n\t" \ 224 + ".previous\n" \ 225 + ".section __ex_table,\"a\"\n\t" \ 226 + ".long 1b, 3b\n\t" \ 227 + ".previous" \ 228 + : "=&r" (err) \ 229 + : "r" (x), "m" (__m(addr)), "i" (-EFAULT), \ 230 + "0" (err) \ 231 + : "memory" \ 232 + ); \ 233 + } while (0) 234 + #else 235 + #define __put_user_asm(x, addr, err, insn) \ 236 + do { \ 237 + __asm__ __volatile__ ( \ 238 + "mov." insn " %0, %1\n\t" \ 239 + : /* no outputs */ \ 240 + : "r" (x), "m" (__m(addr)) \ 241 + : "memory" \ 242 + ); \ 243 + } while (0) 244 + #endif /* CONFIG_MMU */ 129 245 130 246 #if defined(CONFIG_CPU_LITTLE_ENDIAN) 131 247 #define __put_user_u64(val,addr,retval) \ ··· 171 295 172 296 extern void __put_user_unknown(void); 173 297 174 - /* Generic arbitrary sized copy. */ 175 - /* Return the number of bytes NOT copied */ 176 - __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); 177 - 178 - 179 - static __always_inline unsigned long 180 - __copy_from_user(void *to, const void __user *from, unsigned long n) 181 - { 182 - return __copy_user(to, (__force void *)from, n); 183 - } 184 - 185 - static __always_inline unsigned long __must_check 186 - __copy_to_user(void __user *to, const void *from, unsigned long n) 187 - { 188 - return __copy_user((__force void *)to, from, n); 189 - } 190 - 191 - #define __copy_to_user_inatomic __copy_to_user 192 - #define __copy_from_user_inatomic __copy_from_user 193 - 194 - /* 195 - * Clear the area and return remaining number of bytes 196 - * (on failure. Usually it's 0.) 197 - */ 198 - extern __kernel_size_t __clear_user(void *addr, __kernel_size_t size); 199 - 200 - #define clear_user(addr,n) ({ \ 201 - void * __cl_addr = (addr); \ 202 - unsigned long __cl_size = (n); \ 203 - if (__cl_size && __access_ok(((unsigned long)(__cl_addr)), __cl_size)) \ 204 - __cl_size = __clear_user(__cl_addr, __cl_size); \ 205 - __cl_size; }) 206 - 207 - static __inline__ int 298 + static inline int 208 299 __strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count) 209 300 { 210 301 __kernel_size_t res; ··· 210 367 return res; 211 368 } 212 369 213 - /** 214 - * strncpy_from_user: - Copy a NUL terminated string from userspace. 215 - * @dst: Destination address, in kernel space. This buffer must be at 216 - * least @count bytes long. 217 - * @src: Source address, in user space. 218 - * @count: Maximum number of bytes to copy, including the trailing NUL. 219 - * 220 - * Copies a NUL-terminated string from userspace to kernel space. 221 - * 222 - * On success, returns the length of the string (not including the trailing 223 - * NUL). 224 - * 225 - * If access to userspace fails, returns -EFAULT (some data may have been 226 - * copied). 227 - * 228 - * If @count is smaller than the length of the string, copies @count bytes 229 - * and returns @count. 230 - */ 231 - #define strncpy_from_user(dest,src,count) ({ \ 232 - unsigned long __sfu_src = (unsigned long) (src); \ 233 - int __sfu_count = (int) (count); \ 234 - long __sfu_res = -EFAULT; \ 235 - if(__access_ok(__sfu_src, __sfu_count)) { \ 236 - __sfu_res = __strncpy_from_user((unsigned long) (dest), __sfu_src, __sfu_count); \ 237 - } __sfu_res; }) 238 - 239 370 /* 240 371 * Return the size of a string (including the ending 0 even when we have 241 372 * exceeded the maximum string length). 242 373 */ 243 - static __inline__ long __strnlen_user(const char __user *__s, long __n) 374 + static inline long __strnlen_user(const char __user *__s, long __n) 244 375 { 245 376 unsigned long res; 246 377 unsigned long __dummy; ··· 245 428 : "t"); 246 429 return res; 247 430 } 248 - 249 - /** 250 - * strnlen_user: - Get the size of a string in user space. 251 - * @s: The string to measure. 252 - * @n: The maximum valid length 253 - * 254 - * Context: User context only. This function may sleep. 255 - * 256 - * Get the size of a NUL-terminated string in user space. 257 - * 258 - * Returns the size of the string INCLUDING the terminating NUL. 259 - * On exception, returns 0. 260 - * If the string is too long, returns a value greater than @n. 261 - */ 262 - static __inline__ long strnlen_user(const char __user *s, long n) 263 - { 264 - if (!__addr_ok(s)) 265 - return 0; 266 - else 267 - return __strnlen_user(s, n); 268 - } 269 - 270 - /** 271 - * strlen_user: - Get the size of a string in user space. 272 - * @str: The string to measure. 273 - * 274 - * Context: User context only. This function may sleep. 275 - * 276 - * Get the size of a NUL-terminated string in user space. 277 - * 278 - * Returns the size of the string INCLUDING the terminating NUL. 279 - * On exception, returns 0. 280 - * 281 - * If there is a limit on the length of a valid string, you may wish to 282 - * consider using strnlen_user() instead. 283 - */ 284 - #define strlen_user(str) strnlen_user(str, ~0UL >> 1) 285 - 286 - /* 287 - * The exception table consists of pairs of addresses: the first is the 288 - * address of an instruction that is allowed to fault, and the second is 289 - * the address at which the program should continue. No registers are 290 - * modified, so it is entirely up to the continuation code to figure out 291 - * what to do. 292 - * 293 - * All the routines below use bits of fixup code that are out of line 294 - * with the main instruction path. This means when everything is well, 295 - * we don't even have to jump over them. Further, they do not intrude 296 - * on our cache or tlb entries. 297 - */ 298 - 299 - struct exception_table_entry 300 - { 301 - unsigned long insn, fixup; 302 - }; 303 - 304 - extern int fixup_exception(struct pt_regs *regs); 305 431 306 432 #endif /* __ASM_SH_UACCESS_32_H */
-206
include/asm-sh/uaccess_64.h
··· 20 20 * License. See the file "COPYING" in the main directory of this archive 21 21 * for more details. 22 22 */ 23 - #include <linux/errno.h> 24 - #include <linux/sched.h> 25 - 26 - #define VERIFY_READ 0 27 - #define VERIFY_WRITE 1 28 - 29 - /* 30 - * The fs value determines whether argument validity checking should be 31 - * performed or not. If get_fs() == USER_DS, checking is performed, with 32 - * get_fs() == KERNEL_DS, checking is bypassed. 33 - * 34 - * For historical reasons (Data Segment Register?), these macros are misnamed. 35 - */ 36 - 37 - #define MAKE_MM_SEG(s) ((mm_segment_t) { (s) }) 38 - 39 - #define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFF) 40 - #define USER_DS MAKE_MM_SEG(0x80000000) 41 - 42 - #define get_ds() (KERNEL_DS) 43 - #define get_fs() (current_thread_info()->addr_limit) 44 - #define set_fs(x) (current_thread_info()->addr_limit=(x)) 45 - 46 - #define segment_eq(a,b) ((a).seg == (b).seg) 47 - 48 - #define __addr_ok(addr) ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg)) 49 - 50 - /* 51 - * Uhhuh, this needs 33-bit arithmetic. We have a carry.. 52 - * 53 - * sum := addr + size; carry? --> flag = true; 54 - * if (sum >= addr_limit) flag = true; 55 - */ 56 - #define __range_ok(addr,size) (((unsigned long) (addr) + (size) < (current_thread_info()->addr_limit.seg)) ? 0 : 1) 57 - 58 - #define access_ok(type,addr,size) (__range_ok(addr,size) == 0) 59 - #define __access_ok(addr,size) (__range_ok(addr,size) == 0) 60 - 61 - /* 62 - * Uh, these should become the main single-value transfer routines ... 63 - * They automatically use the right size if we just have the right 64 - * pointer type ... 65 - * 66 - * As MIPS uses the same address space for kernel and user data, we 67 - * can just do these as direct assignments. 68 - * 69 - * Careful to not 70 - * (a) re-use the arguments for side effects (sizeof is ok) 71 - * (b) require any knowledge of processes at this stage 72 - */ 73 - #define put_user(x,ptr) __put_user_check((x),(ptr),sizeof(*(ptr))) 74 - #define get_user(x,ptr) __get_user_check((x),(ptr),sizeof(*(ptr))) 75 - 76 - /* 77 - * The "__xxx" versions do not do address space checking, useful when 78 - * doing multiple accesses to the same area (the user has to do the 79 - * checks by hand with "access_ok()") 80 - */ 81 - #define __put_user(x,ptr) __put_user_nocheck((x),(ptr),sizeof(*(ptr))) 82 - #define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr))) 83 - 84 - /* 85 - * The "xxx_ret" versions return constant specified in third argument, if 86 - * something bad happens. These macros can be optimized for the 87 - * case of just returning from the function xxx_ret is used. 88 - */ 89 - 90 - #define put_user_ret(x,ptr,ret) ({ \ 91 - if (put_user(x,ptr)) return ret; }) 92 - 93 - #define get_user_ret(x,ptr,ret) ({ \ 94 - if (get_user(x,ptr)) return ret; }) 95 - 96 - #define __put_user_ret(x,ptr,ret) ({ \ 97 - if (__put_user(x,ptr)) return ret; }) 98 - 99 - #define __get_user_ret(x,ptr,ret) ({ \ 100 - if (__get_user(x,ptr)) return ret; }) 101 - 102 - struct __large_struct { unsigned long buf[100]; }; 103 - #define __m(x) (*(struct __large_struct *)(x)) 104 23 105 24 #define __get_user_size(x,ptr,size,retval) \ 106 25 do { \ ··· 42 123 break; \ 43 124 } \ 44 125 } while (0) 45 - 46 - #define __get_user_nocheck(x,ptr,size) \ 47 - ({ \ 48 - long __gu_err, __gu_val; \ 49 - __get_user_size((void *)&__gu_val, (long)(ptr), \ 50 - (size), __gu_err); \ 51 - (x) = (__typeof__(*(ptr)))__gu_val; \ 52 - __gu_err; \ 53 - }) 54 - 55 - #define __get_user_check(x,ptr,size) \ 56 - ({ \ 57 - long __gu_addr = (long)(ptr); \ 58 - long __gu_err = -EFAULT, __gu_val; \ 59 - if (__access_ok(__gu_addr, (size))) \ 60 - __get_user_size((void *)&__gu_val, __gu_addr, \ 61 - (size), __gu_err); \ 62 - (x) = (__typeof__(*(ptr))) __gu_val; \ 63 - __gu_err; \ 64 - }) 65 126 66 127 extern long __get_user_asm_b(void *, long); 67 128 extern long __get_user_asm_w(void *, long); ··· 70 171 } \ 71 172 } while (0) 72 173 73 - #define __put_user_nocheck(x,ptr,size) \ 74 - ({ \ 75 - long __pu_err; \ 76 - __typeof__(*(ptr)) __pu_val = (x); \ 77 - __put_user_size((void *)&__pu_val, (long)(ptr), (size), __pu_err); \ 78 - __pu_err; \ 79 - }) 80 - 81 - #define __put_user_check(x,ptr,size) \ 82 - ({ \ 83 - long __pu_err = -EFAULT; \ 84 - long __pu_addr = (long)(ptr); \ 85 - __typeof__(*(ptr)) __pu_val = (x); \ 86 - \ 87 - if (__access_ok(__pu_addr, (size))) \ 88 - __put_user_size((void *)&__pu_val, __pu_addr, (size), __pu_err);\ 89 - __pu_err; \ 90 - }) 91 - 92 174 extern long __put_user_asm_b(void *, long); 93 175 extern long __put_user_asm_w(void *, long); 94 176 extern long __put_user_asm_l(void *, long); 95 177 extern long __put_user_asm_q(void *, long); 96 178 extern void __put_user_unknown(void); 97 - 98 - 99 - /* Generic arbitrary sized copy. */ 100 - /* Return the number of bytes NOT copied */ 101 - /* XXX: should be such that: 4byte and the rest. */ 102 - extern __kernel_size_t __copy_user(void *__to, const void *__from, __kernel_size_t __n); 103 - 104 - #define copy_to_user_ret(to,from,n,retval) ({ \ 105 - if (copy_to_user(to,from,n)) \ 106 - return retval; \ 107 - }) 108 - 109 - #define __copy_to_user(to,from,n) \ 110 - __copy_user((void *)(to), \ 111 - (void *)(from), n) 112 - 113 - #define __copy_to_user_ret(to,from,n,retval) ({ \ 114 - if (__copy_to_user(to,from,n)) \ 115 - return retval; \ 116 - }) 117 - 118 - #define copy_from_user_ret(to,from,n,retval) ({ \ 119 - if (copy_from_user(to,from,n)) \ 120 - return retval; \ 121 - }) 122 - 123 - #define __copy_from_user(to,from,n) \ 124 - __copy_user((void *)(to), \ 125 - (void *)(from), n) 126 - 127 - #define __copy_from_user_ret(to,from,n,retval) ({ \ 128 - if (__copy_from_user(to,from,n)) \ 129 - return retval; \ 130 - }) 131 - 132 - #define __copy_to_user_inatomic __copy_to_user 133 - #define __copy_from_user_inatomic __copy_from_user 134 - 135 - /* XXX: Not sure it works well.. 136 - should be such that: 4byte clear and the rest. */ 137 - extern __kernel_size_t __clear_user(void *addr, __kernel_size_t size); 138 - 139 - #define clear_user(addr,n) ({ \ 140 - void * __cl_addr = (addr); \ 141 - unsigned long __cl_size = (n); \ 142 - if (__cl_size && __access_ok(((unsigned long)(__cl_addr)), __cl_size)) \ 143 - __cl_size = __clear_user(__cl_addr, __cl_size); \ 144 - __cl_size; }) 145 - 146 - extern int __strncpy_from_user(unsigned long __dest, unsigned long __src, int __count); 147 - 148 - #define strncpy_from_user(dest,src,count) ({ \ 149 - unsigned long __sfu_src = (unsigned long) (src); \ 150 - int __sfu_count = (int) (count); \ 151 - long __sfu_res = -EFAULT; \ 152 - if(__access_ok(__sfu_src, __sfu_count)) { \ 153 - __sfu_res = __strncpy_from_user((unsigned long) (dest), __sfu_src, __sfu_count); \ 154 - } __sfu_res; }) 155 - 156 - #define strlen_user(str) strnlen_user(str, ~0UL >> 1) 157 - 158 - /* 159 - * Return the size of a string (including the ending 0!) 160 - */ 161 - extern long __strnlen_user(const char *__s, long __n); 162 - 163 - static inline long strnlen_user(const char *s, long n) 164 - { 165 - if (!__addr_ok(s)) 166 - return 0; 167 - else 168 - return __strnlen_user(s, n); 169 - } 170 - 171 - struct exception_table_entry 172 - { 173 - unsigned long insn, fixup; 174 - }; 175 - 176 - #ifdef CONFIG_MMU 177 - #define ARCH_HAS_SEARCH_EXTABLE 178 - #endif 179 - 180 - /* Returns 0 if exception not found and fixup.unit otherwise. */ 181 - extern unsigned long search_exception_table(unsigned long addr); 182 - extern const struct exception_table_entry *search_exception_tables (unsigned long addr); 183 179 184 180 #endif /* __ASM_SH_UACCESS_64_H */
+11 -3
include/asm-sh/unistd.h
··· 1 - #ifdef CONFIG_SUPERH32 2 - # include "unistd_32.h" 1 + #ifdef __KERNEL__ 2 + # ifdef CONFIG_SUPERH32 3 + # include "unistd_32.h" 4 + # else 5 + # include "unistd_64.h" 6 + # endif 3 7 #else 4 - # include "unistd_64.h" 8 + # ifdef __SH5__ 9 + # include "unistd_64.h" 10 + # else 11 + # include "unistd_32.h" 12 + # endif 5 13 #endif
+7 -1
include/asm-sh/unistd_32.h
··· 335 335 #define __NR_fallocate 324 336 336 #define __NR_timerfd_settime 325 337 337 #define __NR_timerfd_gettime 326 338 + #define __NR_signalfd4 327 339 + #define __NR_eventfd2 328 340 + #define __NR_epoll_create1 329 341 + #define __NR_dup3 330 342 + #define __NR_pipe2 331 343 + #define __NR_inotify_init1 332 338 344 339 - #define NR_syscalls 327 345 + #define NR_syscalls 333 340 346 341 347 #ifdef __KERNEL__ 342 348
+7 -1
include/asm-sh/unistd_64.h
··· 375 375 #define __NR_fallocate 352 376 376 #define __NR_timerfd_settime 353 377 377 #define __NR_timerfd_gettime 354 378 + #define __NR_signalfd4 355 379 + #define __NR_eventfd2 356 380 + #define __NR_epoll_create1 357 381 + #define __NR_dup3 358 382 + #define __NR_pipe2 359 383 + #define __NR_inotify_init1 360 378 384 379 385 #ifdef __KERNEL__ 380 386 381 - #define NR_syscalls 353 387 + #define NR_syscalls 361 382 388 383 389 #define __ARCH_WANT_IPC_PARSE_VERSION 384 390 #define __ARCH_WANT_OLD_READDIR
-2
include/linux/maple.h
··· 61 61 62 62 struct maple_driver { 63 63 unsigned long function; 64 - int (*connect) (struct maple_device * dev); 65 - void (*disconnect) (struct maple_device * dev); 66 64 struct device_driver drv; 67 65 }; 68 66