Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

mfd: ti_am335x_tscadc: Remove unwanted reg_se_cache save

In one shot mode, sequencer automatically disables all enabled steps at
the end of each cycle. (both ADC steps and TSC steps) Hence these steps
need not be saved in reg_se_cache for clearing these steps at a later
stage.
Also, when ADC wakes up Sequencer should not be busy executing any of the
config steps except for the charge step. Previously charge step was 1 ADC
clock cycle and hence it was ignored.
TSC steps are always disabled at the end of each conversion cycle, hence
there is no need to explicitly disable TSC steps by writing 0 to REG_SE.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

authored by

Vignesh R and committed by
Lee Jones
b10848e6 f0bd7ccc

+6 -8
+5 -8
drivers/mfd/ti_am335x_tscadc.c
··· 68 68 DEFINE_WAIT(wait); 69 69 u32 reg; 70 70 71 - /* 72 - * disable TSC steps so it does not run while the ADC is using it. If 73 - * write 0 while it is running (it just started or was already running) 74 - * then it completes all steps that were enabled and stops then. 75 - */ 76 - tscadc_writel(tsadc, REG_SE, 0); 77 71 reg = tscadc_readl(tsadc, REG_ADCFSM); 78 72 if (reg & SEQ_STATUS) { 79 73 tsadc->adc_waiting = true; ··· 80 86 spin_lock_irq(&tsadc->reg_lock); 81 87 finish_wait(&tsadc->reg_se_wait, &wait); 82 88 89 + /* 90 + * Sequencer should either be idle or 91 + * busy applying the charge step. 92 + */ 83 93 reg = tscadc_readl(tsadc, REG_ADCFSM); 84 - WARN_ON(reg & SEQ_STATUS); 94 + WARN_ON((reg & SEQ_STATUS) && !(reg & CHARGE_STEP)); 85 95 tsadc->adc_waiting = false; 86 96 } 87 97 tsadc->adc_in_use = true; ··· 94 96 void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val) 95 97 { 96 98 spin_lock_irq(&tsadc->reg_lock); 97 - tsadc->reg_se_cache |= val; 98 99 am335x_tscadc_need_adc(tsadc); 99 100 100 101 tscadc_writel(tsadc, REG_SE, val);
+1
include/linux/mfd/ti_am335x_tscadc.h
··· 128 128 129 129 /* Sequencer Status */ 130 130 #define SEQ_STATUS BIT(5) 131 + #define CHARGE_STEP 0x11 131 132 132 133 #define ADC_CLK 3000000 133 134 #define TOTAL_STEPS 16