Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

net: typhoon: Add required whitespace after keywords

checkpatch found a lack of appropriate whitespace after certain keywords
as per the style guide. Add it in.

Signed-off-by: Logan Magee <mageelog@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Logan Magee and committed by
David S. Miller
b0f83057 629cb919

+143 -143
+141 -141
drivers/net/ethernet/3com/typhoon.c
··· 310 310 * cannot pass a read, so this forces current writes to post. 311 311 */ 312 312 #define typhoon_post_pci_writes(x) \ 313 - do { if(likely(use_mmio)) ioread32(x+TYPHOON_REG_HEARTBEAT); } while(0) 313 + do { if (likely(use_mmio)) ioread32(x+TYPHOON_REG_HEARTBEAT); } while (0) 314 314 315 315 /* We'll wait up to six seconds for a reset, and half a second normally. 316 316 */ ··· 380 380 int i, err = 0; 381 381 int timeout; 382 382 383 - if(wait_type == WaitNoSleep) 383 + if (wait_type == WaitNoSleep) 384 384 timeout = TYPHOON_RESET_TIMEOUT_NOSLEEP; 385 385 else 386 386 timeout = TYPHOON_RESET_TIMEOUT_SLEEP; ··· 393 393 udelay(1); 394 394 iowrite32(TYPHOON_RESET_NONE, ioaddr + TYPHOON_REG_SOFT_RESET); 395 395 396 - if(wait_type != NoWait) { 397 - for(i = 0; i < timeout; i++) { 398 - if(ioread32(ioaddr + TYPHOON_REG_STATUS) == 396 + if (wait_type != NoWait) { 397 + for (i = 0; i < timeout; i++) { 398 + if (ioread32(ioaddr + TYPHOON_REG_STATUS) == 399 399 TYPHOON_STATUS_WAITING_FOR_HOST) 400 400 goto out; 401 401 402 - if(wait_type == WaitSleep) 402 + if (wait_type == WaitSleep) 403 403 schedule_timeout_uninterruptible(1); 404 404 else 405 405 udelay(TYPHOON_UDELAY); ··· 422 422 * which should be enough (I've see it work well at 100us, but still 423 423 * saw occasional problems.) 424 424 */ 425 - if(wait_type == WaitSleep) 425 + if (wait_type == WaitSleep) 426 426 msleep(5); 427 427 else 428 428 udelay(500); ··· 434 434 { 435 435 int i, err = 0; 436 436 437 - for(i = 0; i < TYPHOON_WAIT_TIMEOUT; i++) { 438 - if(ioread32(ioaddr + TYPHOON_REG_STATUS) == wait_value) 437 + for (i = 0; i < TYPHOON_WAIT_TIMEOUT; i++) { 438 + if (ioread32(ioaddr + TYPHOON_REG_STATUS) == wait_value) 439 439 goto out; 440 440 udelay(TYPHOON_UDELAY); 441 441 } ··· 449 449 static inline void 450 450 typhoon_media_status(struct net_device *dev, struct resp_desc *resp) 451 451 { 452 - if(resp->parm1 & TYPHOON_MEDIA_STAT_NO_LINK) 452 + if (resp->parm1 & TYPHOON_MEDIA_STAT_NO_LINK) 453 453 netif_carrier_off(dev); 454 454 else 455 455 netif_carrier_on(dev); ··· 465 465 * card in a long while. If the lock is held, then we're in the 466 466 * process of issuing a command, so we don't need to respond. 467 467 */ 468 - if(spin_trylock(&tp->command_lock)) { 468 + if (spin_trylock(&tp->command_lock)) { 469 469 cmd = (struct cmd_desc *)(ring->ringBase + ring->lastWrite); 470 470 typhoon_inc_cmd_index(&ring->lastWrite, 1); 471 471 ··· 489 489 490 490 cleared = le32_to_cpu(indexes->respCleared); 491 491 ready = le32_to_cpu(indexes->respReady); 492 - while(cleared != ready) { 492 + while (cleared != ready) { 493 493 resp = (struct resp_desc *)(base + cleared); 494 494 count = resp->numDesc + 1; 495 - if(resp_save && resp->seqNo) { 496 - if(count > resp_size) { 495 + if (resp_save && resp->seqNo) { 496 + if (count > resp_size) { 497 497 resp_save->flags = TYPHOON_RESP_ERROR; 498 498 goto cleanup; 499 499 } 500 500 501 501 wrap_len = 0; 502 502 len = count * sizeof(*resp); 503 - if(unlikely(cleared + len > RESPONSE_RING_SIZE)) { 503 + if (unlikely(cleared + len > RESPONSE_RING_SIZE)) { 504 504 wrap_len = cleared + len - RESPONSE_RING_SIZE; 505 505 len = RESPONSE_RING_SIZE - cleared; 506 506 } 507 507 508 508 memcpy(resp_save, resp, len); 509 - if(unlikely(wrap_len)) { 509 + if (unlikely(wrap_len)) { 510 510 resp_save += len / sizeof(*resp); 511 511 memcpy(resp_save, base, wrap_len); 512 512 } 513 513 514 514 resp_save = NULL; 515 - } else if(resp->cmd == TYPHOON_CMD_READ_MEDIA_STATUS) { 515 + } else if (resp->cmd == TYPHOON_CMD_READ_MEDIA_STATUS) { 516 516 typhoon_media_status(tp->dev, resp); 517 - } else if(resp->cmd == TYPHOON_CMD_HELLO_RESP) { 517 + } else if (resp->cmd == TYPHOON_CMD_HELLO_RESP) { 518 518 typhoon_hello(tp); 519 519 } else { 520 520 netdev_err(tp->dev, ··· 588 588 freeCmd = typhoon_num_free_cmd(tp); 589 589 freeResp = typhoon_num_free_resp(tp); 590 590 591 - if(freeCmd < num_cmd || freeResp < num_resp) { 591 + if (freeCmd < num_cmd || freeResp < num_resp) { 592 592 netdev_err(tp->dev, "no descs for cmd, had (needed) %d (%d) cmd, %d (%d) resp\n", 593 593 freeCmd, num_cmd, freeResp, num_resp); 594 594 err = -ENOMEM; 595 595 goto out; 596 596 } 597 597 598 - if(cmd->flags & TYPHOON_CMD_RESPOND) { 598 + if (cmd->flags & TYPHOON_CMD_RESPOND) { 599 599 /* If we're expecting a response, but the caller hasn't given 600 600 * us a place to put it, we'll provide one. 601 601 */ 602 602 tp->awaiting_resp = 1; 603 - if(resp == NULL) { 603 + if (resp == NULL) { 604 604 resp = &local_resp; 605 605 num_resp = 1; 606 606 } ··· 608 608 609 609 wrap_len = 0; 610 610 len = num_cmd * sizeof(*cmd); 611 - if(unlikely(ring->lastWrite + len > COMMAND_RING_SIZE)) { 611 + if (unlikely(ring->lastWrite + len > COMMAND_RING_SIZE)) { 612 612 wrap_len = ring->lastWrite + len - COMMAND_RING_SIZE; 613 613 len = COMMAND_RING_SIZE - ring->lastWrite; 614 614 } 615 615 616 616 memcpy(ring->ringBase + ring->lastWrite, cmd, len); 617 - if(unlikely(wrap_len)) { 617 + if (unlikely(wrap_len)) { 618 618 struct cmd_desc *wrap_ptr = cmd; 619 619 wrap_ptr += len / sizeof(*cmd); 620 620 memcpy(ring->ringBase, wrap_ptr, wrap_len); ··· 628 628 iowrite32(ring->lastWrite, tp->ioaddr + TYPHOON_REG_CMD_READY); 629 629 typhoon_post_pci_writes(tp->ioaddr); 630 630 631 - if((cmd->flags & TYPHOON_CMD_RESPOND) == 0) 631 + if ((cmd->flags & TYPHOON_CMD_RESPOND) == 0) 632 632 goto out; 633 633 634 634 /* Ugh. We'll be here about 8ms, spinning our thumbs, unable to ··· 648 648 * wait here. 649 649 */ 650 650 got_resp = 0; 651 - for(i = 0; i < TYPHOON_WAIT_TIMEOUT && !got_resp; i++) { 652 - if(indexes->respCleared != indexes->respReady) 651 + for (i = 0; i < TYPHOON_WAIT_TIMEOUT && !got_resp; i++) { 652 + if (indexes->respCleared != indexes->respReady) 653 653 got_resp = typhoon_process_response(tp, num_resp, 654 654 resp); 655 655 udelay(TYPHOON_UDELAY); 656 656 } 657 657 658 - if(!got_resp) { 658 + if (!got_resp) { 659 659 err = -ETIMEDOUT; 660 660 goto out; 661 661 } ··· 663 663 /* Collect the error response even if we don't care about the 664 664 * rest of the response 665 665 */ 666 - if(resp->flags & TYPHOON_RESP_ERROR) 666 + if (resp->flags & TYPHOON_RESP_ERROR) 667 667 err = -EIO; 668 668 669 669 out: 670 - if(tp->awaiting_resp) { 670 + if (tp->awaiting_resp) { 671 671 tp->awaiting_resp = 0; 672 672 smp_wmb(); 673 673 ··· 678 678 * time. So, check for it, and interrupt ourselves if this 679 679 * is the case. 680 680 */ 681 - if(indexes->respCleared != indexes->respReady) 681 + if (indexes->respCleared != indexes->respReady) 682 682 iowrite32(1, tp->ioaddr + TYPHOON_REG_SELF_INTERRUPT); 683 683 } 684 684 ··· 748 748 * between marking the queue awake and updating the cleared index. 749 749 * Just loop and it will appear. This comes from the acenic driver. 750 750 */ 751 - while(unlikely(typhoon_num_free_tx(txRing) < (numDesc + 2))) 751 + while (unlikely(typhoon_num_free_tx(txRing) < (numDesc + 2))) 752 752 smp_rmb(); 753 753 754 754 first_txd = (struct tx_desc *) (txRing->ringBase + txRing->lastWrite); ··· 760 760 first_txd->tx_addr = (u64)((unsigned long) skb); 761 761 first_txd->processFlags = 0; 762 762 763 - if(skb->ip_summed == CHECKSUM_PARTIAL) { 763 + if (skb->ip_summed == CHECKSUM_PARTIAL) { 764 764 /* The 3XP will figure out if this is UDP/TCP */ 765 765 first_txd->processFlags |= TYPHOON_TX_PF_TCP_CHKSUM; 766 766 first_txd->processFlags |= TYPHOON_TX_PF_UDP_CHKSUM; ··· 788 788 /* No need to worry about padding packet -- the firmware pads 789 789 * it with zeros to ETH_ZLEN for us. 790 790 */ 791 - if(skb_shinfo(skb)->nr_frags == 0) { 791 + if (skb_shinfo(skb)->nr_frags == 0) { 792 792 skb_dma = pci_map_single(tp->tx_pdev, skb->data, skb->len, 793 793 PCI_DMA_TODEVICE); 794 794 txd->flags = TYPHOON_FRAG_DESC | TYPHOON_DESC_VALID; ··· 840 840 */ 841 841 numDesc = MAX_SKB_FRAGS + TSO_NUM_DESCRIPTORS + 1; 842 842 843 - if(typhoon_num_free_tx(txRing) < (numDesc + 2)) { 843 + if (typhoon_num_free_tx(txRing) < (numDesc + 2)) { 844 844 netif_stop_queue(dev); 845 845 846 846 /* A Tx complete IRQ could have gotten between, making 847 847 * the ring free again. Only need to recheck here, since 848 848 * Tx is serialized. 849 849 */ 850 - if(typhoon_num_free_tx(txRing) >= (numDesc + 2)) 850 + if (typhoon_num_free_tx(txRing) >= (numDesc + 2)) 851 851 netif_wake_queue(dev); 852 852 } 853 853 ··· 863 863 __le16 filter; 864 864 865 865 filter = TYPHOON_RX_FILTER_DIRECTED | TYPHOON_RX_FILTER_BROADCAST; 866 - if(dev->flags & IFF_PROMISC) { 866 + if (dev->flags & IFF_PROMISC) { 867 867 filter |= TYPHOON_RX_FILTER_PROMISCOUS; 868 868 } else if ((netdev_mc_count(dev) > multicast_filter_limit) || 869 869 (dev->flags & IFF_ALLMULTI)) { ··· 905 905 906 906 INIT_COMMAND_WITH_RESPONSE(&xp_cmd, TYPHOON_CMD_READ_STATS); 907 907 err = typhoon_issue_command(tp, 1, &xp_cmd, 7, xp_resp); 908 - if(err < 0) 908 + if (err < 0) 909 909 return err; 910 910 911 911 /* 3Com's Linux driver uses txMultipleCollisions as it's ··· 953 953 struct net_device_stats *saved = &tp->stats_saved; 954 954 955 955 smp_rmb(); 956 - if(tp->card_state == Sleeping) 956 + if (tp->card_state == Sleeping) 957 957 return saved; 958 958 959 - if(typhoon_do_get_stats(tp) < 0) { 959 + if (typhoon_do_get_stats(tp) < 0) { 960 960 netdev_err(dev, "error getting stats\n"); 961 961 return saved; 962 962 } ··· 973 973 struct resp_desc xp_resp[3]; 974 974 975 975 smp_rmb(); 976 - if(tp->card_state == Sleeping) { 976 + if (tp->card_state == Sleeping) { 977 977 strlcpy(info->fw_version, "Sleep image", 978 978 sizeof(info->fw_version)); 979 979 } else { 980 980 INIT_COMMAND_WITH_RESPONSE(&xp_cmd, TYPHOON_CMD_READ_VERSIONS); 981 - if(typhoon_issue_command(tp, 1, &xp_cmd, 3, xp_resp) < 0) { 981 + if (typhoon_issue_command(tp, 1, &xp_cmd, 3, xp_resp) < 0) { 982 982 strlcpy(info->fw_version, "Unknown runtime", 983 983 sizeof(info->fw_version)); 984 984 } else { ··· 1025 1025 break; 1026 1026 } 1027 1027 1028 - if(tp->capabilities & TYPHOON_FIBER) { 1028 + if (tp->capabilities & TYPHOON_FIBER) { 1029 1029 supported |= SUPPORTED_FIBRE; 1030 1030 advertising |= ADVERTISED_FIBRE; 1031 1031 cmd->base.port = PORT_FIBRE; ··· 1042 1042 cmd->base.speed = tp->speed; 1043 1043 cmd->base.duplex = tp->duplex; 1044 1044 cmd->base.phy_address = 0; 1045 - if(tp->xcvr_select == TYPHOON_XCVR_AUTONEG) 1045 + if (tp->xcvr_select == TYPHOON_XCVR_AUTONEG) 1046 1046 cmd->base.autoneg = AUTONEG_ENABLE; 1047 1047 else 1048 1048 cmd->base.autoneg = AUTONEG_DISABLE; ··· 1090 1090 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_XCVR_SELECT); 1091 1091 xp_cmd.parm1 = xcvr; 1092 1092 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1093 - if(err < 0) 1093 + if (err < 0) 1094 1094 goto out; 1095 1095 1096 1096 tp->xcvr_select = xcvr; ··· 1113 1113 1114 1114 wol->supported = WAKE_PHY | WAKE_MAGIC; 1115 1115 wol->wolopts = 0; 1116 - if(tp->wol_events & TYPHOON_WAKE_LINK_EVENT) 1116 + if (tp->wol_events & TYPHOON_WAKE_LINK_EVENT) 1117 1117 wol->wolopts |= WAKE_PHY; 1118 - if(tp->wol_events & TYPHOON_WAKE_MAGIC_PKT) 1118 + if (tp->wol_events & TYPHOON_WAKE_MAGIC_PKT) 1119 1119 wol->wolopts |= WAKE_MAGIC; 1120 1120 memset(&wol->sopass, 0, sizeof(wol->sopass)); 1121 1121 } ··· 1125 1125 { 1126 1126 struct typhoon *tp = netdev_priv(dev); 1127 1127 1128 - if(wol->wolopts & ~(WAKE_PHY | WAKE_MAGIC)) 1128 + if (wol->wolopts & ~(WAKE_PHY | WAKE_MAGIC)) 1129 1129 return -EINVAL; 1130 1130 1131 1131 tp->wol_events = 0; 1132 - if(wol->wolopts & WAKE_PHY) 1132 + if (wol->wolopts & WAKE_PHY) 1133 1133 tp->wol_events |= TYPHOON_WAKE_LINK_EVENT; 1134 - if(wol->wolopts & WAKE_MAGIC) 1134 + if (wol->wolopts & WAKE_MAGIC) 1135 1135 tp->wol_events |= TYPHOON_WAKE_MAGIC_PKT; 1136 1136 1137 1137 return 0; ··· 1162 1162 { 1163 1163 int i, err = 0; 1164 1164 1165 - for(i = 0; i < TYPHOON_WAIT_TIMEOUT; i++) { 1166 - if(ioread32(ioaddr + TYPHOON_REG_INTR_STATUS) & 1165 + for (i = 0; i < TYPHOON_WAIT_TIMEOUT; i++) { 1166 + if (ioread32(ioaddr + TYPHOON_REG_INTR_STATUS) & 1167 1167 TYPHOON_INTR_BOOTCMD) 1168 1168 goto out; 1169 1169 udelay(TYPHOON_UDELAY); ··· 1355 1355 */ 1356 1356 err = -ENOMEM; 1357 1357 dpage = pci_alloc_consistent(pdev, PAGE_SIZE, &dpage_dma); 1358 - if(!dpage) { 1358 + if (!dpage) { 1359 1359 netdev_err(tp->dev, "no DMA mem for firmware\n"); 1360 1360 goto err_out; 1361 1361 } ··· 1368 1368 ioaddr + TYPHOON_REG_INTR_MASK); 1369 1369 1370 1370 err = -ETIMEDOUT; 1371 - if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) { 1371 + if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) { 1372 1372 netdev_err(tp->dev, "card ready timeout\n"); 1373 1373 goto err_out_irq; 1374 1374 } ··· 1397 1397 * last write to the command register to post, so 1398 1398 * we don't need a typhoon_post_pci_writes() after it. 1399 1399 */ 1400 - for(i = 0; i < numSections; i++) { 1400 + for (i = 0; i < numSections; i++) { 1401 1401 sHdr = (struct typhoon_section_header *) image_data; 1402 1402 image_data += sizeof(struct typhoon_section_header); 1403 1403 load_addr = le32_to_cpu(sHdr->startAddr); 1404 1404 section_len = le32_to_cpu(sHdr->len); 1405 1405 1406 - while(section_len) { 1406 + while (section_len) { 1407 1407 len = min_t(u32, section_len, PAGE_SIZE); 1408 1408 1409 - if(typhoon_wait_interrupt(ioaddr) < 0 || 1409 + if (typhoon_wait_interrupt(ioaddr) < 0 || 1410 1410 ioread32(ioaddr + TYPHOON_REG_STATUS) != 1411 1411 TYPHOON_STATUS_WAITING_FOR_SEGMENT) { 1412 1412 netdev_err(tp->dev, "segment ready timeout\n"); ··· 1439 1439 } 1440 1440 } 1441 1441 1442 - if(typhoon_wait_interrupt(ioaddr) < 0 || 1442 + if (typhoon_wait_interrupt(ioaddr) < 0 || 1443 1443 ioread32(ioaddr + TYPHOON_REG_STATUS) != 1444 1444 TYPHOON_STATUS_WAITING_FOR_SEGMENT) { 1445 1445 netdev_err(tp->dev, "final segment ready timeout\n"); ··· 1448 1448 1449 1449 iowrite32(TYPHOON_BOOTCMD_DNLD_COMPLETE, ioaddr + TYPHOON_REG_COMMAND); 1450 1450 1451 - if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_BOOT) < 0) { 1451 + if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_BOOT) < 0) { 1452 1452 netdev_err(tp->dev, "boot ready timeout, status 0x%0x\n", 1453 1453 ioread32(ioaddr + TYPHOON_REG_STATUS)); 1454 1454 goto err_out_irq; ··· 1471 1471 { 1472 1472 void __iomem *ioaddr = tp->ioaddr; 1473 1473 1474 - if(typhoon_wait_status(ioaddr, initial_status) < 0) { 1474 + if (typhoon_wait_status(ioaddr, initial_status) < 0) { 1475 1475 netdev_err(tp->dev, "boot ready timeout\n"); 1476 1476 goto out_timeout; 1477 1477 } ··· 1482 1482 iowrite32(TYPHOON_BOOTCMD_REG_BOOT_RECORD, 1483 1483 ioaddr + TYPHOON_REG_COMMAND); 1484 1484 1485 - if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_RUNNING) < 0) { 1485 + if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_RUNNING) < 0) { 1486 1486 netdev_err(tp->dev, "boot finish timeout (status 0x%x)\n", 1487 1487 ioread32(ioaddr + TYPHOON_REG_STATUS)); 1488 1488 goto out_timeout; ··· 1512 1512 int dma_len; 1513 1513 int type; 1514 1514 1515 - while(lastRead != le32_to_cpu(*index)) { 1515 + while (lastRead != le32_to_cpu(*index)) { 1516 1516 tx = (struct tx_desc *) (txRing->ringBase + lastRead); 1517 1517 type = tx->flags & TYPHOON_TYPE_MASK; 1518 1518 1519 - if(type == TYPHOON_TX_DESC) { 1519 + if (type == TYPHOON_TX_DESC) { 1520 1520 /* This tx_desc describes a packet. 1521 1521 */ 1522 1522 unsigned long ptr = tx->tx_addr; 1523 1523 struct sk_buff *skb = (struct sk_buff *) ptr; 1524 1524 dev_kfree_skb_irq(skb); 1525 - } else if(type == TYPHOON_FRAG_DESC) { 1525 + } else if (type == TYPHOON_FRAG_DESC) { 1526 1526 /* This tx_desc describes a memory mapping. Free it. 1527 1527 */ 1528 1528 skb_dma = (dma_addr_t) le32_to_cpu(tx->frag.addr); ··· 1547 1547 1548 1548 /* This will need changing if we start to use the Hi Tx ring. */ 1549 1549 lastRead = typhoon_clean_tx(tp, txRing, index); 1550 - if(netif_queue_stopped(tp->dev) && typhoon_num_free(txRing->lastWrite, 1550 + if (netif_queue_stopped(tp->dev) && typhoon_num_free(txRing->lastWrite, 1551 1551 lastRead, TXLO_ENTRIES) > (numDesc + 2)) 1552 1552 netif_wake_queue(tp->dev); 1553 1553 ··· 1563 1563 struct basic_ring *ring = &tp->rxBuffRing; 1564 1564 struct rx_free *r; 1565 1565 1566 - if((ring->lastWrite + sizeof(*r)) % (RXFREE_ENTRIES * sizeof(*r)) == 1566 + if ((ring->lastWrite + sizeof(*r)) % (RXFREE_ENTRIES * sizeof(*r)) == 1567 1567 le32_to_cpu(indexes->rxBuffCleared)) { 1568 1568 /* no room in ring, just drop the skb 1569 1569 */ ··· 1594 1594 1595 1595 rxb->skb = NULL; 1596 1596 1597 - if((ring->lastWrite + sizeof(*r)) % (RXFREE_ENTRIES * sizeof(*r)) == 1597 + if ((ring->lastWrite + sizeof(*r)) % (RXFREE_ENTRIES * sizeof(*r)) == 1598 1598 le32_to_cpu(indexes->rxBuffCleared)) 1599 1599 return -ENOMEM; 1600 1600 1601 1601 skb = netdev_alloc_skb(tp->dev, PKT_BUF_SZ); 1602 - if(!skb) 1602 + if (!skb) 1603 1603 return -ENOMEM; 1604 1604 1605 1605 #if 0 ··· 1646 1646 received = 0; 1647 1647 local_ready = le32_to_cpu(*ready); 1648 1648 rxaddr = le32_to_cpu(*cleared); 1649 - while(rxaddr != local_ready && budget > 0) { 1649 + while (rxaddr != local_ready && budget > 0) { 1650 1650 rx = (struct rx_desc *) (rxRing->ringBase + rxaddr); 1651 1651 idx = rx->addr; 1652 1652 rxb = &tp->rxbuffers[idx]; ··· 1655 1655 1656 1656 typhoon_inc_rx_index(&rxaddr, 1); 1657 1657 1658 - if(rx->flags & TYPHOON_RX_ERROR) { 1658 + if (rx->flags & TYPHOON_RX_ERROR) { 1659 1659 typhoon_recycle_rx_skb(tp, idx); 1660 1660 continue; 1661 1661 } 1662 1662 1663 1663 pkt_len = le16_to_cpu(rx->frameLen); 1664 1664 1665 - if(pkt_len < rx_copybreak && 1665 + if (pkt_len < rx_copybreak && 1666 1666 (new_skb = netdev_alloc_skb(tp->dev, pkt_len + 2)) != NULL) { 1667 1667 skb_reserve(new_skb, 2); 1668 1668 pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, ··· 1684 1684 new_skb->protocol = eth_type_trans(new_skb, tp->dev); 1685 1685 csum_bits = rx->rxStatus & (TYPHOON_RX_IP_CHK_GOOD | 1686 1686 TYPHOON_RX_UDP_CHK_GOOD | TYPHOON_RX_TCP_CHK_GOOD); 1687 - if(csum_bits == 1687 + if (csum_bits == 1688 1688 (TYPHOON_RX_IP_CHK_GOOD | TYPHOON_RX_TCP_CHK_GOOD) || 1689 1689 csum_bits == 1690 1690 (TYPHOON_RX_IP_CHK_GOOD | TYPHOON_RX_UDP_CHK_GOOD)) { ··· 1710 1710 { 1711 1711 u32 i; 1712 1712 1713 - for(i = 0; i < RXENT_ENTRIES; i++) { 1713 + for (i = 0; i < RXENT_ENTRIES; i++) { 1714 1714 struct rxbuff_ent *rxb = &tp->rxbuffers[i]; 1715 - if(rxb->skb) 1715 + if (rxb->skb) 1716 1716 continue; 1717 - if(typhoon_alloc_rx_skb(tp, i) < 0) 1717 + if (typhoon_alloc_rx_skb(tp, i) < 0) 1718 1718 break; 1719 1719 } 1720 1720 } ··· 1727 1727 int work_done; 1728 1728 1729 1729 rmb(); 1730 - if(!tp->awaiting_resp && indexes->respReady != indexes->respCleared) 1730 + if (!tp->awaiting_resp && indexes->respReady != indexes->respCleared) 1731 1731 typhoon_process_response(tp, 0, NULL); 1732 1732 1733 - if(le32_to_cpu(indexes->txLoCleared) != tp->txLoRing.lastRead) 1733 + if (le32_to_cpu(indexes->txLoCleared) != tp->txLoRing.lastRead) 1734 1734 typhoon_tx_complete(tp, &tp->txLoRing, &indexes->txLoCleared); 1735 1735 1736 1736 work_done = 0; 1737 1737 1738 - if(indexes->rxHiCleared != indexes->rxHiReady) { 1738 + if (indexes->rxHiCleared != indexes->rxHiReady) { 1739 1739 work_done += typhoon_rx(tp, &tp->rxHiRing, &indexes->rxHiReady, 1740 1740 &indexes->rxHiCleared, budget); 1741 1741 } 1742 1742 1743 - if(indexes->rxLoCleared != indexes->rxLoReady) { 1743 + if (indexes->rxLoCleared != indexes->rxLoReady) { 1744 1744 work_done += typhoon_rx(tp, &tp->rxLoRing, &indexes->rxLoReady, 1745 1745 &indexes->rxLoCleared, budget - work_done); 1746 1746 } 1747 1747 1748 - if(le32_to_cpu(indexes->rxBuffCleared) == tp->rxBuffRing.lastWrite) { 1748 + if (le32_to_cpu(indexes->rxBuffCleared) == tp->rxBuffRing.lastWrite) { 1749 1749 /* rxBuff ring is empty, try to fill it. */ 1750 1750 typhoon_fill_free_ring(tp); 1751 1751 } ··· 1769 1769 u32 intr_status; 1770 1770 1771 1771 intr_status = ioread32(ioaddr + TYPHOON_REG_INTR_STATUS); 1772 - if(!(intr_status & TYPHOON_INTR_HOST_INT)) 1772 + if (!(intr_status & TYPHOON_INTR_HOST_INT)) 1773 1773 return IRQ_NONE; 1774 1774 1775 1775 iowrite32(intr_status, ioaddr + TYPHOON_REG_INTR_STATUS); ··· 1789 1789 { 1790 1790 u32 i; 1791 1791 1792 - for(i = 0; i < RXENT_ENTRIES; i++) { 1792 + for (i = 0; i < RXENT_ENTRIES; i++) { 1793 1793 struct rxbuff_ent *rxb = &tp->rxbuffers[i]; 1794 - if(rxb->skb) { 1794 + if (rxb->skb) { 1795 1795 pci_unmap_single(tp->pdev, rxb->dma_addr, PKT_BUF_SZ, 1796 1796 PCI_DMA_FROMDEVICE); 1797 1797 dev_kfree_skb(rxb->skb); ··· 1811 1811 INIT_COMMAND_WITH_RESPONSE(&xp_cmd, TYPHOON_CMD_ENABLE_WAKE_EVENTS); 1812 1812 xp_cmd.parm1 = events; 1813 1813 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1814 - if(err < 0) { 1814 + if (err < 0) { 1815 1815 netdev_err(tp->dev, "typhoon_sleep(): wake events cmd err %d\n", 1816 1816 err); 1817 1817 return err; ··· 1819 1819 1820 1820 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_GOTO_SLEEP); 1821 1821 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1822 - if(err < 0) { 1822 + if (err < 0) { 1823 1823 netdev_err(tp->dev, "typhoon_sleep(): sleep cmd err %d\n", err); 1824 1824 return err; 1825 1825 } 1826 1826 1827 - if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_SLEEPING) < 0) 1827 + if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_SLEEPING) < 0) 1828 1828 return -ETIMEDOUT; 1829 1829 1830 1830 /* Since we cannot monitor the status of the link while sleeping, ··· 1851 1851 * the old firmware pay for the reset. 1852 1852 */ 1853 1853 iowrite32(TYPHOON_BOOTCMD_WAKEUP, ioaddr + TYPHOON_REG_COMMAND); 1854 - if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) < 0 || 1854 + if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_WAITING_FOR_HOST) < 0 || 1855 1855 (tp->capabilities & TYPHOON_WAKEUP_NEEDS_RESET)) 1856 1856 return typhoon_reset(ioaddr, wait_type); 1857 1857 ··· 1870 1870 typhoon_fill_free_ring(tp); 1871 1871 1872 1872 err = typhoon_download_firmware(tp); 1873 - if(err < 0) { 1873 + if (err < 0) { 1874 1874 netdev_err(tp->dev, "cannot load runtime on 3XP\n"); 1875 1875 goto error_out; 1876 1876 } 1877 1877 1878 - if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_BOOT) < 0) { 1878 + if (typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_BOOT) < 0) { 1879 1879 netdev_err(tp->dev, "cannot boot 3XP\n"); 1880 1880 err = -EIO; 1881 1881 goto error_out; ··· 1884 1884 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_SET_MAX_PKT_SIZE); 1885 1885 xp_cmd.parm1 = cpu_to_le16(PKT_BUF_SZ); 1886 1886 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1887 - if(err < 0) 1887 + if (err < 0) 1888 1888 goto error_out; 1889 1889 1890 1890 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_SET_MAC_ADDRESS); 1891 1891 xp_cmd.parm1 = cpu_to_le16(ntohs(*(__be16 *)&dev->dev_addr[0])); 1892 1892 xp_cmd.parm2 = cpu_to_le32(ntohl(*(__be32 *)&dev->dev_addr[2])); 1893 1893 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1894 - if(err < 0) 1894 + if (err < 0) 1895 1895 goto error_out; 1896 1896 1897 1897 /* Disable IRQ coalescing -- we can reenable it when 3Com gives ··· 1900 1900 INIT_COMMAND_WITH_RESPONSE(&xp_cmd, TYPHOON_CMD_IRQ_COALESCE_CTRL); 1901 1901 xp_cmd.parm1 = 0; 1902 1902 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1903 - if(err < 0) 1903 + if (err < 0) 1904 1904 goto error_out; 1905 1905 1906 1906 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_XCVR_SELECT); 1907 1907 xp_cmd.parm1 = tp->xcvr_select; 1908 1908 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1909 - if(err < 0) 1909 + if (err < 0) 1910 1910 goto error_out; 1911 1911 1912 1912 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_VLAN_TYPE_WRITE); 1913 1913 xp_cmd.parm1 = cpu_to_le16(ETH_P_8021Q); 1914 1914 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1915 - if(err < 0) 1915 + if (err < 0) 1916 1916 goto error_out; 1917 1917 1918 1918 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_SET_OFFLOAD_TASKS); 1919 1919 xp_cmd.parm2 = tp->offload; 1920 1920 xp_cmd.parm3 = tp->offload; 1921 1921 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1922 - if(err < 0) 1922 + if (err < 0) 1923 1923 goto error_out; 1924 1924 1925 1925 typhoon_set_rx_mode(dev); 1926 1926 1927 1927 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_TX_ENABLE); 1928 1928 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1929 - if(err < 0) 1929 + if (err < 0) 1930 1930 goto error_out; 1931 1931 1932 1932 INIT_COMMAND_WITH_RESPONSE(&xp_cmd, TYPHOON_CMD_RX_ENABLE); 1933 1933 err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1934 - if(err < 0) 1934 + if (err < 0) 1935 1935 goto error_out; 1936 1936 1937 1937 tp->card_state = Running; ··· 1971 1971 /* Wait 1/2 sec for any outstanding transmits to occur 1972 1972 * We'll cleanup after the reset if this times out. 1973 1973 */ 1974 - for(i = 0; i < TYPHOON_WAIT_TIMEOUT; i++) { 1975 - if(indexes->txLoCleared == cpu_to_le32(txLo->lastWrite)) 1974 + for (i = 0; i < TYPHOON_WAIT_TIMEOUT; i++) { 1975 + if (indexes->txLoCleared == cpu_to_le32(txLo->lastWrite)) 1976 1976 break; 1977 1977 udelay(TYPHOON_UDELAY); 1978 1978 } 1979 1979 1980 - if(i == TYPHOON_WAIT_TIMEOUT) 1980 + if (i == TYPHOON_WAIT_TIMEOUT) 1981 1981 netdev_err(tp->dev, "halt timed out waiting for Tx to complete\n"); 1982 1982 1983 1983 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_TX_DISABLE); ··· 1994 1994 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_HALT); 1995 1995 typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); 1996 1996 1997 - if(typhoon_wait_status(ioaddr, TYPHOON_STATUS_HALTED) < 0) 1997 + if (typhoon_wait_status(ioaddr, TYPHOON_STATUS_HALTED) < 0) 1998 1998 netdev_err(tp->dev, "timed out waiting for 3XP to halt\n"); 1999 1999 2000 - if(typhoon_reset(ioaddr, wait_type) < 0) { 2000 + if (typhoon_reset(ioaddr, wait_type) < 0) { 2001 2001 netdev_err(tp->dev, "unable to reset 3XP\n"); 2002 2002 return -ETIMEDOUT; 2003 2003 } 2004 2004 2005 2005 /* cleanup any outstanding Tx packets */ 2006 - if(indexes->txLoCleared != cpu_to_le32(txLo->lastWrite)) { 2006 + if (indexes->txLoCleared != cpu_to_le32(txLo->lastWrite)) { 2007 2007 indexes->txLoCleared = cpu_to_le32(txLo->lastWrite); 2008 2008 typhoon_clean_tx(tp, &tp->txLoRing, &indexes->txLoCleared); 2009 2009 } ··· 2016 2016 { 2017 2017 struct typhoon *tp = netdev_priv(dev); 2018 2018 2019 - if(typhoon_reset(tp->ioaddr, WaitNoSleep) < 0) { 2019 + if (typhoon_reset(tp->ioaddr, WaitNoSleep) < 0) { 2020 2020 netdev_warn(dev, "could not reset in tx timeout\n"); 2021 2021 goto truly_dead; 2022 2022 } ··· 2025 2025 typhoon_clean_tx(tp, &tp->txLoRing, &tp->indexes->txLoCleared); 2026 2026 typhoon_free_rx_rings(tp); 2027 2027 2028 - if(typhoon_start_runtime(tp) < 0) { 2028 + if (typhoon_start_runtime(tp) < 0) { 2029 2029 netdev_err(dev, "could not start runtime in tx timeout\n"); 2030 2030 goto truly_dead; 2031 2031 } ··· 2050 2050 goto out; 2051 2051 2052 2052 err = typhoon_wakeup(tp, WaitSleep); 2053 - if(err < 0) { 2053 + if (err < 0) { 2054 2054 netdev_err(dev, "unable to wakeup device\n"); 2055 2055 goto out_sleep; 2056 2056 } 2057 2057 2058 2058 err = request_irq(dev->irq, typhoon_interrupt, IRQF_SHARED, 2059 2059 dev->name, dev); 2060 - if(err < 0) 2060 + if (err < 0) 2061 2061 goto out_sleep; 2062 2062 2063 2063 napi_enable(&tp->napi); 2064 2064 2065 2065 err = typhoon_start_runtime(tp); 2066 - if(err < 0) { 2066 + if (err < 0) { 2067 2067 napi_disable(&tp->napi); 2068 2068 goto out_irq; 2069 2069 } ··· 2075 2075 free_irq(dev->irq, dev); 2076 2076 2077 2077 out_sleep: 2078 - if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) { 2078 + if (typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) { 2079 2079 netdev_err(dev, "unable to reboot into sleep img\n"); 2080 2080 typhoon_reset(tp->ioaddr, NoWait); 2081 2081 goto out; 2082 2082 } 2083 2083 2084 - if(typhoon_sleep(tp, PCI_D3hot, 0) < 0) 2084 + if (typhoon_sleep(tp, PCI_D3hot, 0) < 0) 2085 2085 netdev_err(dev, "unable to go back to sleep\n"); 2086 2086 2087 2087 out: ··· 2096 2096 netif_stop_queue(dev); 2097 2097 napi_disable(&tp->napi); 2098 2098 2099 - if(typhoon_stop_runtime(tp, WaitSleep) < 0) 2099 + if (typhoon_stop_runtime(tp, WaitSleep) < 0) 2100 2100 netdev_err(dev, "unable to stop runtime\n"); 2101 2101 2102 2102 /* Make sure there is no irq handler running on a different CPU. */ ··· 2105 2105 typhoon_free_rx_rings(tp); 2106 2106 typhoon_init_rings(tp); 2107 2107 2108 - if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) 2108 + if (typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) 2109 2109 netdev_err(dev, "unable to boot sleep image\n"); 2110 2110 2111 - if(typhoon_sleep(tp, PCI_D3hot, 0) < 0) 2111 + if (typhoon_sleep(tp, PCI_D3hot, 0) < 0) 2112 2112 netdev_err(dev, "unable to put card to sleep\n"); 2113 2113 2114 2114 return 0; ··· 2123 2123 2124 2124 /* If we're down, resume when we are upped. 2125 2125 */ 2126 - if(!netif_running(dev)) 2126 + if (!netif_running(dev)) 2127 2127 return 0; 2128 2128 2129 - if(typhoon_wakeup(tp, WaitNoSleep) < 0) { 2129 + if (typhoon_wakeup(tp, WaitNoSleep) < 0) { 2130 2130 netdev_err(dev, "critical: could not wake up in resume\n"); 2131 2131 goto reset; 2132 2132 } 2133 2133 2134 - if(typhoon_start_runtime(tp) < 0) { 2134 + if (typhoon_start_runtime(tp) < 0) { 2135 2135 netdev_err(dev, "critical: could not start runtime in resume\n"); 2136 2136 goto reset; 2137 2137 } ··· 2153 2153 2154 2154 /* If we're down, we're already suspended. 2155 2155 */ 2156 - if(!netif_running(dev)) 2156 + if (!netif_running(dev)) 2157 2157 return 0; 2158 2158 2159 2159 /* TYPHOON_OFFLOAD_VLAN is always on now, so this doesn't work */ 2160 - if(tp->wol_events & TYPHOON_WAKE_MAGIC_PKT) 2160 + if (tp->wol_events & TYPHOON_WAKE_MAGIC_PKT) 2161 2161 netdev_warn(dev, "cannot do WAKE_MAGIC with VLAN offloading\n"); 2162 2162 2163 2163 netif_device_detach(dev); 2164 2164 2165 - if(typhoon_stop_runtime(tp, WaitNoSleep) < 0) { 2165 + if (typhoon_stop_runtime(tp, WaitNoSleep) < 0) { 2166 2166 netdev_err(dev, "unable to stop runtime\n"); 2167 2167 goto need_resume; 2168 2168 } ··· 2170 2170 typhoon_free_rx_rings(tp); 2171 2171 typhoon_init_rings(tp); 2172 2172 2173 - if(typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) { 2173 + if (typhoon_boot_3XP(tp, TYPHOON_STATUS_WAITING_FOR_HOST) < 0) { 2174 2174 netdev_err(dev, "unable to boot sleep image\n"); 2175 2175 goto need_resume; 2176 2176 } ··· 2178 2178 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_SET_MAC_ADDRESS); 2179 2179 xp_cmd.parm1 = cpu_to_le16(ntohs(*(__be16 *)&dev->dev_addr[0])); 2180 2180 xp_cmd.parm2 = cpu_to_le32(ntohl(*(__be32 *)&dev->dev_addr[2])); 2181 - if(typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL) < 0) { 2181 + if (typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL) < 0) { 2182 2182 netdev_err(dev, "unable to set mac address in suspend\n"); 2183 2183 goto need_resume; 2184 2184 } 2185 2185 2186 2186 INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_SET_RX_FILTER); 2187 2187 xp_cmd.parm1 = TYPHOON_RX_FILTER_DIRECTED | TYPHOON_RX_FILTER_BROADCAST; 2188 - if(typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL) < 0) { 2188 + if (typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL) < 0) { 2189 2189 netdev_err(dev, "unable to set rx filter in suspend\n"); 2190 2190 goto need_resume; 2191 2191 } 2192 2192 2193 - if(typhoon_sleep(tp, pci_choose_state(pdev, state), tp->wol_events) < 0) { 2193 + if (typhoon_sleep(tp, pci_choose_state(pdev, state), tp->wol_events) < 0) { 2194 2194 netdev_err(dev, "unable to put card to sleep\n"); 2195 2195 goto need_resume; 2196 2196 } ··· 2210 2210 int mode = 0; 2211 2211 u32 val; 2212 2212 2213 - if(!ioaddr) 2213 + if (!ioaddr) 2214 2214 goto out; 2215 2215 2216 - if(ioread32(ioaddr + TYPHOON_REG_STATUS) != 2216 + if (ioread32(ioaddr + TYPHOON_REG_STATUS) != 2217 2217 TYPHOON_STATUS_WAITING_FOR_HOST) 2218 2218 goto out_unmap; 2219 2219 ··· 2226 2226 * The 50usec delay is arbitrary -- it could probably be smaller. 2227 2227 */ 2228 2228 val = ioread32(ioaddr + TYPHOON_REG_INTR_STATUS); 2229 - if((val & TYPHOON_INTR_SELF) == 0) { 2229 + if ((val & TYPHOON_INTR_SELF) == 0) { 2230 2230 iowrite32(1, ioaddr + TYPHOON_REG_SELF_INTERRUPT); 2231 2231 ioread32(ioaddr + TYPHOON_REG_INTR_STATUS); 2232 2232 udelay(50); 2233 2233 val = ioread32(ioaddr + TYPHOON_REG_INTR_STATUS); 2234 - if(val & TYPHOON_INTR_SELF) 2234 + if (val & TYPHOON_INTR_SELF) 2235 2235 mode = 1; 2236 2236 } 2237 2237 ··· 2244 2244 pci_iounmap(pdev, ioaddr); 2245 2245 2246 2246 out: 2247 - if(!mode) 2247 + if (!mode) 2248 2248 pr_info("%s: falling back to port IO\n", pci_name(pdev)); 2249 2249 return mode; 2250 2250 } ··· 2275 2275 const char *err_msg; 2276 2276 2277 2277 dev = alloc_etherdev(sizeof(*tp)); 2278 - if(dev == NULL) { 2278 + if (dev == NULL) { 2279 2279 err_msg = "unable to alloc new net device"; 2280 2280 err = -ENOMEM; 2281 2281 goto error_out; ··· 2283 2283 SET_NETDEV_DEV(dev, &pdev->dev); 2284 2284 2285 2285 err = pci_enable_device(pdev); 2286 - if(err < 0) { 2286 + if (err < 0) { 2287 2287 err_msg = "unable to enable device"; 2288 2288 goto error_out_dev; 2289 2289 } 2290 2290 2291 2291 err = pci_set_mwi(pdev); 2292 - if(err < 0) { 2292 + if (err < 0) { 2293 2293 err_msg = "unable to set MWI"; 2294 2294 goto error_out_disable; 2295 2295 } 2296 2296 2297 2297 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2298 - if(err < 0) { 2298 + if (err < 0) { 2299 2299 err_msg = "No usable DMA configuration"; 2300 2300 goto error_out_mwi; 2301 2301 } 2302 2302 2303 2303 /* sanity checks on IO and MMIO BARs 2304 2304 */ 2305 - if(!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) { 2305 + if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) { 2306 2306 err_msg = "region #1 not a PCI IO resource, aborting"; 2307 2307 err = -ENODEV; 2308 2308 goto error_out_mwi; 2309 2309 } 2310 - if(pci_resource_len(pdev, 0) < 128) { 2310 + if (pci_resource_len(pdev, 0) < 128) { 2311 2311 err_msg = "Invalid PCI IO region size, aborting"; 2312 2312 err = -ENODEV; 2313 2313 goto error_out_mwi; 2314 2314 } 2315 - if(!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 2315 + if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { 2316 2316 err_msg = "region #1 not a PCI MMIO resource, aborting"; 2317 2317 err = -ENODEV; 2318 2318 goto error_out_mwi; 2319 2319 } 2320 - if(pci_resource_len(pdev, 1) < 128) { 2320 + if (pci_resource_len(pdev, 1) < 128) { 2321 2321 err_msg = "Invalid PCI MMIO region size, aborting"; 2322 2322 err = -ENODEV; 2323 2323 goto error_out_mwi; 2324 2324 } 2325 2325 2326 2326 err = pci_request_regions(pdev, KBUILD_MODNAME); 2327 - if(err < 0) { 2327 + if (err < 0) { 2328 2328 err_msg = "could not request regions"; 2329 2329 goto error_out_mwi; 2330 2330 } 2331 2331 2332 2332 /* map our registers 2333 2333 */ 2334 - if(use_mmio != 0 && use_mmio != 1) 2334 + if (use_mmio != 0 && use_mmio != 1) 2335 2335 use_mmio = typhoon_test_mmio(pdev); 2336 2336 2337 2337 ioaddr = pci_iomap(pdev, use_mmio, 128); ··· 2345 2345 */ 2346 2346 shared = pci_alloc_consistent(pdev, sizeof(struct typhoon_shared), 2347 2347 &shared_dma); 2348 - if(!shared) { 2348 + if (!shared) { 2349 2349 err_msg = "could not allocate DMA memory"; 2350 2350 err = -ENOMEM; 2351 2351 goto error_out_remap; ··· 2425 2425 * seem to need a little extra help to get started. Since we don't 2426 2426 * know how to nudge it along, just kick it. 2427 2427 */ 2428 - if(xp_resp[0].numDesc != 0) 2428 + if (xp_resp[0].numDesc != 0) 2429 2429 tp->capabilities |= TYPHOON_WAKEUP_NEEDS_RESET; 2430 2430 2431 2431 err = typhoon_sleep(tp, PCI_D3hot, 0); ··· 2470 2470 /* xp_resp still contains the response to the READ_VERSIONS command. 2471 2471 * For debugging, let the user know what version he has. 2472 2472 */ 2473 - if(xp_resp[0].numDesc == 0) { 2473 + if (xp_resp[0].numDesc == 0) { 2474 2474 /* This is the Typhoon 1.0 type Sleep Image, last 16 bits 2475 2475 * of version is Month/Day of build. 2476 2476 */ 2477 2477 u16 monthday = le32_to_cpu(xp_resp[0].parm2) & 0xffff; 2478 2478 netdev_info(dev, "Typhoon 1.0 Sleep Image built %02u/%02u/2000\n", 2479 2479 monthday >> 8, monthday & 0xff); 2480 - } else if(xp_resp[0].numDesc == 2) { 2480 + } else if (xp_resp[0].numDesc == 2) { 2481 2481 /* This is the Typhoon 1.1+ type Sleep Image 2482 2482 */ 2483 2483 u32 sleep_ver = le32_to_cpu(xp_resp[0].parm2);
+2 -2
drivers/net/ethernet/3com/typhoon.h
··· 366 366 memset(_ptr, 0, sizeof(struct cmd_desc)); \ 367 367 _ptr->flags = TYPHOON_CMD_DESC | TYPHOON_DESC_VALID; \ 368 368 _ptr->cmd = command; \ 369 - } while(0) 369 + } while (0) 370 370 371 371 /* We set seqNo to 1 if we're expecting a response from this command */ 372 372 #define INIT_COMMAND_WITH_RESPONSE(x, command) \ ··· 376 376 _ptr->flags |= TYPHOON_DESC_VALID; \ 377 377 _ptr->cmd = command; \ 378 378 _ptr->seqNo = 1; \ 379 - } while(0) 379 + } while (0) 380 380 381 381 /* TYPHOON_CMD_SET_RX_FILTER filter bits (cmd.parm1) 382 382 */