Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

net: phy: broadcom: add support for BCM54811 PHY

The BCM54811 PHY shares many similarities with the already supported BCM54810
PHY but additionally requires some semi-unique configuration.

Signed-off-by: Kevin Lo <kevlo@kevlo.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Kevin Lo and committed by
David S. Miller
b0ed0bbf d42d118c

+53 -5
+51 -5
drivers/net/phy/broadcom.c
··· 195 195 if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 && 196 196 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 && 197 197 BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M && 198 - BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54810) 198 + BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54810 && 199 + BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811) 199 200 return; 200 201 201 202 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3); ··· 215 214 clk125en = false; 216 215 } else { 217 216 if (phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED) { 218 - /* Here, bit 0 _enables_ CLK125 when set */ 219 - val &= ~BCM54XX_SHD_SCR3_DEF_CLK125; 217 + if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM54811) { 218 + /* Here, bit 0 _enables_ CLK125 when set */ 219 + val &= ~BCM54XX_SHD_SCR3_DEF_CLK125; 220 + } 220 221 clk125en = false; 221 222 } 222 223 } ··· 228 225 else 229 226 val |= BCM54XX_SHD_SCR3_DLLAPD_DIS; 230 227 231 - if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) 232 - val |= BCM54XX_SHD_SCR3_TRDDAPD; 228 + if (phydev->dev_flags & PHY_BRCM_DIS_TXCRXC_NOENRGY) { 229 + if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810 || 230 + BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54811) 231 + val |= BCM54810_SHD_SCR3_TRDDAPD; 232 + else 233 + val |= BCM54XX_SHD_SCR3_TRDDAPD; 234 + } 233 235 234 236 if (orig != val) 235 237 bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val); ··· 333 325 return ret; 334 326 335 327 return bcm54xx_config_init(phydev); 328 + } 329 + 330 + static int bcm54811_config_init(struct phy_device *phydev) 331 + { 332 + int err, reg; 333 + 334 + /* Disable BroadR-Reach function. */ 335 + reg = bcm_phy_read_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL); 336 + reg &= ~BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN; 337 + err = bcm_phy_write_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL, 338 + reg); 339 + if (err < 0) 340 + return err; 341 + 342 + err = bcm54xx_config_init(phydev); 343 + 344 + /* Enable CLK125 MUX on LED4 if ref clock is enabled. */ 345 + if (!(phydev->dev_flags & PHY_BRCM_RX_REFCLK_UNUSED)) { 346 + reg = bcm_phy_read_exp(phydev, BCM54612E_EXP_SPARE0); 347 + err = bcm_phy_write_exp(phydev, BCM54612E_EXP_SPARE0, 348 + BCM54612E_LED4_CLK125OUT_EN | reg); 349 + if (err < 0) 350 + return err; 351 + } 352 + 353 + return err; 336 354 } 337 355 338 356 static int bcm5482_config_init(struct phy_device *phydev) ··· 757 723 .suspend = genphy_suspend, 758 724 .resume = bcm54xx_resume, 759 725 }, { 726 + .phy_id = PHY_ID_BCM54811, 727 + .phy_id_mask = 0xfffffff0, 728 + .name = "Broadcom BCM54811", 729 + /* PHY_GBIT_FEATURES */ 730 + .config_init = bcm54811_config_init, 731 + .config_aneg = bcm5481_config_aneg, 732 + .ack_interrupt = bcm_phy_ack_intr, 733 + .config_intr = bcm_phy_config_intr, 734 + .suspend = genphy_suspend, 735 + .resume = bcm54xx_resume, 736 + }, { 760 737 .phy_id = PHY_ID_BCM5482, 761 738 .phy_id_mask = 0xfffffff0, 762 739 .name = "Broadcom BCM5482", ··· 861 816 { PHY_ID_BCM5464, 0xfffffff0 }, 862 817 { PHY_ID_BCM5481, 0xfffffff0 }, 863 818 { PHY_ID_BCM54810, 0xfffffff0 }, 819 + { PHY_ID_BCM54811, 0xfffffff0 }, 864 820 { PHY_ID_BCM5482, 0xfffffff0 }, 865 821 { PHY_ID_BCM50610, 0xfffffff0 }, 866 822 { PHY_ID_BCM50610M, 0xfffffff0 },
+2
include/linux/brcmphy.h
··· 17 17 #define PHY_ID_BCM5395 0x0143bcf0 18 18 #define PHY_ID_BCM53125 0x03625f20 19 19 #define PHY_ID_BCM54810 0x03625d00 20 + #define PHY_ID_BCM54811 0x03625cc0 20 21 #define PHY_ID_BCM5482 0x0143bcb0 21 22 #define PHY_ID_BCM5411 0x00206070 22 23 #define PHY_ID_BCM5421 0x002060e0 ··· 256 255 #define BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN (1 << 0) 257 256 #define BCM54810_SHD_CLK_CTL 0x3 258 257 #define BCM54810_SHD_CLK_CTL_GTXCLK_EN (1 << 9) 258 + #define BCM54810_SHD_SCR3_TRDDAPD 0x0100 259 259 260 260 /* BCM54612E Registers */ 261 261 #define BCM54612E_EXP_SPARE0 (MII_BCM54XX_EXP_SEL_ETC + 0x34)