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crypto: caam - unkeyed ahash support

caam supports and registers unkeyed sha algorithms and md5.

Signed-off-by: Yuan Kang <Yuan.Kang@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Yuan Kang and committed by
Herbert Xu b0e09bae 045e3678

+58 -17
+58 -17
drivers/crypto/caam/caamhash.c
··· 1485 1485 struct caam_hash_template { 1486 1486 char name[CRYPTO_MAX_ALG_NAME]; 1487 1487 char driver_name[CRYPTO_MAX_ALG_NAME]; 1488 + char hmac_name[CRYPTO_MAX_ALG_NAME]; 1489 + char hmac_driver_name[CRYPTO_MAX_ALG_NAME]; 1488 1490 unsigned int blocksize; 1489 1491 struct ahash_alg template_ahash; 1490 1492 u32 alg_type; ··· 1496 1494 /* ahash descriptors */ 1497 1495 static struct caam_hash_template driver_hash[] = { 1498 1496 { 1499 - .name = "hmac(sha1)", 1500 - .driver_name = "hmac-sha1-caam", 1497 + .name = "sha1", 1498 + .driver_name = "sha1-caam", 1499 + .hmac_name = "hmac(sha1)", 1500 + .hmac_driver_name = "hmac-sha1-caam", 1501 1501 .blocksize = SHA1_BLOCK_SIZE, 1502 1502 .template_ahash = { 1503 1503 .init = ahash_init, ··· 1517 1513 .alg_type = OP_ALG_ALGSEL_SHA1, 1518 1514 .alg_op = OP_ALG_ALGSEL_SHA1 | OP_ALG_AAI_HMAC, 1519 1515 }, { 1520 - .name = "hmac(sha224)", 1521 - .driver_name = "hmac-sha224-caam", 1516 + .name = "sha224", 1517 + .driver_name = "sha224-caam", 1518 + .hmac_name = "hmac(sha224)", 1519 + .hmac_driver_name = "hmac-sha224-caam", 1522 1520 .blocksize = SHA224_BLOCK_SIZE, 1523 1521 .template_ahash = { 1524 1522 .init = ahash_init, ··· 1538 1532 .alg_type = OP_ALG_ALGSEL_SHA224, 1539 1533 .alg_op = OP_ALG_ALGSEL_SHA224 | OP_ALG_AAI_HMAC, 1540 1534 }, { 1541 - .name = "hmac(sha256)", 1542 - .driver_name = "hmac-sha256-caam", 1535 + .name = "sha256", 1536 + .driver_name = "sha256-caam", 1537 + .hmac_name = "hmac(sha256)", 1538 + .hmac_driver_name = "hmac-sha256-caam", 1543 1539 .blocksize = SHA256_BLOCK_SIZE, 1544 1540 .template_ahash = { 1545 1541 .init = ahash_init, ··· 1559 1551 .alg_type = OP_ALG_ALGSEL_SHA256, 1560 1552 .alg_op = OP_ALG_ALGSEL_SHA256 | OP_ALG_AAI_HMAC, 1561 1553 }, { 1562 - .name = "hmac(sha384)", 1563 - .driver_name = "hmac-sha384-caam", 1554 + .name = "sha384", 1555 + .driver_name = "sha384-caam", 1556 + .hmac_name = "hmac(sha384)", 1557 + .hmac_driver_name = "hmac-sha384-caam", 1564 1558 .blocksize = SHA384_BLOCK_SIZE, 1565 1559 .template_ahash = { 1566 1560 .init = ahash_init, ··· 1580 1570 .alg_type = OP_ALG_ALGSEL_SHA384, 1581 1571 .alg_op = OP_ALG_ALGSEL_SHA384 | OP_ALG_AAI_HMAC, 1582 1572 }, { 1583 - .name = "hmac(sha512)", 1584 - .driver_name = "hmac-sha512-caam", 1573 + .name = "sha512", 1574 + .driver_name = "sha512-caam", 1575 + .hmac_name = "hmac(sha512)", 1576 + .hmac_driver_name = "hmac-sha512-caam", 1585 1577 .blocksize = SHA512_BLOCK_SIZE, 1586 1578 .template_ahash = { 1587 1579 .init = ahash_init, ··· 1601 1589 .alg_type = OP_ALG_ALGSEL_SHA512, 1602 1590 .alg_op = OP_ALG_ALGSEL_SHA512 | OP_ALG_AAI_HMAC, 1603 1591 }, { 1604 - .name = "hmac(md5)", 1605 - .driver_name = "hmac-md5-caam", 1592 + .name = "md5", 1593 + .driver_name = "md5-caam", 1594 + .hmac_name = "hmac(md5)", 1595 + .hmac_driver_name = "hmac-md5-caam", 1606 1596 .blocksize = MD5_BLOCK_WORDS * 4, 1607 1597 .template_ahash = { 1608 1598 .init = ahash_init, ··· 1735 1721 } 1736 1722 1737 1723 static struct caam_hash_alg * 1738 - caam_hash_alloc(struct device *ctrldev, struct caam_hash_template *template) 1724 + caam_hash_alloc(struct device *ctrldev, struct caam_hash_template *template, 1725 + bool keyed) 1739 1726 { 1740 1727 struct caam_hash_alg *t_alg; 1741 1728 struct ahash_alg *halg; ··· 1752 1737 halg = &t_alg->ahash_alg; 1753 1738 alg = &halg->halg.base; 1754 1739 1755 - snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", template->name); 1756 - snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", 1757 - template->driver_name); 1740 + if (keyed) { 1741 + snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", 1742 + template->hmac_name); 1743 + snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", 1744 + template->hmac_driver_name); 1745 + } else { 1746 + snprintf(alg->cra_name, CRYPTO_MAX_ALG_NAME, "%s", 1747 + template->name); 1748 + snprintf(alg->cra_driver_name, CRYPTO_MAX_ALG_NAME, "%s", 1749 + template->driver_name); 1750 + } 1758 1751 alg->cra_module = THIS_MODULE; 1759 1752 alg->cra_init = caam_hash_cra_init; 1760 1753 alg->cra_exit = caam_hash_cra_exit; ··· 1809 1786 /* TODO: check if h/w supports alg */ 1810 1787 struct caam_hash_alg *t_alg; 1811 1788 1812 - t_alg = caam_hash_alloc(ctrldev, &driver_hash[i]); 1789 + /* register hmac version */ 1790 + t_alg = caam_hash_alloc(ctrldev, &driver_hash[i], true); 1791 + if (IS_ERR(t_alg)) { 1792 + err = PTR_ERR(t_alg); 1793 + dev_warn(ctrldev, "%s alg allocation failed\n", 1794 + driver_hash[i].driver_name); 1795 + continue; 1796 + } 1797 + 1798 + err = crypto_register_ahash(&t_alg->ahash_alg); 1799 + if (err) { 1800 + dev_warn(ctrldev, "%s alg registration failed\n", 1801 + t_alg->ahash_alg.halg.base.cra_driver_name); 1802 + kfree(t_alg); 1803 + } else 1804 + list_add_tail(&t_alg->entry, &priv->hash_list); 1805 + 1806 + /* register unkeyed version */ 1807 + t_alg = caam_hash_alloc(ctrldev, &driver_hash[i], false); 1813 1808 if (IS_ERR(t_alg)) { 1814 1809 err = PTR_ERR(t_alg); 1815 1810 dev_warn(ctrldev, "%s alg allocation failed\n",