Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: Retire query_utcl2_poison_status callback

Driver switches to interrupt source id to identify
utcl2 poison event. polling interface is not needed.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Hawking Zhang and committed by
Alex Deucher
b05d6476 75f0efbc

-74
-16
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
··· 783 783 return 0; 784 784 } 785 785 786 - bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev, 787 - int hub_inst, int hub_type) 788 - { 789 - if (!hub_type) { 790 - if (adev->gfxhub.funcs->query_utcl2_poison_status) 791 - return adev->gfxhub.funcs->query_utcl2_poison_status(adev, hub_inst); 792 - else 793 - return false; 794 - } else { 795 - if (adev->mmhub.funcs->query_utcl2_poison_status) 796 - return adev->mmhub.funcs->query_utcl2_poison_status(adev, hub_inst); 797 - else 798 - return false; 799 - } 800 - } 801 - 802 786 int amdgpu_amdkfd_check_and_lock_kfd(struct amdgpu_device *adev) 803 787 { 804 788 return kgd2kfd_check_and_lock_kfd();
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
··· 350 350 bool amdgpu_amdkfd_bo_mapped_to_dev(void *drm_priv, struct kgd_mem *mem); 351 351 void amdgpu_amdkfd_block_mmu_notifications(void *p); 352 352 int amdgpu_amdkfd_criu_resume(void *p); 353 - bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev, 354 - int hub_inst, int hub_type); 355 353 int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev, 356 354 uint64_t size, u32 alloc_flag, int8_t xcp_id); 357 355 void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev,
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h
··· 38 38 void (*mode2_save_regs)(struct amdgpu_device *adev); 39 39 void (*mode2_restore_regs)(struct amdgpu_device *adev); 40 40 void (*halt)(struct amdgpu_device *adev); 41 - bool (*query_utcl2_poison_status)(struct amdgpu_device *adev, 42 - int xcc_id); 43 41 }; 44 42 45 43 struct amdgpu_gfxhub {
-2
drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
··· 63 63 uint64_t page_table_base); 64 64 void (*update_power_gating)(struct amdgpu_device *adev, 65 65 bool enable); 66 - bool (*query_utcl2_poison_status)(struct amdgpu_device *adev, 67 - int hub_inst); 68 66 }; 69 67 70 68 struct amdgpu_mmhub {
-18
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
··· 443 443 mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32; 444 444 } 445 445 446 - static bool gfxhub_v1_0_query_utcl2_poison_status(struct amdgpu_device *adev, 447 - int xcc_id) 448 - { 449 - u32 status = 0; 450 - struct amdgpu_vmhub *hub; 451 - 452 - if (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 2)) 453 - return false; 454 - 455 - hub = &adev->vmhub[AMDGPU_GFXHUB(0)]; 456 - status = RREG32(hub->vm_l2_pro_fault_status); 457 - /* reset page fault status */ 458 - WREG32_P(hub->vm_l2_pro_fault_cntl, 1, ~1); 459 - 460 - return REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED); 461 - } 462 - 463 446 const struct amdgpu_gfxhub_funcs gfxhub_v1_0_funcs = { 464 447 .get_mc_fb_offset = gfxhub_v1_0_get_mc_fb_offset, 465 448 .setup_vm_pt_regs = gfxhub_v1_0_setup_vm_pt_regs, ··· 451 468 .set_fault_enable_default = gfxhub_v1_0_set_fault_enable_default, 452 469 .init = gfxhub_v1_0_init, 453 470 .get_xgmi_info = gfxhub_v1_1_get_xgmi_info, 454 - .query_utcl2_poison_status = gfxhub_v1_0_query_utcl2_poison_status, 455 471 };
-17
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
··· 622 622 return 0; 623 623 } 624 624 625 - static bool gfxhub_v1_2_query_utcl2_poison_status(struct amdgpu_device *adev, 626 - int xcc_id) 627 - { 628 - u32 fed, status; 629 - 630 - status = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regVM_L2_PROTECTION_FAULT_STATUS); 631 - fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED); 632 - if (!amdgpu_sriov_vf(adev)) { 633 - /* clear page fault status and address */ 634 - WREG32_P(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id), 635 - regVM_L2_PROTECTION_FAULT_CNTL), 1, ~1); 636 - } 637 - 638 - return fed; 639 - } 640 - 641 625 const struct amdgpu_gfxhub_funcs gfxhub_v1_2_funcs = { 642 626 .get_mc_fb_offset = gfxhub_v1_2_get_mc_fb_offset, 643 627 .setup_vm_pt_regs = gfxhub_v1_2_setup_vm_pt_regs, ··· 630 646 .set_fault_enable_default = gfxhub_v1_2_set_fault_enable_default, 631 647 .init = gfxhub_v1_2_init, 632 648 .get_xgmi_info = gfxhub_v1_2_get_xgmi_info, 633 - .query_utcl2_poison_status = gfxhub_v1_2_query_utcl2_poison_status, 634 649 }; 635 650 636 651 static int gfxhub_v1_2_xcp_resume(void *handle, uint32_t inst_mask)
-17
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
··· 559 559 560 560 } 561 561 562 - static bool mmhub_v1_8_query_utcl2_poison_status(struct amdgpu_device *adev, 563 - int hub_inst) 564 - { 565 - u32 fed, status; 566 - 567 - status = RREG32_SOC15(MMHUB, hub_inst, regVM_L2_PROTECTION_FAULT_STATUS); 568 - fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED); 569 - if (!amdgpu_sriov_vf(adev)) { 570 - /* clear page fault status and address */ 571 - WREG32_P(SOC15_REG_OFFSET(MMHUB, hub_inst, 572 - regVM_L2_PROTECTION_FAULT_CNTL), 1, ~1); 573 - } 574 - 575 - return fed; 576 - } 577 - 578 562 const struct amdgpu_mmhub_funcs mmhub_v1_8_funcs = { 579 563 .get_fb_location = mmhub_v1_8_get_fb_location, 580 564 .init = mmhub_v1_8_init, ··· 568 584 .setup_vm_pt_regs = mmhub_v1_8_setup_vm_pt_regs, 569 585 .set_clockgating = mmhub_v1_8_set_clockgating, 570 586 .get_clockgating = mmhub_v1_8_get_clockgating, 571 - .query_utcl2_poison_status = mmhub_v1_8_query_utcl2_poison_status, 572 587 }; 573 588 574 589 static const struct amdgpu_ras_err_status_reg_entry mmhub_v1_8_ce_reg_list[] = {