Merge tag 'riscv-for-linus-5.10-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fix from Palmer Dabbelt:
"Just one fix. It's nothing critical, just a randconfig that wasn't
building. That said, it does seem pretty safe and is technically a
regression so I'm sending it along for 5.10:

- define get_cycles64() all the time, as it's used by most
configurations"

* tag 'riscv-for-linus-5.10-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
RISC-V: Define get_cycles64() regardless of M-mode

+2 -2
+2 -2
arch/riscv/include/asm/timex.h
··· 60 } 61 #define get_cycles_hi get_cycles_hi 62 63 #ifdef CONFIG_64BIT 64 static inline u64 get_cycles64(void) 65 { ··· 80 return ((u64)hi << 32) | lo; 81 } 82 #endif /* CONFIG_64BIT */ 83 - 84 - #endif /* !CONFIG_RISCV_M_MODE */ 85 86 #define ARCH_HAS_READ_CURRENT_TIMER 87 static inline int read_current_timer(unsigned long *timer_val)
··· 60 } 61 #define get_cycles_hi get_cycles_hi 62 63 + #endif /* !CONFIG_RISCV_M_MODE */ 64 + 65 #ifdef CONFIG_64BIT 66 static inline u64 get_cycles64(void) 67 { ··· 78 return ((u64)hi << 32) | lo; 79 } 80 #endif /* CONFIG_64BIT */ 81 82 #define ARCH_HAS_READ_CURRENT_TIMER 83 static inline int read_current_timer(unsigned long *timer_val)