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kernel os linux

clk: mediatek: Add MT8192 scp adsp clock support

Add MT8192 scp adsp clock provider

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Link: https://lore.kernel.org/r/20210726105719.15793-20-chun-jie.chen@mediatek.com
Reviewed-by: Ikjoon Jang <ikjn@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Chun-Jie Chen and committed by
Stephen Boyd
aff125ad a1a5b6b0

+57
+6
drivers/clk/mediatek/Kconfig
··· 562 562 help 563 563 This driver supports MediaTek MT8192 msdc and msdc_top clocks. 564 564 565 + config COMMON_CLK_MT8192_SCP_ADSP 566 + bool "Clock driver for MediaTek MT8192 scp_adsp" 567 + depends on COMMON_CLK_MT8192 568 + help 569 + This driver supports MediaTek MT8192 scp_adsp clocks. 570 + 565 571 config COMMON_CLK_MT8516 566 572 bool "Clock driver for MediaTek MT8516" 567 573 depends on ARCH_MEDIATEK || COMPILE_TEST
+1
drivers/clk/mediatek/Makefile
··· 77 77 obj-$(CONFIG_COMMON_CLK_MT8192_MFGCFG) += clk-mt8192-mfg.o 78 78 obj-$(CONFIG_COMMON_CLK_MT8192_MMSYS) += clk-mt8192-mm.o 79 79 obj-$(CONFIG_COMMON_CLK_MT8192_MSDC) += clk-mt8192-msdc.o 80 + obj-$(CONFIG_COMMON_CLK_MT8192_SCP_ADSP) += clk-mt8192-scp_adsp.o 80 81 obj-$(CONFIG_COMMON_CLK_MT8516) += clk-mt8516.o 81 82 obj-$(CONFIG_COMMON_CLK_MT8516_AUDSYS) += clk-mt8516-aud.o
+50
drivers/clk/mediatek/clk-mt8192-scp_adsp.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-only 2 + // 3 + // Copyright (c) 2021 MediaTek Inc. 4 + // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> 5 + 6 + #include <linux/clk-provider.h> 7 + #include <linux/of_device.h> 8 + #include <linux/platform_device.h> 9 + 10 + #include "clk-mtk.h" 11 + #include "clk-gate.h" 12 + 13 + #include <dt-bindings/clock/mt8192-clk.h> 14 + 15 + static const struct mtk_gate_regs scp_adsp_cg_regs = { 16 + .set_ofs = 0x180, 17 + .clr_ofs = 0x180, 18 + .sta_ofs = 0x180, 19 + }; 20 + 21 + #define GATE_SCP_ADSP(_id, _name, _parent, _shift) \ 22 + GATE_MTK(_id, _name, _parent, &scp_adsp_cg_regs, _shift, &mtk_clk_gate_ops_no_setclr) 23 + 24 + static const struct mtk_gate scp_adsp_clks[] = { 25 + GATE_SCP_ADSP(CLK_SCP_ADSP_AUDIODSP, "scp_adsp_audiodsp", "adsp_sel", 0), 26 + }; 27 + 28 + static const struct mtk_clk_desc scp_adsp_desc = { 29 + .clks = scp_adsp_clks, 30 + .num_clks = ARRAY_SIZE(scp_adsp_clks), 31 + }; 32 + 33 + static const struct of_device_id of_match_clk_mt8192_scp_adsp[] = { 34 + { 35 + .compatible = "mediatek,mt8192-scp_adsp", 36 + .data = &scp_adsp_desc, 37 + }, { 38 + /* sentinel */ 39 + } 40 + }; 41 + 42 + static struct platform_driver clk_mt8192_scp_adsp_drv = { 43 + .probe = mtk_clk_simple_probe, 44 + .driver = { 45 + .name = "clk-mt8192-scp_adsp", 46 + .of_match_table = of_match_clk_mt8192_scp_adsp, 47 + }, 48 + }; 49 + 50 + builtin_platform_driver(clk_mt8192_scp_adsp_drv);