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dt-bindings: arm: msm: Rework kpss-gcc driver Documentation to yaml

Rework kpss-gcc driver Documentation to yaml Documentation and move it
to clock as it's a clock-controller.
The current kpss-gcc Documentation have major problems and can't be
converted directly. Introduce various changes to the original
Documentation.

Add #clock-cells additional binding as this clock outputs a static clk
named acpu_l2_aux with supported compatible.
Only some compatible require and outputs a clock, for the others, set
only the reg as a required binding to correctly export the kpss-gcc
registers. As the reg is shared also add the required syscon compatible.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230116204751.23045-4-ansuelsmth@gmail.com

authored by

Christian Marangi and committed by
Bjorn Andersson
afd7b4d6 4260ddfb

+88 -44
-44
Documentation/devicetree/bindings/arm/msm/qcom,kpss-gcc.txt
··· 1 - Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) 2 - 3 - PROPERTIES 4 - 5 - - compatible: 6 - Usage: required 7 - Value type: <string> 8 - Definition: should be one of the following. The generic compatible 9 - "qcom,kpss-gcc" should also be included. 10 - "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc" 11 - "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc" 12 - "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc" 13 - "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc" 14 - 15 - - reg: 16 - Usage: required 17 - Value type: <prop-encoded-array> 18 - Definition: base address and size of the register region 19 - 20 - - clocks: 21 - Usage: required 22 - Value type: <prop-encoded-array> 23 - Definition: reference to the pll parents. 24 - 25 - - clock-names: 26 - Usage: required 27 - Value type: <stringlist> 28 - Definition: must be "pll8_vote", "pxo". 29 - 30 - - clock-output-names: 31 - Usage: required 32 - Value type: <string> 33 - Definition: Name of the output clock. Typically acpu_l2_aux indicating 34 - an L2 cache auxiliary clock. 35 - 36 - Example: 37 - 38 - l2cc: clock-controller@2011000 { 39 - compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"; 40 - reg = <0x2011000 0x1000>; 41 - clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>; 42 - clock-names = "pll8_vote", "pxo"; 43 - clock-output-names = "acpu_l2_aux"; 44 - };
+88
Documentation/devicetree/bindings/clock/qcom,kpss-gcc.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/clock/qcom,kpss-gcc.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Krait Processor Sub-system (KPSS) Global Clock Controller (GCC) 8 + 9 + maintainers: 10 + - Christian Marangi <ansuelsmth@gmail.com> 11 + 12 + description: 13 + Krait Processor Sub-system (KPSS) Global Clock Controller (GCC). Used 14 + to control L2 mux (in the current implementation) and provide access 15 + to the kpss-gcc registers. 16 + 17 + properties: 18 + compatible: 19 + items: 20 + - enum: 21 + - qcom,kpss-gcc-ipq8064 22 + - qcom,kpss-gcc-apq8064 23 + - qcom,kpss-gcc-msm8974 24 + - qcom,kpss-gcc-msm8960 25 + - qcom,kpss-gcc-msm8660 26 + - qcom,kpss-gcc-mdm9615 27 + - const: qcom,kpss-gcc 28 + - const: syscon 29 + 30 + reg: 31 + maxItems: 1 32 + 33 + clocks: 34 + minItems: 2 35 + maxItems: 2 36 + 37 + clock-names: 38 + items: 39 + - const: pll8_vote 40 + - const: pxo 41 + 42 + '#clock-cells': 43 + const: 0 44 + 45 + required: 46 + - compatible 47 + - reg 48 + 49 + if: 50 + properties: 51 + compatible: 52 + contains: 53 + enum: 54 + - qcom,kpss-gcc-ipq8064 55 + - qcom,kpss-gcc-apq8064 56 + - qcom,kpss-gcc-msm8974 57 + - qcom,kpss-gcc-msm8960 58 + then: 59 + required: 60 + - clocks 61 + - clock-names 62 + - '#clock-cells' 63 + else: 64 + properties: 65 + clock: false 66 + clock-names: false 67 + '#clock-cells': false 68 + 69 + additionalProperties: false 70 + 71 + examples: 72 + - | 73 + #include <dt-bindings/clock/qcom,gcc-ipq806x.h> 74 + 75 + clock-controller@2011000 { 76 + compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon"; 77 + reg = <0x2011000 0x1000>; 78 + clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 79 + clock-names = "pll8_vote", "pxo"; 80 + #clock-cells = <0>; 81 + }; 82 + 83 + - | 84 + clock-controller@2011000 { 85 + compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon"; 86 + reg = <0x02011000 0x1000>; 87 + }; 88 + ...