Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'dma-mapping-4.21' of git://git.infradead.org/users/hch/dma-mapping

Pull DMA mapping updates from Christoph Hellwig:
"A huge update this time, but a lot of that is just consolidating or
removing code:

- provide a common DMA_MAPPING_ERROR definition and avoid indirect
calls for dma_map_* error checking

- use direct calls for the DMA direct mapping case, avoiding huge
retpoline overhead for high performance workloads

- merge the swiotlb dma_map_ops into dma-direct

- provide a generic remapping DMA consistent allocator for
architectures that have devices that perform DMA that is not cache
coherent. Based on the existing arm64 implementation and also used
for csky now.

- improve the dma-debug infrastructure, including dynamic allocation
of entries (Robin Murphy)

- default to providing chaining scatterlist everywhere, with opt-outs
for the few architectures (alpha, parisc, most arm32 variants) that
can't cope with it

- misc sparc32 dma-related cleanups

- remove the dma_mark_clean arch hook used by swiotlb on ia64 and
replace it with the generic noncoherent infrastructure

- fix the return type of dma_set_max_seg_size (Niklas Söderlund)

- move the dummy dma ops for not DMA capable devices from arm64 to
common code (Robin Murphy)

- ensure dma_alloc_coherent returns zeroed memory to avoid kernel
data leaks through userspace. We already did this for most common
architectures, but this ensures we do it everywhere.
dma_zalloc_coherent has been deprecated and can hopefully be
removed after -rc1 with a coccinelle script"

* tag 'dma-mapping-4.21' of git://git.infradead.org/users/hch/dma-mapping: (73 commits)
dma-mapping: fix inverted logic in dma_supported
dma-mapping: deprecate dma_zalloc_coherent
dma-mapping: zero memory returned from dma_alloc_*
sparc/iommu: fix ->map_sg return value
sparc/io-unit: fix ->map_sg return value
arm64: default to the direct mapping in get_arch_dma_ops
PCI: Remove unused attr variable in pci_dma_configure
ia64: only select ARCH_HAS_DMA_COHERENT_TO_PFN if swiotlb is enabled
dma-mapping: bypass indirect calls for dma-direct
vmd: use the proper dma_* APIs instead of direct methods calls
dma-direct: merge swiotlb_dma_ops into the dma_direct code
dma-direct: use dma_direct_map_page to implement dma_direct_map_sg
dma-direct: improve addressability error reporting
swiotlb: remove dma_mark_clean
swiotlb: remove SWIOTLB_MAP_ERROR
ACPI / scan: Refactor _CCA enforcement
dma-mapping: factor out dummy DMA ops
dma-mapping: always build the direct mapping code
dma-mapping: move dma_cache_sync out of line
dma-mapping: move various slow path functions out of line
...

+1445 -2377
+14 -15
Documentation/DMA-API.txt
··· 60 60 61 61 :: 62 62 63 - void * 64 - dma_zalloc_coherent(struct device *dev, size_t size, 65 - dma_addr_t *dma_handle, gfp_t flag) 66 - 67 - Wraps dma_alloc_coherent() and also zeroes the returned memory if the 68 - allocation attempt succeeded. 69 - 70 - :: 71 - 72 63 void 73 64 dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, 74 65 dma_addr_t dma_handle) ··· 708 717 dma-api/min_free_entries This read-only file can be read to get the 709 718 minimum number of free dma_debug_entries the 710 719 allocator has ever seen. If this value goes 711 - down to zero the code will disable itself 712 - because it is not longer reliable. 720 + down to zero the code will attempt to increase 721 + nr_total_entries to compensate. 713 722 714 723 dma-api/num_free_entries The current number of free dma_debug_entries 715 724 in the allocator. 725 + 726 + dma-api/nr_total_entries The total number of dma_debug_entries in the 727 + allocator, both free and used. 716 728 717 729 dma-api/driver-filter You can write a name of a driver into this file 718 730 to limit the debug output to requests from that ··· 736 742 driver afterwards. This filter can be disabled or changed later using debugfs. 737 743 738 744 When the code disables itself at runtime this is most likely because it ran 739 - out of dma_debug_entries. These entries are preallocated at boot. The number 740 - of preallocated entries is defined per architecture. If it is too low for you 741 - boot with 'dma_debug_entries=<your_desired_number>' to overwrite the 742 - architectural default. 745 + out of dma_debug_entries and was unable to allocate more on-demand. 65536 746 + entries are preallocated at boot - if this is too low for you boot with 747 + 'dma_debug_entries=<your_desired_number>' to overwrite the default. Note 748 + that the code allocates entries in batches, so the exact number of 749 + preallocated entries may be greater than the actual number requested. The 750 + code will print to the kernel log each time it has dynamically allocated 751 + as many entries as were initially preallocated. This is to indicate that a 752 + larger preallocation size may be appropriate, or if it happens continually 753 + that a driver may be leaking mappings. 743 754 744 755 :: 745 756
-33
Documentation/features/io/sg-chain/arch-support.txt
··· 1 - # 2 - # Feature name: sg-chain 3 - # Kconfig: ARCH_HAS_SG_CHAIN 4 - # description: arch supports chained scatter-gather lists 5 - # 6 - ----------------------- 7 - | arch |status| 8 - ----------------------- 9 - | alpha: | TODO | 10 - | arc: | ok | 11 - | arm: | ok | 12 - | arm64: | ok | 13 - | c6x: | TODO | 14 - | h8300: | TODO | 15 - | hexagon: | TODO | 16 - | ia64: | ok | 17 - | m68k: | TODO | 18 - | microblaze: | TODO | 19 - | mips: | TODO | 20 - | nds32: | TODO | 21 - | nios2: | TODO | 22 - | openrisc: | TODO | 23 - | parisc: | TODO | 24 - | powerpc: | ok | 25 - | riscv: | TODO | 26 - | s390: | ok | 27 - | sh: | TODO | 28 - | sparc: | ok | 29 - | um: | TODO | 30 - | unicore32: | TODO | 31 - | x86: | ok | 32 - | xtensa: | TODO | 33 - -----------------------
+1 -4
Documentation/x86/x86_64/boot-options.txt
··· 209 209 mapping with memory protection, etc. 210 210 Kernel boot message: "PCI-DMA: Using Calgary IOMMU" 211 211 212 - iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>] 212 + iommu=[<size>][,noagp][,off][,force][,noforce] 213 213 [,memaper[=<order>]][,merge][,fullflush][,nomerge] 214 214 [,noaperture][,calgary] 215 215 ··· 228 228 allowed Overwrite iommu off workarounds for specific chipsets. 229 229 fullflush Flush IOMMU on each allocation (default). 230 230 nofullflush Don't use IOMMU fullflush. 231 - leak Turn on simple iommu leak tracing (only when 232 - CONFIG_IOMMU_LEAK is on). Default number of leak pages 233 - is 20. 234 231 memaper[=<order>] Allocate an own aperture over RAM with size 32MB<<order. 235 232 (default: order=1, i.e. 64MB) 236 233 merge Do scatter-gather (SG) merging. Implies "force"
+1 -1
arch/alpha/Kconfig
··· 5 5 select ARCH_MIGHT_HAVE_PC_PARPORT 6 6 select ARCH_MIGHT_HAVE_PC_SERIO 7 7 select ARCH_NO_PREEMPT 8 + select ARCH_NO_SG_CHAIN 8 9 select ARCH_USE_CMPXCHG_LOCKREF 9 10 select HAVE_AOUT 10 11 select HAVE_IDE ··· 203 202 config ALPHA_JENSEN 204 203 bool "Jensen" 205 204 depends on BROKEN 206 - select DMA_DIRECT_OPS 207 205 help 208 206 DEC PC 150 AXP (aka Jensen): This is a very old Digital system - one 209 207 of the first-generation Alpha systems. A number of these systems
+1 -1
arch/alpha/include/asm/dma-mapping.h
··· 7 7 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) 8 8 { 9 9 #ifdef CONFIG_ALPHA_JENSEN 10 - return &dma_direct_ops; 10 + return NULL; 11 11 #else 12 12 return &alpha_pci_ops; 13 13 #endif
+5 -11
arch/alpha/kernel/pci_iommu.c
··· 291 291 use direct_map above, it now must be considered an error. */ 292 292 if (! alpha_mv.mv_pci_tbi) { 293 293 printk_once(KERN_WARNING "pci_map_single: no HW sg\n"); 294 - return 0; 294 + return DMA_MAPPING_ERROR; 295 295 } 296 296 297 297 arena = hose->sg_pci; ··· 307 307 if (dma_ofs < 0) { 308 308 printk(KERN_WARNING "pci_map_single failed: " 309 309 "could not allocate dma page tables\n"); 310 - return 0; 310 + return DMA_MAPPING_ERROR; 311 311 } 312 312 313 313 paddr &= PAGE_MASK; ··· 443 443 gfp &= ~GFP_DMA; 444 444 445 445 try_again: 446 - cpu_addr = (void *)__get_free_pages(gfp, order); 446 + cpu_addr = (void *)__get_free_pages(gfp | __GFP_ZERO, order); 447 447 if (! cpu_addr) { 448 448 printk(KERN_INFO "pci_alloc_consistent: " 449 449 "get_free_pages failed from %pf\n", ··· 455 455 memset(cpu_addr, 0, size); 456 456 457 457 *dma_addrp = pci_map_single_1(pdev, cpu_addr, size, 0); 458 - if (*dma_addrp == 0) { 458 + if (*dma_addrp == DMA_MAPPING_ERROR) { 459 459 free_pages((unsigned long)cpu_addr, order); 460 460 if (alpha_mv.mv_pci_tbi || (gfp & GFP_DMA)) 461 461 return NULL; ··· 671 671 sg->dma_address 672 672 = pci_map_single_1(pdev, SG_ENT_VIRT_ADDRESS(sg), 673 673 sg->length, dac_allowed); 674 - return sg->dma_address != 0; 674 + return sg->dma_address != DMA_MAPPING_ERROR; 675 675 } 676 676 677 677 start = sg; ··· 935 935 return 0; 936 936 } 937 937 938 - static int alpha_pci_mapping_error(struct device *dev, dma_addr_t dma_addr) 939 - { 940 - return dma_addr == 0; 941 - } 942 - 943 938 const struct dma_map_ops alpha_pci_ops = { 944 939 .alloc = alpha_pci_alloc_coherent, 945 940 .free = alpha_pci_free_coherent, ··· 942 947 .unmap_page = alpha_pci_unmap_page, 943 948 .map_sg = alpha_pci_map_sg, 944 949 .unmap_sg = alpha_pci_unmap_sg, 945 - .mapping_error = alpha_pci_mapping_error, 946 950 .dma_supported = alpha_pci_supported, 947 951 }; 948 952 EXPORT_SYMBOL(alpha_pci_ops);
-2
arch/arc/Kconfig
··· 13 13 select ARCH_HAS_PTE_SPECIAL 14 14 select ARCH_HAS_SYNC_DMA_FOR_CPU 15 15 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 16 - select ARCH_HAS_SG_CHAIN 17 16 select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC 18 17 select BUILDTIME_EXTABLE_SORT 19 18 select CLONE_BACKWARDS 20 19 select COMMON_CLK 21 - select DMA_DIRECT_OPS 22 20 select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC) 23 21 select GENERIC_CLOCKEVENTS 24 22 select GENERIC_FIND_FIRST_BIT
+1 -1
arch/arc/mm/cache.c
··· 1294 1294 /* 1295 1295 * In case of IOC (say IOC+SLC case), pointers above could still be set 1296 1296 * but end up not being relevant as the first function in chain is not 1297 - * called at all for @dma_direct_ops 1297 + * called at all for devices using coherent DMA. 1298 1298 * arch_sync_dma_for_cpu() -> dma_cache_*() -> __dma_cache_*() 1299 1299 */ 1300 1300 }
+1 -1
arch/arc/mm/dma.c
··· 33 33 */ 34 34 BUG_ON(gfp & __GFP_HIGHMEM); 35 35 36 - page = alloc_pages(gfp, order); 36 + page = alloc_pages(gfp | __GFP_ZERO, order); 37 37 if (!page) 38 38 return NULL; 39 39
+2 -2
arch/arm/Kconfig
··· 19 19 select ARCH_HAVE_CUSTOM_GPIO_H 20 20 select ARCH_HAS_GCOV_PROFILE_ALL 21 21 select ARCH_MIGHT_HAVE_PC_PARPORT 22 + select ARCH_NO_SG_CHAIN if !ARM_HAS_SG_CHAIN 22 23 select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX 23 24 select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7 24 25 select ARCH_SUPPORTS_ATOMIC_RMW ··· 30 29 select CLONE_BACKWARDS 31 30 select CPU_PM if (SUSPEND || CPU_IDLE) 32 31 select DCACHE_WORD_ACCESS if HAVE_EFFICIENT_UNALIGNED_ACCESS 33 - select DMA_DIRECT_OPS if !MMU 32 + select DMA_REMAP if MMU 34 33 select EDAC_SUPPORT 35 34 select EDAC_ATOMIC_SCRUB 36 35 select GENERIC_ALLOCATOR ··· 119 118 <http://www.arm.linux.org.uk/>. 120 119 121 120 config ARM_HAS_SG_CHAIN 122 - select ARCH_HAS_SG_CHAIN 123 121 bool 124 122 125 123 config ARM_DMA_USE_IOMMU
+3 -9
arch/arm/common/dmabounce.c
··· 257 257 if (buf == NULL) { 258 258 dev_err(dev, "%s: unable to map unsafe buffer %p!\n", 259 259 __func__, ptr); 260 - return ARM_MAPPING_ERROR; 260 + return DMA_MAPPING_ERROR; 261 261 } 262 262 263 263 dev_dbg(dev, "%s: unsafe buffer %p (dma=%#x) mapped to %p (dma=%#x)\n", ··· 327 327 328 328 ret = needs_bounce(dev, dma_addr, size); 329 329 if (ret < 0) 330 - return ARM_MAPPING_ERROR; 330 + return DMA_MAPPING_ERROR; 331 331 332 332 if (ret == 0) { 333 333 arm_dma_ops.sync_single_for_device(dev, dma_addr, size, dir); ··· 336 336 337 337 if (PageHighMem(page)) { 338 338 dev_err(dev, "DMA buffer bouncing of HIGHMEM pages is not supported\n"); 339 - return ARM_MAPPING_ERROR; 339 + return DMA_MAPPING_ERROR; 340 340 } 341 341 342 342 return map_single(dev, page_address(page) + offset, size, dir, attrs); ··· 453 453 return arm_dma_ops.dma_supported(dev, dma_mask); 454 454 } 455 455 456 - static int dmabounce_mapping_error(struct device *dev, dma_addr_t dma_addr) 457 - { 458 - return arm_dma_ops.mapping_error(dev, dma_addr); 459 - } 460 - 461 456 static const struct dma_map_ops dmabounce_ops = { 462 457 .alloc = arm_dma_alloc, 463 458 .free = arm_dma_free, ··· 467 472 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu, 468 473 .sync_sg_for_device = arm_dma_sync_sg_for_device, 469 474 .dma_supported = dmabounce_dma_supported, 470 - .mapping_error = dmabounce_mapping_error, 471 475 }; 472 476 473 477 static int dmabounce_init_pool(struct dmabounce_pool *pool, struct device *dev,
-2
arch/arm/include/asm/dma-iommu.h
··· 9 9 #include <linux/dma-debug.h> 10 10 #include <linux/kref.h> 11 11 12 - #define ARM_MAPPING_ERROR (~(dma_addr_t)0x0) 13 - 14 12 struct dma_iommu_mapping { 15 13 /* iommu specific data */ 16 14 struct iommu_domain *domain;
+1 -1
arch/arm/include/asm/dma-mapping.h
··· 18 18 19 19 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) 20 20 { 21 - return IS_ENABLED(CONFIG_MMU) ? &arm_dma_ops : &dma_direct_ops; 21 + return IS_ENABLED(CONFIG_MMU) ? &arm_dma_ops : NULL; 22 22 } 23 23 24 24 #ifdef __arch_page_to_dma
+3 -11
arch/arm/mm/dma-mapping-nommu.c
··· 22 22 #include "dma.h" 23 23 24 24 /* 25 - * dma_direct_ops is used if 25 + * The generic direct mapping code is used if 26 26 * - MMU/MPU is off 27 27 * - cpu is v7m w/o cache support 28 28 * - device is coherent ··· 209 209 }; 210 210 EXPORT_SYMBOL(arm_nommu_dma_ops); 211 211 212 - static const struct dma_map_ops *arm_nommu_get_dma_map_ops(bool coherent) 213 - { 214 - return coherent ? &dma_direct_ops : &arm_nommu_dma_ops; 215 - } 216 - 217 212 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, 218 213 const struct iommu_ops *iommu, bool coherent) 219 214 { 220 - const struct dma_map_ops *dma_ops; 221 - 222 215 if (IS_ENABLED(CONFIG_CPU_V7M)) { 223 216 /* 224 217 * Cache support for v7m is optional, so can be treated as ··· 227 234 dev->archdata.dma_coherent = (get_cr() & CR_M) ? coherent : true; 228 235 } 229 236 230 - dma_ops = arm_nommu_get_dma_map_ops(dev->archdata.dma_coherent); 231 - 232 - set_dma_ops(dev, dma_ops); 237 + if (!dev->archdata.dma_coherent) 238 + set_dma_ops(dev, &arm_nommu_dma_ops); 233 239 }
+15 -24
arch/arm/mm/dma-mapping.c
··· 179 179 __dma_page_cpu_to_dev(page, offset, size, dir); 180 180 } 181 181 182 - static int arm_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 183 - { 184 - return dma_addr == ARM_MAPPING_ERROR; 185 - } 186 - 187 182 const struct dma_map_ops arm_dma_ops = { 188 183 .alloc = arm_dma_alloc, 189 184 .free = arm_dma_free, ··· 192 197 .sync_single_for_device = arm_dma_sync_single_for_device, 193 198 .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu, 194 199 .sync_sg_for_device = arm_dma_sync_sg_for_device, 195 - .mapping_error = arm_dma_mapping_error, 196 200 .dma_supported = arm_dma_supported, 197 201 }; 198 202 EXPORT_SYMBOL(arm_dma_ops); ··· 211 217 .get_sgtable = arm_dma_get_sgtable, 212 218 .map_page = arm_coherent_dma_map_page, 213 219 .map_sg = arm_dma_map_sg, 214 - .mapping_error = arm_dma_mapping_error, 215 220 .dma_supported = arm_dma_supported, 216 221 }; 217 222 EXPORT_SYMBOL(arm_coherent_dma_ops); ··· 767 774 gfp &= ~(__GFP_COMP); 768 775 args.gfp = gfp; 769 776 770 - *handle = ARM_MAPPING_ERROR; 777 + *handle = DMA_MAPPING_ERROR; 771 778 allowblock = gfpflags_allow_blocking(gfp); 772 779 cma = allowblock ? dev_get_cma_area(dev) : false; 773 780 ··· 1210 1217 if (i == mapping->nr_bitmaps) { 1211 1218 if (extend_iommu_mapping(mapping)) { 1212 1219 spin_unlock_irqrestore(&mapping->lock, flags); 1213 - return ARM_MAPPING_ERROR; 1220 + return DMA_MAPPING_ERROR; 1214 1221 } 1215 1222 1216 1223 start = bitmap_find_next_zero_area(mapping->bitmaps[i], ··· 1218 1225 1219 1226 if (start > mapping->bits) { 1220 1227 spin_unlock_irqrestore(&mapping->lock, flags); 1221 - return ARM_MAPPING_ERROR; 1228 + return DMA_MAPPING_ERROR; 1222 1229 } 1223 1230 1224 1231 bitmap_set(mapping->bitmaps[i], start, count); ··· 1402 1409 int i; 1403 1410 1404 1411 dma_addr = __alloc_iova(mapping, size); 1405 - if (dma_addr == ARM_MAPPING_ERROR) 1412 + if (dma_addr == DMA_MAPPING_ERROR) 1406 1413 return dma_addr; 1407 1414 1408 1415 iova = dma_addr; ··· 1429 1436 fail: 1430 1437 iommu_unmap(mapping->domain, dma_addr, iova-dma_addr); 1431 1438 __free_iova(mapping, dma_addr, size); 1432 - return ARM_MAPPING_ERROR; 1439 + return DMA_MAPPING_ERROR; 1433 1440 } 1434 1441 1435 1442 static int __iommu_remove_mapping(struct device *dev, dma_addr_t iova, size_t size) ··· 1490 1497 return NULL; 1491 1498 1492 1499 *handle = __iommu_create_mapping(dev, &page, size, attrs); 1493 - if (*handle == ARM_MAPPING_ERROR) 1500 + if (*handle == DMA_MAPPING_ERROR) 1494 1501 goto err_mapping; 1495 1502 1496 1503 return addr; ··· 1518 1525 struct page **pages; 1519 1526 void *addr = NULL; 1520 1527 1521 - *handle = ARM_MAPPING_ERROR; 1528 + *handle = DMA_MAPPING_ERROR; 1522 1529 size = PAGE_ALIGN(size); 1523 1530 1524 1531 if (coherent_flag == COHERENT || !gfpflags_allow_blocking(gfp)) ··· 1539 1546 return NULL; 1540 1547 1541 1548 *handle = __iommu_create_mapping(dev, pages, size, attrs); 1542 - if (*handle == ARM_MAPPING_ERROR) 1549 + if (*handle == DMA_MAPPING_ERROR) 1543 1550 goto err_buffer; 1544 1551 1545 1552 if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) ··· 1689 1696 int prot; 1690 1697 1691 1698 size = PAGE_ALIGN(size); 1692 - *handle = ARM_MAPPING_ERROR; 1699 + *handle = DMA_MAPPING_ERROR; 1693 1700 1694 1701 iova_base = iova = __alloc_iova(mapping, size); 1695 - if (iova == ARM_MAPPING_ERROR) 1702 + if (iova == DMA_MAPPING_ERROR) 1696 1703 return -ENOMEM; 1697 1704 1698 1705 for (count = 0, s = sg; count < (size >> PAGE_SHIFT); s = sg_next(s)) { ··· 1732 1739 for (i = 1; i < nents; i++) { 1733 1740 s = sg_next(s); 1734 1741 1735 - s->dma_address = ARM_MAPPING_ERROR; 1742 + s->dma_address = DMA_MAPPING_ERROR; 1736 1743 s->dma_length = 0; 1737 1744 1738 1745 if (s->offset || (size & ~PAGE_MASK) || size + s->length > max) { ··· 1907 1914 int ret, prot, len = PAGE_ALIGN(size + offset); 1908 1915 1909 1916 dma_addr = __alloc_iova(mapping, len); 1910 - if (dma_addr == ARM_MAPPING_ERROR) 1917 + if (dma_addr == DMA_MAPPING_ERROR) 1911 1918 return dma_addr; 1912 1919 1913 1920 prot = __dma_info_to_prot(dir, attrs); ··· 1919 1926 return dma_addr + offset; 1920 1927 fail: 1921 1928 __free_iova(mapping, dma_addr, len); 1922 - return ARM_MAPPING_ERROR; 1929 + return DMA_MAPPING_ERROR; 1923 1930 } 1924 1931 1925 1932 /** ··· 2013 2020 size_t len = PAGE_ALIGN(size + offset); 2014 2021 2015 2022 dma_addr = __alloc_iova(mapping, len); 2016 - if (dma_addr == ARM_MAPPING_ERROR) 2023 + if (dma_addr == DMA_MAPPING_ERROR) 2017 2024 return dma_addr; 2018 2025 2019 2026 prot = __dma_info_to_prot(dir, attrs) | IOMMU_MMIO; ··· 2025 2032 return dma_addr + offset; 2026 2033 fail: 2027 2034 __free_iova(mapping, dma_addr, len); 2028 - return ARM_MAPPING_ERROR; 2035 + return DMA_MAPPING_ERROR; 2029 2036 } 2030 2037 2031 2038 /** ··· 2098 2105 .map_resource = arm_iommu_map_resource, 2099 2106 .unmap_resource = arm_iommu_unmap_resource, 2100 2107 2101 - .mapping_error = arm_dma_mapping_error, 2102 2108 .dma_supported = arm_dma_supported, 2103 2109 }; 2104 2110 ··· 2116 2124 .map_resource = arm_iommu_map_resource, 2117 2125 .unmap_resource = arm_iommu_unmap_resource, 2118 2126 2119 - .mapping_error = arm_dma_mapping_error, 2120 2127 .dma_supported = arm_dma_supported, 2121 2128 }; 2122 2129
+1 -2
arch/arm64/Kconfig
··· 23 23 select ARCH_HAS_MEMBARRIER_SYNC_CORE 24 24 select ARCH_HAS_PTE_SPECIAL 25 25 select ARCH_HAS_SET_MEMORY 26 - select ARCH_HAS_SG_CHAIN 27 26 select ARCH_HAS_STRICT_KERNEL_RWX 28 27 select ARCH_HAS_STRICT_MODULE_RWX 29 28 select ARCH_HAS_SYNC_DMA_FOR_DEVICE ··· 80 81 select CPU_PM if (SUSPEND || CPU_IDLE) 81 82 select CRC32 82 83 select DCACHE_WORD_ACCESS 83 - select DMA_DIRECT_OPS 84 + select DMA_DIRECT_REMAP 84 85 select EDAC_SUPPORT 85 86 select FRAME_POINTER 86 87 select GENERIC_ALLOCATOR
+1 -7
arch/arm64/include/asm/dma-mapping.h
··· 24 24 #include <xen/xen.h> 25 25 #include <asm/xen/hypervisor.h> 26 26 27 - extern const struct dma_map_ops dummy_dma_ops; 28 - 29 27 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) 30 28 { 31 - /* 32 - * We expect no ISA devices, and all other DMA masters are expected to 33 - * have someone call arch_setup_dma_ops at device creation time. 34 - */ 35 - return &dummy_dma_ops; 29 + return NULL; 36 30 } 37 31 38 32 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
+13 -273
arch/arm64/mm/dma-mapping.c
··· 33 33 34 34 #include <asm/cacheflush.h> 35 35 36 - static struct gen_pool *atomic_pool __ro_after_init; 37 - 38 - #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K 39 - static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE; 40 - 41 - static int __init early_coherent_pool(char *p) 42 - { 43 - atomic_pool_size = memparse(p, &p); 44 - return 0; 45 - } 46 - early_param("coherent_pool", early_coherent_pool); 47 - 48 - static void *__alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags) 49 - { 50 - unsigned long val; 51 - void *ptr = NULL; 52 - 53 - if (!atomic_pool) { 54 - WARN(1, "coherent pool not initialised!\n"); 55 - return NULL; 56 - } 57 - 58 - val = gen_pool_alloc(atomic_pool, size); 59 - if (val) { 60 - phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val); 61 - 62 - *ret_page = phys_to_page(phys); 63 - ptr = (void *)val; 64 - memset(ptr, 0, size); 65 - } 66 - 67 - return ptr; 68 - } 69 - 70 - static bool __in_atomic_pool(void *start, size_t size) 71 - { 72 - return addr_in_gen_pool(atomic_pool, (unsigned long)start, size); 73 - } 74 - 75 - static int __free_from_pool(void *start, size_t size) 76 - { 77 - if (!__in_atomic_pool(start, size)) 78 - return 0; 79 - 80 - gen_pool_free(atomic_pool, (unsigned long)start, size); 81 - 82 - return 1; 83 - } 84 - 85 - void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 86 - gfp_t flags, unsigned long attrs) 87 - { 88 - struct page *page; 89 - void *ptr, *coherent_ptr; 90 - pgprot_t prot = pgprot_writecombine(PAGE_KERNEL); 91 - 92 - size = PAGE_ALIGN(size); 93 - 94 - if (!gfpflags_allow_blocking(flags)) { 95 - struct page *page = NULL; 96 - void *addr = __alloc_from_pool(size, &page, flags); 97 - 98 - if (addr) 99 - *dma_handle = phys_to_dma(dev, page_to_phys(page)); 100 - 101 - return addr; 102 - } 103 - 104 - ptr = dma_direct_alloc_pages(dev, size, dma_handle, flags, attrs); 105 - if (!ptr) 106 - goto no_mem; 107 - 108 - /* remove any dirty cache lines on the kernel alias */ 109 - __dma_flush_area(ptr, size); 110 - 111 - /* create a coherent mapping */ 112 - page = virt_to_page(ptr); 113 - coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP, 114 - prot, __builtin_return_address(0)); 115 - if (!coherent_ptr) 116 - goto no_map; 117 - 118 - return coherent_ptr; 119 - 120 - no_map: 121 - dma_direct_free_pages(dev, size, ptr, *dma_handle, attrs); 122 - no_mem: 123 - return NULL; 124 - } 125 - 126 - void arch_dma_free(struct device *dev, size_t size, void *vaddr, 127 - dma_addr_t dma_handle, unsigned long attrs) 128 - { 129 - if (!__free_from_pool(vaddr, PAGE_ALIGN(size))) { 130 - void *kaddr = phys_to_virt(dma_to_phys(dev, dma_handle)); 131 - 132 - vunmap(vaddr); 133 - dma_direct_free_pages(dev, size, kaddr, dma_handle, attrs); 134 - } 135 - } 136 - 137 - long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr, 138 - dma_addr_t dma_addr) 139 - { 140 - return __phys_to_pfn(dma_to_phys(dev, dma_addr)); 141 - } 142 - 143 36 pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot, 144 37 unsigned long attrs) 145 38 { ··· 51 158 size_t size, enum dma_data_direction dir) 52 159 { 53 160 __dma_unmap_area(phys_to_virt(paddr), size, dir); 161 + } 162 + 163 + void arch_dma_prep_coherent(struct page *page, size_t size) 164 + { 165 + __dma_flush_area(page_address(page), size); 54 166 } 55 167 56 168 #ifdef CONFIG_IOMMU_DMA ··· 89 191 } 90 192 #endif /* CONFIG_IOMMU_DMA */ 91 193 92 - static int __init atomic_pool_init(void) 93 - { 94 - pgprot_t prot = __pgprot(PROT_NORMAL_NC); 95 - unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT; 96 - struct page *page; 97 - void *addr; 98 - unsigned int pool_size_order = get_order(atomic_pool_size); 99 - 100 - if (dev_get_cma_area(NULL)) 101 - page = dma_alloc_from_contiguous(NULL, nr_pages, 102 - pool_size_order, false); 103 - else 104 - page = alloc_pages(GFP_DMA32, pool_size_order); 105 - 106 - if (page) { 107 - int ret; 108 - void *page_addr = page_address(page); 109 - 110 - memset(page_addr, 0, atomic_pool_size); 111 - __dma_flush_area(page_addr, atomic_pool_size); 112 - 113 - atomic_pool = gen_pool_create(PAGE_SHIFT, -1); 114 - if (!atomic_pool) 115 - goto free_page; 116 - 117 - addr = dma_common_contiguous_remap(page, atomic_pool_size, 118 - VM_USERMAP, prot, atomic_pool_init); 119 - 120 - if (!addr) 121 - goto destroy_genpool; 122 - 123 - ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr, 124 - page_to_phys(page), 125 - atomic_pool_size, -1); 126 - if (ret) 127 - goto remove_mapping; 128 - 129 - gen_pool_set_algo(atomic_pool, 130 - gen_pool_first_fit_order_align, 131 - NULL); 132 - 133 - pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n", 134 - atomic_pool_size / 1024); 135 - return 0; 136 - } 137 - goto out; 138 - 139 - remove_mapping: 140 - dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP); 141 - destroy_genpool: 142 - gen_pool_destroy(atomic_pool); 143 - atomic_pool = NULL; 144 - free_page: 145 - if (!dma_release_from_contiguous(NULL, page, nr_pages)) 146 - __free_pages(page, pool_size_order); 147 - out: 148 - pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n", 149 - atomic_pool_size / 1024); 150 - return -ENOMEM; 151 - } 152 - 153 - /******************************************** 154 - * The following APIs are for dummy DMA ops * 155 - ********************************************/ 156 - 157 - static void *__dummy_alloc(struct device *dev, size_t size, 158 - dma_addr_t *dma_handle, gfp_t flags, 159 - unsigned long attrs) 160 - { 161 - return NULL; 162 - } 163 - 164 - static void __dummy_free(struct device *dev, size_t size, 165 - void *vaddr, dma_addr_t dma_handle, 166 - unsigned long attrs) 167 - { 168 - } 169 - 170 - static int __dummy_mmap(struct device *dev, 171 - struct vm_area_struct *vma, 172 - void *cpu_addr, dma_addr_t dma_addr, size_t size, 173 - unsigned long attrs) 174 - { 175 - return -ENXIO; 176 - } 177 - 178 - static dma_addr_t __dummy_map_page(struct device *dev, struct page *page, 179 - unsigned long offset, size_t size, 180 - enum dma_data_direction dir, 181 - unsigned long attrs) 182 - { 183 - return 0; 184 - } 185 - 186 - static void __dummy_unmap_page(struct device *dev, dma_addr_t dev_addr, 187 - size_t size, enum dma_data_direction dir, 188 - unsigned long attrs) 189 - { 190 - } 191 - 192 - static int __dummy_map_sg(struct device *dev, struct scatterlist *sgl, 193 - int nelems, enum dma_data_direction dir, 194 - unsigned long attrs) 195 - { 196 - return 0; 197 - } 198 - 199 - static void __dummy_unmap_sg(struct device *dev, 200 - struct scatterlist *sgl, int nelems, 201 - enum dma_data_direction dir, 202 - unsigned long attrs) 203 - { 204 - } 205 - 206 - static void __dummy_sync_single(struct device *dev, 207 - dma_addr_t dev_addr, size_t size, 208 - enum dma_data_direction dir) 209 - { 210 - } 211 - 212 - static void __dummy_sync_sg(struct device *dev, 213 - struct scatterlist *sgl, int nelems, 214 - enum dma_data_direction dir) 215 - { 216 - } 217 - 218 - static int __dummy_mapping_error(struct device *hwdev, dma_addr_t dma_addr) 219 - { 220 - return 1; 221 - } 222 - 223 - static int __dummy_dma_supported(struct device *hwdev, u64 mask) 224 - { 225 - return 0; 226 - } 227 - 228 - const struct dma_map_ops dummy_dma_ops = { 229 - .alloc = __dummy_alloc, 230 - .free = __dummy_free, 231 - .mmap = __dummy_mmap, 232 - .map_page = __dummy_map_page, 233 - .unmap_page = __dummy_unmap_page, 234 - .map_sg = __dummy_map_sg, 235 - .unmap_sg = __dummy_unmap_sg, 236 - .sync_single_for_cpu = __dummy_sync_single, 237 - .sync_single_for_device = __dummy_sync_single, 238 - .sync_sg_for_cpu = __dummy_sync_sg, 239 - .sync_sg_for_device = __dummy_sync_sg, 240 - .mapping_error = __dummy_mapping_error, 241 - .dma_supported = __dummy_dma_supported, 242 - }; 243 - EXPORT_SYMBOL(dummy_dma_ops); 244 - 245 194 static int __init arm64_dma_init(void) 246 195 { 247 196 WARN_TAINT(ARCH_DMA_MINALIGN < cache_line_size(), 248 197 TAINT_CPU_OUT_OF_SPEC, 249 198 "ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (%d < %d)", 250 199 ARCH_DMA_MINALIGN, cache_line_size()); 251 - 252 - return atomic_pool_init(); 200 + return dma_atomic_pool_init(GFP_DMA32, __pgprot(PROT_NORMAL_NC)); 253 201 } 254 202 arch_initcall(arm64_dma_init); 255 203 ··· 141 397 page = alloc_pages(gfp, get_order(size)); 142 398 addr = page ? page_address(page) : NULL; 143 399 } else { 144 - addr = __alloc_from_pool(size, &page, gfp); 400 + addr = dma_alloc_from_pool(size, &page, gfp); 145 401 } 146 402 if (!addr) 147 403 return NULL; 148 404 149 405 *handle = iommu_dma_map_page(dev, page, 0, iosize, ioprot); 150 - if (iommu_dma_mapping_error(dev, *handle)) { 406 + if (*handle == DMA_MAPPING_ERROR) { 151 407 if (coherent) 152 408 __free_pages(page, get_order(size)); 153 409 else 154 - __free_from_pool(addr, size); 410 + dma_free_from_pool(addr, size); 155 411 addr = NULL; 156 412 } 157 413 } else if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) { ··· 164 420 return NULL; 165 421 166 422 *handle = iommu_dma_map_page(dev, page, 0, iosize, ioprot); 167 - if (iommu_dma_mapping_error(dev, *handle)) { 423 + if (*handle == DMA_MAPPING_ERROR) { 168 424 dma_release_from_contiguous(dev, page, 169 425 size >> PAGE_SHIFT); 170 426 return NULL; ··· 215 471 * coherent devices. 216 472 * Hence how dodgy the below logic looks... 217 473 */ 218 - if (__in_atomic_pool(cpu_addr, size)) { 474 + if (dma_in_atomic_pool(cpu_addr, size)) { 219 475 iommu_dma_unmap_page(dev, handle, iosize, 0, 0); 220 - __free_from_pool(cpu_addr, size); 476 + dma_free_from_pool(cpu_addr, size); 221 477 } else if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) { 222 478 struct page *page = vmalloc_to_page(cpu_addr); 223 479 ··· 324 580 dma_addr_t dev_addr = iommu_dma_map_page(dev, page, offset, size, prot); 325 581 326 582 if (!coherent && !(attrs & DMA_ATTR_SKIP_CPU_SYNC) && 327 - !iommu_dma_mapping_error(dev, dev_addr)) 583 + dev_addr != DMA_MAPPING_ERROR) 328 584 __dma_map_area(page_address(page) + offset, size, dir); 329 585 330 586 return dev_addr; ··· 407 663 .sync_sg_for_device = __iommu_sync_sg_for_device, 408 664 .map_resource = iommu_dma_map_resource, 409 665 .unmap_resource = iommu_dma_unmap_resource, 410 - .mapping_error = iommu_dma_mapping_error, 411 666 }; 412 667 413 668 static int __init __iommu_dma_init(void) ··· 462 719 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, 463 720 const struct iommu_ops *iommu, bool coherent) 464 721 { 465 - if (!dev->dma_ops) 466 - dev->dma_ops = &swiotlb_dma_ops; 467 - 468 722 dev->dma_coherent = coherent; 469 723 __iommu_setup_dma_ops(dev, dma_base, size, iommu); 470 724
-1
arch/c6x/Kconfig
··· 9 9 select ARCH_HAS_SYNC_DMA_FOR_CPU 10 10 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 11 11 select CLKDEV_LOOKUP 12 - select DMA_DIRECT_OPS 13 12 select GENERIC_ATOMIC64 14 13 select GENERIC_IRQ_SHOW 15 14 select HAVE_ARCH_TRACEHOOK
+4 -1
arch/c6x/mm/dma-coherent.c
··· 78 78 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, 79 79 gfp_t gfp, unsigned long attrs) 80 80 { 81 + void *ret; 81 82 u32 paddr; 82 83 int order; 83 84 ··· 95 94 if (!paddr) 96 95 return NULL; 97 96 98 - return phys_to_virt(paddr); 97 + ret = phys_to_virt(paddr); 98 + memset(ret, 0, 1 << order); 99 + return ret; 99 100 } 100 101 101 102 /*
+1 -2
arch/csky/Kconfig
··· 7 7 select COMMON_CLK 8 8 select CLKSRC_MMIO 9 9 select CLKSRC_OF 10 - select DMA_DIRECT_OPS 11 - select DMA_NONCOHERENT_OPS 10 + select DMA_DIRECT_REMAP 12 11 select IRQ_DOMAIN 13 12 select HANDLE_DOMAIN_IRQ 14 13 select DW_APB_TIMER_OF
+2 -140
arch/csky/mm/dma-mapping.c
··· 14 14 #include <linux/version.h> 15 15 #include <asm/cache.h> 16 16 17 - static struct gen_pool *atomic_pool; 18 - static size_t atomic_pool_size __initdata = SZ_256K; 19 - 20 - static int __init early_coherent_pool(char *p) 21 - { 22 - atomic_pool_size = memparse(p, &p); 23 - return 0; 24 - } 25 - early_param("coherent_pool", early_coherent_pool); 26 - 27 17 static int __init atomic_pool_init(void) 28 18 { 29 - struct page *page; 30 - size_t size = atomic_pool_size; 31 - void *ptr; 32 - int ret; 33 - 34 - atomic_pool = gen_pool_create(PAGE_SHIFT, -1); 35 - if (!atomic_pool) 36 - BUG(); 37 - 38 - page = alloc_pages(GFP_KERNEL | GFP_DMA, get_order(size)); 39 - if (!page) 40 - BUG(); 41 - 42 - ptr = dma_common_contiguous_remap(page, size, VM_ALLOC, 43 - pgprot_noncached(PAGE_KERNEL), 44 - __builtin_return_address(0)); 45 - if (!ptr) 46 - BUG(); 47 - 48 - ret = gen_pool_add_virt(atomic_pool, (unsigned long)ptr, 49 - page_to_phys(page), atomic_pool_size, -1); 50 - if (ret) 51 - BUG(); 52 - 53 - gen_pool_set_algo(atomic_pool, gen_pool_first_fit_order_align, NULL); 54 - 55 - pr_info("DMA: preallocated %zu KiB pool for atomic coherent pool\n", 56 - atomic_pool_size / 1024); 57 - 58 - pr_info("DMA: vaddr: 0x%x phy: 0x%lx,\n", (unsigned int)ptr, 59 - page_to_phys(page)); 60 - 61 - return 0; 19 + return dma_atomic_pool_init(GFP_KERNEL, pgprot_noncached(PAGE_KERNEL)); 62 20 } 63 21 postcore_initcall(atomic_pool_init); 64 22 65 - static void *csky_dma_alloc_atomic(struct device *dev, size_t size, 66 - dma_addr_t *dma_handle) 67 - { 68 - unsigned long addr; 69 - 70 - addr = gen_pool_alloc(atomic_pool, size); 71 - if (addr) 72 - *dma_handle = gen_pool_virt_to_phys(atomic_pool, addr); 73 - 74 - return (void *)addr; 75 - } 76 - 77 - static void csky_dma_free_atomic(struct device *dev, size_t size, void *vaddr, 78 - dma_addr_t dma_handle, unsigned long attrs) 79 - { 80 - gen_pool_free(atomic_pool, (unsigned long)vaddr, size); 81 - } 82 - 83 - static void __dma_clear_buffer(struct page *page, size_t size) 23 + void arch_dma_prep_coherent(struct page *page, size_t size) 84 24 { 85 25 if (PageHighMem(page)) { 86 26 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; ··· 45 105 memset(ptr, 0, size); 46 106 dma_wbinv_range((unsigned long)ptr, (unsigned long)ptr + size); 47 107 } 48 - } 49 - 50 - static void *csky_dma_alloc_nonatomic(struct device *dev, size_t size, 51 - dma_addr_t *dma_handle, gfp_t gfp, 52 - unsigned long attrs) 53 - { 54 - void *vaddr; 55 - struct page *page; 56 - unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 57 - 58 - if (DMA_ATTR_NON_CONSISTENT & attrs) { 59 - pr_err("csky %s can't support DMA_ATTR_NON_CONSISTENT.\n", __func__); 60 - return NULL; 61 - } 62 - 63 - if (IS_ENABLED(CONFIG_DMA_CMA)) 64 - page = dma_alloc_from_contiguous(dev, count, get_order(size), 65 - gfp); 66 - else 67 - page = alloc_pages(gfp, get_order(size)); 68 - 69 - if (!page) { 70 - pr_err("csky %s no more free pages.\n", __func__); 71 - return NULL; 72 - } 73 - 74 - *dma_handle = page_to_phys(page); 75 - 76 - __dma_clear_buffer(page, size); 77 - 78 - if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) 79 - return page; 80 - 81 - vaddr = dma_common_contiguous_remap(page, PAGE_ALIGN(size), VM_USERMAP, 82 - pgprot_noncached(PAGE_KERNEL), __builtin_return_address(0)); 83 - if (!vaddr) 84 - BUG(); 85 - 86 - return vaddr; 87 - } 88 - 89 - static void csky_dma_free_nonatomic( 90 - struct device *dev, 91 - size_t size, 92 - void *vaddr, 93 - dma_addr_t dma_handle, 94 - unsigned long attrs 95 - ) 96 - { 97 - struct page *page = phys_to_page(dma_handle); 98 - unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 99 - 100 - if ((unsigned int)vaddr >= VMALLOC_START) 101 - dma_common_free_remap(vaddr, size, VM_USERMAP); 102 - 103 - if (IS_ENABLED(CONFIG_DMA_CMA)) 104 - dma_release_from_contiguous(dev, page, count); 105 - else 106 - __free_pages(page, get_order(size)); 107 - } 108 - 109 - void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 110 - gfp_t gfp, unsigned long attrs) 111 - { 112 - if (gfpflags_allow_blocking(gfp)) 113 - return csky_dma_alloc_nonatomic(dev, size, dma_handle, gfp, 114 - attrs); 115 - else 116 - return csky_dma_alloc_atomic(dev, size, dma_handle); 117 - } 118 - 119 - void arch_dma_free(struct device *dev, size_t size, void *vaddr, 120 - dma_addr_t dma_handle, unsigned long attrs) 121 - { 122 - if (!addr_in_gen_pool(atomic_pool, (unsigned int) vaddr, size)) 123 - csky_dma_free_nonatomic(dev, size, vaddr, dma_handle, attrs); 124 - else 125 - csky_dma_free_atomic(dev, size, vaddr, dma_handle, attrs); 126 108 } 127 109 128 110 static inline void cache_op(phys_addr_t paddr, size_t size,
-1
arch/h8300/Kconfig
··· 22 22 select HAVE_ARCH_KGDB 23 23 select HAVE_ARCH_HASH 24 24 select CPU_NO_EFFICIENT_FFS 25 - select DMA_DIRECT_OPS 26 25 27 26 config CPU_BIG_ENDIAN 28 27 def_bool y
-1
arch/hexagon/Kconfig
··· 31 31 select GENERIC_CLOCKEVENTS_BROADCAST 32 32 select MODULES_USE_ELF_RELA 33 33 select GENERIC_CPU_DEVICES 34 - select DMA_DIRECT_OPS 35 34 ---help--- 36 35 Qualcomm Hexagon is a processor architecture designed for high 37 36 performance and low power across a wide variety of applications.
+2 -2
arch/ia64/Kconfig
··· 28 28 select HAVE_ARCH_TRACEHOOK 29 29 select HAVE_MEMBLOCK_NODE_MAP 30 30 select HAVE_VIRT_CPU_ACCOUNTING 31 - select ARCH_HAS_DMA_MARK_CLEAN 32 - select ARCH_HAS_SG_CHAIN 31 + select ARCH_HAS_DMA_COHERENT_TO_PFN if SWIOTLB 32 + select ARCH_HAS_SYNC_DMA_FOR_CPU 33 33 select VIRT_TO_BUS 34 34 select ARCH_DISCARD_MEMBLOCK 35 35 select GENERIC_IRQ_PROBE
+1 -1
arch/ia64/hp/common/hwsw_iommu.c
··· 38 38 const struct dma_map_ops *hwsw_dma_get_ops(struct device *dev) 39 39 { 40 40 if (use_swiotlb(dev)) 41 - return &swiotlb_dma_ops; 41 + return NULL; 42 42 return &sba_dma_ops; 43 43 } 44 44 EXPORT_SYMBOL(hwsw_dma_get_ops);
+32 -55
arch/ia64/hp/common/sba_iommu.c
··· 907 907 } 908 908 909 909 /** 910 - * sba_map_single_attrs - map one buffer and return IOVA for DMA 910 + * sba_map_page - map one buffer and return IOVA for DMA 911 911 * @dev: instance of PCI owned by the driver that's asking. 912 - * @addr: driver buffer to map. 913 - * @size: number of bytes to map in driver buffer. 914 - * @dir: R/W or both. 912 + * @page: page to map 913 + * @poff: offset into page 914 + * @size: number of bytes to map 915 + * @dir: dma direction 915 916 * @attrs: optional dma attributes 916 917 * 917 918 * See Documentation/DMA-API-HOWTO.txt ··· 945 944 ** Device is bit capable of DMA'ing to the buffer... 946 945 ** just return the PCI address of ptr 947 946 */ 948 - DBG_BYPASS("sba_map_single_attrs() bypass mask/addr: " 947 + DBG_BYPASS("sba_map_page() bypass mask/addr: " 949 948 "0x%lx/0x%lx\n", 950 949 to_pci_dev(dev)->dma_mask, pci_addr); 951 950 return pci_addr; ··· 967 966 968 967 #ifdef ASSERT_PDIR_SANITY 969 968 spin_lock_irqsave(&ioc->res_lock, flags); 970 - if (sba_check_pdir(ioc,"Check before sba_map_single_attrs()")) 969 + if (sba_check_pdir(ioc,"Check before sba_map_page()")) 971 970 panic("Sanity check failed"); 972 971 spin_unlock_irqrestore(&ioc->res_lock, flags); 973 972 #endif 974 973 975 974 pide = sba_alloc_range(ioc, dev, size); 976 975 if (pide < 0) 977 - return 0; 976 + return DMA_MAPPING_ERROR; 978 977 979 978 iovp = (dma_addr_t) pide << iovp_shift; 980 979 ··· 998 997 /* form complete address */ 999 998 #ifdef ASSERT_PDIR_SANITY 1000 999 spin_lock_irqsave(&ioc->res_lock, flags); 1001 - sba_check_pdir(ioc,"Check after sba_map_single_attrs()"); 1000 + sba_check_pdir(ioc,"Check after sba_map_page()"); 1002 1001 spin_unlock_irqrestore(&ioc->res_lock, flags); 1003 1002 #endif 1004 1003 return SBA_IOVA(ioc, iovp, offset); 1005 - } 1006 - 1007 - static dma_addr_t sba_map_single_attrs(struct device *dev, void *addr, 1008 - size_t size, enum dma_data_direction dir, 1009 - unsigned long attrs) 1010 - { 1011 - return sba_map_page(dev, virt_to_page(addr), 1012 - (unsigned long)addr & ~PAGE_MASK, size, dir, attrs); 1013 1004 } 1014 1005 1015 1006 #ifdef ENABLE_MARK_CLEAN ··· 1029 1036 #endif 1030 1037 1031 1038 /** 1032 - * sba_unmap_single_attrs - unmap one IOVA and free resources 1039 + * sba_unmap_page - unmap one IOVA and free resources 1033 1040 * @dev: instance of PCI owned by the driver that's asking. 1034 1041 * @iova: IOVA of driver buffer previously mapped. 1035 1042 * @size: number of bytes mapped in driver buffer. ··· 1056 1063 /* 1057 1064 ** Address does not fall w/in IOVA, must be bypassing 1058 1065 */ 1059 - DBG_BYPASS("sba_unmap_single_attrs() bypass addr: 0x%lx\n", 1066 + DBG_BYPASS("sba_unmap_page() bypass addr: 0x%lx\n", 1060 1067 iova); 1061 1068 1062 1069 #ifdef ENABLE_MARK_CLEAN ··· 1107 1114 #endif /* DELAYED_RESOURCE_CNT == 0 */ 1108 1115 } 1109 1116 1110 - void sba_unmap_single_attrs(struct device *dev, dma_addr_t iova, size_t size, 1111 - enum dma_data_direction dir, unsigned long attrs) 1112 - { 1113 - sba_unmap_page(dev, iova, size, dir, attrs); 1114 - } 1115 - 1116 1117 /** 1117 1118 * sba_alloc_coherent - allocate/map shared mem for DMA 1118 1119 * @dev: instance of PCI owned by the driver that's asking. ··· 1119 1132 sba_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, 1120 1133 gfp_t flags, unsigned long attrs) 1121 1134 { 1135 + struct page *page; 1122 1136 struct ioc *ioc; 1137 + int node = -1; 1123 1138 void *addr; 1124 1139 1125 1140 ioc = GET_IOC(dev); 1126 1141 ASSERT(ioc); 1127 - 1128 1142 #ifdef CONFIG_NUMA 1129 - { 1130 - struct page *page; 1131 - 1132 - page = alloc_pages_node(ioc->node, flags, get_order(size)); 1133 - if (unlikely(!page)) 1134 - return NULL; 1135 - 1136 - addr = page_address(page); 1137 - } 1138 - #else 1139 - addr = (void *) __get_free_pages(flags, get_order(size)); 1143 + node = ioc->node; 1140 1144 #endif 1141 - if (unlikely(!addr)) 1145 + 1146 + page = alloc_pages_node(node, flags, get_order(size)); 1147 + if (unlikely(!page)) 1142 1148 return NULL; 1143 1149 1150 + addr = page_address(page); 1144 1151 memset(addr, 0, size); 1145 - *dma_handle = virt_to_phys(addr); 1152 + *dma_handle = page_to_phys(page); 1146 1153 1147 1154 #ifdef ALLOW_IOV_BYPASS 1148 1155 ASSERT(dev->coherent_dma_mask); ··· 1155 1174 * If device can't bypass or bypass is disabled, pass the 32bit fake 1156 1175 * device to map single to get an iova mapping. 1157 1176 */ 1158 - *dma_handle = sba_map_single_attrs(&ioc->sac_only_dev->dev, addr, 1159 - size, 0, 0); 1160 - 1177 + *dma_handle = sba_map_page(&ioc->sac_only_dev->dev, page, 0, size, 1178 + DMA_BIDIRECTIONAL, 0); 1179 + if (dma_mapping_error(dev, *dma_handle)) 1180 + return NULL; 1161 1181 return addr; 1162 1182 } 1163 1183 ··· 1175 1193 static void sba_free_coherent(struct device *dev, size_t size, void *vaddr, 1176 1194 dma_addr_t dma_handle, unsigned long attrs) 1177 1195 { 1178 - sba_unmap_single_attrs(dev, dma_handle, size, 0, 0); 1196 + sba_unmap_page(dev, dma_handle, size, 0, 0); 1179 1197 free_pages((unsigned long) vaddr, get_order(size)); 1180 1198 } 1181 1199 ··· 1465 1483 /* Fast path single entry scatterlists. */ 1466 1484 if (nents == 1) { 1467 1485 sglist->dma_length = sglist->length; 1468 - sglist->dma_address = sba_map_single_attrs(dev, sba_sg_address(sglist), sglist->length, dir, attrs); 1486 + sglist->dma_address = sba_map_page(dev, sg_page(sglist), 1487 + sglist->offset, sglist->length, dir, attrs); 1488 + if (dma_mapping_error(dev, sglist->dma_address)) 1489 + return 0; 1469 1490 return 1; 1470 1491 } 1471 1492 ··· 1557 1572 1558 1573 while (nents && sglist->dma_length) { 1559 1574 1560 - sba_unmap_single_attrs(dev, sglist->dma_address, 1561 - sglist->dma_length, dir, attrs); 1575 + sba_unmap_page(dev, sglist->dma_address, sglist->dma_length, 1576 + dir, attrs); 1562 1577 sglist = sg_next(sglist); 1563 1578 nents--; 1564 1579 } ··· 2065 2080 /* This has to run before acpi_scan_init(). */ 2066 2081 arch_initcall(acpi_sba_ioc_init_acpi); 2067 2082 2068 - extern const struct dma_map_ops swiotlb_dma_ops; 2069 - 2070 2083 static int __init 2071 2084 sba_init(void) 2072 2085 { ··· 2078 2095 * a successful kdump kernel boot is to use the swiotlb. 2079 2096 */ 2080 2097 if (is_kdump_kernel()) { 2081 - dma_ops = &swiotlb_dma_ops; 2098 + dma_ops = NULL; 2082 2099 if (swiotlb_late_init_with_default_size(64 * (1<<20)) != 0) 2083 2100 panic("Unable to initialize software I/O TLB:" 2084 2101 " Try machvec=dig boot option"); ··· 2100 2117 * If we didn't find something sba_iommu can claim, we 2101 2118 * need to setup the swiotlb and switch to the dig machvec. 2102 2119 */ 2103 - dma_ops = &swiotlb_dma_ops; 2120 + dma_ops = NULL; 2104 2121 if (swiotlb_late_init_with_default_size(64 * (1<<20)) != 0) 2105 2122 panic("Unable to find SBA IOMMU or initialize " 2106 2123 "software I/O TLB: Try machvec=dig boot option"); ··· 2153 2170 return ((mask & 0xFFFFFFFFUL) == 0xFFFFFFFFUL); 2154 2171 } 2155 2172 2156 - static int sba_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 2157 - { 2158 - return 0; 2159 - } 2160 - 2161 2173 __setup("nosbagart", nosbagart); 2162 2174 2163 2175 static int __init ··· 2186 2208 .map_sg = sba_map_sg_attrs, 2187 2209 .unmap_sg = sba_unmap_sg_attrs, 2188 2210 .dma_supported = sba_dma_supported, 2189 - .mapping_error = sba_dma_mapping_error, 2190 2211 }; 2191 2212 2192 2213 void sba_dma_init(void)
+19 -2
arch/ia64/kernel/dma-mapping.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 - #include <linux/dma-mapping.h> 2 + #include <linux/dma-direct.h> 3 3 #include <linux/swiotlb.h> 4 4 #include <linux/export.h> 5 5 ··· 16 16 EXPORT_SYMBOL(dma_get_ops); 17 17 18 18 #ifdef CONFIG_SWIOTLB 19 + void *arch_dma_alloc(struct device *dev, size_t size, 20 + dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 21 + { 22 + return dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs); 23 + } 24 + 25 + void arch_dma_free(struct device *dev, size_t size, void *cpu_addr, 26 + dma_addr_t dma_addr, unsigned long attrs) 27 + { 28 + dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs); 29 + } 30 + 31 + long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr, 32 + dma_addr_t dma_addr) 33 + { 34 + return page_to_pfn(virt_to_page(cpu_addr)); 35 + } 36 + 19 37 void __init swiotlb_dma_init(void) 20 38 { 21 - dma_ops = &swiotlb_dma_ops; 22 39 swiotlb_init(1); 23 40 } 24 41 #endif
+7 -10
arch/ia64/mm/init.c
··· 8 8 #include <linux/kernel.h> 9 9 #include <linux/init.h> 10 10 11 + #include <linux/dma-noncoherent.h> 11 12 #include <linux/efi.h> 12 13 #include <linux/elf.h> 13 14 #include <linux/memblock.h> ··· 72 71 * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to 73 72 * flush them when they get mapped into an executable vm-area. 74 73 */ 75 - void 76 - dma_mark_clean(void *addr, size_t size) 74 + void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr, 75 + size_t size, enum dma_data_direction dir) 77 76 { 78 - unsigned long pg_addr, end; 77 + unsigned long pfn = PHYS_PFN(paddr); 79 78 80 - pg_addr = PAGE_ALIGN((unsigned long) addr); 81 - end = (unsigned long) addr + size; 82 - while (pg_addr + PAGE_SIZE <= end) { 83 - struct page *page = virt_to_page(pg_addr); 84 - set_bit(PG_arch_1, &page->flags); 85 - pg_addr += PAGE_SIZE; 86 - } 79 + do { 80 + set_bit(PG_arch_1, &pfn_to_page(pfn)->flags); 81 + } while (++pfn <= PHYS_PFN(paddr + size - 1)); 87 82 } 88 83 89 84 inline void
+1 -7
arch/ia64/sn/pci/pci_dma.c
··· 196 196 197 197 if (!dma_addr) { 198 198 printk(KERN_ERR "%s: out of ATEs\n", __func__); 199 - return 0; 199 + return DMA_MAPPING_ERROR; 200 200 } 201 201 return dma_addr; 202 202 } ··· 312 312 } 313 313 314 314 return nhwentries; 315 - } 316 - 317 - static int sn_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 318 - { 319 - return 0; 320 315 } 321 316 322 317 static u64 sn_dma_get_required_mask(struct device *dev) ··· 436 441 .unmap_page = sn_dma_unmap_page, 437 442 .map_sg = sn_dma_map_sg, 438 443 .unmap_sg = sn_dma_unmap_sg, 439 - .mapping_error = sn_dma_mapping_error, 440 444 .dma_supported = sn_dma_supported, 441 445 .get_required_mask = sn_dma_get_required_mask, 442 446 };
-1
arch/m68k/Kconfig
··· 26 26 select MODULES_USE_ELF_RELA 27 27 select OLD_SIGSUSPEND3 28 28 select OLD_SIGACTION 29 - select DMA_DIRECT_OPS if HAS_DMA 30 29 select ARCH_DISCARD_MEMBLOCK 31 30 32 31 config CPU_BIG_ENDIAN
+1 -1
arch/m68k/kernel/dma.c
··· 32 32 size = PAGE_ALIGN(size); 33 33 order = get_order(size); 34 34 35 - page = alloc_pages(flag, order); 35 + page = alloc_pages(flag | __GFP_ZERO, order); 36 36 if (!page) 37 37 return NULL; 38 38
-1
arch/microblaze/Kconfig
··· 12 12 select TIMER_OF 13 13 select CLONE_BACKWARDS3 14 14 select COMMON_CLK 15 - select DMA_DIRECT_OPS 16 15 select GENERIC_ATOMIC64 17 16 select GENERIC_CLOCKEVENTS 18 17 select GENERIC_CPU_DEVICES
+1 -1
arch/microblaze/mm/consistent.c
··· 81 81 size = PAGE_ALIGN(size); 82 82 order = get_order(size); 83 83 84 - vaddr = __get_free_pages(gfp, order); 84 + vaddr = __get_free_pages(gfp | __GFP_ZERO, order); 85 85 if (!vaddr) 86 86 return NULL; 87 87
-1
arch/mips/Kconfig
··· 18 18 select CLONE_BACKWARDS 19 19 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1) 20 20 select CPU_PM if CPU_IDLE 21 - select DMA_DIRECT_OPS 22 21 select GENERIC_ATOMIC64 if !64BIT 23 22 select GENERIC_CLOCKEVENTS 24 23 select GENERIC_CMOS_UPDATE
+1 -3
arch/mips/include/asm/dma-mapping.h
··· 10 10 { 11 11 #if defined(CONFIG_MACH_JAZZ) 12 12 return &jazz_dma_ops; 13 - #elif defined(CONFIG_SWIOTLB) 14 - return &swiotlb_dma_ops; 15 13 #else 16 - return &dma_direct_ops; 14 + return NULL; 17 15 #endif 18 16 } 19 17
-6
arch/mips/include/asm/jazzdma.h
··· 40 40 #define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1)) 41 41 42 42 /* 43 - * error code returned by vdma_alloc() 44 - * (See also arch/mips/kernel/jazzdma.c) 45 - */ 46 - #define VDMA_ERROR 0xffffffff 47 - 48 - /* 49 43 * VDMA pagetable entry description 50 44 */ 51 45 typedef volatile struct VDMA_PGTBL_ENTRY {
+5 -11
arch/mips/jazz/jazzdma.c
··· 104 104 if (vdma_debug) 105 105 printk("vdma_alloc: Invalid physical address: %08lx\n", 106 106 paddr); 107 - return VDMA_ERROR; /* invalid physical address */ 107 + return DMA_MAPPING_ERROR; /* invalid physical address */ 108 108 } 109 109 if (size > 0x400000 || size == 0) { 110 110 if (vdma_debug) 111 111 printk("vdma_alloc: Invalid size: %08lx\n", size); 112 - return VDMA_ERROR; /* invalid physical address */ 112 + return DMA_MAPPING_ERROR; /* invalid physical address */ 113 113 } 114 114 115 115 spin_lock_irqsave(&vdma_lock, flags); ··· 123 123 first < VDMA_PGTBL_ENTRIES) first++; 124 124 if (first + pages > VDMA_PGTBL_ENTRIES) { /* nothing free */ 125 125 spin_unlock_irqrestore(&vdma_lock, flags); 126 - return VDMA_ERROR; 126 + return DMA_MAPPING_ERROR; 127 127 } 128 128 129 129 last = first + 1; ··· 569 569 return NULL; 570 570 571 571 *dma_handle = vdma_alloc(virt_to_phys(ret), size); 572 - if (*dma_handle == VDMA_ERROR) { 572 + if (*dma_handle == DMA_MAPPING_ERROR) { 573 573 dma_direct_free_pages(dev, size, ret, *dma_handle, attrs); 574 574 return NULL; 575 575 } ··· 620 620 arch_sync_dma_for_device(dev, sg_phys(sg), sg->length, 621 621 dir); 622 622 sg->dma_address = vdma_alloc(sg_phys(sg), sg->length); 623 - if (sg->dma_address == VDMA_ERROR) 623 + if (sg->dma_address == DMA_MAPPING_ERROR) 624 624 return 0; 625 625 sg_dma_len(sg) = sg->length; 626 626 } ··· 674 674 arch_sync_dma_for_cpu(dev, sg_phys(sg), sg->length, dir); 675 675 } 676 676 677 - static int jazz_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 678 - { 679 - return dma_addr == VDMA_ERROR; 680 - } 681 - 682 677 const struct dma_map_ops jazz_dma_ops = { 683 678 .alloc = jazz_dma_alloc, 684 679 .free = jazz_dma_free, ··· 687 692 .sync_sg_for_device = jazz_dma_sync_sg_for_device, 688 693 .dma_supported = dma_direct_supported, 689 694 .cache_sync = arch_dma_cache_sync, 690 - .mapping_error = jazz_dma_mapping_error, 691 695 }; 692 696 EXPORT_SYMBOL(jazz_dma_ops);
-1
arch/nds32/Kconfig
··· 11 11 select CLKSRC_MMIO 12 12 select CLONE_BACKWARDS 13 13 select COMMON_CLK 14 - select DMA_DIRECT_OPS 15 14 select GENERIC_ATOMIC64 16 15 select GENERIC_CPU_DEVICES 17 16 select GENERIC_CLOCKEVENTS
-1
arch/nios2/Kconfig
··· 4 4 select ARCH_HAS_SYNC_DMA_FOR_CPU 5 5 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 6 6 select ARCH_NO_SWAP 7 - select DMA_DIRECT_OPS 8 7 select TIMER_OF 9 8 select GENERIC_ATOMIC64 10 9 select GENERIC_CLOCKEVENTS
-1
arch/openrisc/Kconfig
··· 7 7 config OPENRISC 8 8 def_bool y 9 9 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 10 - select DMA_DIRECT_OPS 11 10 select OF 12 11 select OF_EARLY_FLATTREE 13 12 select IRQ_DOMAIN
+1 -1
arch/openrisc/kernel/dma.c
··· 89 89 .mm = &init_mm 90 90 }; 91 91 92 - page = alloc_pages_exact(size, gfp); 92 + page = alloc_pages_exact(size, gfp | __GFP_ZERO); 93 93 if (!page) 94 94 return NULL; 95 95
+1 -1
arch/parisc/Kconfig
··· 11 11 select ARCH_HAS_ELF_RANDOMIZE 12 12 select ARCH_HAS_STRICT_KERNEL_RWX 13 13 select ARCH_HAS_UBSAN_SANITIZE_ALL 14 + select ARCH_NO_SG_CHAIN 14 15 select ARCH_SUPPORTS_MEMORY_FAILURE 15 16 select RTC_CLASS 16 17 select RTC_DRV_GENERIC ··· 185 184 depends on PA7000 || PA7100LC || PA7200 || PA7300LC 186 185 select ARCH_HAS_SYNC_DMA_FOR_CPU 187 186 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 188 - select DMA_DIRECT_OPS 189 187 select DMA_NONCOHERENT_CACHE_SYNC 190 188 191 189 config PREFETCH
+2 -2
arch/parisc/kernel/pci-dma.c
··· 404 404 order = get_order(size); 405 405 size = 1 << (order + PAGE_SHIFT); 406 406 vaddr = pcxl_alloc_range(size); 407 - paddr = __get_free_pages(flag, order); 407 + paddr = __get_free_pages(flag | __GFP_ZERO, order); 408 408 flush_kernel_dcache_range(paddr, size); 409 409 paddr = __pa(paddr); 410 410 map_uncached_pages(vaddr, size, paddr); ··· 429 429 if ((attrs & DMA_ATTR_NON_CONSISTENT) == 0) 430 430 return NULL; 431 431 432 - addr = (void *)__get_free_pages(flag, get_order(size)); 432 + addr = (void *)__get_free_pages(flag | __GFP_ZERO, get_order(size)); 433 433 if (addr) 434 434 *dma_handle = (dma_addr_t)virt_to_phys(addr); 435 435
-4
arch/parisc/kernel/setup.c
··· 99 99 100 100 case pcxl2: 101 101 pa7300lc_init(); 102 - case pcxl: /* falls through */ 103 - case pcxs: 104 - case pcxt: 105 - hppa_dma_ops = &dma_direct_ops; 106 102 break; 107 103 default: 108 104 break;
-1
arch/powerpc/Kconfig
··· 139 139 select ARCH_HAS_PTE_SPECIAL 140 140 select ARCH_HAS_MEMBARRIER_CALLBACKS 141 141 select ARCH_HAS_SCALED_CPUTIME if VIRT_CPU_ACCOUNTING_NATIVE && PPC64 142 - select ARCH_HAS_SG_CHAIN 143 142 select ARCH_HAS_STRICT_KERNEL_RWX if ((PPC_BOOK3S_64 || PPC32) && !RELOCATABLE && !HIBERNATION) 144 143 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 145 144 select ARCH_HAS_UACCESS_FLUSHCACHE if PPC64
-1
arch/powerpc/include/asm/dma-mapping.h
··· 103 103 } 104 104 105 105 #define HAVE_ARCH_DMA_SET_MASK 1 106 - extern int dma_set_mask(struct device *dev, u64 dma_mask); 107 106 108 107 extern u64 __dma_get_required_mask(struct device *dev); 109 108
-4
arch/powerpc/include/asm/iommu.h
··· 143 143 144 144 #ifdef CONFIG_PPC64 145 145 146 - #define IOMMU_MAPPING_ERROR (~(dma_addr_t)0x0) 147 - 148 146 static inline void set_iommu_table_base(struct device *dev, 149 147 struct iommu_table *base) 150 148 { ··· 236 238 { 237 239 } 238 240 #endif /* !CONFIG_IOMMU_API */ 239 - 240 - int dma_iommu_mapping_error(struct device *dev, dma_addr_t dma_addr); 241 241 242 242 #else 243 243
-6
arch/powerpc/kernel/dma-iommu.c
··· 105 105 return mask; 106 106 } 107 107 108 - int dma_iommu_mapping_error(struct device *dev, dma_addr_t dma_addr) 109 - { 110 - return dma_addr == IOMMU_MAPPING_ERROR; 111 - } 112 - 113 108 struct dma_map_ops dma_iommu_ops = { 114 109 .alloc = dma_iommu_alloc_coherent, 115 110 .free = dma_iommu_free_coherent, ··· 115 120 .map_page = dma_iommu_map_page, 116 121 .unmap_page = dma_iommu_unmap_page, 117 122 .get_required_mask = dma_iommu_get_required_mask, 118 - .mapping_error = dma_iommu_mapping_error, 119 123 };
+8 -9
arch/powerpc/kernel/dma-swiotlb.c
··· 50 50 .alloc = __dma_nommu_alloc_coherent, 51 51 .free = __dma_nommu_free_coherent, 52 52 .mmap = dma_nommu_mmap_coherent, 53 - .map_sg = swiotlb_map_sg_attrs, 54 - .unmap_sg = swiotlb_unmap_sg_attrs, 53 + .map_sg = dma_direct_map_sg, 54 + .unmap_sg = dma_direct_unmap_sg, 55 55 .dma_supported = swiotlb_dma_supported, 56 - .map_page = swiotlb_map_page, 57 - .unmap_page = swiotlb_unmap_page, 58 - .sync_single_for_cpu = swiotlb_sync_single_for_cpu, 59 - .sync_single_for_device = swiotlb_sync_single_for_device, 60 - .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, 61 - .sync_sg_for_device = swiotlb_sync_sg_for_device, 62 - .mapping_error = dma_direct_mapping_error, 56 + .map_page = dma_direct_map_page, 57 + .unmap_page = dma_direct_unmap_page, 58 + .sync_single_for_cpu = dma_direct_sync_single_for_cpu, 59 + .sync_single_for_device = dma_direct_sync_single_for_device, 60 + .sync_sg_for_cpu = dma_direct_sync_sg_for_cpu, 61 + .sync_sg_for_device = dma_direct_sync_sg_for_device, 63 62 .get_required_mask = swiotlb_powerpc_get_required, 64 63 }; 65 64
+14 -14
arch/powerpc/kernel/iommu.c
··· 198 198 if (unlikely(npages == 0)) { 199 199 if (printk_ratelimit()) 200 200 WARN_ON(1); 201 - return IOMMU_MAPPING_ERROR; 201 + return DMA_MAPPING_ERROR; 202 202 } 203 203 204 204 if (should_fail_iommu(dev)) 205 - return IOMMU_MAPPING_ERROR; 205 + return DMA_MAPPING_ERROR; 206 206 207 207 /* 208 208 * We don't need to disable preemption here because any CPU can ··· 278 278 } else { 279 279 /* Give up */ 280 280 spin_unlock_irqrestore(&(pool->lock), flags); 281 - return IOMMU_MAPPING_ERROR; 281 + return DMA_MAPPING_ERROR; 282 282 } 283 283 } 284 284 ··· 310 310 unsigned long attrs) 311 311 { 312 312 unsigned long entry; 313 - dma_addr_t ret = IOMMU_MAPPING_ERROR; 313 + dma_addr_t ret = DMA_MAPPING_ERROR; 314 314 int build_fail; 315 315 316 316 entry = iommu_range_alloc(dev, tbl, npages, NULL, mask, align_order); 317 317 318 - if (unlikely(entry == IOMMU_MAPPING_ERROR)) 319 - return IOMMU_MAPPING_ERROR; 318 + if (unlikely(entry == DMA_MAPPING_ERROR)) 319 + return DMA_MAPPING_ERROR; 320 320 321 321 entry += tbl->it_offset; /* Offset into real TCE table */ 322 322 ret = entry << tbl->it_page_shift; /* Set the return dma address */ ··· 328 328 329 329 /* tbl->it_ops->set() only returns non-zero for transient errors. 330 330 * Clean up the table bitmap in this case and return 331 - * IOMMU_MAPPING_ERROR. For all other errors the functionality is 331 + * DMA_MAPPING_ERROR. For all other errors the functionality is 332 332 * not altered. 333 333 */ 334 334 if (unlikely(build_fail)) { 335 335 __iommu_free(tbl, ret, npages); 336 - return IOMMU_MAPPING_ERROR; 336 + return DMA_MAPPING_ERROR; 337 337 } 338 338 339 339 /* Flush/invalidate TLB caches if necessary */ ··· 478 478 DBG(" - vaddr: %lx, size: %lx\n", vaddr, slen); 479 479 480 480 /* Handle failure */ 481 - if (unlikely(entry == IOMMU_MAPPING_ERROR)) { 481 + if (unlikely(entry == DMA_MAPPING_ERROR)) { 482 482 if (!(attrs & DMA_ATTR_NO_WARN) && 483 483 printk_ratelimit()) 484 484 dev_info(dev, "iommu_alloc failed, tbl %p " ··· 545 545 */ 546 546 if (outcount < incount) { 547 547 outs = sg_next(outs); 548 - outs->dma_address = IOMMU_MAPPING_ERROR; 548 + outs->dma_address = DMA_MAPPING_ERROR; 549 549 outs->dma_length = 0; 550 550 } 551 551 ··· 563 563 npages = iommu_num_pages(s->dma_address, s->dma_length, 564 564 IOMMU_PAGE_SIZE(tbl)); 565 565 __iommu_free(tbl, vaddr, npages); 566 - s->dma_address = IOMMU_MAPPING_ERROR; 566 + s->dma_address = DMA_MAPPING_ERROR; 567 567 s->dma_length = 0; 568 568 } 569 569 if (s == outs) ··· 777 777 unsigned long mask, enum dma_data_direction direction, 778 778 unsigned long attrs) 779 779 { 780 - dma_addr_t dma_handle = IOMMU_MAPPING_ERROR; 780 + dma_addr_t dma_handle = DMA_MAPPING_ERROR; 781 781 void *vaddr; 782 782 unsigned long uaddr; 783 783 unsigned int npages, align; ··· 797 797 dma_handle = iommu_alloc(dev, tbl, vaddr, npages, direction, 798 798 mask >> tbl->it_page_shift, align, 799 799 attrs); 800 - if (dma_handle == IOMMU_MAPPING_ERROR) { 800 + if (dma_handle == DMA_MAPPING_ERROR) { 801 801 if (!(attrs & DMA_ATTR_NO_WARN) && 802 802 printk_ratelimit()) { 803 803 dev_info(dev, "iommu_alloc failed, tbl %p " ··· 869 869 io_order = get_iommu_order(size, tbl); 870 870 mapping = iommu_alloc(dev, tbl, ret, nio_pages, DMA_BIDIRECTIONAL, 871 871 mask >> tbl->it_page_shift, io_order, 0); 872 - if (mapping == IOMMU_MAPPING_ERROR) { 872 + if (mapping == DMA_MAPPING_ERROR) { 873 873 free_pages((unsigned long)ret, order); 874 874 return NULL; 875 875 }
-1
arch/powerpc/platforms/cell/iommu.c
··· 654 654 .dma_supported = dma_suported_and_switch, 655 655 .map_page = dma_fixed_map_page, 656 656 .unmap_page = dma_fixed_unmap_page, 657 - .mapping_error = dma_iommu_mapping_error, 658 657 }; 659 658 660 659 static void cell_dma_dev_setup(struct device *dev)
+1 -2
arch/powerpc/platforms/pseries/vio.c
··· 519 519 { 520 520 struct vio_dev *viodev = to_vio_dev(dev); 521 521 struct iommu_table *tbl; 522 - dma_addr_t ret = IOMMU_MAPPING_ERROR; 522 + dma_addr_t ret = DMA_MAPPING_ERROR; 523 523 524 524 tbl = get_iommu_table_base(dev); 525 525 if (vio_cmo_alloc(viodev, roundup(size, IOMMU_PAGE_SIZE(tbl)))) { ··· 625 625 .unmap_page = vio_dma_iommu_unmap_page, 626 626 .dma_supported = vio_dma_iommu_dma_supported, 627 627 .get_required_mask = vio_dma_get_required_mask, 628 - .mapping_error = dma_iommu_mapping_error, 629 628 }; 630 629 631 630 /**
-1
arch/riscv/Kconfig
··· 19 19 select ARCH_WANT_FRAME_POINTERS 20 20 select CLONE_BACKWARDS 21 21 select COMMON_CLK 22 - select DMA_DIRECT_OPS 23 22 select GENERIC_CLOCKEVENTS 24 23 select GENERIC_CPU_DEVICES 25 24 select GENERIC_IRQ_SHOW
-15
arch/riscv/include/asm/dma-mapping.h
··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - #ifndef _RISCV_ASM_DMA_MAPPING_H 3 - #define _RISCV_ASM_DMA_MAPPING_H 1 4 - 5 - #ifdef CONFIG_SWIOTLB 6 - #include <linux/swiotlb.h> 7 - static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) 8 - { 9 - return &swiotlb_dma_ops; 10 - } 11 - #else 12 - #include <asm-generic/dma-mapping.h> 13 - #endif /* CONFIG_SWIOTLB */ 14 - 15 - #endif /* _RISCV_ASM_DMA_MAPPING_H */
-2
arch/s390/Kconfig
··· 73 73 select ARCH_HAS_KCOV 74 74 select ARCH_HAS_PTE_SPECIAL 75 75 select ARCH_HAS_SET_MEMORY 76 - select ARCH_HAS_SG_CHAIN 77 76 select ARCH_HAS_STRICT_KERNEL_RWX 78 77 select ARCH_HAS_STRICT_MODULE_RWX 79 78 select ARCH_HAS_UBSAN_SANITIZE_ALL ··· 139 140 select HAVE_COPY_THREAD_TLS 140 141 select HAVE_DEBUG_KMEMLEAK 141 142 select HAVE_DMA_CONTIGUOUS 142 - select DMA_DIRECT_OPS 143 143 select HAVE_DYNAMIC_FTRACE 144 144 select HAVE_DYNAMIC_FTRACE_WITH_REGS 145 145 select HAVE_EFFICIENT_UNALIGNED_ACCESS
+6 -14
arch/s390/pci/pci_dma.c
··· 15 15 #include <linux/pci.h> 16 16 #include <asm/pci_dma.h> 17 17 18 - #define S390_MAPPING_ERROR (~(dma_addr_t) 0x0) 19 - 20 18 static struct kmem_cache *dma_region_table_cache; 21 19 static struct kmem_cache *dma_page_table_cache; 22 20 static int s390_iommu_strict; ··· 299 301 300 302 out_error: 301 303 spin_unlock_irqrestore(&zdev->iommu_bitmap_lock, flags); 302 - return S390_MAPPING_ERROR; 304 + return DMA_MAPPING_ERROR; 303 305 } 304 306 305 307 static void dma_free_address(struct device *dev, dma_addr_t dma_addr, int size) ··· 347 349 /* This rounds up number of pages based on size and offset */ 348 350 nr_pages = iommu_num_pages(pa, size, PAGE_SIZE); 349 351 dma_addr = dma_alloc_address(dev, nr_pages); 350 - if (dma_addr == S390_MAPPING_ERROR) { 352 + if (dma_addr == DMA_MAPPING_ERROR) { 351 353 ret = -ENOSPC; 352 354 goto out_err; 353 355 } ··· 370 372 out_err: 371 373 zpci_err("map error:\n"); 372 374 zpci_err_dma(ret, pa); 373 - return S390_MAPPING_ERROR; 375 + return DMA_MAPPING_ERROR; 374 376 } 375 377 376 378 static void s390_dma_unmap_pages(struct device *dev, dma_addr_t dma_addr, ··· 404 406 dma_addr_t map; 405 407 406 408 size = PAGE_ALIGN(size); 407 - page = alloc_pages(flag, get_order(size)); 409 + page = alloc_pages(flag | __GFP_ZERO, get_order(size)); 408 410 if (!page) 409 411 return NULL; 410 412 ··· 447 449 int ret; 448 450 449 451 dma_addr_base = dma_alloc_address(dev, nr_pages); 450 - if (dma_addr_base == S390_MAPPING_ERROR) 452 + if (dma_addr_base == DMA_MAPPING_ERROR) 451 453 return -ENOMEM; 452 454 453 455 dma_addr = dma_addr_base; ··· 494 496 for (i = 1; i < nr_elements; i++) { 495 497 s = sg_next(s); 496 498 497 - s->dma_address = S390_MAPPING_ERROR; 499 + s->dma_address = DMA_MAPPING_ERROR; 498 500 s->dma_length = 0; 499 501 500 502 if (s->offset || (size & ~PAGE_MASK) || ··· 544 546 } 545 547 } 546 548 547 - static int s390_mapping_error(struct device *dev, dma_addr_t dma_addr) 548 - { 549 - return dma_addr == S390_MAPPING_ERROR; 550 - } 551 - 552 549 int zpci_dma_init_device(struct zpci_dev *zdev) 553 550 { 554 551 int rc; ··· 668 675 .unmap_sg = s390_dma_unmap_sg, 669 676 .map_page = s390_dma_map_pages, 670 677 .unmap_page = s390_dma_unmap_pages, 671 - .mapping_error = s390_mapping_error, 672 678 /* dma_supported is unconditionally true without a callback */ 673 679 }; 674 680 EXPORT_SYMBOL_GPL(s390_pci_dma_ops);
-1
arch/sh/Kconfig
··· 7 7 select ARCH_NO_COHERENT_DMA_MMAP if !MMU 8 8 select HAVE_PATA_PLATFORM 9 9 select CLKDEV_LOOKUP 10 - select DMA_DIRECT_OPS 11 10 select HAVE_IDE if HAS_IOPORT_MAP 12 11 select HAVE_MEMBLOCK_NODE_MAP 13 12 select ARCH_DISCARD_MEMBLOCK
-2
arch/sparc/Kconfig
··· 40 40 select MODULES_USE_ELF_RELA 41 41 select ODD_RT_SIGACTION 42 42 select OLD_SIGSUSPEND 43 - select ARCH_HAS_SG_CHAIN 44 43 select CPU_NO_EFFICIENT_FFS 45 44 select LOCKDEP_SMALL if LOCKDEP 46 45 select NEED_DMA_MAP_STATE ··· 48 49 config SPARC32 49 50 def_bool !64BIT 50 51 select ARCH_HAS_SYNC_DMA_FOR_CPU 51 - select DMA_DIRECT_OPS 52 52 select GENERIC_ATOMIC64 53 53 select CLZ_TAB 54 54 select HAVE_UID16
+3 -5
arch/sparc/include/asm/dma-mapping.h
··· 2 2 #ifndef ___ASM_SPARC_DMA_MAPPING_H 3 3 #define ___ASM_SPARC_DMA_MAPPING_H 4 4 5 - #include <linux/scatterlist.h> 6 - #include <linux/mm.h> 7 - #include <linux/dma-debug.h> 5 + #include <asm/cpu_type.h> 8 6 9 7 extern const struct dma_map_ops *dma_ops; 10 8 ··· 12 14 { 13 15 #ifdef CONFIG_SPARC_LEON 14 16 if (sparc_cpu_model == sparc_leon) 15 - return &dma_direct_ops; 17 + return NULL; 16 18 #endif 17 19 #if defined(CONFIG_SPARC32) && defined(CONFIG_PCI) 18 20 if (bus == &pci_bus_type) 19 - return &dma_direct_ops; 21 + return NULL; 20 22 #endif 21 23 return dma_ops; 22 24 }
+2 -46
arch/sparc/include/asm/dma.h
··· 91 91 #endif 92 92 93 93 #ifdef CONFIG_SPARC32 94 - 95 - /* Routines for data transfer buffers. */ 96 94 struct device; 97 - struct scatterlist; 98 95 99 - struct sparc32_dma_ops { 100 - __u32 (*get_scsi_one)(struct device *, char *, unsigned long); 101 - void (*get_scsi_sgl)(struct device *, struct scatterlist *, int); 102 - void (*release_scsi_one)(struct device *, __u32, unsigned long); 103 - void (*release_scsi_sgl)(struct device *, struct scatterlist *,int); 104 - #ifdef CONFIG_SBUS 105 - int (*map_dma_area)(struct device *, dma_addr_t *, unsigned long, unsigned long, int); 106 - void (*unmap_dma_area)(struct device *, unsigned long, int); 107 - #endif 108 - }; 109 - extern const struct sparc32_dma_ops *sparc32_dma_ops; 110 - 111 - #define mmu_get_scsi_one(dev,vaddr,len) \ 112 - sparc32_dma_ops->get_scsi_one(dev, vaddr, len) 113 - #define mmu_get_scsi_sgl(dev,sg,sz) \ 114 - sparc32_dma_ops->get_scsi_sgl(dev, sg, sz) 115 - #define mmu_release_scsi_one(dev,vaddr,len) \ 116 - sparc32_dma_ops->release_scsi_one(dev, vaddr,len) 117 - #define mmu_release_scsi_sgl(dev,sg,sz) \ 118 - sparc32_dma_ops->release_scsi_sgl(dev, sg, sz) 119 - 120 - #ifdef CONFIG_SBUS 121 - /* 122 - * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep. 123 - * 124 - * The mmu_map_dma_area establishes two mappings in one go. 125 - * These mappings point to pages normally mapped at 'va' (linear address). 126 - * First mapping is for CPU visible address at 'a', uncached. 127 - * This is an alias, but it works because it is an uncached mapping. 128 - * Second mapping is for device visible address, or "bus" address. 129 - * The bus address is returned at '*pba'. 130 - * 131 - * These functions seem distinct, but are hard to split. 132 - * On sun4m, page attributes depend on the CPU type, so we have to 133 - * know if we are mapping RAM or I/O, so it has to be an additional argument 134 - * to a separate mapping function for CPU visible mappings. 135 - */ 136 - #define sbus_map_dma_area(dev,pba,va,a,len) \ 137 - sparc32_dma_ops->map_dma_area(dev, pba, va, a, len) 138 - #define sbus_unmap_dma_area(dev,ba,len) \ 139 - sparc32_dma_ops->unmap_dma_area(dev, ba, len) 140 - #endif /* CONFIG_SBUS */ 141 - 96 + unsigned long sparc_dma_alloc_resource(struct device *dev, size_t len); 97 + bool sparc_dma_free_resource(void *cpu_addr, size_t size); 142 98 #endif 143 99 144 100 #endif /* !(_ASM_SPARC_DMA_H) */
+9
arch/sparc/include/asm/leon.h
··· 254 254 #define _pfn_valid(pfn) ((pfn < last_valid_pfn) && (pfn >= PFN(phys_base))) 255 255 #define _SRMMU_PTE_PMASK_LEON 0xffffffff 256 256 257 + /* 258 + * On LEON PCI Memory space is mapped 1:1 with physical address space. 259 + * 260 + * I/O space is located at low 64Kbytes in PCI I/O space. The I/O addresses 261 + * are converted into CPU addresses to virtual addresses that are mapped with 262 + * MMU to the PCI Host PCI I/O space window which are translated to the low 263 + * 64Kbytes by the Host controller. 264 + */ 265 + 257 266 #endif
+49 -4
arch/sparc/include/asm/pci.h
··· 1 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 2 #ifndef ___ASM_SPARC_PCI_H 3 3 #define ___ASM_SPARC_PCI_H 4 - #if defined(__sparc__) && defined(__arch64__) 5 - #include <asm/pci_64.h> 4 + 5 + 6 + /* Can be used to override the logic in pci_scan_bus for skipping 7 + * already-configured bus numbers - to be used for buggy BIOSes 8 + * or architectures with incomplete PCI setup by the loader. 9 + */ 10 + #define pcibios_assign_all_busses() 0 11 + 12 + #define PCIBIOS_MIN_IO 0UL 13 + #define PCIBIOS_MIN_MEM 0UL 14 + 15 + #define PCI_IRQ_NONE 0xffffffff 16 + 17 + 18 + #ifdef CONFIG_SPARC64 19 + 20 + /* PCI IOMMU mapping bypass support. */ 21 + 22 + /* PCI 64-bit addressing works for all slots on all controller 23 + * types on sparc64. However, it requires that the device 24 + * can drive enough of the 64 bits. 25 + */ 26 + #define PCI64_REQUIRED_MASK (~(u64)0) 27 + #define PCI64_ADDR_BASE 0xfffc000000000000UL 28 + 29 + /* Return the index of the PCI controller for device PDEV. */ 30 + int pci_domain_nr(struct pci_bus *bus); 31 + static inline int pci_proc_domain(struct pci_bus *bus) 32 + { 33 + return 1; 34 + } 35 + 36 + /* Platform support for /proc/bus/pci/X/Y mmap()s. */ 37 + #define HAVE_PCI_MMAP 38 + #define arch_can_pci_mmap_io() 1 39 + #define HAVE_ARCH_PCI_GET_UNMAPPED_AREA 40 + #define get_pci_unmapped_area get_fb_unmapped_area 41 + 42 + #define HAVE_ARCH_PCI_RESOURCE_TO_USER 43 + #endif /* CONFIG_SPARC64 */ 44 + 45 + #if defined(CONFIG_SPARC64) || defined(CONFIG_LEON_PCI) 46 + static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 47 + { 48 + return PCI_IRQ_NONE; 49 + } 6 50 #else 7 - #include <asm/pci_32.h> 51 + #include <asm-generic/pci.h> 8 52 #endif 9 - #endif 53 + 54 + #endif /* ___ASM_SPARC_PCI_H */
-41
arch/sparc/include/asm/pci_32.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef __SPARC_PCI_H 3 - #define __SPARC_PCI_H 4 - 5 - #ifdef __KERNEL__ 6 - 7 - #include <linux/dma-mapping.h> 8 - 9 - /* Can be used to override the logic in pci_scan_bus for skipping 10 - * already-configured bus numbers - to be used for buggy BIOSes 11 - * or architectures with incomplete PCI setup by the loader. 12 - */ 13 - #define pcibios_assign_all_busses() 0 14 - 15 - #define PCIBIOS_MIN_IO 0UL 16 - #define PCIBIOS_MIN_MEM 0UL 17 - 18 - #define PCI_IRQ_NONE 0xffffffff 19 - 20 - #endif /* __KERNEL__ */ 21 - 22 - #ifndef CONFIG_LEON_PCI 23 - /* generic pci stuff */ 24 - #include <asm-generic/pci.h> 25 - #else 26 - /* 27 - * On LEON PCI Memory space is mapped 1:1 with physical address space. 28 - * 29 - * I/O space is located at low 64Kbytes in PCI I/O space. The I/O addresses 30 - * are converted into CPU addresses to virtual addresses that are mapped with 31 - * MMU to the PCI Host PCI I/O space window which are translated to the low 32 - * 64Kbytes by the Host controller. 33 - */ 34 - 35 - static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 36 - { 37 - return PCI_IRQ_NONE; 38 - } 39 - #endif 40 - 41 - #endif /* __SPARC_PCI_H */
-52
arch/sparc/include/asm/pci_64.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0 */ 2 - #ifndef __SPARC64_PCI_H 3 - #define __SPARC64_PCI_H 4 - 5 - #ifdef __KERNEL__ 6 - 7 - #include <linux/dma-mapping.h> 8 - 9 - /* Can be used to override the logic in pci_scan_bus for skipping 10 - * already-configured bus numbers - to be used for buggy BIOSes 11 - * or architectures with incomplete PCI setup by the loader. 12 - */ 13 - #define pcibios_assign_all_busses() 0 14 - 15 - #define PCIBIOS_MIN_IO 0UL 16 - #define PCIBIOS_MIN_MEM 0UL 17 - 18 - #define PCI_IRQ_NONE 0xffffffff 19 - 20 - /* PCI IOMMU mapping bypass support. */ 21 - 22 - /* PCI 64-bit addressing works for all slots on all controller 23 - * types on sparc64. However, it requires that the device 24 - * can drive enough of the 64 bits. 25 - */ 26 - #define PCI64_REQUIRED_MASK (~(u64)0) 27 - #define PCI64_ADDR_BASE 0xfffc000000000000UL 28 - 29 - /* Return the index of the PCI controller for device PDEV. */ 30 - 31 - int pci_domain_nr(struct pci_bus *bus); 32 - static inline int pci_proc_domain(struct pci_bus *bus) 33 - { 34 - return 1; 35 - } 36 - 37 - /* Platform support for /proc/bus/pci/X/Y mmap()s. */ 38 - 39 - #define HAVE_PCI_MMAP 40 - #define arch_can_pci_mmap_io() 1 41 - #define HAVE_ARCH_PCI_GET_UNMAPPED_AREA 42 - #define get_pci_unmapped_area get_fb_unmapped_area 43 - 44 - static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) 45 - { 46 - return PCI_IRQ_NONE; 47 - } 48 - 49 - #define HAVE_ARCH_PCI_RESOURCE_TO_USER 50 - #endif /* __KERNEL__ */ 51 - 52 - #endif /* __SPARC64_PCI_H */
+3 -9
arch/sparc/kernel/iommu.c
··· 314 314 bad_no_ctx: 315 315 if (printk_ratelimit()) 316 316 WARN_ON(1); 317 - return SPARC_MAPPING_ERROR; 317 + return DMA_MAPPING_ERROR; 318 318 } 319 319 320 320 static void strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, ··· 547 547 548 548 if (outcount < incount) { 549 549 outs = sg_next(outs); 550 - outs->dma_address = SPARC_MAPPING_ERROR; 550 + outs->dma_address = DMA_MAPPING_ERROR; 551 551 outs->dma_length = 0; 552 552 } 553 553 ··· 573 573 iommu_tbl_range_free(&iommu->tbl, vaddr, npages, 574 574 IOMMU_ERROR_CODE); 575 575 576 - s->dma_address = SPARC_MAPPING_ERROR; 576 + s->dma_address = DMA_MAPPING_ERROR; 577 577 s->dma_length = 0; 578 578 } 579 579 if (s == outs) ··· 741 741 spin_unlock_irqrestore(&iommu->lock, flags); 742 742 } 743 743 744 - static int dma_4u_mapping_error(struct device *dev, dma_addr_t dma_addr) 745 - { 746 - return dma_addr == SPARC_MAPPING_ERROR; 747 - } 748 - 749 744 static int dma_4u_supported(struct device *dev, u64 device_mask) 750 745 { 751 746 struct iommu *iommu = dev->archdata.iommu; ··· 766 771 .sync_single_for_cpu = dma_4u_sync_single_for_cpu, 767 772 .sync_sg_for_cpu = dma_4u_sync_sg_for_cpu, 768 773 .dma_supported = dma_4u_supported, 769 - .mapping_error = dma_4u_mapping_error, 770 774 }; 771 775 772 776 const struct dma_map_ops *dma_ops = &sun4u_dma_ops;
-2
arch/sparc/kernel/iommu_common.h
··· 48 48 return iommu_is_span_boundary(entry, nr, shift, boundary_size); 49 49 } 50 50 51 - #define SPARC_MAPPING_ERROR (~(dma_addr_t)0x0) 52 - 53 51 #endif /* _IOMMU_COMMON_H */
+62 -217
arch/sparc/kernel/ioport.c
··· 52 52 #include <asm/io-unit.h> 53 53 #include <asm/leon.h> 54 54 55 - const struct sparc32_dma_ops *sparc32_dma_ops; 56 - 57 55 /* This function must make sure that caches and memory are coherent after DMA 58 56 * On LEON systems without cache snooping it flushes the entire D-CACHE. 59 57 */ ··· 245 247 release_resource(res); 246 248 } 247 249 250 + unsigned long sparc_dma_alloc_resource(struct device *dev, size_t len) 251 + { 252 + struct resource *res; 253 + 254 + res = kzalloc(sizeof(*res), GFP_KERNEL); 255 + if (!res) 256 + return 0; 257 + res->name = dev->of_node->full_name; 258 + 259 + if (allocate_resource(&_sparc_dvma, res, len, _sparc_dvma.start, 260 + _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { 261 + printk("%s: cannot occupy 0x%zx", __func__, len); 262 + kfree(res); 263 + return 0; 264 + } 265 + 266 + return res->start; 267 + } 268 + 269 + bool sparc_dma_free_resource(void *cpu_addr, size_t size) 270 + { 271 + unsigned long addr = (unsigned long)cpu_addr; 272 + struct resource *res; 273 + 274 + res = lookup_resource(&_sparc_dvma, addr); 275 + if (!res) { 276 + printk("%s: cannot free %p\n", __func__, cpu_addr); 277 + return false; 278 + } 279 + 280 + if ((addr & (PAGE_SIZE - 1)) != 0) { 281 + printk("%s: unaligned va %p\n", __func__, cpu_addr); 282 + return false; 283 + } 284 + 285 + size = PAGE_ALIGN(size); 286 + if (resource_size(res) != size) { 287 + printk("%s: region 0x%lx asked 0x%zx\n", 288 + __func__, (long)resource_size(res), size); 289 + return false; 290 + } 291 + 292 + release_resource(res); 293 + kfree(res); 294 + return true; 295 + } 296 + 248 297 #ifdef CONFIG_SBUS 249 298 250 299 void sbus_set_sbus64(struct device *dev, int x) ··· 299 254 printk("sbus_set_sbus64: unsupported\n"); 300 255 } 301 256 EXPORT_SYMBOL(sbus_set_sbus64); 302 - 303 - /* 304 - * Allocate a chunk of memory suitable for DMA. 305 - * Typically devices use them for control blocks. 306 - * CPU may access them without any explicit flushing. 307 - */ 308 - static void *sbus_alloc_coherent(struct device *dev, size_t len, 309 - dma_addr_t *dma_addrp, gfp_t gfp, 310 - unsigned long attrs) 311 - { 312 - struct platform_device *op = to_platform_device(dev); 313 - unsigned long len_total = PAGE_ALIGN(len); 314 - unsigned long va; 315 - struct resource *res; 316 - int order; 317 - 318 - /* XXX why are some lengths signed, others unsigned? */ 319 - if (len <= 0) { 320 - return NULL; 321 - } 322 - /* XXX So what is maxphys for us and how do drivers know it? */ 323 - if (len > 256*1024) { /* __get_free_pages() limit */ 324 - return NULL; 325 - } 326 - 327 - order = get_order(len_total); 328 - va = __get_free_pages(gfp, order); 329 - if (va == 0) 330 - goto err_nopages; 331 - 332 - if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) 333 - goto err_nomem; 334 - 335 - if (allocate_resource(&_sparc_dvma, res, len_total, 336 - _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { 337 - printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total); 338 - goto err_nova; 339 - } 340 - 341 - // XXX The sbus_map_dma_area does this for us below, see comments. 342 - // srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total); 343 - /* 344 - * XXX That's where sdev would be used. Currently we load 345 - * all iommu tables with the same translations. 346 - */ 347 - if (sbus_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0) 348 - goto err_noiommu; 349 - 350 - res->name = op->dev.of_node->full_name; 351 - 352 - return (void *)(unsigned long)res->start; 353 - 354 - err_noiommu: 355 - release_resource(res); 356 - err_nova: 357 - kfree(res); 358 - err_nomem: 359 - free_pages(va, order); 360 - err_nopages: 361 - return NULL; 362 - } 363 - 364 - static void sbus_free_coherent(struct device *dev, size_t n, void *p, 365 - dma_addr_t ba, unsigned long attrs) 366 - { 367 - struct resource *res; 368 - struct page *pgv; 369 - 370 - if ((res = lookup_resource(&_sparc_dvma, 371 - (unsigned long)p)) == NULL) { 372 - printk("sbus_free_consistent: cannot free %p\n", p); 373 - return; 374 - } 375 - 376 - if (((unsigned long)p & (PAGE_SIZE-1)) != 0) { 377 - printk("sbus_free_consistent: unaligned va %p\n", p); 378 - return; 379 - } 380 - 381 - n = PAGE_ALIGN(n); 382 - if (resource_size(res) != n) { 383 - printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n", 384 - (long)resource_size(res), n); 385 - return; 386 - } 387 - 388 - release_resource(res); 389 - kfree(res); 390 - 391 - pgv = virt_to_page(p); 392 - sbus_unmap_dma_area(dev, ba, n); 393 - 394 - __free_pages(pgv, get_order(n)); 395 - } 396 - 397 - /* 398 - * Map a chunk of memory so that devices can see it. 399 - * CPU view of this memory may be inconsistent with 400 - * a device view and explicit flushing is necessary. 401 - */ 402 - static dma_addr_t sbus_map_page(struct device *dev, struct page *page, 403 - unsigned long offset, size_t len, 404 - enum dma_data_direction dir, 405 - unsigned long attrs) 406 - { 407 - void *va = page_address(page) + offset; 408 - 409 - /* XXX why are some lengths signed, others unsigned? */ 410 - if (len <= 0) { 411 - return 0; 412 - } 413 - /* XXX So what is maxphys for us and how do drivers know it? */ 414 - if (len > 256*1024) { /* __get_free_pages() limit */ 415 - return 0; 416 - } 417 - return mmu_get_scsi_one(dev, va, len); 418 - } 419 - 420 - static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n, 421 - enum dma_data_direction dir, unsigned long attrs) 422 - { 423 - mmu_release_scsi_one(dev, ba, n); 424 - } 425 - 426 - static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n, 427 - enum dma_data_direction dir, unsigned long attrs) 428 - { 429 - mmu_get_scsi_sgl(dev, sg, n); 430 - return n; 431 - } 432 - 433 - static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n, 434 - enum dma_data_direction dir, unsigned long attrs) 435 - { 436 - mmu_release_scsi_sgl(dev, sg, n); 437 - } 438 - 439 - static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 440 - int n, enum dma_data_direction dir) 441 - { 442 - BUG(); 443 - } 444 - 445 - static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg, 446 - int n, enum dma_data_direction dir) 447 - { 448 - BUG(); 449 - } 450 - 451 - static int sbus_dma_supported(struct device *dev, u64 mask) 452 - { 453 - return 0; 454 - } 455 - 456 - static const struct dma_map_ops sbus_dma_ops = { 457 - .alloc = sbus_alloc_coherent, 458 - .free = sbus_free_coherent, 459 - .map_page = sbus_map_page, 460 - .unmap_page = sbus_unmap_page, 461 - .map_sg = sbus_map_sg, 462 - .unmap_sg = sbus_unmap_sg, 463 - .sync_sg_for_cpu = sbus_sync_sg_for_cpu, 464 - .sync_sg_for_device = sbus_sync_sg_for_device, 465 - .dma_supported = sbus_dma_supported, 466 - }; 467 257 468 258 static int __init sparc_register_ioport(void) 469 259 { ··· 318 438 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 319 439 gfp_t gfp, unsigned long attrs) 320 440 { 321 - unsigned long len_total = PAGE_ALIGN(size); 441 + unsigned long addr; 322 442 void *va; 323 - struct resource *res; 324 - int order; 325 443 326 - if (size == 0) { 444 + if (!size || size > 256 * 1024) /* __get_free_pages() limit */ 445 + return NULL; 446 + 447 + size = PAGE_ALIGN(size); 448 + va = (void *) __get_free_pages(gfp | __GFP_ZERO, get_order(size)); 449 + if (!va) { 450 + printk("%s: no %zd pages\n", __func__, size >> PAGE_SHIFT); 327 451 return NULL; 328 452 } 329 - if (size > 256*1024) { /* __get_free_pages() limit */ 330 - return NULL; 331 - } 332 453 333 - order = get_order(len_total); 334 - va = (void *) __get_free_pages(gfp, order); 335 - if (va == NULL) { 336 - printk("%s: no %ld pages\n", __func__, len_total>>PAGE_SHIFT); 337 - goto err_nopages; 338 - } 339 - 340 - if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) { 341 - printk("%s: no core\n", __func__); 454 + addr = sparc_dma_alloc_resource(dev, size); 455 + if (!addr) 342 456 goto err_nomem; 343 - } 344 457 345 - if (allocate_resource(&_sparc_dvma, res, len_total, 346 - _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) { 347 - printk("%s: cannot occupy 0x%lx", __func__, len_total); 348 - goto err_nova; 349 - } 350 - srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total); 458 + srmmu_mapiorange(0, virt_to_phys(va), addr, size); 351 459 352 460 *dma_handle = virt_to_phys(va); 353 - return (void *) res->start; 461 + return (void *)addr; 354 462 355 - err_nova: 356 - kfree(res); 357 463 err_nomem: 358 - free_pages((unsigned long)va, order); 359 - err_nopages: 464 + free_pages((unsigned long)va, get_order(size)); 360 465 return NULL; 361 466 } 362 467 ··· 356 491 void arch_dma_free(struct device *dev, size_t size, void *cpu_addr, 357 492 dma_addr_t dma_addr, unsigned long attrs) 358 493 { 359 - struct resource *res; 360 - 361 - if ((res = lookup_resource(&_sparc_dvma, 362 - (unsigned long)cpu_addr)) == NULL) { 363 - printk("%s: cannot free %p\n", __func__, cpu_addr); 494 + if (!sparc_dma_free_resource(cpu_addr, PAGE_ALIGN(size))) 364 495 return; 365 - } 366 - 367 - if (((unsigned long)cpu_addr & (PAGE_SIZE-1)) != 0) { 368 - printk("%s: unaligned va %p\n", __func__, cpu_addr); 369 - return; 370 - } 371 - 372 - size = PAGE_ALIGN(size); 373 - if (resource_size(res) != size) { 374 - printk("%s: region 0x%lx asked 0x%zx\n", __func__, 375 - (long)resource_size(res), size); 376 - return; 377 - } 378 496 379 497 dma_make_coherent(dma_addr, size); 380 498 srmmu_unmapiorange((unsigned long)cpu_addr, size); 381 - 382 - release_resource(res); 383 - kfree(res); 384 499 free_pages((unsigned long)phys_to_virt(dma_addr), get_order(size)); 385 500 } 386 501 ··· 373 528 dma_make_coherent(paddr, PAGE_ALIGN(size)); 374 529 } 375 530 376 - const struct dma_map_ops *dma_ops = &sbus_dma_ops; 531 + const struct dma_map_ops *dma_ops; 377 532 EXPORT_SYMBOL(dma_ops); 378 533 379 534 #ifdef CONFIG_PROC_FS
+4 -10
arch/sparc/kernel/pci_sun4v.c
··· 414 414 bad: 415 415 if (printk_ratelimit()) 416 416 WARN_ON(1); 417 - return SPARC_MAPPING_ERROR; 417 + return DMA_MAPPING_ERROR; 418 418 419 419 iommu_map_fail: 420 420 local_irq_restore(flags); 421 421 iommu_tbl_range_free(tbl, bus_addr, npages, IOMMU_ERROR_CODE); 422 - return SPARC_MAPPING_ERROR; 422 + return DMA_MAPPING_ERROR; 423 423 } 424 424 425 425 static void dma_4v_unmap_page(struct device *dev, dma_addr_t bus_addr, ··· 592 592 593 593 if (outcount < incount) { 594 594 outs = sg_next(outs); 595 - outs->dma_address = SPARC_MAPPING_ERROR; 595 + outs->dma_address = DMA_MAPPING_ERROR; 596 596 outs->dma_length = 0; 597 597 } 598 598 ··· 609 609 iommu_tbl_range_free(tbl, vaddr, npages, 610 610 IOMMU_ERROR_CODE); 611 611 /* XXX demap? XXX */ 612 - s->dma_address = SPARC_MAPPING_ERROR; 612 + s->dma_address = DMA_MAPPING_ERROR; 613 613 s->dma_length = 0; 614 614 } 615 615 if (s == outs) ··· 688 688 return pci64_dma_supported(to_pci_dev(dev), device_mask); 689 689 } 690 690 691 - static int dma_4v_mapping_error(struct device *dev, dma_addr_t dma_addr) 692 - { 693 - return dma_addr == SPARC_MAPPING_ERROR; 694 - } 695 - 696 691 static const struct dma_map_ops sun4v_dma_ops = { 697 692 .alloc = dma_4v_alloc_coherent, 698 693 .free = dma_4v_free_coherent, ··· 696 701 .map_sg = dma_4v_map_sg, 697 702 .unmap_sg = dma_4v_unmap_sg, 698 703 .dma_supported = dma_4v_supported, 699 - .mapping_error = dma_4v_mapping_error, 700 704 }; 701 705 702 706 static void pci_sun4v_scan_bus(struct pci_pbm_info *pbm, struct device *parent)
+54 -26
arch/sparc/mm/io-unit.c
··· 12 12 #include <linux/mm.h> 13 13 #include <linux/highmem.h> /* pte_offset_map => kmap_atomic */ 14 14 #include <linux/bitops.h> 15 - #include <linux/scatterlist.h> 15 + #include <linux/dma-mapping.h> 16 16 #include <linux/of.h> 17 17 #include <linux/of_device.h> 18 18 ··· 140 140 return vaddr; 141 141 } 142 142 143 - static __u32 iounit_get_scsi_one(struct device *dev, char *vaddr, unsigned long len) 143 + static dma_addr_t iounit_map_page(struct device *dev, struct page *page, 144 + unsigned long offset, size_t len, enum dma_data_direction dir, 145 + unsigned long attrs) 144 146 { 147 + void *vaddr = page_address(page) + offset; 145 148 struct iounit_struct *iounit = dev->archdata.iommu; 146 149 unsigned long ret, flags; 147 150 151 + /* XXX So what is maxphys for us and how do drivers know it? */ 152 + if (!len || len > 256 * 1024) 153 + return DMA_MAPPING_ERROR; 154 + 148 155 spin_lock_irqsave(&iounit->lock, flags); 149 156 ret = iounit_get_area(iounit, (unsigned long)vaddr, len); 150 157 spin_unlock_irqrestore(&iounit->lock, flags); 151 158 return ret; 152 159 } 153 160 154 - static void iounit_get_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz) 161 + static int iounit_map_sg(struct device *dev, struct scatterlist *sgl, int nents, 162 + enum dma_data_direction dir, unsigned long attrs) 155 163 { 156 164 struct iounit_struct *iounit = dev->archdata.iommu; 165 + struct scatterlist *sg; 157 166 unsigned long flags; 167 + int i; 158 168 159 169 /* FIXME: Cache some resolved pages - often several sg entries are to the same page */ 160 170 spin_lock_irqsave(&iounit->lock, flags); 161 - while (sz != 0) { 162 - --sz; 171 + for_each_sg(sgl, sg, nents, i) { 163 172 sg->dma_address = iounit_get_area(iounit, (unsigned long) sg_virt(sg), sg->length); 164 173 sg->dma_length = sg->length; 165 - sg = sg_next(sg); 166 174 } 167 175 spin_unlock_irqrestore(&iounit->lock, flags); 176 + return nents; 168 177 } 169 178 170 - static void iounit_release_scsi_one(struct device *dev, __u32 vaddr, unsigned long len) 179 + static void iounit_unmap_page(struct device *dev, dma_addr_t vaddr, size_t len, 180 + enum dma_data_direction dir, unsigned long attrs) 171 181 { 172 182 struct iounit_struct *iounit = dev->archdata.iommu; 173 183 unsigned long flags; ··· 191 181 spin_unlock_irqrestore(&iounit->lock, flags); 192 182 } 193 183 194 - static void iounit_release_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz) 184 + static void iounit_unmap_sg(struct device *dev, struct scatterlist *sgl, 185 + int nents, enum dma_data_direction dir, unsigned long attrs) 195 186 { 196 187 struct iounit_struct *iounit = dev->archdata.iommu; 197 - unsigned long flags; 198 - unsigned long vaddr, len; 188 + unsigned long flags, vaddr, len; 189 + struct scatterlist *sg; 190 + int i; 199 191 200 192 spin_lock_irqsave(&iounit->lock, flags); 201 - while (sz != 0) { 202 - --sz; 193 + for_each_sg(sgl, sg, nents, i) { 203 194 len = ((sg->dma_address & ~PAGE_MASK) + sg->length + (PAGE_SIZE-1)) >> PAGE_SHIFT; 204 195 vaddr = (sg->dma_address - IOUNIT_DMA_BASE) >> PAGE_SHIFT; 205 196 IOD(("iounit_release %08lx-%08lx\n", (long)vaddr, (long)len+vaddr)); 206 197 for (len += vaddr; vaddr < len; vaddr++) 207 198 clear_bit(vaddr, iounit->bmap); 208 - sg = sg_next(sg); 209 199 } 210 200 spin_unlock_irqrestore(&iounit->lock, flags); 211 201 } 212 202 213 203 #ifdef CONFIG_SBUS 214 - static int iounit_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va, unsigned long addr, int len) 204 + static void *iounit_alloc(struct device *dev, size_t len, 205 + dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 215 206 { 216 207 struct iounit_struct *iounit = dev->archdata.iommu; 217 - unsigned long page, end; 208 + unsigned long va, addr, page, end, ret; 218 209 pgprot_t dvma_prot; 219 210 iopte_t __iomem *iopte; 220 211 221 - *pba = addr; 212 + /* XXX So what is maxphys for us and how do drivers know it? */ 213 + if (!len || len > 256 * 1024) 214 + return NULL; 215 + 216 + len = PAGE_ALIGN(len); 217 + va = __get_free_pages(gfp | __GFP_ZERO, get_order(len)); 218 + if (!va) 219 + return NULL; 220 + 221 + addr = ret = sparc_dma_alloc_resource(dev, len); 222 + if (!addr) 223 + goto out_free_pages; 224 + *dma_handle = addr; 222 225 223 226 dvma_prot = __pgprot(SRMMU_CACHE | SRMMU_ET_PTE | SRMMU_PRIV); 224 227 end = PAGE_ALIGN((addr + len)); ··· 260 237 flush_cache_all(); 261 238 flush_tlb_all(); 262 239 263 - return 0; 240 + return (void *)ret; 241 + 242 + out_free_pages: 243 + free_pages(va, get_order(len)); 244 + return NULL; 264 245 } 265 246 266 - static void iounit_unmap_dma_area(struct device *dev, unsigned long addr, int len) 247 + static void iounit_free(struct device *dev, size_t size, void *cpu_addr, 248 + dma_addr_t dma_addr, unsigned long attrs) 267 249 { 268 250 /* XXX Somebody please fill this in */ 269 251 } 270 252 #endif 271 253 272 - static const struct sparc32_dma_ops iounit_dma_ops = { 273 - .get_scsi_one = iounit_get_scsi_one, 274 - .get_scsi_sgl = iounit_get_scsi_sgl, 275 - .release_scsi_one = iounit_release_scsi_one, 276 - .release_scsi_sgl = iounit_release_scsi_sgl, 254 + static const struct dma_map_ops iounit_dma_ops = { 277 255 #ifdef CONFIG_SBUS 278 - .map_dma_area = iounit_map_dma_area, 279 - .unmap_dma_area = iounit_unmap_dma_area, 256 + .alloc = iounit_alloc, 257 + .free = iounit_free, 280 258 #endif 259 + .map_page = iounit_map_page, 260 + .unmap_page = iounit_unmap_page, 261 + .map_sg = iounit_map_sg, 262 + .unmap_sg = iounit_unmap_sg, 281 263 }; 282 264 283 265 void __init ld_mmu_iounit(void) 284 266 { 285 - sparc32_dma_ops = &iounit_dma_ops; 267 + dma_ops = &iounit_dma_ops; 286 268 }
+96 -64
arch/sparc/mm/iommu.c
··· 13 13 #include <linux/mm.h> 14 14 #include <linux/slab.h> 15 15 #include <linux/highmem.h> /* pte_offset_map => kmap_atomic */ 16 - #include <linux/scatterlist.h> 16 + #include <linux/dma-mapping.h> 17 17 #include <linux/of.h> 18 18 #include <linux/of_device.h> 19 19 ··· 205 205 return busa0; 206 206 } 207 207 208 - static u32 iommu_get_scsi_one(struct device *dev, char *vaddr, unsigned int len) 208 + static dma_addr_t __sbus_iommu_map_page(struct device *dev, struct page *page, 209 + unsigned long offset, size_t len) 209 210 { 210 - unsigned long off; 211 - int npages; 212 - struct page *page; 213 - u32 busa; 214 - 215 - off = (unsigned long)vaddr & ~PAGE_MASK; 216 - npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT; 217 - page = virt_to_page((unsigned long)vaddr & PAGE_MASK); 218 - busa = iommu_get_one(dev, page, npages); 219 - return busa + off; 211 + void *vaddr = page_address(page) + offset; 212 + unsigned long off = (unsigned long)vaddr & ~PAGE_MASK; 213 + unsigned long npages = (off + len + PAGE_SIZE - 1) >> PAGE_SHIFT; 214 + 215 + /* XXX So what is maxphys for us and how do drivers know it? */ 216 + if (!len || len > 256 * 1024) 217 + return DMA_MAPPING_ERROR; 218 + return iommu_get_one(dev, virt_to_page(vaddr), npages) + off; 220 219 } 221 220 222 - static __u32 iommu_get_scsi_one_gflush(struct device *dev, char *vaddr, unsigned long len) 221 + static dma_addr_t sbus_iommu_map_page_gflush(struct device *dev, 222 + struct page *page, unsigned long offset, size_t len, 223 + enum dma_data_direction dir, unsigned long attrs) 223 224 { 224 225 flush_page_for_dma(0); 225 - return iommu_get_scsi_one(dev, vaddr, len); 226 + return __sbus_iommu_map_page(dev, page, offset, len); 226 227 } 227 228 228 - static __u32 iommu_get_scsi_one_pflush(struct device *dev, char *vaddr, unsigned long len) 229 + static dma_addr_t sbus_iommu_map_page_pflush(struct device *dev, 230 + struct page *page, unsigned long offset, size_t len, 231 + enum dma_data_direction dir, unsigned long attrs) 229 232 { 230 - unsigned long page = ((unsigned long) vaddr) & PAGE_MASK; 233 + void *vaddr = page_address(page) + offset; 234 + unsigned long p = ((unsigned long)vaddr) & PAGE_MASK; 231 235 232 - while(page < ((unsigned long)(vaddr + len))) { 233 - flush_page_for_dma(page); 234 - page += PAGE_SIZE; 236 + while (p < (unsigned long)vaddr + len) { 237 + flush_page_for_dma(p); 238 + p += PAGE_SIZE; 235 239 } 236 - return iommu_get_scsi_one(dev, vaddr, len); 240 + 241 + return __sbus_iommu_map_page(dev, page, offset, len); 237 242 } 238 243 239 - static void iommu_get_scsi_sgl_gflush(struct device *dev, struct scatterlist *sg, int sz) 244 + static int sbus_iommu_map_sg_gflush(struct device *dev, struct scatterlist *sgl, 245 + int nents, enum dma_data_direction dir, unsigned long attrs) 240 246 { 241 - int n; 247 + struct scatterlist *sg; 248 + int i, n; 242 249 243 250 flush_page_for_dma(0); 244 - while (sz != 0) { 245 - --sz; 251 + 252 + for_each_sg(sgl, sg, nents, i) { 246 253 n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 247 254 sg->dma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset; 248 255 sg->dma_length = sg->length; 249 - sg = sg_next(sg); 250 256 } 257 + 258 + return nents; 251 259 } 252 260 253 - static void iommu_get_scsi_sgl_pflush(struct device *dev, struct scatterlist *sg, int sz) 261 + static int sbus_iommu_map_sg_pflush(struct device *dev, struct scatterlist *sgl, 262 + int nents, enum dma_data_direction dir, unsigned long attrs) 254 263 { 255 264 unsigned long page, oldpage = 0; 256 - int n, i; 265 + struct scatterlist *sg; 266 + int i, j, n; 257 267 258 - while(sz != 0) { 259 - --sz; 260 - 268 + for_each_sg(sgl, sg, nents, j) { 261 269 n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 262 270 263 271 /* ··· 285 277 286 278 sg->dma_address = iommu_get_one(dev, sg_page(sg), n) + sg->offset; 287 279 sg->dma_length = sg->length; 288 - sg = sg_next(sg); 289 280 } 281 + 282 + return nents; 290 283 } 291 284 292 285 static void iommu_release_one(struct device *dev, u32 busa, int npages) ··· 306 297 bit_map_clear(&iommu->usemap, ioptex, npages); 307 298 } 308 299 309 - static void iommu_release_scsi_one(struct device *dev, __u32 vaddr, unsigned long len) 300 + static void sbus_iommu_unmap_page(struct device *dev, dma_addr_t dma_addr, 301 + size_t len, enum dma_data_direction dir, unsigned long attrs) 310 302 { 311 - unsigned long off; 303 + unsigned long off = dma_addr & ~PAGE_MASK; 312 304 int npages; 313 305 314 - off = vaddr & ~PAGE_MASK; 315 306 npages = (off + len + PAGE_SIZE-1) >> PAGE_SHIFT; 316 - iommu_release_one(dev, vaddr & PAGE_MASK, npages); 307 + iommu_release_one(dev, dma_addr & PAGE_MASK, npages); 317 308 } 318 309 319 - static void iommu_release_scsi_sgl(struct device *dev, struct scatterlist *sg, int sz) 310 + static void sbus_iommu_unmap_sg(struct device *dev, struct scatterlist *sgl, 311 + int nents, enum dma_data_direction dir, unsigned long attrs) 320 312 { 321 - int n; 313 + struct scatterlist *sg; 314 + int i, n; 322 315 323 - while(sz != 0) { 324 - --sz; 325 - 316 + for_each_sg(sgl, sg, nents, i) { 326 317 n = (sg->length + sg->offset + PAGE_SIZE-1) >> PAGE_SHIFT; 327 318 iommu_release_one(dev, sg->dma_address & PAGE_MASK, n); 328 319 sg->dma_address = 0x21212121; 329 - sg = sg_next(sg); 330 320 } 331 321 } 332 322 333 323 #ifdef CONFIG_SBUS 334 - static int iommu_map_dma_area(struct device *dev, dma_addr_t *pba, unsigned long va, 335 - unsigned long addr, int len) 324 + static void *sbus_iommu_alloc(struct device *dev, size_t len, 325 + dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 336 326 { 337 327 struct iommu_struct *iommu = dev->archdata.iommu; 338 - unsigned long page, end; 328 + unsigned long va, addr, page, end, ret; 339 329 iopte_t *iopte = iommu->page_table; 340 330 iopte_t *first; 341 331 int ioptex; 332 + 333 + /* XXX So what is maxphys for us and how do drivers know it? */ 334 + if (!len || len > 256 * 1024) 335 + return NULL; 336 + 337 + len = PAGE_ALIGN(len); 338 + va = __get_free_pages(gfp | __GFP_ZERO, get_order(len)); 339 + if (va == 0) 340 + return NULL; 341 + 342 + addr = ret = sparc_dma_alloc_resource(dev, len); 343 + if (!addr) 344 + goto out_free_pages; 342 345 343 346 BUG_ON((va & ~PAGE_MASK) != 0); 344 347 BUG_ON((addr & ~PAGE_MASK) != 0); ··· 406 385 flush_tlb_all(); 407 386 iommu_invalidate(iommu->regs); 408 387 409 - *pba = iommu->start + (ioptex << PAGE_SHIFT); 410 - return 0; 388 + *dma_handle = iommu->start + (ioptex << PAGE_SHIFT); 389 + return (void *)ret; 390 + 391 + out_free_pages: 392 + free_pages(va, get_order(len)); 393 + return NULL; 411 394 } 412 395 413 - static void iommu_unmap_dma_area(struct device *dev, unsigned long busa, int len) 396 + static void sbus_iommu_free(struct device *dev, size_t len, void *cpu_addr, 397 + dma_addr_t busa, unsigned long attrs) 414 398 { 415 399 struct iommu_struct *iommu = dev->archdata.iommu; 416 400 iopte_t *iopte = iommu->page_table; 417 - unsigned long end; 401 + struct page *page = virt_to_page(cpu_addr); 418 402 int ioptex = (busa - iommu->start) >> PAGE_SHIFT; 403 + unsigned long end; 404 + 405 + if (!sparc_dma_free_resource(cpu_addr, len)) 406 + return; 419 407 420 408 BUG_ON((busa & ~PAGE_MASK) != 0); 421 409 BUG_ON((len & ~PAGE_MASK) != 0); ··· 438 408 flush_tlb_all(); 439 409 iommu_invalidate(iommu->regs); 440 410 bit_map_clear(&iommu->usemap, ioptex, len >> PAGE_SHIFT); 411 + 412 + __free_pages(page, get_order(len)); 441 413 } 442 414 #endif 443 415 444 - static const struct sparc32_dma_ops iommu_dma_gflush_ops = { 445 - .get_scsi_one = iommu_get_scsi_one_gflush, 446 - .get_scsi_sgl = iommu_get_scsi_sgl_gflush, 447 - .release_scsi_one = iommu_release_scsi_one, 448 - .release_scsi_sgl = iommu_release_scsi_sgl, 416 + static const struct dma_map_ops sbus_iommu_dma_gflush_ops = { 449 417 #ifdef CONFIG_SBUS 450 - .map_dma_area = iommu_map_dma_area, 451 - .unmap_dma_area = iommu_unmap_dma_area, 418 + .alloc = sbus_iommu_alloc, 419 + .free = sbus_iommu_free, 452 420 #endif 421 + .map_page = sbus_iommu_map_page_gflush, 422 + .unmap_page = sbus_iommu_unmap_page, 423 + .map_sg = sbus_iommu_map_sg_gflush, 424 + .unmap_sg = sbus_iommu_unmap_sg, 453 425 }; 454 426 455 - static const struct sparc32_dma_ops iommu_dma_pflush_ops = { 456 - .get_scsi_one = iommu_get_scsi_one_pflush, 457 - .get_scsi_sgl = iommu_get_scsi_sgl_pflush, 458 - .release_scsi_one = iommu_release_scsi_one, 459 - .release_scsi_sgl = iommu_release_scsi_sgl, 427 + static const struct dma_map_ops sbus_iommu_dma_pflush_ops = { 460 428 #ifdef CONFIG_SBUS 461 - .map_dma_area = iommu_map_dma_area, 462 - .unmap_dma_area = iommu_unmap_dma_area, 429 + .alloc = sbus_iommu_alloc, 430 + .free = sbus_iommu_free, 463 431 #endif 432 + .map_page = sbus_iommu_map_page_pflush, 433 + .unmap_page = sbus_iommu_unmap_page, 434 + .map_sg = sbus_iommu_map_sg_pflush, 435 + .unmap_sg = sbus_iommu_unmap_sg, 464 436 }; 465 437 466 438 void __init ld_mmu_iommu(void) 467 439 { 468 440 if (flush_page_for_dma_global) { 469 441 /* flush_page_for_dma flushes everything, no matter of what page is it */ 470 - sparc32_dma_ops = &iommu_dma_gflush_ops; 442 + dma_ops = &sbus_iommu_dma_gflush_ops; 471 443 } else { 472 - sparc32_dma_ops = &iommu_dma_pflush_ops; 444 + dma_ops = &sbus_iommu_dma_pflush_ops; 473 445 } 474 446 475 447 if (viking_mxcc_present || srmmu_modtype == HyperSparc) {
-1
arch/unicore32/Kconfig
··· 4 4 select ARCH_HAS_DEVMEM_IS_ALLOWED 5 5 select ARCH_MIGHT_HAVE_PC_PARPORT 6 6 select ARCH_MIGHT_HAVE_PC_SERIO 7 - select DMA_DIRECT_OPS 8 7 select HAVE_GENERIC_DMA_COHERENT 9 8 select HAVE_KERNEL_GZIP 10 9 select HAVE_KERNEL_BZIP2
-2
arch/x86/Kconfig
··· 66 66 select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64 67 67 select ARCH_HAS_UACCESS_MCSAFE if X86_64 && X86_MCE 68 68 select ARCH_HAS_SET_MEMORY 69 - select ARCH_HAS_SG_CHAIN 70 69 select ARCH_HAS_STRICT_KERNEL_RWX 71 70 select ARCH_HAS_STRICT_MODULE_RWX 72 71 select ARCH_HAS_SYNC_CORE_BEFORE_USERMODE ··· 89 90 select CLOCKSOURCE_VALIDATE_LAST_CYCLE 90 91 select CLOCKSOURCE_WATCHDOG 91 92 select DCACHE_WORD_ACCESS 92 - select DMA_DIRECT_OPS 93 93 select EDAC_ATOMIC_SCRUB 94 94 select EDAC_SUPPORT 95 95 select GENERIC_CLOCKEVENTS
+6 -57
arch/x86/kernel/amd_gart_64.c
··· 50 50 51 51 static u32 *iommu_gatt_base; /* Remapping table */ 52 52 53 - static dma_addr_t bad_dma_addr; 54 - 55 53 /* 56 54 * If this is disabled the IOMMU will use an optimized flushing strategy 57 55 * of only flushing when an mapping is reused. With it true the GART is ··· 71 73 #define GPTE_ENCODE(x) \ 72 74 (((x) & 0xfffff000) | (((x) >> 32) << 4) | GPTE_VALID | GPTE_COHERENT) 73 75 #define GPTE_DECODE(x) (((x) & 0xfffff000) | (((u64)(x) & 0xff0) << 28)) 74 - 75 - #define EMERGENCY_PAGES 32 /* = 128KB */ 76 76 77 77 #ifdef CONFIG_AGP 78 78 #define AGPEXTERN extern ··· 151 155 152 156 #ifdef CONFIG_IOMMU_LEAK 153 157 /* Debugging aid for drivers that don't free their IOMMU tables */ 154 - static int leak_trace; 155 - static int iommu_leak_pages = 20; 156 - 157 158 static void dump_leak(void) 158 159 { 159 160 static int dump; ··· 177 184 */ 178 185 179 186 dev_err(dev, "PCI-DMA: Out of IOMMU space for %lu bytes\n", size); 180 - 181 - if (size > PAGE_SIZE*EMERGENCY_PAGES) { 182 - if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL) 183 - panic("PCI-DMA: Memory would be corrupted\n"); 184 - if (dir == PCI_DMA_TODEVICE || dir == PCI_DMA_BIDIRECTIONAL) 185 - panic(KERN_ERR 186 - "PCI-DMA: Random memory would be DMAed\n"); 187 - } 188 187 #ifdef CONFIG_IOMMU_LEAK 189 188 dump_leak(); 190 189 #endif ··· 205 220 int i; 206 221 207 222 if (unlikely(phys_mem + size > GART_MAX_PHYS_ADDR)) 208 - return bad_dma_addr; 223 + return DMA_MAPPING_ERROR; 209 224 210 225 iommu_page = alloc_iommu(dev, npages, align_mask); 211 226 if (iommu_page == -1) { ··· 214 229 if (panic_on_overflow) 215 230 panic("dma_map_area overflow %lu bytes\n", size); 216 231 iommu_full(dev, size, dir); 217 - return bad_dma_addr; 232 + return DMA_MAPPING_ERROR; 218 233 } 219 234 220 235 for (i = 0; i < npages; i++) { ··· 256 271 int npages; 257 272 int i; 258 273 259 - if (dma_addr < iommu_bus_base + EMERGENCY_PAGES*PAGE_SIZE || 274 + if (dma_addr == DMA_MAPPING_ERROR || 260 275 dma_addr >= iommu_bus_base + iommu_size) 261 276 return; 262 277 ··· 300 315 301 316 if (nonforced_iommu(dev, addr, s->length)) { 302 317 addr = dma_map_area(dev, addr, s->length, dir, 0); 303 - if (addr == bad_dma_addr) { 318 + if (addr == DMA_MAPPING_ERROR) { 304 319 if (i > 0) 305 320 gart_unmap_sg(dev, sg, i, dir, 0); 306 321 nents = 0; ··· 456 471 457 472 iommu_full(dev, pages << PAGE_SHIFT, dir); 458 473 for_each_sg(sg, s, nents, i) 459 - s->dma_address = bad_dma_addr; 474 + s->dma_address = DMA_MAPPING_ERROR; 460 475 return 0; 461 476 } 462 477 ··· 475 490 *dma_addr = dma_map_area(dev, virt_to_phys(vaddr), size, 476 491 DMA_BIDIRECTIONAL, (1UL << get_order(size)) - 1); 477 492 flush_gart(); 478 - if (unlikely(*dma_addr == bad_dma_addr)) 493 + if (unlikely(*dma_addr == DMA_MAPPING_ERROR)) 479 494 goto out_free; 480 495 return vaddr; 481 496 out_free: ··· 490 505 { 491 506 gart_unmap_page(dev, dma_addr, size, DMA_BIDIRECTIONAL, 0); 492 507 dma_direct_free_pages(dev, size, vaddr, dma_addr, attrs); 493 - } 494 - 495 - static int gart_mapping_error(struct device *dev, dma_addr_t dma_addr) 496 - { 497 - return (dma_addr == bad_dma_addr); 498 508 } 499 509 500 510 static int no_agp; ··· 675 695 .unmap_page = gart_unmap_page, 676 696 .alloc = gart_alloc_coherent, 677 697 .free = gart_free_coherent, 678 - .mapping_error = gart_mapping_error, 679 698 .dma_supported = dma_direct_supported, 680 699 }; 681 700 ··· 709 730 unsigned long aper_base, aper_size; 710 731 unsigned long start_pfn, end_pfn; 711 732 unsigned long scratch; 712 - long i; 713 733 714 734 if (!amd_nb_has_feature(AMD_NB_GART)) 715 735 return 0; ··· 752 774 if (!iommu_gart_bitmap) 753 775 panic("Cannot allocate iommu bitmap\n"); 754 776 755 - #ifdef CONFIG_IOMMU_LEAK 756 - if (leak_trace) { 757 - int ret; 758 - 759 - ret = dma_debug_resize_entries(iommu_pages); 760 - if (ret) 761 - pr_debug("PCI-DMA: Cannot trace all the entries\n"); 762 - } 763 - #endif 764 - 765 - /* 766 - * Out of IOMMU space handling. 767 - * Reserve some invalid pages at the beginning of the GART. 768 - */ 769 - bitmap_set(iommu_gart_bitmap, 0, EMERGENCY_PAGES); 770 - 771 777 pr_info("PCI-DMA: Reserving %luMB of IOMMU area in the AGP aperture\n", 772 778 iommu_size >> 20); 773 779 774 780 agp_memory_reserved = iommu_size; 775 781 iommu_start = aper_size - iommu_size; 776 782 iommu_bus_base = info.aper_base + iommu_start; 777 - bad_dma_addr = iommu_bus_base; 778 783 iommu_gatt_base = agp_gatt_table + (iommu_start>>PAGE_SHIFT); 779 784 780 785 /* ··· 799 838 if (!scratch) 800 839 panic("Cannot allocate iommu scratch page"); 801 840 gart_unmapped_entry = GPTE_ENCODE(__pa(scratch)); 802 - for (i = EMERGENCY_PAGES; i < iommu_pages; i++) 803 - iommu_gatt_base[i] = gart_unmapped_entry; 804 841 805 842 flush_gart(); 806 843 dma_ops = &gart_dma_ops; ··· 812 853 { 813 854 int arg; 814 855 815 - #ifdef CONFIG_IOMMU_LEAK 816 - if (!strncmp(p, "leak", 4)) { 817 - leak_trace = 1; 818 - p += 4; 819 - if (*p == '=') 820 - ++p; 821 - if (isdigit(*p) && get_option(&p, &arg)) 822 - iommu_leak_pages = arg; 823 - } 824 - #endif 825 856 if (isdigit(*p) && get_option(&p, &arg)) 826 857 iommu_size = arg; 827 858 if (!strncmp(p, "fullflush", 9))
+7 -23
arch/x86/kernel/pci-calgary_64.c
··· 51 51 #include <asm/x86_init.h> 52 52 #include <asm/iommu_table.h> 53 53 54 - #define CALGARY_MAPPING_ERROR 0 55 - 56 54 #ifdef CONFIG_CALGARY_IOMMU_ENABLED_BY_DEFAULT 57 55 int use_calgary __read_mostly = 1; 58 56 #else ··· 155 157 156 158 #define PHB_DEBUG_STUFF_OFFSET 0x0020 157 159 158 - #define EMERGENCY_PAGES 32 /* = 128KB */ 159 - 160 160 unsigned int specified_table_size = TCE_TABLE_SIZE_UNSPECIFIED; 161 161 static int translate_empty_slots __read_mostly = 0; 162 162 static int calgary_detected __read_mostly = 0; ··· 251 255 if (panic_on_overflow) 252 256 panic("Calgary: fix the allocator.\n"); 253 257 else 254 - return CALGARY_MAPPING_ERROR; 258 + return DMA_MAPPING_ERROR; 255 259 } 256 260 } 257 261 ··· 270 274 dma_addr_t ret; 271 275 272 276 entry = iommu_range_alloc(dev, tbl, npages); 273 - 274 - if (unlikely(entry == CALGARY_MAPPING_ERROR)) { 277 + if (unlikely(entry == DMA_MAPPING_ERROR)) { 275 278 pr_warn("failed to allocate %u pages in iommu %p\n", 276 279 npages, tbl); 277 - return CALGARY_MAPPING_ERROR; 280 + return DMA_MAPPING_ERROR; 278 281 } 279 282 280 283 /* set the return dma address */ ··· 289 294 unsigned int npages) 290 295 { 291 296 unsigned long entry; 292 - unsigned long badend; 293 297 unsigned long flags; 294 298 295 299 /* were we called with bad_dma_address? */ 296 - badend = CALGARY_MAPPING_ERROR + (EMERGENCY_PAGES * PAGE_SIZE); 297 - if (unlikely(dma_addr < badend)) { 300 + if (unlikely(dma_addr == DMA_MAPPING_ERROR)) { 298 301 WARN(1, KERN_ERR "Calgary: driver tried unmapping bad DMA " 299 302 "address 0x%Lx\n", dma_addr); 300 303 return; ··· 376 383 npages = iommu_num_pages(vaddr, s->length, PAGE_SIZE); 377 384 378 385 entry = iommu_range_alloc(dev, tbl, npages); 379 - if (entry == CALGARY_MAPPING_ERROR) { 386 + if (entry == DMA_MAPPING_ERROR) { 380 387 /* makes sure unmap knows to stop */ 381 388 s->dma_length = 0; 382 389 goto error; ··· 394 401 error: 395 402 calgary_unmap_sg(dev, sg, nelems, dir, 0); 396 403 for_each_sg(sg, s, nelems, i) { 397 - sg->dma_address = CALGARY_MAPPING_ERROR; 404 + sg->dma_address = DMA_MAPPING_ERROR; 398 405 sg->dma_length = 0; 399 406 } 400 407 return 0; ··· 447 454 448 455 /* set up tces to cover the allocated range */ 449 456 mapping = iommu_alloc(dev, tbl, ret, npages, DMA_BIDIRECTIONAL); 450 - if (mapping == CALGARY_MAPPING_ERROR) 457 + if (mapping == DMA_MAPPING_ERROR) 451 458 goto free; 452 459 *dma_handle = mapping; 453 460 return ret; ··· 472 479 free_pages((unsigned long)vaddr, get_order(size)); 473 480 } 474 481 475 - static int calgary_mapping_error(struct device *dev, dma_addr_t dma_addr) 476 - { 477 - return dma_addr == CALGARY_MAPPING_ERROR; 478 - } 479 - 480 482 static const struct dma_map_ops calgary_dma_ops = { 481 483 .alloc = calgary_alloc_coherent, 482 484 .free = calgary_free_coherent, ··· 479 491 .unmap_sg = calgary_unmap_sg, 480 492 .map_page = calgary_map_page, 481 493 .unmap_page = calgary_unmap_page, 482 - .mapping_error = calgary_mapping_error, 483 494 .dma_supported = dma_direct_supported, 484 495 }; 485 496 ··· 725 738 unsigned int npages; 726 739 u64 start; 727 740 struct iommu_table *tbl = pci_iommu(dev->bus); 728 - 729 - /* reserve EMERGENCY_PAGES from bad_dma_address and up */ 730 - iommu_range_reserve(tbl, CALGARY_MAPPING_ERROR, EMERGENCY_PAGES); 731 741 732 742 /* avoid the BIOS/VGA first 640KB-1MB region */ 733 743 /* for CalIOC2 - avoid the entire first MB */
+1 -1
arch/x86/kernel/pci-dma.c
··· 17 17 18 18 static bool disable_dac_quirk __read_mostly; 19 19 20 - const struct dma_map_ops *dma_ops = &dma_direct_ops; 20 + const struct dma_map_ops *dma_ops; 21 21 EXPORT_SYMBOL(dma_ops); 22 22 23 23 #ifdef CONFIG_IOMMU_DEBUG
+1 -3
arch/x86/kernel/pci-swiotlb.c
··· 62 62 63 63 void __init pci_swiotlb_init(void) 64 64 { 65 - if (swiotlb) { 65 + if (swiotlb) 66 66 swiotlb_init(0); 67 - dma_ops = &swiotlb_dma_ops; 68 - } 69 67 } 70 68 71 69 void __init pci_swiotlb_late_init(void)
-7
arch/x86/mm/mem_encrypt.c
··· 381 381 swiotlb_update_mem_attributes(); 382 382 383 383 /* 384 - * With SEV, DMA operations cannot use encryption, we need to use 385 - * SWIOTLB to bounce buffer DMA operation. 386 - */ 387 - if (sev_active()) 388 - dma_ops = &swiotlb_dma_ops; 389 - 390 - /* 391 384 * With SEV, we need to unroll the rep string I/O instructions. 392 385 */ 393 386 if (sev_active())
-1
arch/x86/pci/sta2x11-fixup.c
··· 168 168 return; 169 169 pci_set_consistent_dma_mask(pdev, STA2X11_AMBA_SIZE - 1); 170 170 pci_set_dma_mask(pdev, STA2X11_AMBA_SIZE - 1); 171 - pdev->dev.dma_ops = &swiotlb_dma_ops; 172 171 pdev->dev.archdata.is_sta2x11 = true; 173 172 174 173 /* We must enable all devices as master, for audio DMA to work */
+1 -2
arch/xtensa/Kconfig
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 config XTENSA 3 3 def_bool y 4 - select ARCH_HAS_SG_CHAIN 5 4 select ARCH_HAS_SYNC_DMA_FOR_CPU 6 5 select ARCH_HAS_SYNC_DMA_FOR_DEVICE 7 6 select ARCH_NO_COHERENT_DMA_MMAP if !MMU ··· 9 10 select BUILDTIME_EXTABLE_SORT 10 11 select CLONE_BACKWARDS 11 12 select COMMON_CLK 12 - select DMA_DIRECT_OPS 13 + select DMA_REMAP if MMU 13 14 select GENERIC_ATOMIC64 14 15 select GENERIC_CLOCKEVENTS 15 16 select GENERIC_IRQ_SHOW
+1 -1
arch/xtensa/kernel/pci-dma.c
··· 160 160 flag & __GFP_NOWARN); 161 161 162 162 if (!page) 163 - page = alloc_pages(flag, get_order(size)); 163 + page = alloc_pages(flag | __GFP_ZERO, get_order(size)); 164 164 165 165 if (!page) 166 166 return NULL;
+5
drivers/acpi/scan.c
··· 1456 1456 const struct iommu_ops *iommu; 1457 1457 u64 dma_addr = 0, size = 0; 1458 1458 1459 + if (attr == DEV_DMA_NOT_SUPPORTED) { 1460 + set_dma_ops(dev, &dma_dummy_ops); 1461 + return 0; 1462 + } 1463 + 1459 1464 iort_dma_setup(dev, &dma_addr, &size); 1460 1465 1461 1466 iommu = iort_iommu_configure(dev);
+1 -33
drivers/base/platform.c
··· 1137 1137 ret = of_dma_configure(dev, dev->of_node, true); 1138 1138 } else if (has_acpi_companion(dev)) { 1139 1139 attr = acpi_get_dma_attr(to_acpi_device_node(dev->fwnode)); 1140 - if (attr != DEV_DMA_NOT_SUPPORTED) 1141 - ret = acpi_dma_configure(dev, attr); 1140 + ret = acpi_dma_configure(dev, attr); 1142 1141 } 1143 1142 1144 1143 return ret; ··· 1176 1177 of_platform_register_reconfig_notifier(); 1177 1178 return error; 1178 1179 } 1179 - 1180 - #ifndef ARCH_HAS_DMA_GET_REQUIRED_MASK 1181 - static u64 dma_default_get_required_mask(struct device *dev) 1182 - { 1183 - u32 low_totalram = ((max_pfn - 1) << PAGE_SHIFT); 1184 - u32 high_totalram = ((max_pfn - 1) >> (32 - PAGE_SHIFT)); 1185 - u64 mask; 1186 - 1187 - if (!high_totalram) { 1188 - /* convert to mask just covering totalram */ 1189 - low_totalram = (1 << (fls(low_totalram) - 1)); 1190 - low_totalram += low_totalram - 1; 1191 - mask = low_totalram; 1192 - } else { 1193 - high_totalram = (1 << (fls(high_totalram) - 1)); 1194 - high_totalram += high_totalram - 1; 1195 - mask = (((u64)high_totalram) << 32) + 0xffffffff; 1196 - } 1197 - return mask; 1198 - } 1199 - 1200 - u64 dma_get_required_mask(struct device *dev) 1201 - { 1202 - const struct dma_map_ops *ops = get_dma_ops(dev); 1203 - 1204 - if (ops->get_required_mask) 1205 - return ops->get_required_mask(dev); 1206 - return dma_default_get_required_mask(dev); 1207 - } 1208 - EXPORT_SYMBOL_GPL(dma_get_required_mask); 1209 - #endif 1210 1180 1211 1181 static __initdata LIST_HEAD(early_platform_driver_list); 1212 1182 static __initdata LIST_HEAD(early_platform_device_list);
+1 -1
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
··· 583 583 584 584 dev_priv->map_mode = vmw_dma_map_populate; 585 585 586 - if (dma_ops->sync_single_for_cpu) 586 + if (dma_ops && dma_ops->sync_single_for_cpu) 587 587 dev_priv->map_mode = vmw_dma_alloc_coherent; 588 588 #ifdef CONFIG_SWIOTLB 589 589 if (swiotlb_nr_tbl() == 0)
+6 -25
drivers/iommu/amd_iommu.c
··· 55 55 #include "amd_iommu_types.h" 56 56 #include "irq_remapping.h" 57 57 58 - #define AMD_IOMMU_MAPPING_ERROR 0 59 - 60 58 #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) 61 59 62 60 #define LOOP_TIMEOUT 100000 ··· 2184 2186 dev_name(dev)); 2185 2187 2186 2188 iommu_ignore_device(dev); 2187 - dev->dma_ops = &dma_direct_ops; 2189 + dev->dma_ops = NULL; 2188 2190 goto out; 2189 2191 } 2190 2192 init_iommu_group(dev); ··· 2337 2339 paddr &= PAGE_MASK; 2338 2340 2339 2341 address = dma_ops_alloc_iova(dev, dma_dom, pages, dma_mask); 2340 - if (address == AMD_IOMMU_MAPPING_ERROR) 2342 + if (!address) 2341 2343 goto out; 2342 2344 2343 2345 prot = dir2prot(direction); ··· 2374 2376 2375 2377 dma_ops_free_iova(dma_dom, address, pages); 2376 2378 2377 - return AMD_IOMMU_MAPPING_ERROR; 2379 + return DMA_MAPPING_ERROR; 2378 2380 } 2379 2381 2380 2382 /* ··· 2425 2427 if (PTR_ERR(domain) == -EINVAL) 2426 2428 return (dma_addr_t)paddr; 2427 2429 else if (IS_ERR(domain)) 2428 - return AMD_IOMMU_MAPPING_ERROR; 2430 + return DMA_MAPPING_ERROR; 2429 2431 2430 2432 dma_mask = *dev->dma_mask; 2431 2433 dma_dom = to_dma_ops_domain(domain); ··· 2502 2504 npages = sg_num_pages(dev, sglist, nelems); 2503 2505 2504 2506 address = dma_ops_alloc_iova(dev, dma_dom, npages, dma_mask); 2505 - if (address == AMD_IOMMU_MAPPING_ERROR) 2507 + if (address == DMA_MAPPING_ERROR) 2506 2508 goto out_err; 2507 2509 2508 2510 prot = dir2prot(direction); ··· 2625 2627 *dma_addr = __map_single(dev, dma_dom, page_to_phys(page), 2626 2628 size, DMA_BIDIRECTIONAL, dma_mask); 2627 2629 2628 - if (*dma_addr == AMD_IOMMU_MAPPING_ERROR) 2630 + if (*dma_addr == DMA_MAPPING_ERROR) 2629 2631 goto out_free; 2630 2632 2631 2633 return page_address(page); ··· 2676 2678 return check_device(dev); 2677 2679 } 2678 2680 2679 - static int amd_iommu_mapping_error(struct device *dev, dma_addr_t dma_addr) 2680 - { 2681 - return dma_addr == AMD_IOMMU_MAPPING_ERROR; 2682 - } 2683 - 2684 2681 static const struct dma_map_ops amd_iommu_dma_ops = { 2685 2682 .alloc = alloc_coherent, 2686 2683 .free = free_coherent, ··· 2684 2691 .map_sg = map_sg, 2685 2692 .unmap_sg = unmap_sg, 2686 2693 .dma_supported = amd_iommu_dma_supported, 2687 - .mapping_error = amd_iommu_mapping_error, 2688 2694 }; 2689 2695 2690 2696 static int init_reserved_iova_ranges(void) ··· 2769 2777 { 2770 2778 swiotlb = (iommu_pass_through || sme_me_mask) ? 1 : 0; 2771 2779 iommu_detected = 1; 2772 - 2773 - /* 2774 - * In case we don't initialize SWIOTLB (actually the common case 2775 - * when AMD IOMMU is enabled and SME is not active), make sure there 2776 - * are global dma_ops set as a fall-back for devices not handled by 2777 - * this driver (for example non-PCI devices). When SME is active, 2778 - * make sure that swiotlb variable remains set so the global dma_ops 2779 - * continue to be SWIOTLB. 2780 - */ 2781 - if (!swiotlb) 2782 - dma_ops = &dma_direct_ops; 2783 2780 2784 2781 if (amd_iommu_unmap_flush) 2785 2782 pr_info("AMD-Vi: IO/TLB flush on unmap enabled\n");
+8 -15
drivers/iommu/dma-iommu.c
··· 32 32 #include <linux/scatterlist.h> 33 33 #include <linux/vmalloc.h> 34 34 35 - #define IOMMU_MAPPING_ERROR 0 36 - 37 35 struct iommu_dma_msi_page { 38 36 struct list_head list; 39 37 dma_addr_t iova; ··· 521 523 { 522 524 __iommu_dma_unmap(iommu_get_dma_domain(dev), *handle, size); 523 525 __iommu_dma_free_pages(pages, PAGE_ALIGN(size) >> PAGE_SHIFT); 524 - *handle = IOMMU_MAPPING_ERROR; 526 + *handle = DMA_MAPPING_ERROR; 525 527 } 526 528 527 529 /** ··· 554 556 dma_addr_t iova; 555 557 unsigned int count, min_size, alloc_sizes = domain->pgsize_bitmap; 556 558 557 - *handle = IOMMU_MAPPING_ERROR; 559 + *handle = DMA_MAPPING_ERROR; 558 560 559 561 min_size = alloc_sizes & -alloc_sizes; 560 562 if (min_size < PAGE_SIZE) { ··· 647 649 648 650 iova = iommu_dma_alloc_iova(domain, size, dma_get_mask(dev), dev); 649 651 if (!iova) 650 - return IOMMU_MAPPING_ERROR; 652 + return DMA_MAPPING_ERROR; 651 653 652 654 if (iommu_map(domain, iova, phys - iova_off, size, prot)) { 653 655 iommu_dma_free_iova(cookie, iova, size); 654 - return IOMMU_MAPPING_ERROR; 656 + return DMA_MAPPING_ERROR; 655 657 } 656 658 return iova + iova_off; 657 659 } ··· 692 694 693 695 s->offset += s_iova_off; 694 696 s->length = s_length; 695 - sg_dma_address(s) = IOMMU_MAPPING_ERROR; 697 + sg_dma_address(s) = DMA_MAPPING_ERROR; 696 698 sg_dma_len(s) = 0; 697 699 698 700 /* ··· 735 737 int i; 736 738 737 739 for_each_sg(sg, s, nents, i) { 738 - if (sg_dma_address(s) != IOMMU_MAPPING_ERROR) 740 + if (sg_dma_address(s) != DMA_MAPPING_ERROR) 739 741 s->offset += sg_dma_address(s); 740 742 if (sg_dma_len(s)) 741 743 s->length = sg_dma_len(s); 742 - sg_dma_address(s) = IOMMU_MAPPING_ERROR; 744 + sg_dma_address(s) = DMA_MAPPING_ERROR; 743 745 sg_dma_len(s) = 0; 744 746 } 745 747 } ··· 856 858 __iommu_dma_unmap(iommu_get_dma_domain(dev), handle, size); 857 859 } 858 860 859 - int iommu_dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 860 - { 861 - return dma_addr == IOMMU_MAPPING_ERROR; 862 - } 863 - 864 861 static struct iommu_dma_msi_page *iommu_dma_get_msi_page(struct device *dev, 865 862 phys_addr_t msi_addr, struct iommu_domain *domain) 866 863 { ··· 875 882 return NULL; 876 883 877 884 iova = __iommu_dma_map(dev, msi_addr, size, prot, domain); 878 - if (iommu_dma_mapping_error(dev, iova)) 885 + if (iova == DMA_MAPPING_ERROR) 879 886 goto out_free_page; 880 887 881 888 INIT_LIST_HEAD(&msi_page->list);
+10 -16
drivers/iommu/intel-iommu.c
··· 3597 3597 return 0; 3598 3598 } 3599 3599 3600 - static dma_addr_t __intel_map_single(struct device *dev, phys_addr_t paddr, 3601 - size_t size, int dir, u64 dma_mask) 3600 + static dma_addr_t __intel_map_page(struct device *dev, struct page *page, 3601 + unsigned long offset, size_t size, int dir, 3602 + u64 dma_mask) 3602 3603 { 3604 + phys_addr_t paddr = page_to_phys(page) + offset; 3603 3605 struct dmar_domain *domain; 3604 3606 phys_addr_t start_paddr; 3605 3607 unsigned long iova_pfn; ··· 3617 3615 3618 3616 domain = get_valid_domain_for_dev(dev); 3619 3617 if (!domain) 3620 - return 0; 3618 + return DMA_MAPPING_ERROR; 3621 3619 3622 3620 iommu = domain_get_iommu(domain); 3623 3621 size = aligned_nrpages(paddr, size); ··· 3655 3653 free_iova_fast(&domain->iovad, iova_pfn, dma_to_mm_pfn(size)); 3656 3654 pr_err("Device %s request: %zx@%llx dir %d --- failed\n", 3657 3655 dev_name(dev), size, (unsigned long long)paddr, dir); 3658 - return 0; 3656 + return DMA_MAPPING_ERROR; 3659 3657 } 3660 3658 3661 3659 static dma_addr_t intel_map_page(struct device *dev, struct page *page, ··· 3663 3661 enum dma_data_direction dir, 3664 3662 unsigned long attrs) 3665 3663 { 3666 - return __intel_map_single(dev, page_to_phys(page) + offset, size, 3667 - dir, *dev->dma_mask); 3664 + return __intel_map_page(dev, page, offset, size, dir, *dev->dma_mask); 3668 3665 } 3669 3666 3670 3667 static void intel_unmap(struct device *dev, dma_addr_t dev_addr, size_t size) ··· 3754 3753 return NULL; 3755 3754 memset(page_address(page), 0, size); 3756 3755 3757 - *dma_handle = __intel_map_single(dev, page_to_phys(page), size, 3758 - DMA_BIDIRECTIONAL, 3759 - dev->coherent_dma_mask); 3760 - if (*dma_handle) 3756 + *dma_handle = __intel_map_page(dev, page, 0, size, DMA_BIDIRECTIONAL, 3757 + dev->coherent_dma_mask); 3758 + if (*dma_handle != DMA_MAPPING_ERROR) 3761 3759 return page_address(page); 3762 3760 if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT)) 3763 3761 __free_pages(page, order); ··· 3865 3865 return nelems; 3866 3866 } 3867 3867 3868 - static int intel_mapping_error(struct device *dev, dma_addr_t dma_addr) 3869 - { 3870 - return !dma_addr; 3871 - } 3872 - 3873 3868 static const struct dma_map_ops intel_dma_ops = { 3874 3869 .alloc = intel_alloc_coherent, 3875 3870 .free = intel_free_coherent, ··· 3872 3877 .unmap_sg = intel_unmap_sg, 3873 3878 .map_page = intel_map_page, 3874 3879 .unmap_page = intel_unmap_page, 3875 - .mapping_error = intel_mapping_error, 3876 3880 .dma_supported = dma_direct_supported, 3877 3881 }; 3878 3882
+1 -1
drivers/misc/mic/host/mic_boot.c
··· 149 149 struct scif_hw_dev *scdev = dev_get_drvdata(dev); 150 150 struct mic_device *mdev = scdev_to_mdev(scdev); 151 151 dma_addr_t tmp; 152 - void *va = kmalloc(size, gfp); 152 + void *va = kmalloc(size, gfp | __GFP_ZERO); 153 153 154 154 if (va) { 155 155 tmp = mic_map_single(mdev, va, size);
+1 -9
drivers/parisc/ccio-dma.c
··· 110 110 #define CMD_TLB_DIRECT_WRITE 35 /* IO_COMMAND for I/O TLB Writes */ 111 111 #define CMD_TLB_PURGE 33 /* IO_COMMAND to Purge I/O TLB entry */ 112 112 113 - #define CCIO_MAPPING_ERROR (~(dma_addr_t)0) 114 - 115 113 struct ioa_registers { 116 114 /* Runway Supervisory Set */ 117 115 int32_t unused1[12]; ··· 738 740 BUG_ON(!dev); 739 741 ioc = GET_IOC(dev); 740 742 if (!ioc) 741 - return CCIO_MAPPING_ERROR; 743 + return DMA_MAPPING_ERROR; 742 744 743 745 BUG_ON(size <= 0); 744 746 ··· 1019 1021 DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents); 1020 1022 } 1021 1023 1022 - static int ccio_mapping_error(struct device *dev, dma_addr_t dma_addr) 1023 - { 1024 - return dma_addr == CCIO_MAPPING_ERROR; 1025 - } 1026 - 1027 1024 static const struct dma_map_ops ccio_ops = { 1028 1025 .dma_supported = ccio_dma_supported, 1029 1026 .alloc = ccio_alloc, ··· 1027 1034 .unmap_page = ccio_unmap_page, 1028 1035 .map_sg = ccio_map_sg, 1029 1036 .unmap_sg = ccio_unmap_sg, 1030 - .mapping_error = ccio_mapping_error, 1031 1037 }; 1032 1038 1033 1039 #ifdef CONFIG_PROC_FS
+1 -9
drivers/parisc/sba_iommu.c
··· 93 93 94 94 #define DEFAULT_DMA_HINT_REG 0 95 95 96 - #define SBA_MAPPING_ERROR (~(dma_addr_t)0) 97 - 98 96 struct sba_device *sba_list; 99 97 EXPORT_SYMBOL_GPL(sba_list); 100 98 ··· 723 725 724 726 ioc = GET_IOC(dev); 725 727 if (!ioc) 726 - return SBA_MAPPING_ERROR; 728 + return DMA_MAPPING_ERROR; 727 729 728 730 /* save offset bits */ 729 731 offset = ((dma_addr_t) (long) addr) & ~IOVP_MASK; ··· 1078 1080 1079 1081 } 1080 1082 1081 - static int sba_mapping_error(struct device *dev, dma_addr_t dma_addr) 1082 - { 1083 - return dma_addr == SBA_MAPPING_ERROR; 1084 - } 1085 - 1086 1083 static const struct dma_map_ops sba_ops = { 1087 1084 .dma_supported = sba_dma_supported, 1088 1085 .alloc = sba_alloc, ··· 1086 1093 .unmap_page = sba_unmap_page, 1087 1094 .map_sg = sba_map_sg, 1088 1095 .unmap_sg = sba_unmap_sg, 1089 - .mapping_error = sba_mapping_error, 1090 1096 }; 1091 1097 1092 1098
+17 -31
drivers/pci/controller/vmd.c
··· 307 307 return &vmd->dev->dev; 308 308 } 309 309 310 - static const struct dma_map_ops *vmd_dma_ops(struct device *dev) 311 - { 312 - return get_dma_ops(to_vmd_dev(dev)); 313 - } 314 - 315 310 static void *vmd_alloc(struct device *dev, size_t size, dma_addr_t *addr, 316 311 gfp_t flag, unsigned long attrs) 317 312 { 318 - return vmd_dma_ops(dev)->alloc(to_vmd_dev(dev), size, addr, flag, 319 - attrs); 313 + return dma_alloc_attrs(to_vmd_dev(dev), size, addr, flag, attrs); 320 314 } 321 315 322 316 static void vmd_free(struct device *dev, size_t size, void *vaddr, 323 317 dma_addr_t addr, unsigned long attrs) 324 318 { 325 - return vmd_dma_ops(dev)->free(to_vmd_dev(dev), size, vaddr, addr, 326 - attrs); 319 + return dma_free_attrs(to_vmd_dev(dev), size, vaddr, addr, attrs); 327 320 } 328 321 329 322 static int vmd_mmap(struct device *dev, struct vm_area_struct *vma, 330 323 void *cpu_addr, dma_addr_t addr, size_t size, 331 324 unsigned long attrs) 332 325 { 333 - return vmd_dma_ops(dev)->mmap(to_vmd_dev(dev), vma, cpu_addr, addr, 334 - size, attrs); 326 + return dma_mmap_attrs(to_vmd_dev(dev), vma, cpu_addr, addr, size, 327 + attrs); 335 328 } 336 329 337 330 static int vmd_get_sgtable(struct device *dev, struct sg_table *sgt, 338 331 void *cpu_addr, dma_addr_t addr, size_t size, 339 332 unsigned long attrs) 340 333 { 341 - return vmd_dma_ops(dev)->get_sgtable(to_vmd_dev(dev), sgt, cpu_addr, 342 - addr, size, attrs); 334 + return dma_get_sgtable_attrs(to_vmd_dev(dev), sgt, cpu_addr, addr, size, 335 + attrs); 343 336 } 344 337 345 338 static dma_addr_t vmd_map_page(struct device *dev, struct page *page, ··· 340 347 enum dma_data_direction dir, 341 348 unsigned long attrs) 342 349 { 343 - return vmd_dma_ops(dev)->map_page(to_vmd_dev(dev), page, offset, size, 344 - dir, attrs); 350 + return dma_map_page_attrs(to_vmd_dev(dev), page, offset, size, dir, 351 + attrs); 345 352 } 346 353 347 354 static void vmd_unmap_page(struct device *dev, dma_addr_t addr, size_t size, 348 355 enum dma_data_direction dir, unsigned long attrs) 349 356 { 350 - vmd_dma_ops(dev)->unmap_page(to_vmd_dev(dev), addr, size, dir, attrs); 357 + dma_unmap_page_attrs(to_vmd_dev(dev), addr, size, dir, attrs); 351 358 } 352 359 353 360 static int vmd_map_sg(struct device *dev, struct scatterlist *sg, int nents, 354 361 enum dma_data_direction dir, unsigned long attrs) 355 362 { 356 - return vmd_dma_ops(dev)->map_sg(to_vmd_dev(dev), sg, nents, dir, attrs); 363 + return dma_map_sg_attrs(to_vmd_dev(dev), sg, nents, dir, attrs); 357 364 } 358 365 359 366 static void vmd_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, 360 367 enum dma_data_direction dir, unsigned long attrs) 361 368 { 362 - vmd_dma_ops(dev)->unmap_sg(to_vmd_dev(dev), sg, nents, dir, attrs); 369 + dma_unmap_sg_attrs(to_vmd_dev(dev), sg, nents, dir, attrs); 363 370 } 364 371 365 372 static void vmd_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 366 373 size_t size, enum dma_data_direction dir) 367 374 { 368 - vmd_dma_ops(dev)->sync_single_for_cpu(to_vmd_dev(dev), addr, size, dir); 375 + dma_sync_single_for_cpu(to_vmd_dev(dev), addr, size, dir); 369 376 } 370 377 371 378 static void vmd_sync_single_for_device(struct device *dev, dma_addr_t addr, 372 379 size_t size, enum dma_data_direction dir) 373 380 { 374 - vmd_dma_ops(dev)->sync_single_for_device(to_vmd_dev(dev), addr, size, 375 - dir); 381 + dma_sync_single_for_device(to_vmd_dev(dev), addr, size, dir); 376 382 } 377 383 378 384 static void vmd_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 379 385 int nents, enum dma_data_direction dir) 380 386 { 381 - vmd_dma_ops(dev)->sync_sg_for_cpu(to_vmd_dev(dev), sg, nents, dir); 387 + dma_sync_sg_for_cpu(to_vmd_dev(dev), sg, nents, dir); 382 388 } 383 389 384 390 static void vmd_sync_sg_for_device(struct device *dev, struct scatterlist *sg, 385 391 int nents, enum dma_data_direction dir) 386 392 { 387 - vmd_dma_ops(dev)->sync_sg_for_device(to_vmd_dev(dev), sg, nents, dir); 388 - } 389 - 390 - static int vmd_mapping_error(struct device *dev, dma_addr_t addr) 391 - { 392 - return vmd_dma_ops(dev)->mapping_error(to_vmd_dev(dev), addr); 393 + dma_sync_sg_for_device(to_vmd_dev(dev), sg, nents, dir); 393 394 } 394 395 395 396 static int vmd_dma_supported(struct device *dev, u64 mask) 396 397 { 397 - return vmd_dma_ops(dev)->dma_supported(to_vmd_dev(dev), mask); 398 + return dma_supported(to_vmd_dev(dev), mask); 398 399 } 399 400 400 401 static u64 vmd_get_required_mask(struct device *dev) 401 402 { 402 - return vmd_dma_ops(dev)->get_required_mask(to_vmd_dev(dev)); 403 + return dma_get_required_mask(to_vmd_dev(dev)); 403 404 } 404 405 405 406 static void vmd_teardown_dma_ops(struct vmd_dev *vmd) ··· 433 446 ASSIGN_VMD_DMA_OPS(source, dest, sync_single_for_device); 434 447 ASSIGN_VMD_DMA_OPS(source, dest, sync_sg_for_cpu); 435 448 ASSIGN_VMD_DMA_OPS(source, dest, sync_sg_for_device); 436 - ASSIGN_VMD_DMA_OPS(source, dest, mapping_error); 437 449 ASSIGN_VMD_DMA_OPS(source, dest, dma_supported); 438 450 ASSIGN_VMD_DMA_OPS(source, dest, get_required_mask); 439 451 add_dma_domain(domain);
+1 -3
drivers/pci/pci-driver.c
··· 1600 1600 ret = of_dma_configure(dev, bridge->parent->of_node, true); 1601 1601 } else if (has_acpi_companion(bridge)) { 1602 1602 struct acpi_device *adev = to_acpi_device_node(bridge->fwnode); 1603 - enum dev_dma_attr attr = acpi_get_dma_attr(adev); 1604 1603 1605 - if (attr != DEV_DMA_NOT_SUPPORTED) 1606 - ret = acpi_dma_configure(dev, attr); 1604 + ret = acpi_dma_configure(dev, acpi_get_dma_attr(adev)); 1607 1605 } 1608 1606 1609 1607 pci_put_host_bridge_device(bridge);
+5 -31
drivers/xen/swiotlb-xen.c
··· 53 53 * API. 54 54 */ 55 55 56 - #define XEN_SWIOTLB_ERROR_CODE (~(dma_addr_t)0x0) 57 - 58 56 static char *xen_io_tlb_start, *xen_io_tlb_end; 59 57 static unsigned long xen_io_tlb_nslabs; 60 58 /* ··· 403 405 404 406 map = swiotlb_tbl_map_single(dev, start_dma_addr, phys, size, dir, 405 407 attrs); 406 - if (map == SWIOTLB_MAP_ERROR) 407 - return XEN_SWIOTLB_ERROR_CODE; 408 + if (map == DMA_MAPPING_ERROR) 409 + return DMA_MAPPING_ERROR; 408 410 409 411 dev_addr = xen_phys_to_bus(map); 410 412 xen_dma_map_page(dev, pfn_to_page(map >> PAGE_SHIFT), ··· 419 421 attrs |= DMA_ATTR_SKIP_CPU_SYNC; 420 422 swiotlb_tbl_unmap_single(dev, map, size, dir, attrs); 421 423 422 - return XEN_SWIOTLB_ERROR_CODE; 424 + return DMA_MAPPING_ERROR; 423 425 } 424 426 425 427 /* ··· 441 443 xen_dma_unmap_page(hwdev, dev_addr, size, dir, attrs); 442 444 443 445 /* NOTE: We use dev_addr here, not paddr! */ 444 - if (is_xen_swiotlb_buffer(dev_addr)) { 446 + if (is_xen_swiotlb_buffer(dev_addr)) 445 447 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs); 446 - return; 447 - } 448 - 449 - if (dir != DMA_FROM_DEVICE) 450 - return; 451 - 452 - /* 453 - * phys_to_virt doesn't work with hihgmem page but we could 454 - * call dma_mark_clean() with hihgmem page here. However, we 455 - * are fine since dma_mark_clean() is null on POWERPC. We can 456 - * make dma_mark_clean() take a physical address if necessary. 457 - */ 458 - dma_mark_clean(phys_to_virt(paddr), size); 459 448 } 460 449 461 450 static void xen_swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, ··· 480 495 481 496 if (target == SYNC_FOR_DEVICE) 482 497 xen_dma_sync_single_for_device(hwdev, dev_addr, size, dir); 483 - 484 - if (dir != DMA_FROM_DEVICE) 485 - return; 486 - 487 - dma_mark_clean(phys_to_virt(paddr), size); 488 498 } 489 499 490 500 void ··· 554 574 sg_phys(sg), 555 575 sg->length, 556 576 dir, attrs); 557 - if (map == SWIOTLB_MAP_ERROR) { 577 + if (map == DMA_MAPPING_ERROR) { 558 578 dev_warn(hwdev, "swiotlb buffer is full\n"); 559 579 /* Don't panic here, we expect map_sg users 560 580 to do proper error handling. */ ··· 680 700 return dma_common_get_sgtable(dev, sgt, cpu_addr, handle, size, attrs); 681 701 } 682 702 683 - static int xen_swiotlb_mapping_error(struct device *dev, dma_addr_t dma_addr) 684 - { 685 - return dma_addr == XEN_SWIOTLB_ERROR_CODE; 686 - } 687 - 688 703 const struct dma_map_ops xen_swiotlb_dma_ops = { 689 704 .alloc = xen_swiotlb_alloc_coherent, 690 705 .free = xen_swiotlb_free_coherent, ··· 694 719 .dma_supported = xen_swiotlb_dma_supported, 695 720 .mmap = xen_swiotlb_dma_mmap, 696 721 .get_sgtable = xen_swiotlb_get_sgtable, 697 - .mapping_error = xen_swiotlb_mapping_error, 698 722 };
+1 -1
include/asm-generic/dma-mapping.h
··· 4 4 5 5 static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus) 6 6 { 7 - return &dma_direct_ops; 7 + return NULL; 8 8 } 9 9 10 10 #endif /* _ASM_GENERIC_DMA_MAPPING_H */
-34
include/linux/dma-debug.h
··· 30 30 31 31 extern void dma_debug_add_bus(struct bus_type *bus); 32 32 33 - extern int dma_debug_resize_entries(u32 num_entries); 34 - 35 33 extern void debug_dma_map_single(struct device *dev, const void *addr, 36 34 unsigned long len); 37 35 ··· 70 72 dma_addr_t dma_handle, 71 73 size_t size, int direction); 72 74 73 - extern void debug_dma_sync_single_range_for_cpu(struct device *dev, 74 - dma_addr_t dma_handle, 75 - unsigned long offset, 76 - size_t size, 77 - int direction); 78 - 79 - extern void debug_dma_sync_single_range_for_device(struct device *dev, 80 - dma_addr_t dma_handle, 81 - unsigned long offset, 82 - size_t size, int direction); 83 - 84 75 extern void debug_dma_sync_sg_for_cpu(struct device *dev, 85 76 struct scatterlist *sg, 86 77 int nelems, int direction); ··· 86 99 87 100 static inline void dma_debug_add_bus(struct bus_type *bus) 88 101 { 89 - } 90 - 91 - static inline int dma_debug_resize_entries(u32 num_entries) 92 - { 93 - return 0; 94 102 } 95 103 96 104 static inline void debug_dma_map_single(struct device *dev, const void *addr, ··· 153 171 static inline void debug_dma_sync_single_for_device(struct device *dev, 154 172 dma_addr_t dma_handle, 155 173 size_t size, int direction) 156 - { 157 - } 158 - 159 - static inline void debug_dma_sync_single_range_for_cpu(struct device *dev, 160 - dma_addr_t dma_handle, 161 - unsigned long offset, 162 - size_t size, 163 - int direction) 164 - { 165 - } 166 - 167 - static inline void debug_dma_sync_single_range_for_device(struct device *dev, 168 - dma_addr_t dma_handle, 169 - unsigned long offset, 170 - size_t size, 171 - int direction) 172 174 { 173 175 } 174 176
+3 -16
include/linux/dma-direct.h
··· 5 5 #include <linux/dma-mapping.h> 6 6 #include <linux/mem_encrypt.h> 7 7 8 - #define DIRECT_MAPPING_ERROR (~(dma_addr_t)0) 9 - 10 8 #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA 11 9 #include <asm/dma-direct.h> 12 10 #else ··· 48 50 return __sme_clr(__dma_to_phys(dev, daddr)); 49 51 } 50 52 51 - #ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN 52 - void dma_mark_clean(void *addr, size_t size); 53 - #else 54 - static inline void dma_mark_clean(void *addr, size_t size) 55 - { 56 - } 57 - #endif /* CONFIG_ARCH_HAS_DMA_MARK_CLEAN */ 58 - 59 53 u64 dma_direct_get_required_mask(struct device *dev); 60 54 void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 61 55 gfp_t gfp, unsigned long attrs); ··· 57 67 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); 58 68 void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr, 59 69 dma_addr_t dma_addr, unsigned long attrs); 60 - dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, 61 - unsigned long offset, size_t size, enum dma_data_direction dir, 62 - unsigned long attrs); 63 - int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, 64 - enum dma_data_direction dir, unsigned long attrs); 70 + struct page *__dma_direct_alloc_pages(struct device *dev, size_t size, 71 + dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs); 72 + void __dma_direct_free_pages(struct device *dev, size_t size, struct page *page); 65 73 int dma_direct_supported(struct device *dev, u64 mask); 66 - int dma_direct_mapping_error(struct device *dev, dma_addr_t dma_addr); 67 74 #endif /* _LINUX_DMA_DIRECT_H */
-1
include/linux/dma-iommu.h
··· 69 69 size_t size, enum dma_data_direction dir, unsigned long attrs); 70 70 void iommu_dma_unmap_resource(struct device *dev, dma_addr_t handle, 71 71 size_t size, enum dma_data_direction dir, unsigned long attrs); 72 - int iommu_dma_mapping_error(struct device *dev, dma_addr_t dma_addr); 73 72 74 73 /* The DMA API isn't _quite_ the whole story, though... */ 75 74 void iommu_dma_map_msi_msg(int irq, struct msi_msg *msg);
+143 -207
include/linux/dma-mapping.h
··· 128 128 enum dma_data_direction dir); 129 129 void (*cache_sync)(struct device *dev, void *vaddr, size_t size, 130 130 enum dma_data_direction direction); 131 - int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); 132 131 int (*dma_supported)(struct device *dev, u64 mask); 133 132 u64 (*get_required_mask)(struct device *dev); 134 133 }; 135 134 136 - extern const struct dma_map_ops dma_direct_ops; 135 + #define DMA_MAPPING_ERROR (~(dma_addr_t)0) 136 + 137 137 extern const struct dma_map_ops dma_virt_ops; 138 + extern const struct dma_map_ops dma_dummy_ops; 138 139 139 140 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 140 141 ··· 221 220 } 222 221 #endif 223 222 223 + static inline bool dma_is_direct(const struct dma_map_ops *ops) 224 + { 225 + return likely(!ops); 226 + } 227 + 228 + /* 229 + * All the dma_direct_* declarations are here just for the indirect call bypass, 230 + * and must not be used directly drivers! 231 + */ 232 + dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, 233 + unsigned long offset, size_t size, enum dma_data_direction dir, 234 + unsigned long attrs); 235 + int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, 236 + enum dma_data_direction dir, unsigned long attrs); 237 + 238 + #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \ 239 + defined(CONFIG_SWIOTLB) 240 + void dma_direct_sync_single_for_device(struct device *dev, 241 + dma_addr_t addr, size_t size, enum dma_data_direction dir); 242 + void dma_direct_sync_sg_for_device(struct device *dev, 243 + struct scatterlist *sgl, int nents, enum dma_data_direction dir); 244 + #else 245 + static inline void dma_direct_sync_single_for_device(struct device *dev, 246 + dma_addr_t addr, size_t size, enum dma_data_direction dir) 247 + { 248 + } 249 + static inline void dma_direct_sync_sg_for_device(struct device *dev, 250 + struct scatterlist *sgl, int nents, enum dma_data_direction dir) 251 + { 252 + } 253 + #endif 254 + 255 + #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ 256 + defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \ 257 + defined(CONFIG_SWIOTLB) 258 + void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, 259 + size_t size, enum dma_data_direction dir, unsigned long attrs); 260 + void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl, 261 + int nents, enum dma_data_direction dir, unsigned long attrs); 262 + void dma_direct_sync_single_for_cpu(struct device *dev, 263 + dma_addr_t addr, size_t size, enum dma_data_direction dir); 264 + void dma_direct_sync_sg_for_cpu(struct device *dev, 265 + struct scatterlist *sgl, int nents, enum dma_data_direction dir); 266 + #else 267 + static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, 268 + size_t size, enum dma_data_direction dir, unsigned long attrs) 269 + { 270 + } 271 + static inline void dma_direct_unmap_sg(struct device *dev, 272 + struct scatterlist *sgl, int nents, enum dma_data_direction dir, 273 + unsigned long attrs) 274 + { 275 + } 276 + static inline void dma_direct_sync_single_for_cpu(struct device *dev, 277 + dma_addr_t addr, size_t size, enum dma_data_direction dir) 278 + { 279 + } 280 + static inline void dma_direct_sync_sg_for_cpu(struct device *dev, 281 + struct scatterlist *sgl, int nents, enum dma_data_direction dir) 282 + { 283 + } 284 + #endif 285 + 224 286 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, 225 287 size_t size, 226 288 enum dma_data_direction dir, ··· 294 230 295 231 BUG_ON(!valid_dma_direction(dir)); 296 232 debug_dma_map_single(dev, ptr, size); 297 - addr = ops->map_page(dev, virt_to_page(ptr), 298 - offset_in_page(ptr), size, 299 - dir, attrs); 233 + if (dma_is_direct(ops)) 234 + addr = dma_direct_map_page(dev, virt_to_page(ptr), 235 + offset_in_page(ptr), size, dir, attrs); 236 + else 237 + addr = ops->map_page(dev, virt_to_page(ptr), 238 + offset_in_page(ptr), size, dir, attrs); 300 239 debug_dma_map_page(dev, virt_to_page(ptr), 301 240 offset_in_page(ptr), size, 302 241 dir, addr, true); ··· 314 247 const struct dma_map_ops *ops = get_dma_ops(dev); 315 248 316 249 BUG_ON(!valid_dma_direction(dir)); 317 - if (ops->unmap_page) 250 + if (dma_is_direct(ops)) 251 + dma_direct_unmap_page(dev, addr, size, dir, attrs); 252 + else if (ops->unmap_page) 318 253 ops->unmap_page(dev, addr, size, dir, attrs); 319 254 debug_dma_unmap_page(dev, addr, size, dir, true); 255 + } 256 + 257 + static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, 258 + size_t size, enum dma_data_direction dir, unsigned long attrs) 259 + { 260 + return dma_unmap_single_attrs(dev, addr, size, dir, attrs); 320 261 } 321 262 322 263 /* ··· 339 264 int ents; 340 265 341 266 BUG_ON(!valid_dma_direction(dir)); 342 - ents = ops->map_sg(dev, sg, nents, dir, attrs); 267 + if (dma_is_direct(ops)) 268 + ents = dma_direct_map_sg(dev, sg, nents, dir, attrs); 269 + else 270 + ents = ops->map_sg(dev, sg, nents, dir, attrs); 343 271 BUG_ON(ents < 0); 344 272 debug_dma_map_sg(dev, sg, nents, ents, dir); 345 273 ··· 357 279 358 280 BUG_ON(!valid_dma_direction(dir)); 359 281 debug_dma_unmap_sg(dev, sg, nents, dir); 360 - if (ops->unmap_sg) 282 + if (dma_is_direct(ops)) 283 + dma_direct_unmap_sg(dev, sg, nents, dir, attrs); 284 + else if (ops->unmap_sg) 361 285 ops->unmap_sg(dev, sg, nents, dir, attrs); 362 286 } 363 287 ··· 373 293 dma_addr_t addr; 374 294 375 295 BUG_ON(!valid_dma_direction(dir)); 376 - addr = ops->map_page(dev, page, offset, size, dir, attrs); 296 + if (dma_is_direct(ops)) 297 + addr = dma_direct_map_page(dev, page, offset, size, dir, attrs); 298 + else 299 + addr = ops->map_page(dev, page, offset, size, dir, attrs); 377 300 debug_dma_map_page(dev, page, offset, size, dir, addr, false); 378 301 379 302 return addr; 380 - } 381 - 382 - static inline void dma_unmap_page_attrs(struct device *dev, 383 - dma_addr_t addr, size_t size, 384 - enum dma_data_direction dir, 385 - unsigned long attrs) 386 - { 387 - const struct dma_map_ops *ops = get_dma_ops(dev); 388 - 389 - BUG_ON(!valid_dma_direction(dir)); 390 - if (ops->unmap_page) 391 - ops->unmap_page(dev, addr, size, dir, attrs); 392 - debug_dma_unmap_page(dev, addr, size, dir, false); 393 303 } 394 304 395 305 static inline dma_addr_t dma_map_resource(struct device *dev, ··· 397 327 BUG_ON(pfn_valid(PHYS_PFN(phys_addr))); 398 328 399 329 addr = phys_addr; 400 - if (ops->map_resource) 330 + if (ops && ops->map_resource) 401 331 addr = ops->map_resource(dev, phys_addr, size, dir, attrs); 402 332 403 333 debug_dma_map_resource(dev, phys_addr, size, dir, addr); ··· 412 342 const struct dma_map_ops *ops = get_dma_ops(dev); 413 343 414 344 BUG_ON(!valid_dma_direction(dir)); 415 - if (ops->unmap_resource) 345 + if (ops && ops->unmap_resource) 416 346 ops->unmap_resource(dev, addr, size, dir, attrs); 417 347 debug_dma_unmap_resource(dev, addr, size, dir); 418 348 } ··· 424 354 const struct dma_map_ops *ops = get_dma_ops(dev); 425 355 426 356 BUG_ON(!valid_dma_direction(dir)); 427 - if (ops->sync_single_for_cpu) 357 + if (dma_is_direct(ops)) 358 + dma_direct_sync_single_for_cpu(dev, addr, size, dir); 359 + else if (ops->sync_single_for_cpu) 428 360 ops->sync_single_for_cpu(dev, addr, size, dir); 429 361 debug_dma_sync_single_for_cpu(dev, addr, size, dir); 362 + } 363 + 364 + static inline void dma_sync_single_range_for_cpu(struct device *dev, 365 + dma_addr_t addr, unsigned long offset, size_t size, 366 + enum dma_data_direction dir) 367 + { 368 + return dma_sync_single_for_cpu(dev, addr + offset, size, dir); 430 369 } 431 370 432 371 static inline void dma_sync_single_for_device(struct device *dev, ··· 445 366 const struct dma_map_ops *ops = get_dma_ops(dev); 446 367 447 368 BUG_ON(!valid_dma_direction(dir)); 448 - if (ops->sync_single_for_device) 369 + if (dma_is_direct(ops)) 370 + dma_direct_sync_single_for_device(dev, addr, size, dir); 371 + else if (ops->sync_single_for_device) 449 372 ops->sync_single_for_device(dev, addr, size, dir); 450 373 debug_dma_sync_single_for_device(dev, addr, size, dir); 451 374 } 452 375 453 - static inline void dma_sync_single_range_for_cpu(struct device *dev, 454 - dma_addr_t addr, 455 - unsigned long offset, 456 - size_t size, 457 - enum dma_data_direction dir) 458 - { 459 - const struct dma_map_ops *ops = get_dma_ops(dev); 460 - 461 - BUG_ON(!valid_dma_direction(dir)); 462 - if (ops->sync_single_for_cpu) 463 - ops->sync_single_for_cpu(dev, addr + offset, size, dir); 464 - debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir); 465 - } 466 - 467 376 static inline void dma_sync_single_range_for_device(struct device *dev, 468 - dma_addr_t addr, 469 - unsigned long offset, 470 - size_t size, 471 - enum dma_data_direction dir) 377 + dma_addr_t addr, unsigned long offset, size_t size, 378 + enum dma_data_direction dir) 472 379 { 473 - const struct dma_map_ops *ops = get_dma_ops(dev); 474 - 475 - BUG_ON(!valid_dma_direction(dir)); 476 - if (ops->sync_single_for_device) 477 - ops->sync_single_for_device(dev, addr + offset, size, dir); 478 - debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir); 380 + return dma_sync_single_for_device(dev, addr + offset, size, dir); 479 381 } 480 382 481 383 static inline void ··· 466 406 const struct dma_map_ops *ops = get_dma_ops(dev); 467 407 468 408 BUG_ON(!valid_dma_direction(dir)); 469 - if (ops->sync_sg_for_cpu) 409 + if (dma_is_direct(ops)) 410 + dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir); 411 + else if (ops->sync_sg_for_cpu) 470 412 ops->sync_sg_for_cpu(dev, sg, nelems, dir); 471 413 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); 472 414 } ··· 480 418 const struct dma_map_ops *ops = get_dma_ops(dev); 481 419 482 420 BUG_ON(!valid_dma_direction(dir)); 483 - if (ops->sync_sg_for_device) 421 + if (dma_is_direct(ops)) 422 + dma_direct_sync_sg_for_device(dev, sg, nelems, dir); 423 + else if (ops->sync_sg_for_device) 484 424 ops->sync_sg_for_device(dev, sg, nelems, dir); 485 425 debug_dma_sync_sg_for_device(dev, sg, nelems, dir); 486 426 ··· 495 431 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) 496 432 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) 497 433 498 - static inline void 499 - dma_cache_sync(struct device *dev, void *vaddr, size_t size, 500 - enum dma_data_direction dir) 501 - { 502 - const struct dma_map_ops *ops = get_dma_ops(dev); 503 - 504 - BUG_ON(!valid_dma_direction(dir)); 505 - if (ops->cache_sync) 506 - ops->cache_sync(dev, vaddr, size, dir); 507 - } 434 + void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 435 + enum dma_data_direction dir); 508 436 509 437 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, 510 438 void *cpu_addr, dma_addr_t dma_addr, size_t size, ··· 511 455 const void *caller); 512 456 void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags); 513 457 514 - /** 515 - * dma_mmap_attrs - map a coherent DMA allocation into user space 516 - * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices 517 - * @vma: vm_area_struct describing requested user mapping 518 - * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs 519 - * @handle: device-view address returned from dma_alloc_attrs 520 - * @size: size of memory originally requested in dma_alloc_attrs 521 - * @attrs: attributes of mapping properties requested in dma_alloc_attrs 522 - * 523 - * Map a coherent DMA buffer previously allocated by dma_alloc_attrs 524 - * into user space. The coherent DMA buffer must not be freed by the 525 - * driver until the user space mapping has been released. 526 - */ 527 - static inline int 528 - dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, 529 - dma_addr_t dma_addr, size_t size, unsigned long attrs) 530 - { 531 - const struct dma_map_ops *ops = get_dma_ops(dev); 532 - BUG_ON(!ops); 533 - if (ops->mmap) 534 - return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); 535 - return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs); 536 - } 458 + int __init dma_atomic_pool_init(gfp_t gfp, pgprot_t prot); 459 + bool dma_in_atomic_pool(void *start, size_t size); 460 + void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags); 461 + bool dma_free_from_pool(void *start, size_t size); 537 462 463 + int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 464 + void *cpu_addr, dma_addr_t dma_addr, size_t size, 465 + unsigned long attrs); 538 466 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) 539 467 540 468 int 541 469 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr, 542 470 dma_addr_t dma_addr, size_t size, unsigned long attrs); 543 471 544 - static inline int 545 - dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, 546 - dma_addr_t dma_addr, size_t size, 547 - unsigned long attrs) 548 - { 549 - const struct dma_map_ops *ops = get_dma_ops(dev); 550 - BUG_ON(!ops); 551 - if (ops->get_sgtable) 552 - return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, 553 - attrs); 554 - return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size, 555 - attrs); 556 - } 557 - 472 + int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, 473 + void *cpu_addr, dma_addr_t dma_addr, size_t size, 474 + unsigned long attrs); 558 475 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) 559 476 560 - #ifndef arch_dma_alloc_attrs 561 - #define arch_dma_alloc_attrs(dev) (true) 562 - #endif 563 - 564 - static inline void *dma_alloc_attrs(struct device *dev, size_t size, 565 - dma_addr_t *dma_handle, gfp_t flag, 566 - unsigned long attrs) 567 - { 568 - const struct dma_map_ops *ops = get_dma_ops(dev); 569 - void *cpu_addr; 570 - 571 - BUG_ON(!ops); 572 - WARN_ON_ONCE(dev && !dev->coherent_dma_mask); 573 - 574 - if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr)) 575 - return cpu_addr; 576 - 577 - /* let the implementation decide on the zone to allocate from: */ 578 - flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); 579 - 580 - if (!arch_dma_alloc_attrs(&dev)) 581 - return NULL; 582 - if (!ops->alloc) 583 - return NULL; 584 - 585 - cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); 586 - debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); 587 - return cpu_addr; 588 - } 589 - 590 - static inline void dma_free_attrs(struct device *dev, size_t size, 591 - void *cpu_addr, dma_addr_t dma_handle, 592 - unsigned long attrs) 593 - { 594 - const struct dma_map_ops *ops = get_dma_ops(dev); 595 - 596 - BUG_ON(!ops); 597 - 598 - if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr)) 599 - return; 600 - /* 601 - * On non-coherent platforms which implement DMA-coherent buffers via 602 - * non-cacheable remaps, ops->free() may call vunmap(). Thus getting 603 - * this far in IRQ context is a) at risk of a BUG_ON() or trying to 604 - * sleep on some machines, and b) an indication that the driver is 605 - * probably misusing the coherent API anyway. 606 - */ 607 - WARN_ON(irqs_disabled()); 608 - 609 - if (!ops->free || !cpu_addr) 610 - return; 611 - 612 - debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); 613 - ops->free(dev, size, cpu_addr, dma_handle, attrs); 614 - } 477 + void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 478 + gfp_t flag, unsigned long attrs); 479 + void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 480 + dma_addr_t dma_handle, unsigned long attrs); 615 481 616 482 static inline void *dma_alloc_coherent(struct device *dev, size_t size, 617 483 dma_addr_t *dma_handle, gfp_t gfp) ··· 551 573 552 574 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 553 575 { 554 - const struct dma_map_ops *ops = get_dma_ops(dev); 555 - 556 576 debug_dma_mapping_error(dev, dma_addr); 557 - if (ops->mapping_error) 558 - return ops->mapping_error(dev, dma_addr); 577 + 578 + if (dma_addr == DMA_MAPPING_ERROR) 579 + return -ENOMEM; 559 580 return 0; 560 581 } 561 582 562 - static inline void dma_check_mask(struct device *dev, u64 mask) 563 - { 564 - if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1))) 565 - dev_warn(dev, "SME is active, device will require DMA bounce buffers\n"); 566 - } 567 - 568 - static inline int dma_supported(struct device *dev, u64 mask) 569 - { 570 - const struct dma_map_ops *ops = get_dma_ops(dev); 571 - 572 - if (!ops) 573 - return 0; 574 - if (!ops->dma_supported) 575 - return 1; 576 - return ops->dma_supported(dev, mask); 577 - } 578 - 579 - #ifndef HAVE_ARCH_DMA_SET_MASK 580 - static inline int dma_set_mask(struct device *dev, u64 mask) 581 - { 582 - if (!dev->dma_mask || !dma_supported(dev, mask)) 583 - return -EIO; 584 - 585 - dma_check_mask(dev, mask); 586 - 587 - *dev->dma_mask = mask; 588 - return 0; 589 - } 590 - #endif 583 + int dma_supported(struct device *dev, u64 mask); 584 + int dma_set_mask(struct device *dev, u64 mask); 585 + int dma_set_coherent_mask(struct device *dev, u64 mask); 591 586 592 587 static inline u64 dma_get_mask(struct device *dev) 593 588 { ··· 568 617 return *dev->dma_mask; 569 618 return DMA_BIT_MASK(32); 570 619 } 571 - 572 - #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK 573 - int dma_set_coherent_mask(struct device *dev, u64 mask); 574 - #else 575 - static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 576 - { 577 - if (!dma_supported(dev, mask)) 578 - return -EIO; 579 - 580 - dma_check_mask(dev, mask); 581 - 582 - dev->coherent_dma_mask = mask; 583 - return 0; 584 - } 585 - #endif 586 620 587 621 /* 588 622 * Set both the DMA mask and the coherent DMA mask to the same thing. ··· 612 676 return SZ_64K; 613 677 } 614 678 615 - static inline unsigned int dma_set_max_seg_size(struct device *dev, 616 - unsigned int size) 679 + static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) 617 680 { 618 681 if (dev->dma_parms) { 619 682 dev->dma_parms->max_segment_size = size; ··· 644 709 } 645 710 #endif 646 711 712 + /* 713 + * Please always use dma_alloc_coherent instead as it already zeroes the memory! 714 + */ 647 715 static inline void *dma_zalloc_coherent(struct device *dev, size_t size, 648 716 dma_addr_t *dma_handle, gfp_t flag) 649 717 { 650 - void *ret = dma_alloc_coherent(dev, size, dma_handle, 651 - flag | __GFP_ZERO); 652 - return ret; 718 + return dma_alloc_coherent(dev, size, dma_handle, flag); 653 719 } 654 720 655 721 static inline int dma_get_cache_alignment(void)
+6 -1
include/linux/dma-noncoherent.h
··· 38 38 void arch_dma_cache_sync(struct device *dev, void *vaddr, size_t size, 39 39 enum dma_data_direction direction); 40 40 #else 41 - #define arch_dma_cache_sync NULL 41 + static inline void arch_dma_cache_sync(struct device *dev, void *vaddr, 42 + size_t size, enum dma_data_direction direction) 43 + { 44 + } 42 45 #endif /* CONFIG_DMA_NONCOHERENT_CACHE_SYNC */ 43 46 44 47 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE ··· 71 68 { 72 69 } 73 70 #endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */ 71 + 72 + void arch_dma_prep_coherent(struct page *page, size_t size); 74 73 75 74 #endif /* _LINUX_DMA_NONCOHERENT_H */
+3 -3
include/linux/scatterlist.h
··· 324 324 * Like SG_CHUNK_SIZE, but for archs that have sg chaining. This limit 325 325 * is totally arbitrary, a setting of 2048 will get you at least 8mb ios. 326 326 */ 327 - #ifdef CONFIG_ARCH_HAS_SG_CHAIN 328 - #define SG_MAX_SEGMENTS 2048 329 - #else 327 + #ifdef CONFIG_ARCH_NO_SG_CHAIN 330 328 #define SG_MAX_SEGMENTS SG_CHUNK_SIZE 329 + #else 330 + #define SG_MAX_SEGMENTS 2048 331 331 #endif 332 332 333 333 #ifdef CONFIG_SG_POOL
+30 -47
include/linux/swiotlb.h
··· 16 16 SWIOTLB_NO_FORCE, /* swiotlb=noforce */ 17 17 }; 18 18 19 - extern enum swiotlb_force swiotlb_force; 20 - 21 19 /* 22 20 * Maximum allowable number of contiguous slabs to map, 23 21 * must be a power of 2. What is the appropriate value ? ··· 44 46 SYNC_FOR_DEVICE = 1, 45 47 }; 46 48 47 - /* define the last possible byte of physical address space as a mapping error */ 48 - #define SWIOTLB_MAP_ERROR (~(phys_addr_t)0x0) 49 - 50 49 extern phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, 51 50 dma_addr_t tbl_dma_addr, 52 51 phys_addr_t phys, size_t size, ··· 60 65 size_t size, enum dma_data_direction dir, 61 66 enum dma_sync_target target); 62 67 63 - /* Accessory functions. */ 64 - 65 - extern dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, 66 - unsigned long offset, size_t size, 67 - enum dma_data_direction dir, 68 - unsigned long attrs); 69 - extern void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, 70 - size_t size, enum dma_data_direction dir, 71 - unsigned long attrs); 72 - 73 - extern int 74 - swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems, 75 - enum dma_data_direction dir, 76 - unsigned long attrs); 77 - 78 - extern void 79 - swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, 80 - int nelems, enum dma_data_direction dir, 81 - unsigned long attrs); 82 - 83 - extern void 84 - swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, 85 - size_t size, enum dma_data_direction dir); 86 - 87 - extern void 88 - swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, 89 - int nelems, enum dma_data_direction dir); 90 - 91 - extern void 92 - swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, 93 - size_t size, enum dma_data_direction dir); 94 - 95 - extern void 96 - swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, 97 - int nelems, enum dma_data_direction dir); 98 - 99 68 extern int 100 69 swiotlb_dma_supported(struct device *hwdev, u64 mask); 101 70 102 71 #ifdef CONFIG_SWIOTLB 103 - extern void __init swiotlb_exit(void); 72 + extern enum swiotlb_force swiotlb_force; 73 + extern phys_addr_t io_tlb_start, io_tlb_end; 74 + 75 + static inline bool is_swiotlb_buffer(phys_addr_t paddr) 76 + { 77 + return paddr >= io_tlb_start && paddr < io_tlb_end; 78 + } 79 + 80 + bool swiotlb_map(struct device *dev, phys_addr_t *phys, dma_addr_t *dma_addr, 81 + size_t size, enum dma_data_direction dir, unsigned long attrs); 82 + void __init swiotlb_exit(void); 104 83 unsigned int swiotlb_max_segment(void); 105 84 #else 106 - static inline void swiotlb_exit(void) { } 107 - static inline unsigned int swiotlb_max_segment(void) { return 0; } 108 - #endif 85 + #define swiotlb_force SWIOTLB_NO_FORCE 86 + static inline bool is_swiotlb_buffer(phys_addr_t paddr) 87 + { 88 + return false; 89 + } 90 + static inline bool swiotlb_map(struct device *dev, phys_addr_t *phys, 91 + dma_addr_t *dma_addr, size_t size, enum dma_data_direction dir, 92 + unsigned long attrs) 93 + { 94 + return false; 95 + } 96 + static inline void swiotlb_exit(void) 97 + { 98 + } 99 + static inline unsigned int swiotlb_max_segment(void) 100 + { 101 + return 0; 102 + } 103 + #endif /* CONFIG_SWIOTLB */ 109 104 110 105 extern void swiotlb_print_info(void); 111 106 extern void swiotlb_set_max_segment(unsigned int); 112 - 113 - extern const struct dma_map_ops swiotlb_dma_ops; 114 107 115 108 #endif /* __LINUX_SWIOTLB_H */
+8 -6
kernel/dma/Kconfig
··· 35 35 config ARCH_HAS_DMA_MMAP_PGPROT 36 36 bool 37 37 38 - config DMA_DIRECT_OPS 39 - bool 40 - depends on HAS_DMA 41 - 42 38 config DMA_NONCOHERENT_CACHE_SYNC 43 39 bool 44 - depends on DMA_DIRECT_OPS 45 40 46 41 config DMA_VIRT_OPS 47 42 bool ··· 44 49 45 50 config SWIOTLB 46 51 bool 47 - select DMA_DIRECT_OPS 48 52 select NEED_DMA_MAP_STATE 53 + 54 + config DMA_REMAP 55 + depends on MMU 56 + bool 57 + 58 + config DMA_DIRECT_REMAP 59 + bool 60 + select DMA_REMAP
+2 -3
kernel/dma/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 3 - obj-$(CONFIG_HAS_DMA) += mapping.o 3 + obj-$(CONFIG_HAS_DMA) += mapping.o direct.o dummy.o 4 4 obj-$(CONFIG_DMA_CMA) += contiguous.o 5 5 obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += coherent.o 6 - obj-$(CONFIG_DMA_DIRECT_OPS) += direct.o 7 6 obj-$(CONFIG_DMA_VIRT_OPS) += virt.o 8 7 obj-$(CONFIG_DMA_API_DEBUG) += debug.o 9 8 obj-$(CONFIG_SWIOTLB) += swiotlb.o 10 - 9 + obj-$(CONFIG_DMA_REMAP) += remap.o
+94 -165
kernel/dma/debug.c
··· 17 17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 18 */ 19 19 20 + #define pr_fmt(fmt) "DMA-API: " fmt 21 + 20 22 #include <linux/sched/task_stack.h> 21 23 #include <linux/scatterlist.h> 22 24 #include <linux/dma-mapping.h> ··· 43 41 #define HASH_FN_SHIFT 13 44 42 #define HASH_FN_MASK (HASH_SIZE - 1) 45 43 46 - /* allow architectures to override this if absolutely required */ 47 - #ifndef PREALLOC_DMA_DEBUG_ENTRIES 48 44 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16) 49 - #endif 45 + /* If the pool runs out, add this many new entries at once */ 46 + #define DMA_DEBUG_DYNAMIC_ENTRIES (PAGE_SIZE / sizeof(struct dma_debug_entry)) 50 47 51 48 enum { 52 49 dma_debug_single, ··· 143 142 static struct dentry *show_num_errors_dent __read_mostly; 144 143 static struct dentry *num_free_entries_dent __read_mostly; 145 144 static struct dentry *min_free_entries_dent __read_mostly; 145 + static struct dentry *nr_total_entries_dent __read_mostly; 146 146 static struct dentry *filter_dent __read_mostly; 147 147 148 148 /* per-driver filter related state */ ··· 236 234 error_count += 1; \ 237 235 if (driver_filter(dev) && \ 238 236 (show_all_errors || show_num_errors > 0)) { \ 239 - WARN(1, "%s %s: " format, \ 237 + WARN(1, pr_fmt("%s %s: ") format, \ 240 238 dev ? dev_driver_string(dev) : "NULL", \ 241 239 dev ? dev_name(dev) : "NULL", ## arg); \ 242 240 dump_entry_trace(entry); \ ··· 521 519 * prematurely. 522 520 */ 523 521 WARN_ONCE(overlap > ACTIVE_CACHELINE_MAX_OVERLAP, 524 - "DMA-API: exceeded %d overlapping mappings of cacheline %pa\n", 522 + pr_fmt("exceeded %d overlapping mappings of cacheline %pa\n"), 525 523 ACTIVE_CACHELINE_MAX_OVERLAP, &cln); 526 524 } 527 525 ··· 616 614 617 615 cln = to_cacheline_number(entry); 618 616 err_printk(entry->dev, entry, 619 - "DMA-API: cpu touching an active dma mapped cacheline [cln=%pa]\n", 617 + "cpu touching an active dma mapped cacheline [cln=%pa]\n", 620 618 &cln); 621 619 } 622 620 ··· 636 634 637 635 rc = active_cacheline_insert(entry); 638 636 if (rc == -ENOMEM) { 639 - pr_err("DMA-API: cacheline tracking ENOMEM, dma-debug disabled\n"); 637 + pr_err("cacheline tracking ENOMEM, dma-debug disabled\n"); 640 638 global_disable = true; 641 639 } 642 640 643 641 /* TODO: report -EEXIST errors here as overlapping mappings are 644 642 * not supported by the DMA API 645 643 */ 644 + } 645 + 646 + static int dma_debug_create_entries(gfp_t gfp) 647 + { 648 + struct dma_debug_entry *entry; 649 + int i; 650 + 651 + entry = (void *)get_zeroed_page(gfp); 652 + if (!entry) 653 + return -ENOMEM; 654 + 655 + for (i = 0; i < DMA_DEBUG_DYNAMIC_ENTRIES; i++) 656 + list_add_tail(&entry[i].list, &free_entries); 657 + 658 + num_free_entries += DMA_DEBUG_DYNAMIC_ENTRIES; 659 + nr_total_entries += DMA_DEBUG_DYNAMIC_ENTRIES; 660 + 661 + return 0; 646 662 } 647 663 648 664 static struct dma_debug_entry *__dma_entry_alloc(void) ··· 678 658 return entry; 679 659 } 680 660 661 + void __dma_entry_alloc_check_leak(void) 662 + { 663 + u32 tmp = nr_total_entries % nr_prealloc_entries; 664 + 665 + /* Shout each time we tick over some multiple of the initial pool */ 666 + if (tmp < DMA_DEBUG_DYNAMIC_ENTRIES) { 667 + pr_info("dma_debug_entry pool grown to %u (%u00%%)\n", 668 + nr_total_entries, 669 + (nr_total_entries / nr_prealloc_entries)); 670 + } 671 + } 672 + 681 673 /* struct dma_entry allocator 682 674 * 683 675 * The next two functions implement the allocator for ··· 701 669 unsigned long flags; 702 670 703 671 spin_lock_irqsave(&free_entries_lock, flags); 704 - 705 - if (list_empty(&free_entries)) { 706 - global_disable = true; 707 - spin_unlock_irqrestore(&free_entries_lock, flags); 708 - pr_err("DMA-API: debugging out of memory - disabling\n"); 709 - return NULL; 672 + if (num_free_entries == 0) { 673 + if (dma_debug_create_entries(GFP_ATOMIC)) { 674 + global_disable = true; 675 + spin_unlock_irqrestore(&free_entries_lock, flags); 676 + pr_err("debugging out of memory - disabling\n"); 677 + return NULL; 678 + } 679 + __dma_entry_alloc_check_leak(); 710 680 } 711 681 712 682 entry = __dma_entry_alloc(); ··· 741 707 spin_unlock_irqrestore(&free_entries_lock, flags); 742 708 } 743 709 744 - int dma_debug_resize_entries(u32 num_entries) 745 - { 746 - int i, delta, ret = 0; 747 - unsigned long flags; 748 - struct dma_debug_entry *entry; 749 - LIST_HEAD(tmp); 750 - 751 - spin_lock_irqsave(&free_entries_lock, flags); 752 - 753 - if (nr_total_entries < num_entries) { 754 - delta = num_entries - nr_total_entries; 755 - 756 - spin_unlock_irqrestore(&free_entries_lock, flags); 757 - 758 - for (i = 0; i < delta; i++) { 759 - entry = kzalloc(sizeof(*entry), GFP_KERNEL); 760 - if (!entry) 761 - break; 762 - 763 - list_add_tail(&entry->list, &tmp); 764 - } 765 - 766 - spin_lock_irqsave(&free_entries_lock, flags); 767 - 768 - list_splice(&tmp, &free_entries); 769 - nr_total_entries += i; 770 - num_free_entries += i; 771 - } else { 772 - delta = nr_total_entries - num_entries; 773 - 774 - for (i = 0; i < delta && !list_empty(&free_entries); i++) { 775 - entry = __dma_entry_alloc(); 776 - kfree(entry); 777 - } 778 - 779 - nr_total_entries -= i; 780 - } 781 - 782 - if (nr_total_entries != num_entries) 783 - ret = 1; 784 - 785 - spin_unlock_irqrestore(&free_entries_lock, flags); 786 - 787 - return ret; 788 - } 789 - 790 710 /* 791 711 * DMA-API debugging init code 792 712 * ··· 748 760 * 1. Initialize core data structures 749 761 * 2. Preallocate a given number of dma_debug_entry structs 750 762 */ 751 - 752 - static int prealloc_memory(u32 num_entries) 753 - { 754 - struct dma_debug_entry *entry, *next_entry; 755 - int i; 756 - 757 - for (i = 0; i < num_entries; ++i) { 758 - entry = kzalloc(sizeof(*entry), GFP_KERNEL); 759 - if (!entry) 760 - goto out_err; 761 - 762 - list_add_tail(&entry->list, &free_entries); 763 - } 764 - 765 - num_free_entries = num_entries; 766 - min_free_entries = num_entries; 767 - 768 - pr_info("DMA-API: preallocated %d debug entries\n", num_entries); 769 - 770 - return 0; 771 - 772 - out_err: 773 - 774 - list_for_each_entry_safe(entry, next_entry, &free_entries, list) { 775 - list_del(&entry->list); 776 - kfree(entry); 777 - } 778 - 779 - return -ENOMEM; 780 - } 781 763 782 764 static ssize_t filter_read(struct file *file, char __user *user_buf, 783 765 size_t count, loff_t *ppos) ··· 808 850 * switched off. 809 851 */ 810 852 if (current_driver_name[0]) 811 - pr_info("DMA-API: switching off dma-debug driver filter\n"); 853 + pr_info("switching off dma-debug driver filter\n"); 812 854 current_driver_name[0] = 0; 813 855 current_driver = NULL; 814 856 goto out_unlock; ··· 826 868 current_driver_name[i] = 0; 827 869 current_driver = NULL; 828 870 829 - pr_info("DMA-API: enable driver filter for driver [%s]\n", 871 + pr_info("enable driver filter for driver [%s]\n", 830 872 current_driver_name); 831 873 832 874 out_unlock: ··· 845 887 { 846 888 dma_debug_dent = debugfs_create_dir("dma-api", NULL); 847 889 if (!dma_debug_dent) { 848 - pr_err("DMA-API: can not create debugfs directory\n"); 890 + pr_err("can not create debugfs directory\n"); 849 891 return -ENOMEM; 850 892 } 851 893 ··· 882 924 dma_debug_dent, 883 925 &min_free_entries); 884 926 if (!min_free_entries_dent) 927 + goto out_err; 928 + 929 + nr_total_entries_dent = debugfs_create_u32("nr_total_entries", 0444, 930 + dma_debug_dent, 931 + &nr_total_entries); 932 + if (!nr_total_entries_dent) 885 933 goto out_err; 886 934 887 935 filter_dent = debugfs_create_file("driver_filter", 0644, ··· 937 973 count = device_dma_allocations(dev, &entry); 938 974 if (count == 0) 939 975 break; 940 - err_printk(dev, entry, "DMA-API: device driver has pending " 976 + err_printk(dev, entry, "device driver has pending " 941 977 "DMA allocations while released from device " 942 978 "[count=%d]\n" 943 979 "One of leaked entries details: " ··· 973 1009 974 1010 static int dma_debug_init(void) 975 1011 { 976 - int i; 1012 + int i, nr_pages; 977 1013 978 1014 /* Do not use dma_debug_initialized here, since we really want to be 979 1015 * called to set dma_debug_initialized ··· 987 1023 } 988 1024 989 1025 if (dma_debug_fs_init() != 0) { 990 - pr_err("DMA-API: error creating debugfs entries - disabling\n"); 1026 + pr_err("error creating debugfs entries - disabling\n"); 991 1027 global_disable = true; 992 1028 993 1029 return 0; 994 1030 } 995 1031 996 - if (prealloc_memory(nr_prealloc_entries) != 0) { 997 - pr_err("DMA-API: debugging out of memory error - disabled\n"); 1032 + nr_pages = DIV_ROUND_UP(nr_prealloc_entries, DMA_DEBUG_DYNAMIC_ENTRIES); 1033 + for (i = 0; i < nr_pages; ++i) 1034 + dma_debug_create_entries(GFP_KERNEL); 1035 + if (num_free_entries >= nr_prealloc_entries) { 1036 + pr_info("preallocated %d debug entries\n", nr_total_entries); 1037 + } else if (num_free_entries > 0) { 1038 + pr_warn("%d debug entries requested but only %d allocated\n", 1039 + nr_prealloc_entries, nr_total_entries); 1040 + } else { 1041 + pr_err("debugging out of memory error - disabled\n"); 998 1042 global_disable = true; 999 1043 1000 1044 return 0; 1001 1045 } 1002 - 1003 - nr_total_entries = num_free_entries; 1046 + min_free_entries = num_free_entries; 1004 1047 1005 1048 dma_debug_initialized = true; 1006 1049 1007 - pr_info("DMA-API: debugging enabled by kernel config\n"); 1050 + pr_info("debugging enabled by kernel config\n"); 1008 1051 return 0; 1009 1052 } 1010 1053 core_initcall(dma_debug_init); ··· 1022 1051 return -EINVAL; 1023 1052 1024 1053 if (strncmp(str, "off", 3) == 0) { 1025 - pr_info("DMA-API: debugging disabled on kernel command line\n"); 1054 + pr_info("debugging disabled on kernel command line\n"); 1026 1055 global_disable = true; 1027 1056 } 1028 1057 ··· 1056 1085 1057 1086 if (dma_mapping_error(ref->dev, ref->dev_addr)) { 1058 1087 err_printk(ref->dev, NULL, 1059 - "DMA-API: device driver tries to free an " 1088 + "device driver tries to free an " 1060 1089 "invalid DMA memory address\n"); 1061 1090 } else { 1062 1091 err_printk(ref->dev, NULL, 1063 - "DMA-API: device driver tries to free DMA " 1092 + "device driver tries to free DMA " 1064 1093 "memory it has not allocated [device " 1065 1094 "address=0x%016llx] [size=%llu bytes]\n", 1066 1095 ref->dev_addr, ref->size); ··· 1069 1098 } 1070 1099 1071 1100 if (ref->size != entry->size) { 1072 - err_printk(ref->dev, entry, "DMA-API: device driver frees " 1101 + err_printk(ref->dev, entry, "device driver frees " 1073 1102 "DMA memory with different size " 1074 1103 "[device address=0x%016llx] [map size=%llu bytes] " 1075 1104 "[unmap size=%llu bytes]\n", ··· 1077 1106 } 1078 1107 1079 1108 if (ref->type != entry->type) { 1080 - err_printk(ref->dev, entry, "DMA-API: device driver frees " 1109 + err_printk(ref->dev, entry, "device driver frees " 1081 1110 "DMA memory with wrong function " 1082 1111 "[device address=0x%016llx] [size=%llu bytes] " 1083 1112 "[mapped as %s] [unmapped as %s]\n", ··· 1085 1114 type2name[entry->type], type2name[ref->type]); 1086 1115 } else if ((entry->type == dma_debug_coherent) && 1087 1116 (phys_addr(ref) != phys_addr(entry))) { 1088 - err_printk(ref->dev, entry, "DMA-API: device driver frees " 1117 + err_printk(ref->dev, entry, "device driver frees " 1089 1118 "DMA memory with different CPU address " 1090 1119 "[device address=0x%016llx] [size=%llu bytes] " 1091 1120 "[cpu alloc address=0x%016llx] " ··· 1097 1126 1098 1127 if (ref->sg_call_ents && ref->type == dma_debug_sg && 1099 1128 ref->sg_call_ents != entry->sg_call_ents) { 1100 - err_printk(ref->dev, entry, "DMA-API: device driver frees " 1129 + err_printk(ref->dev, entry, "device driver frees " 1101 1130 "DMA sg list with different entry count " 1102 1131 "[map count=%d] [unmap count=%d]\n", 1103 1132 entry->sg_call_ents, ref->sg_call_ents); ··· 1108 1137 * DMA API don't handle this properly, so check for it here 1109 1138 */ 1110 1139 if (ref->direction != entry->direction) { 1111 - err_printk(ref->dev, entry, "DMA-API: device driver frees " 1140 + err_printk(ref->dev, entry, "device driver frees " 1112 1141 "DMA memory with different direction " 1113 1142 "[device address=0x%016llx] [size=%llu bytes] " 1114 1143 "[mapped with %s] [unmapped with %s]\n", ··· 1124 1153 */ 1125 1154 if (entry->map_err_type == MAP_ERR_NOT_CHECKED) { 1126 1155 err_printk(ref->dev, entry, 1127 - "DMA-API: device driver failed to check map error" 1156 + "device driver failed to check map error" 1128 1157 "[device address=0x%016llx] [size=%llu bytes] " 1129 1158 "[mapped as %s]", 1130 1159 ref->dev_addr, ref->size, ··· 1149 1178 return; 1150 1179 addr = page_address(page) + offset; 1151 1180 if (object_is_on_stack(addr)) 1152 - err_printk(dev, NULL, "DMA-API: device driver maps memory from stack [addr=%p]\n", addr); 1181 + err_printk(dev, NULL, "device driver maps memory from stack [addr=%p]\n", addr); 1153 1182 } else { 1154 1183 /* Stack is vmalloced. */ 1155 1184 int i; ··· 1159 1188 continue; 1160 1189 1161 1190 addr = (u8 *)current->stack + i * PAGE_SIZE + offset; 1162 - err_printk(dev, NULL, "DMA-API: device driver maps memory from stack [probable addr=%p]\n", addr); 1191 + err_printk(dev, NULL, "device driver maps memory from stack [probable addr=%p]\n", addr); 1163 1192 break; 1164 1193 } 1165 1194 } ··· 1179 1208 { 1180 1209 if (overlap(addr, len, _stext, _etext) || 1181 1210 overlap(addr, len, __start_rodata, __end_rodata)) 1182 - err_printk(dev, NULL, "DMA-API: device driver maps memory from kernel text or rodata [addr=%p] [len=%lu]\n", addr, len); 1211 + err_printk(dev, NULL, "device driver maps memory from kernel text or rodata [addr=%p] [len=%lu]\n", addr, len); 1183 1212 } 1184 1213 1185 1214 static void check_sync(struct device *dev, ··· 1195 1224 entry = bucket_find_contain(&bucket, ref, &flags); 1196 1225 1197 1226 if (!entry) { 1198 - err_printk(dev, NULL, "DMA-API: device driver tries " 1227 + err_printk(dev, NULL, "device driver tries " 1199 1228 "to sync DMA memory it has not allocated " 1200 1229 "[device address=0x%016llx] [size=%llu bytes]\n", 1201 1230 (unsigned long long)ref->dev_addr, ref->size); ··· 1203 1232 } 1204 1233 1205 1234 if (ref->size > entry->size) { 1206 - err_printk(dev, entry, "DMA-API: device driver syncs" 1235 + err_printk(dev, entry, "device driver syncs" 1207 1236 " DMA memory outside allocated range " 1208 1237 "[device address=0x%016llx] " 1209 1238 "[allocation size=%llu bytes] " ··· 1216 1245 goto out; 1217 1246 1218 1247 if (ref->direction != entry->direction) { 1219 - err_printk(dev, entry, "DMA-API: device driver syncs " 1248 + err_printk(dev, entry, "device driver syncs " 1220 1249 "DMA memory with different direction " 1221 1250 "[device address=0x%016llx] [size=%llu bytes] " 1222 1251 "[mapped with %s] [synced with %s]\n", ··· 1227 1256 1228 1257 if (to_cpu && !(entry->direction == DMA_FROM_DEVICE) && 1229 1258 !(ref->direction == DMA_TO_DEVICE)) 1230 - err_printk(dev, entry, "DMA-API: device driver syncs " 1259 + err_printk(dev, entry, "device driver syncs " 1231 1260 "device read-only DMA memory for cpu " 1232 1261 "[device address=0x%016llx] [size=%llu bytes] " 1233 1262 "[mapped with %s] [synced with %s]\n", ··· 1237 1266 1238 1267 if (!to_cpu && !(entry->direction == DMA_TO_DEVICE) && 1239 1268 !(ref->direction == DMA_FROM_DEVICE)) 1240 - err_printk(dev, entry, "DMA-API: device driver syncs " 1269 + err_printk(dev, entry, "device driver syncs " 1241 1270 "device write-only DMA memory to device " 1242 1271 "[device address=0x%016llx] [size=%llu bytes] " 1243 1272 "[mapped with %s] [synced with %s]\n", ··· 1247 1276 1248 1277 if (ref->sg_call_ents && ref->type == dma_debug_sg && 1249 1278 ref->sg_call_ents != entry->sg_call_ents) { 1250 - err_printk(ref->dev, entry, "DMA-API: device driver syncs " 1279 + err_printk(ref->dev, entry, "device driver syncs " 1251 1280 "DMA sg list with different entry count " 1252 1281 "[map count=%d] [sync count=%d]\n", 1253 1282 entry->sg_call_ents, ref->sg_call_ents); ··· 1268 1297 * whoever generated the list forgot to check them. 1269 1298 */ 1270 1299 if (sg->length > max_seg) 1271 - err_printk(dev, NULL, "DMA-API: mapping sg segment longer than device claims to support [len=%u] [max=%u]\n", 1300 + err_printk(dev, NULL, "mapping sg segment longer than device claims to support [len=%u] [max=%u]\n", 1272 1301 sg->length, max_seg); 1273 1302 /* 1274 1303 * In some cases this could potentially be the DMA API ··· 1278 1307 start = sg_dma_address(sg); 1279 1308 end = start + sg_dma_len(sg) - 1; 1280 1309 if ((start ^ end) & ~boundary) 1281 - err_printk(dev, NULL, "DMA-API: mapping sg segment across boundary [start=0x%016llx] [end=0x%016llx] [boundary=0x%016llx]\n", 1310 + err_printk(dev, NULL, "mapping sg segment across boundary [start=0x%016llx] [end=0x%016llx] [boundary=0x%016llx]\n", 1282 1311 start, end, boundary); 1283 1312 #endif 1284 1313 } ··· 1290 1319 return; 1291 1320 1292 1321 if (!virt_addr_valid(addr)) 1293 - err_printk(dev, NULL, "DMA-API: device driver maps memory from invalid area [addr=%p] [len=%lu]\n", 1322 + err_printk(dev, NULL, "device driver maps memory from invalid area [addr=%p] [len=%lu]\n", 1294 1323 addr, len); 1295 1324 1296 1325 if (is_vmalloc_addr(addr)) 1297 - err_printk(dev, NULL, "DMA-API: device driver maps memory from vmalloc area [addr=%p] [len=%lu]\n", 1326 + err_printk(dev, NULL, "device driver maps memory from vmalloc area [addr=%p] [len=%lu]\n", 1298 1327 addr, len); 1299 1328 } 1300 1329 EXPORT_SYMBOL(debug_dma_map_single); ··· 1633 1662 } 1634 1663 EXPORT_SYMBOL(debug_dma_sync_single_for_device); 1635 1664 1636 - void debug_dma_sync_single_range_for_cpu(struct device *dev, 1637 - dma_addr_t dma_handle, 1638 - unsigned long offset, size_t size, 1639 - int direction) 1640 - { 1641 - struct dma_debug_entry ref; 1642 - 1643 - if (unlikely(dma_debug_disabled())) 1644 - return; 1645 - 1646 - ref.type = dma_debug_single; 1647 - ref.dev = dev; 1648 - ref.dev_addr = dma_handle; 1649 - ref.size = offset + size; 1650 - ref.direction = direction; 1651 - ref.sg_call_ents = 0; 1652 - 1653 - check_sync(dev, &ref, true); 1654 - } 1655 - EXPORT_SYMBOL(debug_dma_sync_single_range_for_cpu); 1656 - 1657 - void debug_dma_sync_single_range_for_device(struct device *dev, 1658 - dma_addr_t dma_handle, 1659 - unsigned long offset, 1660 - size_t size, int direction) 1661 - { 1662 - struct dma_debug_entry ref; 1663 - 1664 - if (unlikely(dma_debug_disabled())) 1665 - return; 1666 - 1667 - ref.type = dma_debug_single; 1668 - ref.dev = dev; 1669 - ref.dev_addr = dma_handle; 1670 - ref.size = offset + size; 1671 - ref.direction = direction; 1672 - ref.sg_call_ents = 0; 1673 - 1674 - check_sync(dev, &ref, false); 1675 - } 1676 - EXPORT_SYMBOL(debug_dma_sync_single_range_for_device); 1677 - 1678 1665 void debug_dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 1679 1666 int nelems, int direction) 1680 1667 { ··· 1709 1780 } 1710 1781 1711 1782 if (current_driver_name[0]) 1712 - pr_info("DMA-API: enable driver filter for driver [%s]\n", 1783 + pr_info("enable driver filter for driver [%s]\n", 1713 1784 current_driver_name); 1714 1785 1715 1786
+132 -96
kernel/dma/direct.c
··· 13 13 #include <linux/dma-noncoherent.h> 14 14 #include <linux/pfn.h> 15 15 #include <linux/set_memory.h> 16 + #include <linux/swiotlb.h> 16 17 17 18 /* 18 19 * Most architectures use ZONE_DMA for the first 16 Megabytes, but ··· 31 30 return sev_active(); 32 31 } 33 32 34 - static bool 35 - check_addr(struct device *dev, dma_addr_t dma_addr, size_t size, 36 - const char *caller) 33 + static void report_addr(struct device *dev, dma_addr_t dma_addr, size_t size) 37 34 { 38 - if (unlikely(dev && !dma_capable(dev, dma_addr, size))) { 39 - if (!dev->dma_mask) { 40 - dev_err(dev, 41 - "%s: call on device without dma_mask\n", 42 - caller); 43 - return false; 44 - } 45 - 46 - if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_mask) { 47 - dev_err(dev, 48 - "%s: overflow %pad+%zu of device mask %llx bus mask %llx\n", 49 - caller, &dma_addr, size, 50 - *dev->dma_mask, dev->bus_dma_mask); 51 - } 52 - return false; 35 + if (!dev->dma_mask) { 36 + dev_err_once(dev, "DMA map on device without dma_mask\n"); 37 + } else if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_mask) { 38 + dev_err_once(dev, 39 + "overflow %pad+%zu of DMA mask %llx bus mask %llx\n", 40 + &dma_addr, size, *dev->dma_mask, dev->bus_dma_mask); 53 41 } 54 - return true; 42 + WARN_ON_ONCE(1); 55 43 } 56 44 57 45 static inline dma_addr_t phys_to_dma_direct(struct device *dev, ··· 93 103 min_not_zero(dev->coherent_dma_mask, dev->bus_dma_mask); 94 104 } 95 105 96 - void *dma_direct_alloc_pages(struct device *dev, size_t size, 106 + struct page *__dma_direct_alloc_pages(struct device *dev, size_t size, 97 107 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 98 108 { 99 109 unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 100 110 int page_order = get_order(size); 101 111 struct page *page = NULL; 102 112 u64 phys_mask; 103 - void *ret; 104 113 105 114 if (attrs & DMA_ATTR_NO_WARN) 106 115 gfp |= __GFP_NOWARN; ··· 139 150 } 140 151 } 141 152 153 + return page; 154 + } 155 + 156 + void *dma_direct_alloc_pages(struct device *dev, size_t size, 157 + dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 158 + { 159 + struct page *page; 160 + void *ret; 161 + 162 + page = __dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs); 142 163 if (!page) 143 164 return NULL; 165 + 166 + if (PageHighMem(page)) { 167 + /* 168 + * Depending on the cma= arguments and per-arch setup 169 + * dma_alloc_from_contiguous could return highmem pages. 170 + * Without remapping there is no way to return them here, 171 + * so log an error and fail. 172 + */ 173 + dev_info(dev, "Rejecting highmem page from CMA.\n"); 174 + __dma_direct_free_pages(dev, size, page); 175 + return NULL; 176 + } 177 + 144 178 ret = page_address(page); 145 179 if (force_dma_unencrypted()) { 146 - set_memory_decrypted((unsigned long)ret, 1 << page_order); 180 + set_memory_decrypted((unsigned long)ret, 1 << get_order(size)); 147 181 *dma_handle = __phys_to_dma(dev, page_to_phys(page)); 148 182 } else { 149 183 *dma_handle = phys_to_dma(dev, page_to_phys(page)); ··· 175 163 return ret; 176 164 } 177 165 178 - /* 179 - * NOTE: this function must never look at the dma_addr argument, because we want 180 - * to be able to use it as a helper for iommu implementations as well. 181 - */ 166 + void __dma_direct_free_pages(struct device *dev, size_t size, struct page *page) 167 + { 168 + unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 169 + 170 + if (!dma_release_from_contiguous(dev, page, count)) 171 + __free_pages(page, get_order(size)); 172 + } 173 + 182 174 void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr, 183 175 dma_addr_t dma_addr, unsigned long attrs) 184 176 { 185 - unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT; 186 177 unsigned int page_order = get_order(size); 187 178 188 179 if (force_dma_unencrypted()) 189 180 set_memory_encrypted((unsigned long)cpu_addr, 1 << page_order); 190 - if (!dma_release_from_contiguous(dev, virt_to_page(cpu_addr), count)) 191 - free_pages((unsigned long)cpu_addr, page_order); 181 + __dma_direct_free_pages(dev, size, virt_to_page(cpu_addr)); 192 182 } 193 183 194 184 void *dma_direct_alloc(struct device *dev, size_t size, ··· 210 196 dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs); 211 197 } 212 198 213 - static void dma_direct_sync_single_for_device(struct device *dev, 199 + #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \ 200 + defined(CONFIG_SWIOTLB) 201 + void dma_direct_sync_single_for_device(struct device *dev, 214 202 dma_addr_t addr, size_t size, enum dma_data_direction dir) 215 203 { 216 - if (dev_is_dma_coherent(dev)) 217 - return; 218 - arch_sync_dma_for_device(dev, dma_to_phys(dev, addr), size, dir); 219 - } 204 + phys_addr_t paddr = dma_to_phys(dev, addr); 220 205 221 - static void dma_direct_sync_sg_for_device(struct device *dev, 206 + if (unlikely(is_swiotlb_buffer(paddr))) 207 + swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_DEVICE); 208 + 209 + if (!dev_is_dma_coherent(dev)) 210 + arch_sync_dma_for_device(dev, paddr, size, dir); 211 + } 212 + EXPORT_SYMBOL(dma_direct_sync_single_for_device); 213 + 214 + void dma_direct_sync_sg_for_device(struct device *dev, 222 215 struct scatterlist *sgl, int nents, enum dma_data_direction dir) 223 216 { 224 217 struct scatterlist *sg; 225 218 int i; 226 219 227 - if (dev_is_dma_coherent(dev)) 228 - return; 220 + for_each_sg(sgl, sg, nents, i) { 221 + if (unlikely(is_swiotlb_buffer(sg_phys(sg)))) 222 + swiotlb_tbl_sync_single(dev, sg_phys(sg), sg->length, 223 + dir, SYNC_FOR_DEVICE); 229 224 230 - for_each_sg(sgl, sg, nents, i) 231 - arch_sync_dma_for_device(dev, sg_phys(sg), sg->length, dir); 225 + if (!dev_is_dma_coherent(dev)) 226 + arch_sync_dma_for_device(dev, sg_phys(sg), sg->length, 227 + dir); 228 + } 232 229 } 230 + EXPORT_SYMBOL(dma_direct_sync_sg_for_device); 231 + #endif 233 232 234 233 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ 235 - defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) 236 - static void dma_direct_sync_single_for_cpu(struct device *dev, 234 + defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \ 235 + defined(CONFIG_SWIOTLB) 236 + void dma_direct_sync_single_for_cpu(struct device *dev, 237 237 dma_addr_t addr, size_t size, enum dma_data_direction dir) 238 238 { 239 - if (dev_is_dma_coherent(dev)) 240 - return; 241 - arch_sync_dma_for_cpu(dev, dma_to_phys(dev, addr), size, dir); 242 - arch_sync_dma_for_cpu_all(dev); 243 - } 239 + phys_addr_t paddr = dma_to_phys(dev, addr); 244 240 245 - static void dma_direct_sync_sg_for_cpu(struct device *dev, 241 + if (!dev_is_dma_coherent(dev)) { 242 + arch_sync_dma_for_cpu(dev, paddr, size, dir); 243 + arch_sync_dma_for_cpu_all(dev); 244 + } 245 + 246 + if (unlikely(is_swiotlb_buffer(paddr))) 247 + swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_CPU); 248 + } 249 + EXPORT_SYMBOL(dma_direct_sync_single_for_cpu); 250 + 251 + void dma_direct_sync_sg_for_cpu(struct device *dev, 246 252 struct scatterlist *sgl, int nents, enum dma_data_direction dir) 247 253 { 248 254 struct scatterlist *sg; 249 255 int i; 250 256 251 - if (dev_is_dma_coherent(dev)) 252 - return; 257 + for_each_sg(sgl, sg, nents, i) { 258 + if (!dev_is_dma_coherent(dev)) 259 + arch_sync_dma_for_cpu(dev, sg_phys(sg), sg->length, dir); 260 + 261 + if (unlikely(is_swiotlb_buffer(sg_phys(sg)))) 262 + swiotlb_tbl_sync_single(dev, sg_phys(sg), sg->length, dir, 263 + SYNC_FOR_CPU); 264 + } 253 265 254 - for_each_sg(sgl, sg, nents, i) 255 - arch_sync_dma_for_cpu(dev, sg_phys(sg), sg->length, dir); 256 - arch_sync_dma_for_cpu_all(dev); 266 + if (!dev_is_dma_coherent(dev)) 267 + arch_sync_dma_for_cpu_all(dev); 257 268 } 269 + EXPORT_SYMBOL(dma_direct_sync_sg_for_cpu); 258 270 259 - static void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, 271 + void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, 260 272 size_t size, enum dma_data_direction dir, unsigned long attrs) 261 273 { 274 + phys_addr_t phys = dma_to_phys(dev, addr); 275 + 262 276 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) 263 277 dma_direct_sync_single_for_cpu(dev, addr, size, dir); 264 - } 265 278 266 - static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl, 279 + if (unlikely(is_swiotlb_buffer(phys))) 280 + swiotlb_tbl_unmap_single(dev, phys, size, dir, attrs); 281 + } 282 + EXPORT_SYMBOL(dma_direct_unmap_page); 283 + 284 + void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl, 267 285 int nents, enum dma_data_direction dir, unsigned long attrs) 268 286 { 269 - if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) 270 - dma_direct_sync_sg_for_cpu(dev, sgl, nents, dir); 287 + struct scatterlist *sg; 288 + int i; 289 + 290 + for_each_sg(sgl, sg, nents, i) 291 + dma_direct_unmap_page(dev, sg->dma_address, sg_dma_len(sg), dir, 292 + attrs); 271 293 } 294 + EXPORT_SYMBOL(dma_direct_unmap_sg); 272 295 #endif 296 + 297 + static inline bool dma_direct_possible(struct device *dev, dma_addr_t dma_addr, 298 + size_t size) 299 + { 300 + return swiotlb_force != SWIOTLB_FORCE && 301 + (!dev || dma_capable(dev, dma_addr, size)); 302 + } 273 303 274 304 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, 275 305 unsigned long offset, size_t size, enum dma_data_direction dir, ··· 322 264 phys_addr_t phys = page_to_phys(page) + offset; 323 265 dma_addr_t dma_addr = phys_to_dma(dev, phys); 324 266 325 - if (!check_addr(dev, dma_addr, size, __func__)) 326 - return DIRECT_MAPPING_ERROR; 267 + if (unlikely(!dma_direct_possible(dev, dma_addr, size)) && 268 + !swiotlb_map(dev, &phys, &dma_addr, size, dir, attrs)) { 269 + report_addr(dev, dma_addr, size); 270 + return DMA_MAPPING_ERROR; 271 + } 327 272 328 - if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) 329 - dma_direct_sync_single_for_device(dev, dma_addr, size, dir); 273 + if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) 274 + arch_sync_dma_for_device(dev, phys, size, dir); 330 275 return dma_addr; 331 276 } 277 + EXPORT_SYMBOL(dma_direct_map_page); 332 278 333 279 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, 334 280 enum dma_data_direction dir, unsigned long attrs) ··· 341 279 struct scatterlist *sg; 342 280 343 281 for_each_sg(sgl, sg, nents, i) { 344 - BUG_ON(!sg_page(sg)); 345 - 346 - sg_dma_address(sg) = phys_to_dma(dev, sg_phys(sg)); 347 - if (!check_addr(dev, sg_dma_address(sg), sg->length, __func__)) 348 - return 0; 282 + sg->dma_address = dma_direct_map_page(dev, sg_page(sg), 283 + sg->offset, sg->length, dir, attrs); 284 + if (sg->dma_address == DMA_MAPPING_ERROR) 285 + goto out_unmap; 349 286 sg_dma_len(sg) = sg->length; 350 287 } 351 288 352 - if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) 353 - dma_direct_sync_sg_for_device(dev, sgl, nents, dir); 354 289 return nents; 290 + 291 + out_unmap: 292 + dma_direct_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC); 293 + return 0; 355 294 } 295 + EXPORT_SYMBOL(dma_direct_map_sg); 356 296 357 297 /* 358 298 * Because 32-bit DMA masks are so common we expect every architecture to be ··· 380 316 */ 381 317 return mask >= __phys_to_dma(dev, min_mask); 382 318 } 383 - 384 - int dma_direct_mapping_error(struct device *dev, dma_addr_t dma_addr) 385 - { 386 - return dma_addr == DIRECT_MAPPING_ERROR; 387 - } 388 - 389 - const struct dma_map_ops dma_direct_ops = { 390 - .alloc = dma_direct_alloc, 391 - .free = dma_direct_free, 392 - .map_page = dma_direct_map_page, 393 - .map_sg = dma_direct_map_sg, 394 - #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) 395 - .sync_single_for_device = dma_direct_sync_single_for_device, 396 - .sync_sg_for_device = dma_direct_sync_sg_for_device, 397 - #endif 398 - #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ 399 - defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) 400 - .sync_single_for_cpu = dma_direct_sync_single_for_cpu, 401 - .sync_sg_for_cpu = dma_direct_sync_sg_for_cpu, 402 - .unmap_page = dma_direct_unmap_page, 403 - .unmap_sg = dma_direct_unmap_sg, 404 - #endif 405 - .get_required_mask = dma_direct_get_required_mask, 406 - .dma_supported = dma_direct_supported, 407 - .mapping_error = dma_direct_mapping_error, 408 - .cache_sync = arch_dma_cache_sync, 409 - }; 410 - EXPORT_SYMBOL(dma_direct_ops);
+39
kernel/dma/dummy.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Dummy DMA ops that always fail. 4 + */ 5 + #include <linux/dma-mapping.h> 6 + 7 + static int dma_dummy_mmap(struct device *dev, struct vm_area_struct *vma, 8 + void *cpu_addr, dma_addr_t dma_addr, size_t size, 9 + unsigned long attrs) 10 + { 11 + return -ENXIO; 12 + } 13 + 14 + static dma_addr_t dma_dummy_map_page(struct device *dev, struct page *page, 15 + unsigned long offset, size_t size, enum dma_data_direction dir, 16 + unsigned long attrs) 17 + { 18 + return DMA_MAPPING_ERROR; 19 + } 20 + 21 + static int dma_dummy_map_sg(struct device *dev, struct scatterlist *sgl, 22 + int nelems, enum dma_data_direction dir, 23 + unsigned long attrs) 24 + { 25 + return 0; 26 + } 27 + 28 + static int dma_dummy_supported(struct device *hwdev, u64 mask) 29 + { 30 + return 0; 31 + } 32 + 33 + const struct dma_map_ops dma_dummy_ops = { 34 + .mmap = dma_dummy_mmap, 35 + .map_page = dma_dummy_map_page, 36 + .map_sg = dma_dummy_map_sg, 37 + .dma_supported = dma_dummy_supported, 38 + }; 39 + EXPORT_SYMBOL(dma_dummy_ops);
+181 -76
kernel/dma/mapping.c
··· 5 5 * Copyright (c) 2006 SUSE Linux Products GmbH 6 6 * Copyright (c) 2006 Tejun Heo <teheo@suse.de> 7 7 */ 8 - 8 + #include <linux/memblock.h> /* for max_pfn */ 9 9 #include <linux/acpi.h> 10 + #include <linux/dma-direct.h> 10 11 #include <linux/dma-noncoherent.h> 11 12 #include <linux/export.h> 12 13 #include <linux/gfp.h> ··· 224 223 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0); 225 224 return ret; 226 225 } 227 - EXPORT_SYMBOL(dma_common_get_sgtable); 226 + 227 + int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, 228 + void *cpu_addr, dma_addr_t dma_addr, size_t size, 229 + unsigned long attrs) 230 + { 231 + const struct dma_map_ops *ops = get_dma_ops(dev); 232 + 233 + if (!dma_is_direct(ops) && ops->get_sgtable) 234 + return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, 235 + attrs); 236 + return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size, 237 + attrs); 238 + } 239 + EXPORT_SYMBOL(dma_get_sgtable_attrs); 228 240 229 241 /* 230 242 * Create userspace mapping for the DMA-coherent memory. ··· 275 261 return -ENXIO; 276 262 #endif /* !CONFIG_ARCH_NO_COHERENT_DMA_MMAP */ 277 263 } 278 - EXPORT_SYMBOL(dma_common_mmap); 279 264 280 - #ifdef CONFIG_MMU 281 - static struct vm_struct *__dma_common_pages_remap(struct page **pages, 282 - size_t size, unsigned long vm_flags, pgprot_t prot, 283 - const void *caller) 265 + /** 266 + * dma_mmap_attrs - map a coherent DMA allocation into user space 267 + * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices 268 + * @vma: vm_area_struct describing requested user mapping 269 + * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs 270 + * @dma_addr: device-view address returned from dma_alloc_attrs 271 + * @size: size of memory originally requested in dma_alloc_attrs 272 + * @attrs: attributes of mapping properties requested in dma_alloc_attrs 273 + * 274 + * Map a coherent DMA buffer previously allocated by dma_alloc_attrs into user 275 + * space. The coherent DMA buffer must not be freed by the driver until the 276 + * user space mapping has been released. 277 + */ 278 + int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 279 + void *cpu_addr, dma_addr_t dma_addr, size_t size, 280 + unsigned long attrs) 284 281 { 285 - struct vm_struct *area; 282 + const struct dma_map_ops *ops = get_dma_ops(dev); 286 283 287 - area = get_vm_area_caller(size, vm_flags, caller); 288 - if (!area) 289 - return NULL; 284 + if (!dma_is_direct(ops) && ops->mmap) 285 + return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); 286 + return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size, attrs); 287 + } 288 + EXPORT_SYMBOL(dma_mmap_attrs); 290 289 291 - if (map_vm_area(area, prot, pages)) { 292 - vunmap(area->addr); 293 - return NULL; 290 + #ifndef ARCH_HAS_DMA_GET_REQUIRED_MASK 291 + static u64 dma_default_get_required_mask(struct device *dev) 292 + { 293 + u32 low_totalram = ((max_pfn - 1) << PAGE_SHIFT); 294 + u32 high_totalram = ((max_pfn - 1) >> (32 - PAGE_SHIFT)); 295 + u64 mask; 296 + 297 + if (!high_totalram) { 298 + /* convert to mask just covering totalram */ 299 + low_totalram = (1 << (fls(low_totalram) - 1)); 300 + low_totalram += low_totalram - 1; 301 + mask = low_totalram; 302 + } else { 303 + high_totalram = (1 << (fls(high_totalram) - 1)); 304 + high_totalram += high_totalram - 1; 305 + mask = (((u64)high_totalram) << 32) + 0xffffffff; 294 306 } 295 - 296 - return area; 307 + return mask; 297 308 } 298 309 299 - /* 300 - * remaps an array of PAGE_SIZE pages into another vm_area 301 - * Cannot be used in non-sleeping contexts 302 - */ 303 - void *dma_common_pages_remap(struct page **pages, size_t size, 304 - unsigned long vm_flags, pgprot_t prot, 305 - const void *caller) 310 + u64 dma_get_required_mask(struct device *dev) 306 311 { 307 - struct vm_struct *area; 312 + const struct dma_map_ops *ops = get_dma_ops(dev); 308 313 309 - area = __dma_common_pages_remap(pages, size, vm_flags, prot, caller); 310 - if (!area) 311 - return NULL; 312 - 313 - area->pages = pages; 314 - 315 - return area->addr; 314 + if (dma_is_direct(ops)) 315 + return dma_direct_get_required_mask(dev); 316 + if (ops->get_required_mask) 317 + return ops->get_required_mask(dev); 318 + return dma_default_get_required_mask(dev); 316 319 } 317 - 318 - /* 319 - * remaps an allocated contiguous region into another vm_area. 320 - * Cannot be used in non-sleeping contexts 321 - */ 322 - 323 - void *dma_common_contiguous_remap(struct page *page, size_t size, 324 - unsigned long vm_flags, 325 - pgprot_t prot, const void *caller) 326 - { 327 - int i; 328 - struct page **pages; 329 - struct vm_struct *area; 330 - 331 - pages = kmalloc(sizeof(struct page *) << get_order(size), GFP_KERNEL); 332 - if (!pages) 333 - return NULL; 334 - 335 - for (i = 0; i < (size >> PAGE_SHIFT); i++) 336 - pages[i] = nth_page(page, i); 337 - 338 - area = __dma_common_pages_remap(pages, size, vm_flags, prot, caller); 339 - 340 - kfree(pages); 341 - 342 - if (!area) 343 - return NULL; 344 - return area->addr; 345 - } 346 - 347 - /* 348 - * unmaps a range previously mapped by dma_common_*_remap 349 - */ 350 - void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags) 351 - { 352 - struct vm_struct *area = find_vm_area(cpu_addr); 353 - 354 - if (!area || (area->flags & vm_flags) != vm_flags) { 355 - WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr); 356 - return; 357 - } 358 - 359 - unmap_kernel_range((unsigned long)cpu_addr, PAGE_ALIGN(size)); 360 - vunmap(cpu_addr); 361 - } 320 + EXPORT_SYMBOL_GPL(dma_get_required_mask); 362 321 #endif 322 + 323 + #ifndef arch_dma_alloc_attrs 324 + #define arch_dma_alloc_attrs(dev) (true) 325 + #endif 326 + 327 + void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 328 + gfp_t flag, unsigned long attrs) 329 + { 330 + const struct dma_map_ops *ops = get_dma_ops(dev); 331 + void *cpu_addr; 332 + 333 + WARN_ON_ONCE(dev && !dev->coherent_dma_mask); 334 + 335 + if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr)) 336 + return cpu_addr; 337 + 338 + /* let the implementation decide on the zone to allocate from: */ 339 + flag &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); 340 + 341 + if (!arch_dma_alloc_attrs(&dev)) 342 + return NULL; 343 + 344 + if (dma_is_direct(ops)) 345 + cpu_addr = dma_direct_alloc(dev, size, dma_handle, flag, attrs); 346 + else if (ops->alloc) 347 + cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); 348 + else 349 + return NULL; 350 + 351 + debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); 352 + return cpu_addr; 353 + } 354 + EXPORT_SYMBOL(dma_alloc_attrs); 355 + 356 + void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 357 + dma_addr_t dma_handle, unsigned long attrs) 358 + { 359 + const struct dma_map_ops *ops = get_dma_ops(dev); 360 + 361 + if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr)) 362 + return; 363 + /* 364 + * On non-coherent platforms which implement DMA-coherent buffers via 365 + * non-cacheable remaps, ops->free() may call vunmap(). Thus getting 366 + * this far in IRQ context is a) at risk of a BUG_ON() or trying to 367 + * sleep on some machines, and b) an indication that the driver is 368 + * probably misusing the coherent API anyway. 369 + */ 370 + WARN_ON(irqs_disabled()); 371 + 372 + if (!cpu_addr) 373 + return; 374 + 375 + debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); 376 + if (dma_is_direct(ops)) 377 + dma_direct_free(dev, size, cpu_addr, dma_handle, attrs); 378 + else if (ops->free) 379 + ops->free(dev, size, cpu_addr, dma_handle, attrs); 380 + } 381 + EXPORT_SYMBOL(dma_free_attrs); 382 + 383 + static inline void dma_check_mask(struct device *dev, u64 mask) 384 + { 385 + if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1))) 386 + dev_warn(dev, "SME is active, device will require DMA bounce buffers\n"); 387 + } 388 + 389 + int dma_supported(struct device *dev, u64 mask) 390 + { 391 + const struct dma_map_ops *ops = get_dma_ops(dev); 392 + 393 + if (dma_is_direct(ops)) 394 + return dma_direct_supported(dev, mask); 395 + if (!ops->dma_supported) 396 + return 1; 397 + return ops->dma_supported(dev, mask); 398 + } 399 + EXPORT_SYMBOL(dma_supported); 400 + 401 + #ifndef HAVE_ARCH_DMA_SET_MASK 402 + int dma_set_mask(struct device *dev, u64 mask) 403 + { 404 + if (!dev->dma_mask || !dma_supported(dev, mask)) 405 + return -EIO; 406 + 407 + dma_check_mask(dev, mask); 408 + *dev->dma_mask = mask; 409 + return 0; 410 + } 411 + EXPORT_SYMBOL(dma_set_mask); 412 + #endif 413 + 414 + #ifndef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK 415 + int dma_set_coherent_mask(struct device *dev, u64 mask) 416 + { 417 + if (!dma_supported(dev, mask)) 418 + return -EIO; 419 + 420 + dma_check_mask(dev, mask); 421 + dev->coherent_dma_mask = mask; 422 + return 0; 423 + } 424 + EXPORT_SYMBOL(dma_set_coherent_mask); 425 + #endif 426 + 427 + void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 428 + enum dma_data_direction dir) 429 + { 430 + const struct dma_map_ops *ops = get_dma_ops(dev); 431 + 432 + BUG_ON(!valid_dma_direction(dir)); 433 + 434 + if (dma_is_direct(ops)) 435 + arch_dma_cache_sync(dev, vaddr, size, dir); 436 + else if (ops->cache_sync) 437 + ops->cache_sync(dev, vaddr, size, dir); 438 + } 439 + EXPORT_SYMBOL(dma_cache_sync);
+256
kernel/dma/remap.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright (C) 2012 ARM Ltd. 4 + * Copyright (c) 2014 The Linux Foundation 5 + */ 6 + #include <linux/dma-direct.h> 7 + #include <linux/dma-noncoherent.h> 8 + #include <linux/dma-contiguous.h> 9 + #include <linux/init.h> 10 + #include <linux/genalloc.h> 11 + #include <linux/slab.h> 12 + #include <linux/vmalloc.h> 13 + 14 + static struct vm_struct *__dma_common_pages_remap(struct page **pages, 15 + size_t size, unsigned long vm_flags, pgprot_t prot, 16 + const void *caller) 17 + { 18 + struct vm_struct *area; 19 + 20 + area = get_vm_area_caller(size, vm_flags, caller); 21 + if (!area) 22 + return NULL; 23 + 24 + if (map_vm_area(area, prot, pages)) { 25 + vunmap(area->addr); 26 + return NULL; 27 + } 28 + 29 + return area; 30 + } 31 + 32 + /* 33 + * Remaps an array of PAGE_SIZE pages into another vm_area. 34 + * Cannot be used in non-sleeping contexts 35 + */ 36 + void *dma_common_pages_remap(struct page **pages, size_t size, 37 + unsigned long vm_flags, pgprot_t prot, 38 + const void *caller) 39 + { 40 + struct vm_struct *area; 41 + 42 + area = __dma_common_pages_remap(pages, size, vm_flags, prot, caller); 43 + if (!area) 44 + return NULL; 45 + 46 + area->pages = pages; 47 + 48 + return area->addr; 49 + } 50 + 51 + /* 52 + * Remaps an allocated contiguous region into another vm_area. 53 + * Cannot be used in non-sleeping contexts 54 + */ 55 + void *dma_common_contiguous_remap(struct page *page, size_t size, 56 + unsigned long vm_flags, 57 + pgprot_t prot, const void *caller) 58 + { 59 + int i; 60 + struct page **pages; 61 + struct vm_struct *area; 62 + 63 + pages = kmalloc(sizeof(struct page *) << get_order(size), GFP_KERNEL); 64 + if (!pages) 65 + return NULL; 66 + 67 + for (i = 0; i < (size >> PAGE_SHIFT); i++) 68 + pages[i] = nth_page(page, i); 69 + 70 + area = __dma_common_pages_remap(pages, size, vm_flags, prot, caller); 71 + 72 + kfree(pages); 73 + 74 + if (!area) 75 + return NULL; 76 + return area->addr; 77 + } 78 + 79 + /* 80 + * Unmaps a range previously mapped by dma_common_*_remap 81 + */ 82 + void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags) 83 + { 84 + struct vm_struct *area = find_vm_area(cpu_addr); 85 + 86 + if (!area || (area->flags & vm_flags) != vm_flags) { 87 + WARN(1, "trying to free invalid coherent area: %p\n", cpu_addr); 88 + return; 89 + } 90 + 91 + unmap_kernel_range((unsigned long)cpu_addr, PAGE_ALIGN(size)); 92 + vunmap(cpu_addr); 93 + } 94 + 95 + #ifdef CONFIG_DMA_DIRECT_REMAP 96 + static struct gen_pool *atomic_pool __ro_after_init; 97 + 98 + #define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K 99 + static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE; 100 + 101 + static int __init early_coherent_pool(char *p) 102 + { 103 + atomic_pool_size = memparse(p, &p); 104 + return 0; 105 + } 106 + early_param("coherent_pool", early_coherent_pool); 107 + 108 + int __init dma_atomic_pool_init(gfp_t gfp, pgprot_t prot) 109 + { 110 + unsigned int pool_size_order = get_order(atomic_pool_size); 111 + unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT; 112 + struct page *page; 113 + void *addr; 114 + int ret; 115 + 116 + if (dev_get_cma_area(NULL)) 117 + page = dma_alloc_from_contiguous(NULL, nr_pages, 118 + pool_size_order, false); 119 + else 120 + page = alloc_pages(gfp, pool_size_order); 121 + if (!page) 122 + goto out; 123 + 124 + arch_dma_prep_coherent(page, atomic_pool_size); 125 + 126 + atomic_pool = gen_pool_create(PAGE_SHIFT, -1); 127 + if (!atomic_pool) 128 + goto free_page; 129 + 130 + addr = dma_common_contiguous_remap(page, atomic_pool_size, VM_USERMAP, 131 + prot, __builtin_return_address(0)); 132 + if (!addr) 133 + goto destroy_genpool; 134 + 135 + ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr, 136 + page_to_phys(page), atomic_pool_size, -1); 137 + if (ret) 138 + goto remove_mapping; 139 + gen_pool_set_algo(atomic_pool, gen_pool_first_fit_order_align, NULL); 140 + 141 + pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n", 142 + atomic_pool_size / 1024); 143 + return 0; 144 + 145 + remove_mapping: 146 + dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP); 147 + destroy_genpool: 148 + gen_pool_destroy(atomic_pool); 149 + atomic_pool = NULL; 150 + free_page: 151 + if (!dma_release_from_contiguous(NULL, page, nr_pages)) 152 + __free_pages(page, pool_size_order); 153 + out: 154 + pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n", 155 + atomic_pool_size / 1024); 156 + return -ENOMEM; 157 + } 158 + 159 + bool dma_in_atomic_pool(void *start, size_t size) 160 + { 161 + return addr_in_gen_pool(atomic_pool, (unsigned long)start, size); 162 + } 163 + 164 + void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags) 165 + { 166 + unsigned long val; 167 + void *ptr = NULL; 168 + 169 + if (!atomic_pool) { 170 + WARN(1, "coherent pool not initialised!\n"); 171 + return NULL; 172 + } 173 + 174 + val = gen_pool_alloc(atomic_pool, size); 175 + if (val) { 176 + phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val); 177 + 178 + *ret_page = pfn_to_page(__phys_to_pfn(phys)); 179 + ptr = (void *)val; 180 + memset(ptr, 0, size); 181 + } 182 + 183 + return ptr; 184 + } 185 + 186 + bool dma_free_from_pool(void *start, size_t size) 187 + { 188 + if (!dma_in_atomic_pool(start, size)) 189 + return false; 190 + gen_pool_free(atomic_pool, (unsigned long)start, size); 191 + return true; 192 + } 193 + 194 + void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 195 + gfp_t flags, unsigned long attrs) 196 + { 197 + struct page *page = NULL; 198 + void *ret; 199 + 200 + size = PAGE_ALIGN(size); 201 + 202 + if (!gfpflags_allow_blocking(flags) && 203 + !(attrs & DMA_ATTR_NO_KERNEL_MAPPING)) { 204 + ret = dma_alloc_from_pool(size, &page, flags); 205 + if (!ret) 206 + return NULL; 207 + *dma_handle = phys_to_dma(dev, page_to_phys(page)); 208 + return ret; 209 + } 210 + 211 + page = __dma_direct_alloc_pages(dev, size, dma_handle, flags, attrs); 212 + if (!page) 213 + return NULL; 214 + 215 + /* remove any dirty cache lines on the kernel alias */ 216 + arch_dma_prep_coherent(page, size); 217 + 218 + if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) 219 + return page; /* opaque cookie */ 220 + 221 + /* create a coherent mapping */ 222 + ret = dma_common_contiguous_remap(page, size, VM_USERMAP, 223 + arch_dma_mmap_pgprot(dev, PAGE_KERNEL, attrs), 224 + __builtin_return_address(0)); 225 + if (!ret) { 226 + __dma_direct_free_pages(dev, size, page); 227 + return ret; 228 + } 229 + 230 + *dma_handle = phys_to_dma(dev, page_to_phys(page)); 231 + memset(ret, 0, size); 232 + 233 + return ret; 234 + } 235 + 236 + void arch_dma_free(struct device *dev, size_t size, void *vaddr, 237 + dma_addr_t dma_handle, unsigned long attrs) 238 + { 239 + if (attrs & DMA_ATTR_NO_KERNEL_MAPPING) { 240 + /* vaddr is a struct page cookie, not a kernel address */ 241 + __dma_direct_free_pages(dev, size, vaddr); 242 + } else if (!dma_free_from_pool(vaddr, PAGE_ALIGN(size))) { 243 + phys_addr_t phys = dma_to_phys(dev, dma_handle); 244 + struct page *page = pfn_to_page(__phys_to_pfn(phys)); 245 + 246 + vunmap(vaddr); 247 + __dma_direct_free_pages(dev, size, page); 248 + } 249 + } 250 + 251 + long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr, 252 + dma_addr_t dma_addr) 253 + { 254 + return __phys_to_pfn(dma_to_phys(dev, dma_addr)); 255 + } 256 + #endif /* CONFIG_DMA_DIRECT_REMAP */
+15 -238
kernel/dma/swiotlb.c
··· 21 21 22 22 #include <linux/cache.h> 23 23 #include <linux/dma-direct.h> 24 - #include <linux/dma-noncoherent.h> 25 24 #include <linux/mm.h> 26 25 #include <linux/export.h> 27 26 #include <linux/spinlock.h> ··· 64 65 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this 65 66 * API. 66 67 */ 67 - static phys_addr_t io_tlb_start, io_tlb_end; 68 + phys_addr_t io_tlb_start, io_tlb_end; 68 69 69 70 /* 70 71 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and ··· 382 383 max_segment = 0; 383 384 } 384 385 385 - static int is_swiotlb_buffer(phys_addr_t paddr) 386 - { 387 - return paddr >= io_tlb_start && paddr < io_tlb_end; 388 - } 389 - 390 386 /* 391 387 * Bounce: copy the swiotlb buffer back to the original dma location 392 388 */ ··· 520 526 spin_unlock_irqrestore(&io_tlb_lock, flags); 521 527 if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit()) 522 528 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size); 523 - return SWIOTLB_MAP_ERROR; 529 + return DMA_MAPPING_ERROR; 524 530 found: 525 531 spin_unlock_irqrestore(&io_tlb_lock, flags); 526 532 ··· 617 623 } 618 624 } 619 625 620 - static dma_addr_t swiotlb_bounce_page(struct device *dev, phys_addr_t *phys, 626 + /* 627 + * Create a swiotlb mapping for the buffer at @phys, and in case of DMAing 628 + * to the device copy the data into it as well. 629 + */ 630 + bool swiotlb_map(struct device *dev, phys_addr_t *phys, dma_addr_t *dma_addr, 621 631 size_t size, enum dma_data_direction dir, unsigned long attrs) 622 632 { 623 - dma_addr_t dma_addr; 633 + trace_swiotlb_bounced(dev, *dma_addr, size, swiotlb_force); 624 634 625 635 if (unlikely(swiotlb_force == SWIOTLB_NO_FORCE)) { 626 636 dev_warn_ratelimited(dev, 627 637 "Cannot do DMA to address %pa\n", phys); 628 - return DIRECT_MAPPING_ERROR; 638 + return false; 629 639 } 630 640 631 641 /* Oh well, have to allocate and map a bounce buffer. */ 632 642 *phys = swiotlb_tbl_map_single(dev, __phys_to_dma(dev, io_tlb_start), 633 643 *phys, size, dir, attrs); 634 - if (*phys == SWIOTLB_MAP_ERROR) 635 - return DIRECT_MAPPING_ERROR; 644 + if (*phys == DMA_MAPPING_ERROR) 645 + return false; 636 646 637 647 /* Ensure that the address returned is DMA'ble */ 638 - dma_addr = __phys_to_dma(dev, *phys); 639 - if (unlikely(!dma_capable(dev, dma_addr, size))) { 648 + *dma_addr = __phys_to_dma(dev, *phys); 649 + if (unlikely(!dma_capable(dev, *dma_addr, size))) { 640 650 swiotlb_tbl_unmap_single(dev, *phys, size, dir, 641 651 attrs | DMA_ATTR_SKIP_CPU_SYNC); 642 - return DIRECT_MAPPING_ERROR; 652 + return false; 643 653 } 644 654 645 - return dma_addr; 646 - } 647 - 648 - /* 649 - * Map a single buffer of the indicated size for DMA in streaming mode. The 650 - * physical address to use is returned. 651 - * 652 - * Once the device is given the dma address, the device owns this memory until 653 - * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed. 654 - */ 655 - dma_addr_t swiotlb_map_page(struct device *dev, struct page *page, 656 - unsigned long offset, size_t size, 657 - enum dma_data_direction dir, 658 - unsigned long attrs) 659 - { 660 - phys_addr_t phys = page_to_phys(page) + offset; 661 - dma_addr_t dev_addr = phys_to_dma(dev, phys); 662 - 663 - BUG_ON(dir == DMA_NONE); 664 - /* 665 - * If the address happens to be in the device's DMA window, 666 - * we can safely return the device addr and not worry about bounce 667 - * buffering it. 668 - */ 669 - if (!dma_capable(dev, dev_addr, size) || 670 - swiotlb_force == SWIOTLB_FORCE) { 671 - trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force); 672 - dev_addr = swiotlb_bounce_page(dev, &phys, size, dir, attrs); 673 - } 674 - 675 - if (!dev_is_dma_coherent(dev) && 676 - (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0 && 677 - dev_addr != DIRECT_MAPPING_ERROR) 678 - arch_sync_dma_for_device(dev, phys, size, dir); 679 - 680 - return dev_addr; 681 - } 682 - 683 - /* 684 - * Unmap a single streaming mode DMA translation. The dma_addr and size must 685 - * match what was provided for in a previous swiotlb_map_page call. All 686 - * other usages are undefined. 687 - * 688 - * After this call, reads by the cpu to the buffer are guaranteed to see 689 - * whatever the device wrote there. 690 - */ 691 - void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr, 692 - size_t size, enum dma_data_direction dir, 693 - unsigned long attrs) 694 - { 695 - phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); 696 - 697 - BUG_ON(dir == DMA_NONE); 698 - 699 - if (!dev_is_dma_coherent(hwdev) && 700 - (attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0) 701 - arch_sync_dma_for_cpu(hwdev, paddr, size, dir); 702 - 703 - if (is_swiotlb_buffer(paddr)) { 704 - swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs); 705 - return; 706 - } 707 - 708 - if (dir != DMA_FROM_DEVICE) 709 - return; 710 - 711 - /* 712 - * phys_to_virt doesn't work with hihgmem page but we could 713 - * call dma_mark_clean() with hihgmem page here. However, we 714 - * are fine since dma_mark_clean() is null on POWERPC. We can 715 - * make dma_mark_clean() take a physical address if necessary. 716 - */ 717 - dma_mark_clean(phys_to_virt(paddr), size); 718 - } 719 - 720 - /* 721 - * Make physical memory consistent for a single streaming mode DMA translation 722 - * after a transfer. 723 - * 724 - * If you perform a swiotlb_map_page() but wish to interrogate the buffer 725 - * using the cpu, yet do not wish to teardown the dma mapping, you must 726 - * call this function before doing so. At the next point you give the dma 727 - * address back to the card, you must first perform a 728 - * swiotlb_dma_sync_for_device, and then the device again owns the buffer 729 - */ 730 - static void 731 - swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr, 732 - size_t size, enum dma_data_direction dir, 733 - enum dma_sync_target target) 734 - { 735 - phys_addr_t paddr = dma_to_phys(hwdev, dev_addr); 736 - 737 - BUG_ON(dir == DMA_NONE); 738 - 739 - if (!dev_is_dma_coherent(hwdev) && target == SYNC_FOR_CPU) 740 - arch_sync_dma_for_cpu(hwdev, paddr, size, dir); 741 - 742 - if (is_swiotlb_buffer(paddr)) 743 - swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target); 744 - 745 - if (!dev_is_dma_coherent(hwdev) && target == SYNC_FOR_DEVICE) 746 - arch_sync_dma_for_device(hwdev, paddr, size, dir); 747 - 748 - if (!is_swiotlb_buffer(paddr) && dir == DMA_FROM_DEVICE) 749 - dma_mark_clean(phys_to_virt(paddr), size); 750 - } 751 - 752 - void 753 - swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, 754 - size_t size, enum dma_data_direction dir) 755 - { 756 - swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU); 757 - } 758 - 759 - void 760 - swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, 761 - size_t size, enum dma_data_direction dir) 762 - { 763 - swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE); 764 - } 765 - 766 - /* 767 - * Map a set of buffers described by scatterlist in streaming mode for DMA. 768 - * This is the scatter-gather version of the above swiotlb_map_page 769 - * interface. Here the scatter gather list elements are each tagged with the 770 - * appropriate dma address and length. They are obtained via 771 - * sg_dma_{address,length}(SG). 772 - * 773 - * Device ownership issues as mentioned above for swiotlb_map_page are the 774 - * same here. 775 - */ 776 - int 777 - swiotlb_map_sg_attrs(struct device *dev, struct scatterlist *sgl, int nelems, 778 - enum dma_data_direction dir, unsigned long attrs) 779 - { 780 - struct scatterlist *sg; 781 - int i; 782 - 783 - for_each_sg(sgl, sg, nelems, i) { 784 - sg->dma_address = swiotlb_map_page(dev, sg_page(sg), sg->offset, 785 - sg->length, dir, attrs); 786 - if (sg->dma_address == DIRECT_MAPPING_ERROR) 787 - goto out_error; 788 - sg_dma_len(sg) = sg->length; 789 - } 790 - 791 - return nelems; 792 - 793 - out_error: 794 - swiotlb_unmap_sg_attrs(dev, sgl, i, dir, 795 - attrs | DMA_ATTR_SKIP_CPU_SYNC); 796 - sg_dma_len(sgl) = 0; 797 - return 0; 798 - } 799 - 800 - /* 801 - * Unmap a set of streaming mode DMA translations. Again, cpu read rules 802 - * concerning calls here are the same as for swiotlb_unmap_page() above. 803 - */ 804 - void 805 - swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl, 806 - int nelems, enum dma_data_direction dir, 807 - unsigned long attrs) 808 - { 809 - struct scatterlist *sg; 810 - int i; 811 - 812 - BUG_ON(dir == DMA_NONE); 813 - 814 - for_each_sg(sgl, sg, nelems, i) 815 - swiotlb_unmap_page(hwdev, sg->dma_address, sg_dma_len(sg), dir, 816 - attrs); 817 - } 818 - 819 - /* 820 - * Make physical memory consistent for a set of streaming mode DMA translations 821 - * after a transfer. 822 - * 823 - * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules 824 - * and usage. 825 - */ 826 - static void 827 - swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl, 828 - int nelems, enum dma_data_direction dir, 829 - enum dma_sync_target target) 830 - { 831 - struct scatterlist *sg; 832 - int i; 833 - 834 - for_each_sg(sgl, sg, nelems, i) 835 - swiotlb_sync_single(hwdev, sg->dma_address, 836 - sg_dma_len(sg), dir, target); 837 - } 838 - 839 - void 840 - swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, 841 - int nelems, enum dma_data_direction dir) 842 - { 843 - swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU); 844 - } 845 - 846 - void 847 - swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, 848 - int nelems, enum dma_data_direction dir) 849 - { 850 - swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE); 655 + return true; 851 656 } 852 657 853 658 /* ··· 660 867 { 661 868 return __phys_to_dma(hwdev, io_tlb_end - 1) <= mask; 662 869 } 663 - 664 - const struct dma_map_ops swiotlb_dma_ops = { 665 - .mapping_error = dma_direct_mapping_error, 666 - .alloc = dma_direct_alloc, 667 - .free = dma_direct_free, 668 - .sync_single_for_cpu = swiotlb_sync_single_for_cpu, 669 - .sync_single_for_device = swiotlb_sync_single_for_device, 670 - .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu, 671 - .sync_sg_for_device = swiotlb_sync_sg_for_device, 672 - .map_sg = swiotlb_map_sg_attrs, 673 - .unmap_sg = swiotlb_unmap_sg_attrs, 674 - .map_page = swiotlb_map_page, 675 - .unmap_page = swiotlb_unmap_page, 676 - .dma_supported = dma_direct_supported, 677 - }; 678 - EXPORT_SYMBOL(swiotlb_dma_ops);
+1 -1
kernel/dma/virt.c
··· 13 13 { 14 14 void *ret; 15 15 16 - ret = (void *)__get_free_pages(gfp, get_order(size)); 16 + ret = (void *)__get_free_pages(gfp | __GFP_ZERO, get_order(size)); 17 17 if (ret) 18 18 *dma_handle = (uintptr_t)ret; 19 19 return ret;
+1 -1
lib/Kconfig
··· 577 577 # sg chaining option 578 578 # 579 579 580 - config ARCH_HAS_SG_CHAIN 580 + config ARCH_NO_SG_CHAIN 581 581 def_bool n 582 582 583 583 config ARCH_HAS_PMEM_API
+1 -1
lib/scatterlist.c
··· 271 271 272 272 if (nents == 0) 273 273 return -EINVAL; 274 - #ifndef CONFIG_ARCH_HAS_SG_CHAIN 274 + #ifdef CONFIG_ARCH_NO_SG_CHAIN 275 275 if (WARN_ON_ONCE(nents > max_ents)) 276 276 return -EINVAL; 277 277 #endif