Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

picoxcell: support for Picochip picoxcell devices

picoXcell is a family of femtocell devices with an ARM application
processor and picoArray DSP processor array.

This patch adds support for picoXcell boards to be booted using the
device tree registering the VIC's, UART's and timers.

v3: - fixup vic compatible string in binding
v2: - cleanup empty mach headers
- convert to of_platform_populate()
- simplify uncompress.h
- split vic node into 2 devices
- add missing __initconst attributes

Signed-off-by: Jamie Iles <jamie@jamieiles.com>

+584
+24
Documentation/devicetree/bindings/arm/picoxcell.txt
··· 1 + Picochip picoXcell device tree bindings. 2 + ======================================== 3 + 4 + Required root node properties: 5 + - compatible: 6 + - "picochip,pc7302-pc3x3" : PC7302 development board with PC3X3 device. 7 + - "picochip,pc7302-pc3x2" : PC7302 development board with PC3X2 device. 8 + - "picochip,pc3x3" : picoXcell PC3X3 device based board. 9 + - "picochip,pc3x2" : picoXcell PC3X2 device based board. 10 + 11 + Timers required properties: 12 + - compatible = "picochip,pc3x2-timer" 13 + - interrupts : The single IRQ line for the timer. 14 + - clock-freq : The frequency in HZ of the timer. 15 + - reg : The register bank for the timer. 16 + 17 + Note: two timers are required - one for the scheduler clock and one for the 18 + event tick/NOHZ. 19 + 20 + VIC required properties: 21 + - compatible = "arm,pl192-vic". 22 + - interrupt-controller. 23 + - reg : The register bank for the device. 24 + - #interrupt-cells : Must be 1.
+18
arch/arm/Kconfig
··· 608 608 This enables support for NVIDIA Tegra based systems (Tegra APX, 609 609 Tegra 6xx and Tegra 2 series). 610 610 611 + config ARCH_PICOXCELL 612 + bool "Picochip picoXcell" 613 + select ARCH_REQUIRE_GPIOLIB 614 + select ARM_PATCH_PHYS_VIRT 615 + select ARM_VIC 616 + select CPU_V6K 617 + select DW_APB_TIMER 618 + select GENERIC_CLOCKEVENTS 619 + select GENERIC_GPIO 620 + select HAVE_SCHED_CLOCK 621 + select HAVE_TCM 622 + select NO_IOPORT 623 + select USE_OF 624 + help 625 + This enables support for systems based on the Picochip picoXcell 626 + family of Femtocell devices. The picoxcell support requires device tree 627 + for all boards. 628 + 611 629 config ARCH_PNX4008 612 630 bool "Philips Nexperia PNX4008 Mobile" 613 631 select CPU_ARM926T
+1
arch/arm/Makefile
··· 167 167 machine-$(CONFIG_ARCH_OMAP3) := omap2 168 168 machine-$(CONFIG_ARCH_OMAP4) := omap2 169 169 machine-$(CONFIG_ARCH_ORION5X) := orion5x 170 + machine-$(CONFIG_ARCH_PICOXCELL) := picoxcell 170 171 machine-$(CONFIG_ARCH_PNX4008) := pnx4008 171 172 machine-$(CONFIG_ARCH_PRIMA2) := prima2 172 173 machine-$(CONFIG_ARCH_PXA) := pxa
+3
arch/arm/mach-picoxcell/Makefile
··· 1 + obj-y := common.o 2 + obj-y += time.o 3 + obj-y += io.o
+1
arch/arm/mach-picoxcell/Makefile.boot
··· 1 + zreladdr-y := 0x00008000
+55
arch/arm/mach-picoxcell/common.c
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License version 2 as 6 + * published by the Free Software Foundation. 7 + * 8 + * All enquiries to support@picochip.com 9 + */ 10 + #include <linux/irq.h> 11 + #include <linux/irqdomain.h> 12 + #include <linux/of.h> 13 + #include <linux/of_address.h> 14 + #include <linux/of_platform.h> 15 + 16 + #include <asm/mach/arch.h> 17 + #include <asm/hardware/vic.h> 18 + 19 + #include <mach/map.h> 20 + #include <mach/picoxcell_soc.h> 21 + 22 + #include "common.h" 23 + 24 + static void __init picoxcell_init_machine(void) 25 + { 26 + of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 27 + } 28 + 29 + static const char *picoxcell_dt_match[] = { 30 + "picochip,pc3x2", 31 + "picochip,pc3x3", 32 + NULL 33 + }; 34 + 35 + static const struct of_device_id vic_of_match[] __initconst = { 36 + { .compatible = "arm,pl192-vic" }, 37 + { /* Sentinel */ } 38 + }; 39 + 40 + static void __init picoxcell_init_irq(void) 41 + { 42 + vic_init(IO_ADDRESS(PICOXCELL_VIC0_BASE), 0, ~0, 0); 43 + vic_init(IO_ADDRESS(PICOXCELL_VIC1_BASE), 32, ~0, 0); 44 + irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC0_BASE, 0); 45 + irq_domain_generate_simple(vic_of_match, PICOXCELL_VIC1_BASE, 32); 46 + } 47 + 48 + DT_MACHINE_START(PICOXCELL, "Picochip picoXcell") 49 + .map_io = picoxcell_map_io, 50 + .nr_irqs = ARCH_NR_IRQS, 51 + .init_irq = picoxcell_init_irq, 52 + .timer = &picoxcell_timer, 53 + .init_machine = picoxcell_init_machine, 54 + .dt_compat = picoxcell_dt_match, 55 + MACHINE_END
+18
arch/arm/mach-picoxcell/common.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License version 2 as 6 + * published by the Free Software Foundation. 7 + * 8 + * All enquiries to support@picochip.com 9 + */ 10 + #ifndef __PICOXCELL_COMMON_H__ 11 + #define __PICOXCELL_COMMON_H__ 12 + 13 + #include <asm/mach/time.h> 14 + 15 + extern struct sys_timer picoxcell_timer; 16 + extern void picoxcell_map_io(void); 17 + 18 + #endif /* __PICOXCELL_COMMON_H__ */
+35
arch/arm/mach-picoxcell/include/mach/debug-macro.S
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License version 2 as 6 + * published by the Free Software Foundation. 7 + * 8 + * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit 9 + * accesses to the 8250. 10 + */ 11 + #include <linux/serial_reg.h> 12 + #include <mach/hardware.h> 13 + #include <mach/map.h> 14 + 15 + #define UART_SHIFT 2 16 + 17 + .macro addruart, rp, rv 18 + ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE) 19 + ldr \rp, =PICOXCELL_UART1_BASE 20 + .endm 21 + 22 + .macro senduart,rd,rx 23 + str \rd, [\rx, #UART_TX << UART_SHIFT] 24 + .endm 25 + 26 + .macro busyuart,rd,rx 27 + 1002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT] 28 + and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE 29 + teq \rd, #UART_LSR_TEMT | UART_LSR_THRE 30 + bne 1002b 31 + .endm 32 + 33 + /* The UART's don't have any flow control IO's wired up. */ 34 + .macro waituart,rd,rx 35 + .endm
+19
arch/arm/mach-picoxcell/include/mach/entry-macro.S
··· 1 + /* 2 + * entry-macro.S 3 + * 4 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 5 + * 6 + * Low-level IRQ helper macros for picoXcell platforms 7 + * 8 + * This file is licensed under the terms of the GNU General Public 9 + * License version 2. This program is licensed "as is" without any 10 + * warranty of any kind, whether express or implied. 11 + */ 12 + #include <mach/hardware.h> 13 + #include <mach/irqs.h> 14 + #include <mach/map.h> 15 + 16 + #define VA_VIC0 IO_ADDRESS(PICOXCELL_VIC0_BASE) 17 + #define VA_VIC1 IO_ADDRESS(PICOXCELL_VIC1_BASE) 18 + 19 + #include <asm/entry-macro-vic2.S>
+1
arch/arm/mach-picoxcell/include/mach/gpio.h
··· 1 + /* empty */
+21
arch/arm/mach-picoxcell/include/mach/hardware.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This file contains the hardware definitions of the picoXcell SoC devices. 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; either version 2 of the License, or 9 + * (at your option) any later version. 10 + * 11 + * This program is distributed in the hope that it will be useful, 12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License for more details. 15 + */ 16 + #ifndef __ASM_ARCH_HARDWARE_H 17 + #define __ASM_ARCH_HARDWARE_H 18 + 19 + #include <mach/picoxcell_soc.h> 20 + 21 + #endif
+29
arch/arm/mach-picoxcell/include/mach/io.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License as published by 6 + * the Free Software Foundation; either version 2 of the License, or 7 + * (at your option) any later version. 8 + * 9 + * This program is distributed in the hope that it will be useful, 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 + * GNU General Public License for more details. 13 + */ 14 + #ifndef __ASM_ARM_ARCH_IO_H 15 + #define __ASM_ARM_ARCH_IO_H 16 + 17 + /* No ioports, but needed for driver compatibility. */ 18 + #define __io(a) __typesafe_io(a) 19 + /* No PCI possible on picoxcell. */ 20 + #define __mem_pci(a) (a) 21 + 22 + #define __arch_ioremap picoxcell_ioremap 23 + #define __arch_iounmap picoxcell_iounmap 24 + 25 + extern void __iomem *picoxcell_ioremap(unsigned long phys, size_t size, 26 + unsigned int type); 27 + extern void picoxcell_iounmap(volatile void __iomem *addr); 28 + 29 + #endif /* __ASM_ARM_ARCH_IO_H */
+25
arch/arm/mach-picoxcell/include/mach/irqs.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This file contains the hardware definitions of the picoXcell SoC devices. 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; either version 2 of the License, or 9 + * (at your option) any later version. 10 + * 11 + * This program is distributed in the hope that it will be useful, 12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License for more details. 15 + */ 16 + #ifndef __MACH_IRQS_H 17 + #define __MACH_IRQS_H 18 + 19 + #define ARCH_NR_IRQS 64 20 + #define NR_IRQS (128 + ARCH_NR_IRQS) 21 + 22 + #define IRQ_VIC0_BASE 0 23 + #define IRQ_VIC1_BASE 32 24 + 25 + #endif /* __MACH_IRQS_H */
+25
arch/arm/mach-picoxcell/include/mach/map.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License as published by 6 + * the Free Software Foundation; either version 2 of the License, or 7 + * (at your option) any later version. 8 + * 9 + * This program is distributed in the hope that it will be useful, 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 + * GNU General Public License for more details. 13 + */ 14 + #ifndef __PICOXCELL_MAP_H__ 15 + #define __PICOXCELL_MAP_H__ 16 + 17 + #define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000) 18 + 19 + #ifdef __ASSEMBLY__ 20 + #define IO_ADDRESS(x) PHYS_TO_IO((x)) 21 + #else 22 + #define IO_ADDRESS(x) (void __iomem __force *)(PHYS_TO_IO((x))) 23 + #endif 24 + 25 + #endif /* __PICOXCELL_MAP_H__ */
+1
arch/arm/mach-picoxcell/include/mach/memory.h
··· 1 + /* empty */
+25
arch/arm/mach-picoxcell/include/mach/picoxcell_soc.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This file contains the hardware definitions of the picoXcell SoC devices. 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License as published by 8 + * the Free Software Foundation; either version 2 of the License, or 9 + * (at your option) any later version. 10 + * 11 + * This program is distributed in the hope that it will be useful, 12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 + * GNU General Public License for more details. 15 + */ 16 + #ifndef __PICOXCELL_SOC_H__ 17 + #define __PICOXCELL_SOC_H__ 18 + 19 + #define PICOXCELL_UART1_BASE 0x80230000 20 + #define PICOXCELL_PERIPH_BASE 0x80000000 21 + #define PICOXCELL_PERIPH_LENGTH SZ_4M 22 + #define PICOXCELL_VIC0_BASE 0x80060000 23 + #define PICOXCELL_VIC1_BASE 0x80064000 24 + 25 + #endif /* __PICOXCELL_SOC_H__ */
+31
arch/arm/mach-picoxcell/include/mach/system.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License as published by 6 + * the Free Software Foundation; either version 2 of the License, or 7 + * (at your option) any later version. 8 + * 9 + * This program is distributed in the hope that it will be useful, 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 + * GNU General Public License for more details. 13 + */ 14 + #ifndef __ASM_ARCH_SYSTEM_H 15 + #define __ASM_ARCH_SYSTEM_H 16 + 17 + static inline void arch_idle(void) 18 + { 19 + /* 20 + * This should do all the clock switching and wait for interrupt 21 + * tricks. 22 + */ 23 + cpu_do_idle(); 24 + } 25 + 26 + static inline void arch_reset(int mode, const char *cmd) 27 + { 28 + /* Watchdog reset to go here. */ 29 + } 30 + 31 + #endif /* __ASM_ARCH_SYSTEM_H */
+25
arch/arm/mach-picoxcell/include/mach/timex.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License as published by 6 + * the Free Software Foundation; either version 2 of the License, or 7 + * (at your option) any later version. 8 + * 9 + * This program is distributed in the hope that it will be useful, 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 + * GNU General Public License for more details. 13 + * 14 + * You should have received a copy of the GNU General Public License 15 + * along with this program; if not, write to the Free Software 16 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 + */ 18 + #ifndef __TIMEX_H__ 19 + #define __TIMEX_H__ 20 + 21 + /* Bogus value to allow the kernel to compile. */ 22 + #define CLOCK_TICK_RATE 1000000 23 + 24 + #endif /* __TIMEX_H__ */ 25 +
+21
arch/arm/mach-picoxcell/include/mach/uncompress.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License as published by 6 + * the Free Software Foundation; either version 2 of the License, or 7 + * (at your option) any later version. 8 + * 9 + * This program is distributed in the hope that it will be useful, 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 + * GNU General Public License for more details. 13 + * 14 + * You should have received a copy of the GNU General Public License 15 + * along with this program; if not, write to the Free Software 16 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 + */ 18 + #define putc(c) 19 + #define flush() 20 + #define arch_decomp_setup() 21 + #define arch_decomp_wdog()
+18
arch/arm/mach-picoxcell/include/mach/vmalloc.h
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License as published by 6 + * the Free Software Foundation; either version 2 of the License, or 7 + * (at your option) any later version. 8 + * 9 + * This program is distributed in the hope that it will be useful, 10 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 + * GNU General Public License for more details. 13 + * 14 + * You should have received a copy of the GNU General Public License 15 + * along with this program; if not, write to the Free Software 16 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 + */ 18 + #define VMALLOC_END 0xFE000000UL
+56
arch/arm/mach-picoxcell/io.c
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License version 2 as 6 + * published by the Free Software Foundation. 7 + * 8 + * All enquiries to support@picochip.com 9 + */ 10 + #include <linux/io.h> 11 + #include <linux/mm.h> 12 + #include <linux/module.h> 13 + #include <linux/of.h> 14 + 15 + #include <asm/mach/map.h> 16 + 17 + #include <mach/map.h> 18 + #include <mach/picoxcell_soc.h> 19 + 20 + #include "common.h" 21 + 22 + void __init picoxcell_map_io(void) 23 + { 24 + struct map_desc io_map = { 25 + .virtual = PHYS_TO_IO(PICOXCELL_PERIPH_BASE), 26 + .pfn = __phys_to_pfn(PICOXCELL_PERIPH_BASE), 27 + .length = PICOXCELL_PERIPH_LENGTH, 28 + .type = MT_DEVICE, 29 + }; 30 + 31 + iotable_init(&io_map, 1); 32 + } 33 + 34 + void __iomem *picoxcell_ioremap(unsigned long p, size_t size, 35 + unsigned int type) 36 + { 37 + if (unlikely(size == 0)) 38 + return NULL; 39 + 40 + if (p >= PICOXCELL_PERIPH_BASE && 41 + p < PICOXCELL_PERIPH_BASE + PICOXCELL_PERIPH_LENGTH) 42 + return IO_ADDRESS(p); 43 + 44 + return __arm_ioremap_caller(p, size, type, 45 + __builtin_return_address(0)); 46 + } 47 + EXPORT_SYMBOL_GPL(picoxcell_ioremap); 48 + 49 + void picoxcell_iounmap(volatile void __iomem *addr) 50 + { 51 + unsigned long virt = (unsigned long)addr; 52 + 53 + if (virt >= VMALLOC_START && virt < VMALLOC_END) 54 + __iounmap(addr); 55 + } 56 + EXPORT_SYMBOL_GPL(picoxcell_iounmap);
+132
arch/arm/mach-picoxcell/time.c
··· 1 + /* 2 + * Copyright (c) 2011 Picochip Ltd., Jamie Iles 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License version 2 as 6 + * published by the Free Software Foundation. 7 + * 8 + * All enquiries to support@picochip.com 9 + */ 10 + #include <linux/dw_apb_timer.h> 11 + #include <linux/of.h> 12 + #include <linux/of_address.h> 13 + #include <linux/of_irq.h> 14 + #include <linux/sched.h> 15 + 16 + #include <asm/mach/time.h> 17 + #include <asm/sched_clock.h> 18 + 19 + #include "common.h" 20 + 21 + static void timer_get_base_and_rate(struct device_node *np, 22 + void __iomem **base, u32 *rate) 23 + { 24 + *base = of_iomap(np, 0); 25 + 26 + if (!*base) 27 + panic("Unable to map regs for %s", np->name); 28 + 29 + if (of_property_read_u32(np, "clock-freq", rate)) 30 + panic("No clock-freq property for %s", np->name); 31 + } 32 + 33 + static void picoxcell_add_clockevent(struct device_node *event_timer) 34 + { 35 + void __iomem *iobase; 36 + struct dw_apb_clock_event_device *ced; 37 + u32 irq, rate; 38 + 39 + irq = irq_of_parse_and_map(event_timer, 0); 40 + if (irq == NO_IRQ) 41 + panic("No IRQ for clock event timer"); 42 + 43 + timer_get_base_and_rate(event_timer, &iobase, &rate); 44 + 45 + ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq, 46 + rate); 47 + if (!ced) 48 + panic("Unable to initialise clockevent device"); 49 + 50 + dw_apb_clockevent_register(ced); 51 + } 52 + 53 + static void picoxcell_add_clocksource(struct device_node *source_timer) 54 + { 55 + void __iomem *iobase; 56 + struct dw_apb_clocksource *cs; 57 + u32 rate; 58 + 59 + timer_get_base_and_rate(source_timer, &iobase, &rate); 60 + 61 + cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate); 62 + if (!cs) 63 + panic("Unable to initialise clocksource device"); 64 + 65 + dw_apb_clocksource_start(cs); 66 + dw_apb_clocksource_register(cs); 67 + } 68 + 69 + static DEFINE_CLOCK_DATA(cd); 70 + static void __iomem *sched_io_base; 71 + 72 + unsigned long long notrace sched_clock(void) 73 + { 74 + cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0; 75 + 76 + return cyc_to_sched_clock(&cd, cyc, (u32)~0); 77 + } 78 + 79 + static void notrace picoxcell_update_sched_clock(void) 80 + { 81 + cycle_t cyc = sched_io_base ? __raw_readl(sched_io_base) : 0; 82 + 83 + update_sched_clock(&cd, cyc, (u32)~0); 84 + } 85 + 86 + static const struct of_device_id picoxcell_rtc_ids[] __initconst = { 87 + { .compatible = "picochip,pc3x2-rtc" }, 88 + { /* Sentinel */ }, 89 + }; 90 + 91 + static void picoxcell_init_sched_clock(void) 92 + { 93 + struct device_node *sched_timer; 94 + u32 rate; 95 + 96 + sched_timer = of_find_matching_node(NULL, picoxcell_rtc_ids); 97 + if (!sched_timer) 98 + panic("No RTC for sched clock to use"); 99 + 100 + timer_get_base_and_rate(sched_timer, &sched_io_base, &rate); 101 + of_node_put(sched_timer); 102 + 103 + init_sched_clock(&cd, picoxcell_update_sched_clock, 32, rate); 104 + } 105 + 106 + static const struct of_device_id picoxcell_timer_ids[] __initconst = { 107 + { .compatible = "picochip,pc3x2-timer" }, 108 + {}, 109 + }; 110 + 111 + static void __init picoxcell_timer_init(void) 112 + { 113 + struct device_node *event_timer, *source_timer; 114 + 115 + event_timer = of_find_matching_node(NULL, picoxcell_timer_ids); 116 + if (!event_timer) 117 + panic("No timer for clockevent"); 118 + picoxcell_add_clockevent(event_timer); 119 + 120 + source_timer = of_find_matching_node(event_timer, picoxcell_timer_ids); 121 + if (!source_timer) 122 + panic("No timer for clocksource"); 123 + picoxcell_add_clocksource(source_timer); 124 + 125 + of_node_put(source_timer); 126 + 127 + picoxcell_init_sched_clock(); 128 + } 129 + 130 + struct sys_timer picoxcell_timer = { 131 + .init = picoxcell_timer_init, 132 + };