Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

cxl/pci: Use CDAT DOE mailbox created by PCI core

The PCI core has just been amended to create a pci_doe_mb struct for
every DOE instance on device enumeration.

Drop creation of a (duplicate) CDAT DOE mailbox on cxl probing in favor
of the one already created by the PCI core.

Tested-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/becaf70e8faf9681d474200117d62d7eaac46cca.1678543498.git.lukas@wunner.de
Signed-off-by: Dan Williams <dan.j.williams@intel.com>

authored by

Lukas Wunner and committed by
Dan Williams
af0a6c35 ac048403

+5 -74
+5 -22
drivers/cxl/core/pci.c
··· 441 441 #define CXL_DOE_TABLE_ACCESS_LAST_ENTRY 0xffff 442 442 #define CXL_DOE_PROTOCOL_TABLE_ACCESS 2 443 443 444 - static struct pci_doe_mb *find_cdat_doe(struct device *uport) 445 - { 446 - struct cxl_memdev *cxlmd; 447 - struct cxl_dev_state *cxlds; 448 - unsigned long index; 449 - void *entry; 450 - 451 - cxlmd = to_cxl_memdev(uport); 452 - cxlds = cxlmd->cxlds; 453 - 454 - xa_for_each(&cxlds->doe_mbs, index, entry) { 455 - struct pci_doe_mb *cur = entry; 456 - 457 - if (pci_doe_supports_prot(cur, PCI_DVSEC_VENDOR_ID_CXL, 458 - CXL_DOE_PROTOCOL_TABLE_ACCESS)) 459 - return cur; 460 - } 461 - 462 - return NULL; 463 - } 464 - 465 444 #define CDAT_DOE_REQ(entry_handle) cpu_to_le32 \ 466 445 (FIELD_PREP(CXL_DOE_TABLE_ACCESS_REQ_CODE, \ 467 446 CXL_DOE_TABLE_ACCESS_REQ_CODE_READ) | \ ··· 538 559 struct pci_doe_mb *cdat_doe; 539 560 struct device *dev = &port->dev; 540 561 struct device *uport = port->uport; 562 + struct cxl_memdev *cxlmd = to_cxl_memdev(uport); 563 + struct cxl_dev_state *cxlds = cxlmd->cxlds; 564 + struct pci_dev *pdev = to_pci_dev(cxlds->dev); 541 565 size_t cdat_length; 542 566 int rc; 543 567 544 - cdat_doe = find_cdat_doe(uport); 568 + cdat_doe = pci_find_doe_mailbox(pdev, PCI_DVSEC_VENDOR_ID_CXL, 569 + CXL_DOE_PROTOCOL_TABLE_ACCESS); 545 570 if (!cdat_doe) { 546 571 dev_dbg(dev, "No CDAT mailbox\n"); 547 572 return;
-3
drivers/cxl/cxlmem.h
··· 249 249 * @component_reg_phys: register base of component registers 250 250 * @info: Cached DVSEC information about the device. 251 251 * @serial: PCIe Device Serial Number 252 - * @doe_mbs: PCI DOE mailbox array 253 252 * @event: event log driver state 254 253 * @mbox_send: @dev specific transport for transmitting mailbox commands 255 254 * ··· 285 286 286 287 resource_size_t component_reg_phys; 287 288 u64 serial; 288 - 289 - struct xarray doe_mbs; 290 289 291 290 struct cxl_event_state event; 292 291
-49
drivers/cxl/pci.c
··· 8 8 #include <linux/mutex.h> 9 9 #include <linux/list.h> 10 10 #include <linux/pci.h> 11 - #include <linux/pci-doe.h> 12 11 #include <linux/aer.h> 13 12 #include <linux/io.h> 14 13 #include "cxlmem.h" ··· 356 357 return rc; 357 358 } 358 359 359 - static void cxl_pci_destroy_doe(void *mbs) 360 - { 361 - xa_destroy(mbs); 362 - } 363 - 364 - static void devm_cxl_pci_create_doe(struct cxl_dev_state *cxlds) 365 - { 366 - struct device *dev = cxlds->dev; 367 - struct pci_dev *pdev = to_pci_dev(dev); 368 - u16 off = 0; 369 - 370 - xa_init(&cxlds->doe_mbs); 371 - if (devm_add_action(&pdev->dev, cxl_pci_destroy_doe, &cxlds->doe_mbs)) { 372 - dev_err(dev, "Failed to create XArray for DOE's\n"); 373 - return; 374 - } 375 - 376 - /* 377 - * Mailbox creation is best effort. Higher layers must determine if 378 - * the lack of a mailbox for their protocol is a device failure or not. 379 - */ 380 - pci_doe_for_each_off(pdev, off) { 381 - struct pci_doe_mb *doe_mb; 382 - 383 - doe_mb = pcim_doe_create_mb(pdev, off); 384 - if (IS_ERR(doe_mb)) { 385 - dev_err(dev, "Failed to create MB object for MB @ %x\n", 386 - off); 387 - continue; 388 - } 389 - 390 - if (!pci_request_config_region_exclusive(pdev, off, 391 - PCI_DOE_CAP_SIZEOF, 392 - dev_name(dev))) 393 - pci_err(pdev, "Failed to exclude DOE registers\n"); 394 - 395 - if (xa_insert(&cxlds->doe_mbs, off, doe_mb, GFP_KERNEL)) { 396 - dev_err(dev, "xa_insert failed to insert MB @ %x\n", 397 - off); 398 - continue; 399 - } 400 - 401 - dev_dbg(dev, "Created DOE mailbox @%x\n", off); 402 - } 403 - } 404 - 405 360 /* 406 361 * Assume that any RCIEP that emits the CXL memory expander class code 407 362 * is an RCD ··· 702 749 dev_warn(&pdev->dev, "No component registers (%d)\n", rc); 703 750 704 751 cxlds->component_reg_phys = map.resource; 705 - 706 - devm_cxl_pci_create_doe(cxlds); 707 752 708 753 rc = cxl_map_component_regs(&pdev->dev, &cxlds->regs.component, 709 754 &map, BIT(CXL_CM_CAP_CAP_ID_RAS));