tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm64: hw_breakpoint: Allow EL2 breakpoints if running in HYP
With VHE, we place kernel {watch,break}-points at EL2 to get things
like kgdb and "perf -e mem:..." working.
This requires a bit of repainting in the low-level encore/decode,
but is otherwise pretty simple.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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arch/arm64/include/asm/hw_breakpoint.h
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arch/arm64/include/asm/hw_breakpoint.h
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#include <asm/cputype.h>
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#include <asm/cpufeature.h>
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#include <asm/virt.h>
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#ifdef __KERNEL__
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struct arch_hw_breakpoint_ctrl ctrl;
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};
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/* Privilege Levels */
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#define AARCH64_BREAKPOINT_EL1 1
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#define AARCH64_BREAKPOINT_EL0 2
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#define DBG_HMC_HYP (1 << 13)
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static inline u32 encode_ctrl_reg(struct arch_hw_breakpoint_ctrl ctrl)
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{
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return (ctrl.len << 5) | (ctrl.type << 3) | (ctrl.privilege << 1) |
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u32 val = (ctrl.len << 5) | (ctrl.type << 3) | (ctrl.privilege << 1) |
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ctrl.enabled;
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if (is_kernel_in_hyp_mode() && ctrl.privilege == AARCH64_BREAKPOINT_EL1)
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val |= DBG_HMC_HYP;
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return val;
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}
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static inline void decode_ctrl_reg(u32 reg,
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#define ARM_BREAKPOINT_LOAD 1
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#define ARM_BREAKPOINT_STORE 2
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#define AARCH64_ESR_ACCESS_MASK (1 << 6)
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/* Privilege Levels */
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#define AARCH64_BREAKPOINT_EL1 1
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#define AARCH64_BREAKPOINT_EL0 2
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/* Lengths */
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#define ARM_BREAKPOINT_LEN_1 0x1