Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

media: mt9p031: Make pixel clock polarity configurable by DT

Evaluate the desired pixel clock polarity from the device tree.

Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>

authored by

Christian Hemp and committed by
Mauro Carvalho Chehab
ae47ee5f b9c18096

+21 -1
+1
drivers/media/i2c/Kconfig
··· 1229 1229 select MEDIA_CONTROLLER 1230 1230 select VIDEO_V4L2_SUBDEV_API 1231 1231 select VIDEO_APTINA_PLL 1232 + select V4L2_FWNODE 1232 1233 help 1233 1234 This is a Video4Linux2 sensor driver for the Aptina 1234 1235 (Micron) mt9p031 5 Mpixel camera.
+19 -1
drivers/media/i2c/mt9p031.c
··· 27 27 #include <media/v4l2-async.h> 28 28 #include <media/v4l2-ctrls.h> 29 29 #include <media/v4l2-device.h> 30 + #include <media/v4l2-fwnode.h> 30 31 #include <media/v4l2-subdev.h> 31 32 32 33 #include "aptina-pll.h" ··· 371 370 if (ret < 0) { 372 371 dev_err(&client->dev, "Failed to reset the camera\n"); 373 372 return ret; 373 + } 374 + 375 + /* Configure the pixel clock polarity */ 376 + if (mt9p031->pdata && mt9p031->pdata->pixclk_pol) { 377 + ret = mt9p031_write(client, MT9P031_PIXEL_CLOCK_CONTROL, 378 + MT9P031_PIXEL_CLOCK_INVERT); 379 + if (ret < 0) 380 + return ret; 374 381 } 375 382 376 383 return v4l2_ctrl_handler_setup(&mt9p031->ctrls); ··· 1023 1014 static struct mt9p031_platform_data * 1024 1015 mt9p031_get_pdata(struct i2c_client *client) 1025 1016 { 1026 - struct mt9p031_platform_data *pdata; 1017 + struct mt9p031_platform_data *pdata = NULL; 1027 1018 struct device_node *np; 1019 + struct v4l2_fwnode_endpoint endpoint = { 1020 + .bus_type = V4L2_MBUS_PARALLEL 1021 + }; 1028 1022 1029 1023 if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node) 1030 1024 return client->dev.platform_data; ··· 1036 1024 if (!np) 1037 1025 return NULL; 1038 1026 1027 + if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &endpoint) < 0) 1028 + goto done; 1029 + 1039 1030 pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL); 1040 1031 if (!pdata) 1041 1032 goto done; 1042 1033 1043 1034 of_property_read_u32(np, "input-clock-frequency", &pdata->ext_freq); 1044 1035 of_property_read_u32(np, "pixel-clock-frequency", &pdata->target_freq); 1036 + 1037 + pdata->pixclk_pol = !!(endpoint.bus.parallel.flags & 1038 + V4L2_MBUS_PCLK_SAMPLE_RISING); 1045 1039 1046 1040 done: 1047 1041 of_node_put(np);
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include/media/i2c/mt9p031.h
··· 10 10 * @target_freq: Pixel clock frequency 11 11 */ 12 12 struct mt9p031_platform_data { 13 + unsigned int pixclk_pol:1; 13 14 int ext_freq; 14 15 int target_freq; 15 16 };