iio: accel: kxcjk-1013: Refactor configuration registers into struct

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Most Kionix accelerometers seem to use fairly consistent register bits,
but the register addresses are not necessarily the same. This is already
partially the case for the KXTF9 (added in commit 1540d0106bcb
("iio: accel: kxcjk1013: add support for KXTF9")), which has some
registers at different addresses.

However, it's even much worse for the KX023-1025. All register bits
used by the kxcjk-1013 driver seem to be fully compatible with KX023,
but it has most registers at totally different addresses.

In preparation to add support for KX023-1025, move the fixed register
addresses into a struct so we can change them for KX023 more easily.

Cc: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Stephan Gerhold and committed by

Jonathan Cameron 4 years ago ae4467f6 52d8e7f8

+82 -42

1 changed file

expand all

drivers

iio

accel

kxcjk-1013.c

+82 -42

drivers/iio/accel/kxcjk-1013.c

··· 51 51 #define KXTF9_REG_TILT_POS_CUR 0x10 52 52 #define KXTF9_REG_TILT_POS_PREV 0x11 53 53 #define KXTF9_REG_INT_SRC1 0x15 54 - #define KXCJK1013_REG_INT_SRC1 0x16 /* compatible, but called INT_SRC2 in KXTF9 ds */ 54 + #define KXTF9_REG_INT_SRC2 0x16 55 + #define KXCJK1013_REG_INT_SRC1 0x16 55 56 #define KXCJK1013_REG_INT_SRC2 0x17 56 57 #define KXCJK1013_REG_STATUS_REG 0x18 57 58 #define KXCJK1013_REG_INT_REL 0x1A 58 59 #define KXCJK1013_REG_CTRL1 0x1B 59 60 #define KXTF9_REG_CTRL2 0x1C 60 - #define KXCJK1013_REG_CTRL2 0x1D /* mostly compatible, CTRL_REG3 in KTXF9 ds */ 61 + #define KXTF9_REG_CTRL3 0x1D 62 + #define KXCJK1013_REG_CTRL2 0x1D 61 63 #define KXCJK1013_REG_INT_CTRL1 0x1E 62 64 #define KXCJK1013_REG_INT_CTRL2 0x1F 63 65 #define KXTF9_REG_INT_CTRL3 0x20 ··· 135 133 ACPI_KIOX010A, 136 134 }; 137 135 136 + struct kx_chipset_regs { 137 + u8 int_src1; 138 + u8 int_src2; 139 + u8 int_rel; 140 + u8 ctrl1; 141 + u8 wuf_ctrl; 142 + u8 int_ctrl1; 143 + u8 data_ctrl; 144 + u8 wake_timer; 145 + u8 wake_thres; 146 + }; 147 + 148 + static const struct kx_chipset_regs kxcjk1013_regs = { 149 + .int_src1 = KXCJK1013_REG_INT_SRC1, 150 + .int_src2 = KXCJK1013_REG_INT_SRC2, 151 + .int_rel = KXCJK1013_REG_INT_REL, 152 + .ctrl1 = KXCJK1013_REG_CTRL1, 153 + .wuf_ctrl = KXCJK1013_REG_CTRL2, 154 + .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 155 + .data_ctrl = KXCJK1013_REG_DATA_CTRL, 156 + .wake_timer = KXCJK1013_REG_WAKE_TIMER, 157 + .wake_thres = KXCJK1013_REG_WAKE_THRES, 158 + }; 159 + 160 + static const struct kx_chipset_regs kxtf9_regs = { 161 + /* .int_src1 was moved to INT_SRC2 on KXTF9 */ 162 + .int_src1 = KXTF9_REG_INT_SRC2, 163 + /* .int_src2 is not available */ 164 + .int_rel = KXCJK1013_REG_INT_REL, 165 + .ctrl1 = KXCJK1013_REG_CTRL1, 166 + .wuf_ctrl = KXTF9_REG_CTRL3, 167 + .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 168 + .data_ctrl = KXCJK1013_REG_DATA_CTRL, 169 + .wake_timer = KXCJK1013_REG_WAKE_TIMER, 170 + .wake_thres = KXTF9_REG_WAKE_THRESH, 171 + }; 172 + 138 173 struct kxcjk1013_data { 139 174 struct regulator_bulk_data regulators[2]; 140 175 struct i2c_client *client; ··· 191 152 int64_t timestamp; 192 153 enum kx_chipset chipset; 193 154 enum kx_acpi_type acpi_type; 155 + const struct kx_chipset_regs *regs; 194 156 }; 195 157 196 158 enum kxcjk1013_axis { ··· 349 309 { 350 310 int ret; 351 311 352 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 312 + ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 353 313 if (ret < 0) { 354 314 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 355 315 return ret; ··· 360 320 else 361 321 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 362 322 363 - ret = i2c_smbus_write_byte_data(data->client, 364 - KXCJK1013_REG_CTRL1, ret); 323 + ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 365 324 if (ret < 0) { 366 325 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 367 326 return ret; ··· 374 335 { 375 336 int ret; 376 337 377 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 338 + ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 378 339 if (ret < 0) { 379 340 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 380 341 return ret; ··· 392 353 { 393 354 int ret; 394 355 395 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 356 + ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 396 357 if (ret < 0) { 397 358 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 398 359 return ret; ··· 403 364 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 404 365 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 405 366 406 - ret = i2c_smbus_write_byte_data(data->client, 407 - KXCJK1013_REG_CTRL1, 408 - ret); 367 + ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 409 368 if (ret < 0) { 410 369 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 411 370 return ret; ··· 437 400 if (ret < 0) 438 401 return ret; 439 402 440 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 403 + ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 441 404 if (ret < 0) { 442 405 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 443 406 return ret; ··· 446 409 /* Set 12 bit mode */ 447 410 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 448 411 449 - ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL1, 450 - ret); 412 + ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 451 413 if (ret < 0) { 452 414 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 453 415 return ret; ··· 457 421 if (ret < 0) 458 422 return ret; 459 423 460 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_DATA_CTRL); 424 + ret = i2c_smbus_read_byte_data(data->client, data->regs->data_ctrl); 461 425 if (ret < 0) { 462 426 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 463 427 return ret; ··· 466 430 data->odr_bits = ret; 467 431 468 432 /* Set up INT polarity */ 469 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 433 + ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 470 434 if (ret < 0) { 471 435 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 472 436 return ret; ··· 477 441 else 478 442 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA; 479 443 480 - ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 481 - ret); 444 + ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 482 445 if (ret < 0) { 483 446 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 484 447 return ret; ··· 532 497 533 498 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 534 499 { 535 - int waketh_reg, ret; 500 + int ret; 536 501 537 - ret = i2c_smbus_write_byte_data(data->client, 538 - KXCJK1013_REG_WAKE_TIMER, 502 + ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_timer, 539 503 data->wake_dur); 540 504 if (ret < 0) { 541 505 dev_err(&data->client->dev, ··· 542 508 return ret; 543 509 } 544 510 545 - waketh_reg = data->chipset == KXTF9 ? 546 - KXTF9_REG_WAKE_THRESH : KXCJK1013_REG_WAKE_THRES; 547 - ret = i2c_smbus_write_byte_data(data->client, waketh_reg, 511 + ret = i2c_smbus_write_byte_data(data->client, data->regs->wake_thres, 548 512 data->wake_thres); 549 513 if (ret < 0) { 550 514 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); ··· 571 539 if (ret < 0) 572 540 return ret; 573 541 574 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 542 + ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 575 543 if (ret < 0) { 576 544 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 577 545 return ret; ··· 582 550 else 583 551 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 584 552 585 - ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 586 - ret); 553 + ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 587 554 if (ret < 0) { 588 555 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 589 556 return ret; 590 557 } 591 558 592 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 559 + ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 593 560 if (ret < 0) { 594 561 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 595 562 return ret; ··· 599 568 else 600 569 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 601 570 602 - ret = i2c_smbus_write_byte_data(data->client, 603 - KXCJK1013_REG_CTRL1, ret); 571 + ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 604 572 if (ret < 0) { 605 573 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 606 574 return ret; ··· 629 599 if (ret < 0) 630 600 return ret; 631 601 632 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_CTRL1); 602 + ret = i2c_smbus_read_byte_data(data->client, data->regs->int_ctrl1); 633 603 if (ret < 0) { 634 604 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 635 605 return ret; ··· 640 610 else 641 611 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 642 612 643 - ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_INT_CTRL1, 644 - ret); 613 + ret = i2c_smbus_write_byte_data(data->client, data->regs->int_ctrl1, ret); 645 614 if (ret < 0) { 646 615 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 647 616 return ret; 648 617 } 649 618 650 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_CTRL1); 619 + ret = i2c_smbus_read_byte_data(data->client, data->regs->ctrl1); 651 620 if (ret < 0) { 652 621 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 653 622 return ret; ··· 657 628 else 658 629 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 659 630 660 - ret = i2c_smbus_write_byte_data(data->client, 661 - KXCJK1013_REG_CTRL1, ret); 631 + ret = i2c_smbus_write_byte_data(data->client, data->regs->ctrl1, ret); 662 632 if (ret < 0) { 663 633 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 664 634 return ret; ··· 729 701 if (ret < 0) 730 702 return ret; 731 703 732 - ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_DATA_CTRL, 704 + ret = i2c_smbus_write_byte_data(data->client, data->regs->data_ctrl, 733 705 odr_setting->odr_bits); 734 706 if (ret < 0) { 735 707 dev_err(&data->client->dev, "Error writing data_ctrl\n"); ··· 738 710 739 711 data->odr_bits = odr_setting->odr_bits; 740 712 741 - ret = i2c_smbus_write_byte_data(data->client, KXCJK1013_REG_CTRL2, 713 + ret = i2c_smbus_write_byte_data(data->client, data->regs->wuf_ctrl, 742 714 odr_setting->wuf_bits); 743 715 if (ret < 0) { 744 716 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); ··· 1141 1113 struct kxcjk1013_data *data = iio_priv(indio_dev); 1142 1114 int ret; 1143 1115 1144 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); 1116 + ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel); 1145 1117 if (ret < 0) 1146 1118 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1147 1119 } ··· 1194 1166 { 1195 1167 struct kxcjk1013_data *data = iio_priv(indio_dev); 1196 1168 1197 - int ret = i2c_smbus_read_byte_data(data->client, 1198 - KXCJK1013_REG_INT_SRC2); 1169 + int ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src2); 1199 1170 if (ret < 0) { 1200 1171 dev_err(&data->client->dev, "Error reading reg_int_src2\n"); 1201 1172 return; ··· 1261 1234 struct kxcjk1013_data *data = iio_priv(indio_dev); 1262 1235 int ret; 1263 1236 1264 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_SRC1); 1237 + ret = i2c_smbus_read_byte_data(data->client, data->regs->int_src1); 1265 1238 if (ret < 0) { 1266 1239 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 1267 1240 goto ack_intr; ··· 1284 1257 if (data->dready_trigger_on) 1285 1258 return IRQ_HANDLED; 1286 1259 1287 - ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_INT_REL); 1260 + ret = i2c_smbus_read_byte_data(data->client, data->regs->int_rel); 1288 1261 if (ret < 0) 1289 1262 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1290 1263 ··· 1404 1377 &indio_dev->label); 1405 1378 } else 1406 1379 return -ENODEV; 1380 + 1381 + switch (data->chipset) { 1382 + case KXCJK1013: 1383 + case KXCJ91008: 1384 + case KXTJ21009: 1385 + data->regs = &kxcjk1013_regs; 1386 + break; 1387 + case KXTF9: 1388 + data->regs = &kxtf9_regs; 1389 + break; 1390 + default: 1391 + return -EINVAL; 1392 + } 1407 1393 1408 1394 ret = kxcjk1013_chip_init(data); 1409 1395 if (ret < 0)