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kernel os linux

hpet: hpet driver periodic timer setup bug fixes

The periodic interrupt from drivers/char/hpet.c does not work correctly,
both when using the periodic capability of the hardware and while
emulating the periodic interrupt (when hardware does not support periodic
mode).

With timers capable of periodic interrupts, the comparator field is first
set with the period value followed by set of hidden accumulator, which has
the side effect of overwriting the comparator value. This results in
wrong periodicity for the interrupts. For, periodic interrupts to work,
following steps are necessary, in that order.

* Set config with Tn_VAL_SET_CNF bit

* Write to hidden accumulator, the value written is the time when the
first interrupt should be generated

* Write compartor with period interval for subsequent interrupts
(http://www.intel.com/hardwaredesign/hpetspec_1.pdf )

When emulating periodic timer with timers not capable of periodic
interrupt, driver is adding the period to counter value instead of
comparator value, which causes slow drift when using this emulation.

Also, driver seems to add hpetp->hp_delta both while setting up periodic
interrupt and while emulating periodic interrupts with timers not capable
of doing periodic interrupts. This hp_delta will result in slower than
expected interrupt rate and should not be used while setting the interval.

Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Nils Carlson <nils.carlson@ericsson.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Nils Carlson and committed by
Linus Torvalds
ae21cf92 dc80df56

+12 -9
+12 -9
drivers/char/hpet.c
··· 166 166 unsigned long m, t; 167 167 168 168 t = devp->hd_ireqfreq; 169 - m = read_counter(&devp->hd_hpet->hpet_mc); 170 - write_counter(t + m + devp->hd_hpets->hp_delta, 171 - &devp->hd_timer->hpet_compare); 169 + m = read_counter(&devp->hd_timer->hpet_compare); 170 + write_counter(t + m, &devp->hd_timer->hpet_compare); 172 171 } 173 172 174 173 if (devp->hd_flags & HPET_SHARED_IRQ) ··· 503 504 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; 504 505 505 506 if (devp->hd_flags & HPET_PERIODIC) { 506 - write_counter(t, &timer->hpet_compare); 507 507 g |= Tn_TYPE_CNF_MASK; 508 - v |= Tn_TYPE_CNF_MASK; 509 - writeq(v, &timer->hpet_config); 510 - v |= Tn_VAL_SET_CNF_MASK; 508 + v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; 511 509 writeq(v, &timer->hpet_config); 512 510 local_irq_save(flags); 513 511 514 - /* NOTE: what we modify here is a hidden accumulator 512 + /* 513 + * NOTE: First we modify the hidden accumulator 515 514 * register supported by periodic-capable comparators. 516 515 * We never want to modify the (single) counter; that 517 - * would affect all the comparators. 516 + * would affect all the comparators. The value written 517 + * is the counter value when the first interrupt is due. 518 518 */ 519 519 m = read_counter(&hpet->hpet_mc); 520 520 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); 521 + /* 522 + * Then we modify the comparator, indicating the period 523 + * for subsequent interrupt. 524 + */ 525 + write_counter(t, &timer->hpet_compare); 521 526 } else { 522 527 local_irq_save(flags); 523 528 m = read_counter(&hpet->hpet_mc);