Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: exynos: move exynos-bus nodes out of soc in Exynos4412

The soc node is supposed to have only device nodes with MMIO addresses,
as reported by dtc W=1:

exynos4412.dtsi:407.20-413.5:
Warning (simple_bus_reg): /soc/bus-acp: missing or empty reg/ranges property

and dtbs_check:

exynos4412-i9300.dtb: soc: bus-acp:
{'compatible': ['samsung,exynos-bus'], 'clocks': [[7, 456]], 'clock-names': ['bus'], 'operating-points-v2': [[132]], 'status': ['okay'], 'devfreq': [[117]]} should not be valid under {'type': 'object'}

Move the bus nodes and their OPP tables out of SoC to fix this.
Re-order them alphabetically while moving and put some of the OPP tables
in device nodes (if they are not shared).

Link: https://lore.kernel.org/r/20230125094513.155063-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

+175 -176
+175 -176
arch/arm/boot/dts/exynos4412.dtsi
··· 31 31 mshc0 = &mshc_0; 32 32 }; 33 33 34 + bus_acp: bus-acp { 35 + compatible = "samsung,exynos-bus"; 36 + clocks = <&clock CLK_DIV_ACP>; 37 + clock-names = "bus"; 38 + operating-points-v2 = <&bus_acp_opp_table>; 39 + status = "disabled"; 40 + 41 + bus_acp_opp_table: opp-table { 42 + compatible = "operating-points-v2"; 43 + 44 + opp-100000000 { 45 + opp-hz = /bits/ 64 <100000000>; 46 + }; 47 + opp-134000000 { 48 + opp-hz = /bits/ 64 <134000000>; 49 + }; 50 + opp-160000000 { 51 + opp-hz = /bits/ 64 <160000000>; 52 + }; 53 + opp-267000000 { 54 + opp-hz = /bits/ 64 <267000000>; 55 + }; 56 + }; 57 + }; 58 + 59 + bus_c2c: bus-c2c { 60 + compatible = "samsung,exynos-bus"; 61 + clocks = <&clock CLK_DIV_C2C>; 62 + clock-names = "bus"; 63 + operating-points-v2 = <&bus_dmc_opp_table>; 64 + status = "disabled"; 65 + }; 66 + 67 + bus_dmc: bus-dmc { 68 + compatible = "samsung,exynos-bus"; 69 + clocks = <&clock CLK_DIV_DMC>; 70 + clock-names = "bus"; 71 + operating-points-v2 = <&bus_dmc_opp_table>; 72 + samsung,data-clock-ratio = <4>; 73 + #interconnect-cells = <0>; 74 + status = "disabled"; 75 + }; 76 + 77 + bus_display: bus-display { 78 + compatible = "samsung,exynos-bus"; 79 + clocks = <&clock CLK_ACLK160>; 80 + clock-names = "bus"; 81 + operating-points-v2 = <&bus_display_opp_table>; 82 + interconnects = <&bus_leftbus &bus_dmc>; 83 + #interconnect-cells = <0>; 84 + status = "disabled"; 85 + 86 + bus_display_opp_table: opp-table { 87 + compatible = "operating-points-v2"; 88 + 89 + opp-160000000 { 90 + opp-hz = /bits/ 64 <160000000>; 91 + }; 92 + opp-200000000 { 93 + opp-hz = /bits/ 64 <200000000>; 94 + }; 95 + }; 96 + }; 97 + 98 + bus_fsys: bus-fsys { 99 + compatible = "samsung,exynos-bus"; 100 + clocks = <&clock CLK_ACLK133>; 101 + clock-names = "bus"; 102 + operating-points-v2 = <&bus_fsys_opp_table>; 103 + status = "disabled"; 104 + 105 + bus_fsys_opp_table: opp-table { 106 + compatible = "operating-points-v2"; 107 + 108 + opp-100000000 { 109 + opp-hz = /bits/ 64 <100000000>; 110 + }; 111 + opp-134000000 { 112 + opp-hz = /bits/ 64 <134000000>; 113 + }; 114 + }; 115 + }; 116 + 117 + bus_leftbus: bus-leftbus { 118 + compatible = "samsung,exynos-bus"; 119 + clocks = <&clock CLK_DIV_GDL>; 120 + clock-names = "bus"; 121 + operating-points-v2 = <&bus_leftbus_opp_table>; 122 + interconnects = <&bus_dmc>; 123 + #interconnect-cells = <0>; 124 + status = "disabled"; 125 + }; 126 + 127 + bus_mfc: bus-mfc { 128 + compatible = "samsung,exynos-bus"; 129 + clocks = <&clock CLK_SCLK_MFC>; 130 + clock-names = "bus"; 131 + operating-points-v2 = <&bus_leftbus_opp_table>; 132 + status = "disabled"; 133 + }; 134 + 135 + bus_peri: bus-peri { 136 + compatible = "samsung,exynos-bus"; 137 + clocks = <&clock CLK_ACLK100>; 138 + clock-names = "bus"; 139 + operating-points-v2 = <&bus_peri_opp_table>; 140 + status = "disabled"; 141 + 142 + bus_peri_opp_table: opp-table { 143 + compatible = "operating-points-v2"; 144 + 145 + opp-50000000 { 146 + opp-hz = /bits/ 64 <50000000>; 147 + }; 148 + opp-100000000 { 149 + opp-hz = /bits/ 64 <100000000>; 150 + }; 151 + }; 152 + }; 153 + 154 + bus_rightbus: bus-rightbus { 155 + compatible = "samsung,exynos-bus"; 156 + clocks = <&clock CLK_DIV_GDR>; 157 + clock-names = "bus"; 158 + operating-points-v2 = <&bus_leftbus_opp_table>; 159 + status = "disabled"; 160 + }; 161 + 34 162 cpus { 35 163 #address-cells = <1>; 36 164 #size-cells = <0>; ··· 299 171 }; 300 172 }; 301 173 174 + bus_dmc_opp_table: opp-table-1 { 175 + compatible = "operating-points-v2"; 176 + 177 + opp-100000000 { 178 + opp-hz = /bits/ 64 <100000000>; 179 + opp-microvolt = <900000>; 180 + }; 181 + opp-134000000 { 182 + opp-hz = /bits/ 64 <134000000>; 183 + opp-microvolt = <900000>; 184 + }; 185 + opp-160000000 { 186 + opp-hz = /bits/ 64 <160000000>; 187 + opp-microvolt = <900000>; 188 + }; 189 + opp-267000000 { 190 + opp-hz = /bits/ 64 <267000000>; 191 + opp-microvolt = <950000>; 192 + }; 193 + opp-400000000 { 194 + opp-hz = /bits/ 64 <400000000>; 195 + opp-microvolt = <1050000>; 196 + opp-suspend; 197 + }; 198 + }; 199 + 200 + bus_leftbus_opp_table: opp-table-2 { 201 + compatible = "operating-points-v2"; 202 + 203 + opp-100000000 { 204 + opp-hz = /bits/ 64 <100000000>; 205 + opp-microvolt = <900000>; 206 + }; 207 + opp-134000000 { 208 + opp-hz = /bits/ 64 <134000000>; 209 + opp-microvolt = <925000>; 210 + }; 211 + opp-160000000 { 212 + opp-hz = /bits/ 64 <160000000>; 213 + opp-microvolt = <950000>; 214 + }; 215 + opp-200000000 { 216 + opp-hz = /bits/ 64 <200000000>; 217 + opp-microvolt = <1000000>; 218 + opp-suspend; 219 + }; 220 + }; 302 221 303 222 soc: soc { 304 223 ··· 567 392 clocks = <&isp_clock CLK_ISP_SMMU_LITE1>, 568 393 <&isp_clock CLK_ISP_FIMC_LITE1>; 569 394 #iommu-cells = <0>; 570 - }; 571 - 572 - bus_dmc: bus-dmc { 573 - compatible = "samsung,exynos-bus"; 574 - clocks = <&clock CLK_DIV_DMC>; 575 - clock-names = "bus"; 576 - operating-points-v2 = <&bus_dmc_opp_table>; 577 - samsung,data-clock-ratio = <4>; 578 - #interconnect-cells = <0>; 579 - status = "disabled"; 580 - }; 581 - 582 - bus_acp: bus-acp { 583 - compatible = "samsung,exynos-bus"; 584 - clocks = <&clock CLK_DIV_ACP>; 585 - clock-names = "bus"; 586 - operating-points-v2 = <&bus_acp_opp_table>; 587 - status = "disabled"; 588 - }; 589 - 590 - bus_c2c: bus-c2c { 591 - compatible = "samsung,exynos-bus"; 592 - clocks = <&clock CLK_DIV_C2C>; 593 - clock-names = "bus"; 594 - operating-points-v2 = <&bus_dmc_opp_table>; 595 - status = "disabled"; 596 - }; 597 - 598 - bus_dmc_opp_table: opp-table-1 { 599 - compatible = "operating-points-v2"; 600 - 601 - opp-100000000 { 602 - opp-hz = /bits/ 64 <100000000>; 603 - opp-microvolt = <900000>; 604 - }; 605 - opp-134000000 { 606 - opp-hz = /bits/ 64 <134000000>; 607 - opp-microvolt = <900000>; 608 - }; 609 - opp-160000000 { 610 - opp-hz = /bits/ 64 <160000000>; 611 - opp-microvolt = <900000>; 612 - }; 613 - opp-267000000 { 614 - opp-hz = /bits/ 64 <267000000>; 615 - opp-microvolt = <950000>; 616 - }; 617 - opp-400000000 { 618 - opp-hz = /bits/ 64 <400000000>; 619 - opp-microvolt = <1050000>; 620 - opp-suspend; 621 - }; 622 - }; 623 - 624 - bus_acp_opp_table: opp-table-2 { 625 - compatible = "operating-points-v2"; 626 - 627 - opp-100000000 { 628 - opp-hz = /bits/ 64 <100000000>; 629 - }; 630 - opp-134000000 { 631 - opp-hz = /bits/ 64 <134000000>; 632 - }; 633 - opp-160000000 { 634 - opp-hz = /bits/ 64 <160000000>; 635 - }; 636 - opp-267000000 { 637 - opp-hz = /bits/ 64 <267000000>; 638 - }; 639 - }; 640 - 641 - bus_leftbus: bus-leftbus { 642 - compatible = "samsung,exynos-bus"; 643 - clocks = <&clock CLK_DIV_GDL>; 644 - clock-names = "bus"; 645 - operating-points-v2 = <&bus_leftbus_opp_table>; 646 - interconnects = <&bus_dmc>; 647 - #interconnect-cells = <0>; 648 - status = "disabled"; 649 - }; 650 - 651 - bus_rightbus: bus-rightbus { 652 - compatible = "samsung,exynos-bus"; 653 - clocks = <&clock CLK_DIV_GDR>; 654 - clock-names = "bus"; 655 - operating-points-v2 = <&bus_leftbus_opp_table>; 656 - status = "disabled"; 657 - }; 658 - 659 - bus_display: bus-display { 660 - compatible = "samsung,exynos-bus"; 661 - clocks = <&clock CLK_ACLK160>; 662 - clock-names = "bus"; 663 - operating-points-v2 = <&bus_display_opp_table>; 664 - interconnects = <&bus_leftbus &bus_dmc>; 665 - #interconnect-cells = <0>; 666 - status = "disabled"; 667 - }; 668 - 669 - bus_fsys: bus-fsys { 670 - compatible = "samsung,exynos-bus"; 671 - clocks = <&clock CLK_ACLK133>; 672 - clock-names = "bus"; 673 - operating-points-v2 = <&bus_fsys_opp_table>; 674 - status = "disabled"; 675 - }; 676 - 677 - bus_peri: bus-peri { 678 - compatible = "samsung,exynos-bus"; 679 - clocks = <&clock CLK_ACLK100>; 680 - clock-names = "bus"; 681 - operating-points-v2 = <&bus_peri_opp_table>; 682 - status = "disabled"; 683 - }; 684 - 685 - bus_mfc: bus-mfc { 686 - compatible = "samsung,exynos-bus"; 687 - clocks = <&clock CLK_SCLK_MFC>; 688 - clock-names = "bus"; 689 - operating-points-v2 = <&bus_leftbus_opp_table>; 690 - status = "disabled"; 691 - }; 692 - 693 - bus_leftbus_opp_table: opp-table-3 { 694 - compatible = "operating-points-v2"; 695 - 696 - opp-100000000 { 697 - opp-hz = /bits/ 64 <100000000>; 698 - opp-microvolt = <900000>; 699 - }; 700 - opp-134000000 { 701 - opp-hz = /bits/ 64 <134000000>; 702 - opp-microvolt = <925000>; 703 - }; 704 - opp-160000000 { 705 - opp-hz = /bits/ 64 <160000000>; 706 - opp-microvolt = <950000>; 707 - }; 708 - opp-200000000 { 709 - opp-hz = /bits/ 64 <200000000>; 710 - opp-microvolt = <1000000>; 711 - opp-suspend; 712 - }; 713 - }; 714 - 715 - bus_display_opp_table: opp-table-4 { 716 - compatible = "operating-points-v2"; 717 - 718 - opp-160000000 { 719 - opp-hz = /bits/ 64 <160000000>; 720 - }; 721 - opp-200000000 { 722 - opp-hz = /bits/ 64 <200000000>; 723 - }; 724 - }; 725 - 726 - bus_fsys_opp_table: opp-table-5 { 727 - compatible = "operating-points-v2"; 728 - 729 - opp-100000000 { 730 - opp-hz = /bits/ 64 <100000000>; 731 - }; 732 - opp-134000000 { 733 - opp-hz = /bits/ 64 <134000000>; 734 - }; 735 - }; 736 - 737 - bus_peri_opp_table: opp-table-6 { 738 - compatible = "operating-points-v2"; 739 - 740 - opp-50000000 { 741 - opp-hz = /bits/ 64 <50000000>; 742 - }; 743 - opp-100000000 { 744 - opp-hz = /bits/ 64 <100000000>; 745 - }; 746 395 }; 747 396 }; 748 397 };