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linux
selftests/bpf: verifier/masking.c converted to inline assembly
Test verifier/masking.c automatically converted to use inline assembly.
Signed-off-by: Eduard Zingerman <eddyz87@gmail.com>
Link: https://lore.kernel.org/r/20230325025524.144043-30-eddyz87@gmail.com
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
authored by
Eduard Zingerman
and committed by
Alexei Starovoitov
ade3f08f
05e474ec
+412
-322
+2
tools/testing/selftests/bpf/prog_tests/verifier.c
+2
tools/testing/selftests/bpf/prog_tests/verifier.c
···
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#include "verifier_leak_ptr.skel.h"
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#include "verifier_map_ptr.skel.h"
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#include "verifier_map_ret_val.skel.h"
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#include "verifier_masking.skel.h"
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__maybe_unused
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static void run_tests_aux(const char *skel_name, skel_elf_bytes_fn elf_bytes_factory)
···
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void test_verifier_leak_ptr(void) { RUN(verifier_leak_ptr); }
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void test_verifier_map_ptr(void) { RUN(verifier_map_ptr); }
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void test_verifier_map_ret_val(void) { RUN(verifier_map_ret_val); }
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void test_verifier_masking(void) { RUN(verifier_masking); }
+410
tools/testing/selftests/bpf/progs/verifier_masking.c
+410
tools/testing/selftests/bpf/progs/verifier_masking.c
···
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// SPDX-License-Identifier: GPL-2.0
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/* Converted from tools/testing/selftests/bpf/verifier/masking.c */
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#include <linux/bpf.h>
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#include <bpf/bpf_helpers.h>
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#include "bpf_misc.h"
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SEC("socket")
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__description("masking, test out of bounds 1")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_1(void)
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{
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asm volatile (" \
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w1 = 5; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 5 - 1)
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: __clobber_all);
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}
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+
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SEC("socket")
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__description("masking, test out of bounds 2")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_2(void)
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{
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asm volatile (" \
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w1 = 1; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 1 - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 3")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_3(void)
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{
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asm volatile (" \
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w1 = 0xffffffff; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 0xffffffff - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 4")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_4(void)
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{
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asm volatile (" \
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w1 = 0xffffffff; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 1 - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 5")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_5(void)
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{
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asm volatile (" \
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w1 = -1; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 1 - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 6")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_6(void)
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{
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asm volatile (" \
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w1 = -1; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 0xffffffff - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 7")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_7(void)
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{
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asm volatile (" \
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r1 = 5; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 5 - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 8")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_8(void)
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{
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asm volatile (" \
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r1 = 1; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 1 - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 9")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_9(void)
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{
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asm volatile (" \
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r1 = 0xffffffff; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 0xffffffff - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 10")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_10(void)
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{
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asm volatile (" \
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r1 = 0xffffffff; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 1 - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 11")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_11(void)
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{
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asm volatile (" \
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r1 = -1; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 1 - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test out of bounds 12")
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__success __success_unpriv __retval(0)
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__naked void test_out_of_bounds_12(void)
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{
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asm volatile (" \
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r1 = -1; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 0xffffffff - 1)
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: __clobber_all);
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}
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+
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SEC("socket")
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__description("masking, test in bounds 1")
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__success __success_unpriv __retval(4)
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__naked void masking_test_in_bounds_1(void)
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{
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asm volatile (" \
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w1 = 4; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 5 - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test in bounds 2")
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__success __success_unpriv __retval(0)
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__naked void masking_test_in_bounds_2(void)
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{
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asm volatile (" \
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w1 = 0; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 0xffffffff - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test in bounds 3")
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__success __success_unpriv __retval(0xfffffffe)
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__naked void masking_test_in_bounds_3(void)
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{
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asm volatile (" \
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w1 = 0xfffffffe; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
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r1 &= r2; \
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r0 = r1; \
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exit; \
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" :
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: __imm_const(__imm_0, 0xffffffff - 1)
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: __clobber_all);
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}
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SEC("socket")
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__description("masking, test in bounds 4")
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__success __success_unpriv __retval(0xabcde)
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__naked void masking_test_in_bounds_4(void)
312
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{
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asm volatile (" \
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w1 = 0xabcde; \
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w2 = %[__imm_0]; \
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r2 -= r1; \
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r2 |= r1; \
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r2 = -r2; \
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r2 s>>= 63; \
320
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r1 &= r2; \
321
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r0 = r1; \
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+
exit; \
323
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" :
324
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: __imm_const(__imm_0, 0xabcdef - 1)
325
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: __clobber_all);
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+
}
327
+
328
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SEC("socket")
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__description("masking, test in bounds 5")
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__success __success_unpriv __retval(0)
331
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__naked void masking_test_in_bounds_5(void)
332
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{
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asm volatile (" \
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w1 = 0; \
335
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w2 = %[__imm_0]; \
336
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r2 -= r1; \
337
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r2 |= r1; \
338
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r2 = -r2; \
339
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r2 s>>= 63; \
340
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r1 &= r2; \
341
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r0 = r1; \
342
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exit; \
343
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" :
344
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: __imm_const(__imm_0, 1 - 1)
345
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: __clobber_all);
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}
347
+
348
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SEC("socket")
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__description("masking, test in bounds 6")
350
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__success __success_unpriv __retval(46)
351
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__naked void masking_test_in_bounds_6(void)
352
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{
353
+
asm volatile (" \
354
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w1 = 46; \
355
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w2 = %[__imm_0]; \
356
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r2 -= r1; \
357
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r2 |= r1; \
358
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r2 = -r2; \
359
+
r2 s>>= 63; \
360
+
r1 &= r2; \
361
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r0 = r1; \
362
+
exit; \
363
+
" :
364
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: __imm_const(__imm_0, 47 - 1)
365
+
: __clobber_all);
366
+
}
367
+
368
+
SEC("socket")
369
+
__description("masking, test in bounds 7")
370
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__success __success_unpriv __retval(46)
371
+
__naked void masking_test_in_bounds_7(void)
372
+
{
373
+
asm volatile (" \
374
+
r3 = -46; \
375
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r3 *= -1; \
376
+
w2 = %[__imm_0]; \
377
+
r2 -= r3; \
378
+
r2 |= r3; \
379
+
r2 = -r2; \
380
+
r2 s>>= 63; \
381
+
r3 &= r2; \
382
+
r0 = r3; \
383
+
exit; \
384
+
" :
385
+
: __imm_const(__imm_0, 47 - 1)
386
+
: __clobber_all);
387
+
}
388
+
389
+
SEC("socket")
390
+
__description("masking, test in bounds 8")
391
+
__success __success_unpriv __retval(0)
392
+
__naked void masking_test_in_bounds_8(void)
393
+
{
394
+
asm volatile (" \
395
+
r3 = -47; \
396
+
r3 *= -1; \
397
+
w2 = %[__imm_0]; \
398
+
r2 -= r3; \
399
+
r2 |= r3; \
400
+
r2 = -r2; \
401
+
r2 s>>= 63; \
402
+
r3 &= r2; \
403
+
r0 = r3; \
404
+
exit; \
405
+
" :
406
+
: __imm_const(__imm_0, 47 - 1)
407
+
: __clobber_all);
408
+
}
409
+
410
+
char _license[] SEC("license") = "GPL";
-322
tools/testing/selftests/bpf/verifier/masking.c
-322
tools/testing/selftests/bpf/verifier/masking.c
···
1
-
{
2
-
"masking, test out of bounds 1",
3
-
.insns = {
4
-
BPF_MOV32_IMM(BPF_REG_1, 5),
5
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BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
6
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
7
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BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
8
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
9
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BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
10
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
11
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
12
-
BPF_EXIT_INSN(),
13
-
},
14
-
.result = ACCEPT,
15
-
.retval = 0,
16
-
},
17
-
{
18
-
"masking, test out of bounds 2",
19
-
.insns = {
20
-
BPF_MOV32_IMM(BPF_REG_1, 1),
21
-
BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
22
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BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
23
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
24
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
25
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
26
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BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
27
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BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
28
-
BPF_EXIT_INSN(),
29
-
},
30
-
.result = ACCEPT,
31
-
.retval = 0,
32
-
},
33
-
{
34
-
"masking, test out of bounds 3",
35
-
.insns = {
36
-
BPF_MOV32_IMM(BPF_REG_1, 0xffffffff),
37
-
BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
38
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
39
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
40
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BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
41
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
42
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
43
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
44
-
BPF_EXIT_INSN(),
45
-
},
46
-
.result = ACCEPT,
47
-
.retval = 0,
48
-
},
49
-
{
50
-
"masking, test out of bounds 4",
51
-
.insns = {
52
-
BPF_MOV32_IMM(BPF_REG_1, 0xffffffff),
53
-
BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
54
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
55
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
56
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
57
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
58
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
59
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
60
-
BPF_EXIT_INSN(),
61
-
},
62
-
.result = ACCEPT,
63
-
.retval = 0,
64
-
},
65
-
{
66
-
"masking, test out of bounds 5",
67
-
.insns = {
68
-
BPF_MOV32_IMM(BPF_REG_1, -1),
69
-
BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
70
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
71
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
72
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
73
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
74
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
75
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
76
-
BPF_EXIT_INSN(),
77
-
},
78
-
.result = ACCEPT,
79
-
.retval = 0,
80
-
},
81
-
{
82
-
"masking, test out of bounds 6",
83
-
.insns = {
84
-
BPF_MOV32_IMM(BPF_REG_1, -1),
85
-
BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
86
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
87
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
88
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
89
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
90
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
91
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
92
-
BPF_EXIT_INSN(),
93
-
},
94
-
.result = ACCEPT,
95
-
.retval = 0,
96
-
},
97
-
{
98
-
"masking, test out of bounds 7",
99
-
.insns = {
100
-
BPF_MOV64_IMM(BPF_REG_1, 5),
101
-
BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
102
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
103
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
104
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
105
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
106
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
107
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
108
-
BPF_EXIT_INSN(),
109
-
},
110
-
.result = ACCEPT,
111
-
.retval = 0,
112
-
},
113
-
{
114
-
"masking, test out of bounds 8",
115
-
.insns = {
116
-
BPF_MOV64_IMM(BPF_REG_1, 1),
117
-
BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
118
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
119
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
120
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
121
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
122
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
123
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
124
-
BPF_EXIT_INSN(),
125
-
},
126
-
.result = ACCEPT,
127
-
.retval = 0,
128
-
},
129
-
{
130
-
"masking, test out of bounds 9",
131
-
.insns = {
132
-
BPF_MOV64_IMM(BPF_REG_1, 0xffffffff),
133
-
BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
134
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
135
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
136
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
137
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
138
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
139
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
140
-
BPF_EXIT_INSN(),
141
-
},
142
-
.result = ACCEPT,
143
-
.retval = 0,
144
-
},
145
-
{
146
-
"masking, test out of bounds 10",
147
-
.insns = {
148
-
BPF_MOV64_IMM(BPF_REG_1, 0xffffffff),
149
-
BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
150
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
151
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
152
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
153
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
154
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
155
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
156
-
BPF_EXIT_INSN(),
157
-
},
158
-
.result = ACCEPT,
159
-
.retval = 0,
160
-
},
161
-
{
162
-
"masking, test out of bounds 11",
163
-
.insns = {
164
-
BPF_MOV64_IMM(BPF_REG_1, -1),
165
-
BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
166
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
167
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
168
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
169
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
170
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
171
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
172
-
BPF_EXIT_INSN(),
173
-
},
174
-
.result = ACCEPT,
175
-
.retval = 0,
176
-
},
177
-
{
178
-
"masking, test out of bounds 12",
179
-
.insns = {
180
-
BPF_MOV64_IMM(BPF_REG_1, -1),
181
-
BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
182
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
183
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
184
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
185
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
186
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
187
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
188
-
BPF_EXIT_INSN(),
189
-
},
190
-
.result = ACCEPT,
191
-
.retval = 0,
192
-
},
193
-
{
194
-
"masking, test in bounds 1",
195
-
.insns = {
196
-
BPF_MOV32_IMM(BPF_REG_1, 4),
197
-
BPF_MOV32_IMM(BPF_REG_2, 5 - 1),
198
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
199
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
200
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
201
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
202
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
203
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
204
-
BPF_EXIT_INSN(),
205
-
},
206
-
.result = ACCEPT,
207
-
.retval = 4,
208
-
},
209
-
{
210
-
"masking, test in bounds 2",
211
-
.insns = {
212
-
BPF_MOV32_IMM(BPF_REG_1, 0),
213
-
BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
214
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
215
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
216
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
217
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
218
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
219
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
220
-
BPF_EXIT_INSN(),
221
-
},
222
-
.result = ACCEPT,
223
-
.retval = 0,
224
-
},
225
-
{
226
-
"masking, test in bounds 3",
227
-
.insns = {
228
-
BPF_MOV32_IMM(BPF_REG_1, 0xfffffffe),
229
-
BPF_MOV32_IMM(BPF_REG_2, 0xffffffff - 1),
230
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
231
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
232
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
233
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
234
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
235
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
236
-
BPF_EXIT_INSN(),
237
-
},
238
-
.result = ACCEPT,
239
-
.retval = 0xfffffffe,
240
-
},
241
-
{
242
-
"masking, test in bounds 4",
243
-
.insns = {
244
-
BPF_MOV32_IMM(BPF_REG_1, 0xabcde),
245
-
BPF_MOV32_IMM(BPF_REG_2, 0xabcdef - 1),
246
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
247
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
248
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
249
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
250
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
251
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
252
-
BPF_EXIT_INSN(),
253
-
},
254
-
.result = ACCEPT,
255
-
.retval = 0xabcde,
256
-
},
257
-
{
258
-
"masking, test in bounds 5",
259
-
.insns = {
260
-
BPF_MOV32_IMM(BPF_REG_1, 0),
261
-
BPF_MOV32_IMM(BPF_REG_2, 1 - 1),
262
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
263
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
264
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
265
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
266
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
267
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
268
-
BPF_EXIT_INSN(),
269
-
},
270
-
.result = ACCEPT,
271
-
.retval = 0,
272
-
},
273
-
{
274
-
"masking, test in bounds 6",
275
-
.insns = {
276
-
BPF_MOV32_IMM(BPF_REG_1, 46),
277
-
BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
278
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_1),
279
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_1),
280
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
281
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
282
-
BPF_ALU64_REG(BPF_AND, BPF_REG_1, BPF_REG_2),
283
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_1),
284
-
BPF_EXIT_INSN(),
285
-
},
286
-
.result = ACCEPT,
287
-
.retval = 46,
288
-
},
289
-
{
290
-
"masking, test in bounds 7",
291
-
.insns = {
292
-
BPF_MOV64_IMM(BPF_REG_3, -46),
293
-
BPF_ALU64_IMM(BPF_MUL, BPF_REG_3, -1),
294
-
BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
295
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_3),
296
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_3),
297
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
298
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
299
-
BPF_ALU64_REG(BPF_AND, BPF_REG_3, BPF_REG_2),
300
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_3),
301
-
BPF_EXIT_INSN(),
302
-
},
303
-
.result = ACCEPT,
304
-
.retval = 46,
305
-
},
306
-
{
307
-
"masking, test in bounds 8",
308
-
.insns = {
309
-
BPF_MOV64_IMM(BPF_REG_3, -47),
310
-
BPF_ALU64_IMM(BPF_MUL, BPF_REG_3, -1),
311
-
BPF_MOV32_IMM(BPF_REG_2, 47 - 1),
312
-
BPF_ALU64_REG(BPF_SUB, BPF_REG_2, BPF_REG_3),
313
-
BPF_ALU64_REG(BPF_OR, BPF_REG_2, BPF_REG_3),
314
-
BPF_ALU64_IMM(BPF_NEG, BPF_REG_2, 0),
315
-
BPF_ALU64_IMM(BPF_ARSH, BPF_REG_2, 63),
316
-
BPF_ALU64_REG(BPF_AND, BPF_REG_3, BPF_REG_2),
317
-
BPF_MOV64_REG(BPF_REG_0, BPF_REG_3),
318
-
BPF_EXIT_INSN(),
319
-
},
320
-
.result = ACCEPT,
321
-
.retval = 0,
322
-
},