tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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pinctrl: tegra: add clfvs function to Tegra114 support

This patch adds the definition for the cldvfs function for Tegra114 pinctrl
support. This is based on work by Pritesh Raithatha.

Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Rhyland Klein and committed by
Linus Walleij ade158eb ea27c396

+17 -5
+17 -5
drivers/pinctrl/pinctrl-tegra114.c
··· 1349 1349 enum tegra_mux { 1350 1350 TEGRA_MUX_BLINK, 1351 1351 TEGRA_MUX_CEC, 1352 + TEGRA_MUX_CLDVFS, 1352 1353 TEGRA_MUX_CLK12, 1353 1354 TEGRA_MUX_CPU, 1354 1355 TEGRA_MUX_DAP, ··· 1431 1430 1432 1431 static const char * const cec_groups[] = { 1433 1432 "hdmi_cec_pee3", 1433 + }; 1434 + 1435 + static const char * const cldvfs_groups[] = { 1436 + "gmi_ad9_ph1", 1437 + "gmi_ad10_ph2", 1438 + "kb_row7_pr7", 1439 + "kb_row8_ps0", 1440 + "dvfs_pwm_px0", 1441 + "dvfs_clk_px2", 1434 1442 }; 1435 1443 1436 1444 static const char * const clk12_groups[] = { ··· 2362 2352 static const struct tegra_function tegra114_functions[] = { 2363 2353 FUNCTION(blink), 2364 2354 FUNCTION(cec), 2355 + FUNCTION(cldvfs), 2365 2356 FUNCTION(clk12), 2366 2357 FUNCTION(cpu), 2367 2358 FUNCTION(dap), ··· 2597 2586 PINGROUP(gmi_ad6_pg6, RSVD1, NAND, GMI, SPI4, RSVD1, 0x3208, N, N, N), 2598 2587 PINGROUP(gmi_ad7_pg7, RSVD1, NAND, GMI, SPI4, RSVD1, 0x320c, N, N, N), 2599 2588 PINGROUP(gmi_ad8_ph0, PWM0, NAND, GMI, DTV, GMI, 0x3210, N, N, N), 2600 - PINGROUP(gmi_ad9_ph1, PWM1, NAND, GMI, RSVD4, GMI, 0x3214, N, N, N), 2601 - PINGROUP(gmi_ad10_ph2, PWM2, NAND, GMI, RSVD4, GMI, 0x3218, N, N, N), 2589 + PINGROUP(gmi_ad9_ph1, PWM1, NAND, GMI, CLDVFS, GMI, 0x3214, N, N, N), 2590 + PINGROUP(gmi_ad10_ph2, PWM2, NAND, GMI, CLDVFS, GMI, 0x3218, N, N, N), 2602 2591 PINGROUP(gmi_ad11_ph3, PWM3, NAND, GMI, USB, GMI, 0x321c, N, N, N), 2603 2592 PINGROUP(gmi_ad12_ph4, SDMMC2, NAND, GMI, RSVD4, RSVD4, 0x3220, N, N, N), 2604 2593 PINGROUP(gmi_ad13_ph5, SDMMC2, NAND, GMI, RSVD4, RSVD4, 0x3224, N, N, N), ··· 2644 2633 PINGROUP(kb_row4_pr4, KBC, DISPLAYA, SPI2, DISPLAYB, KBC, 0x32cc, N, N, N), 2645 2634 PINGROUP(kb_row5_pr5, KBC, DISPLAYA, SPI2, DISPLAYB, KBC, 0x32d0, N, N, N), 2646 2635 PINGROUP(kb_row6_pr6, KBC, DISPLAYA, DISPLAYA_ALT, DISPLAYB, KBC, 0x32d4, N, N, N), 2647 - PINGROUP(kb_row7_pr7, KBC, RSVD2, RSVD3, UARTA, RSVD2, 0x32d8, N, N, N), 2648 - PINGROUP(kb_row8_ps0, KBC, RSVD2, RSVD3, UARTA, RSVD2, 0x32dc, N, N, N), 2636 + PINGROUP(kb_row7_pr7, KBC, RSVD2, CLDVFS, UARTA, RSVD2, 0x32d8, N, N, N), 2637 + PINGROUP(kb_row8_ps0, KBC, RSVD2, CLDVFS, UARTA, RSVD2, 0x32dc, N, N, N), 2649 2638 PINGROUP(kb_row9_ps1, KBC, RSVD2, RSVD3, UARTA, RSVD3, 0x32e0, N, N, N), 2650 2639 PINGROUP(kb_row10_ps2, KBC, RSVD2, RSVD3, UARTA, RSVD3, 0x32e4, N, N, N), 2651 2640 PINGROUP(kb_col0_pq0, KBC, USB, SPI2, EMC_DLL, KBC, 0x32fc, N, N, N), ··· 2674 2663 PINGROUP(dap2_din_pa4, I2S1, HDA, RSVD3, RSVD4, RSVD4, 0x335c, N, N, N), 2675 2664 PINGROUP(dap2_dout_pa5, I2S1, HDA, RSVD3, RSVD4, RSVD4, 0x3360, N, N, N), 2676 2665 PINGROUP(dap2_sclk_pa3, I2S1, HDA, RSVD3, RSVD4, RSVD4, 0x3364, N, N, N), 2677 - PINGROUP(dvfs_pwm_px0, SPI6, RSVD2, RSVD3, RSVD4, RSVD4, 0x3368, N, N, N), 2666 + PINGROUP(dvfs_pwm_px0, SPI6, CLDVFS, RSVD3, RSVD4, RSVD4, 0x3368, N, N, N), 2678 2667 PINGROUP(gpio_x1_aud_px1, SPI6, RSVD2, RSVD3, RSVD4, RSVD4, 0x336c, N, N, N), 2679 2668 PINGROUP(gpio_x3_aud_px3, SPI6, SPI1, RSVD3, RSVD4, RSVD4, 0x3370, N, N, N), 2669 + PINGROUP(dvfs_clk_px2, SPI6, CLDVFS, RSVD3, RSVD4, RSVD4, 0x3374, N, N, N), 2680 2670 PINGROUP(gpio_x4_aud_px4, RSVD1, SPI1, SPI2, DAP2, RSVD1, 0x3378, N, N, N), 2681 2671 PINGROUP(gpio_x5_aud_px5, RSVD1, SPI1, SPI2, RSVD4, RSVD1, 0x337c, N, N, N), 2682 2672 PINGROUP(gpio_x6_aud_px6, SPI6, SPI1, SPI2, RSVD4, RSVD4, 0x3380, N, N, N),