Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: fix incompatible structure layouts

Building the amd display driver with link-time optimizations revealed a bug
that caused dal_cmd_tbl_helper_dce80_get_table() and
dal_cmd_tbl_helper_dce110_get_table() get called with an incompatible
return type between the two callers in command_table_helper.c and
command_table_helper2.c:

drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.h:31: error: type of 'dal_cmd_tbl_helper_dce80_get_table' does not match original declaration [-Werror=lto-type-mismatch]
const struct command_table_helper *dal_cmd_tbl_helper_dce80_get_table(void);

drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce80/command_table_helper_dce80.c:351: note: 'dal_cmd_tbl_helper_dce80_get_table' was previously declared here
const struct command_table_helper *dal_cmd_tbl_helper_dce80_get_table(void)

drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.h:32: error: type of 'dal_cmd_tbl_helper_dce110_get_table' does not match original declaration [-Werror=lto-type-mismatch]
const struct command_table_helper *dal_cmd_tbl_helper_dce110_get_table(void);

drivers/gpu/drm/amd/amdgpu/../display/dc/bios/dce110/command_table_helper_dce110.c:361: note: 'dal_cmd_tbl_helper_dce110_get_table' was previously declared here
const struct command_table_helper *dal_cmd_tbl_helper_dce110_get_table(void)

The two versions of the structure are obviously derived from the same
one, but have diverged over time, before they got added to the kernel.

This moves the structure to a new shared header file and uses the superset
of the members, to ensure the interfaces are all compatible.

Fixes: ae79c310b1a6 ("drm/amd/display: Add DCE12 bios parser support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Arnd Bergmann and committed by
Alex Deucher
ac5d44fb 3af81440

+68 -61
+1 -32
drivers/gpu/drm/amd/display/dc/bios/command_table_helper.h
··· 29 29 #include "dce80/command_table_helper_dce80.h" 30 30 #include "dce110/command_table_helper_dce110.h" 31 31 #include "dce112/command_table_helper_dce112.h" 32 - 33 - struct command_table_helper { 34 - bool (*controller_id_to_atom)(enum controller_id id, uint8_t *atom_id); 35 - uint8_t (*encoder_action_to_atom)( 36 - enum bp_encoder_control_action action); 37 - uint32_t (*encoder_mode_bp_to_atom)(enum signal_type s, 38 - bool enable_dp_audio); 39 - bool (*engine_bp_to_atom)(enum engine_id engine_id, 40 - uint32_t *atom_engine_id); 41 - void (*assign_control_parameter)( 42 - const struct command_table_helper *h, 43 - struct bp_encoder_control *control, 44 - DIG_ENCODER_CONTROL_PARAMETERS_V2 *ctrl_param); 45 - bool (*clock_source_id_to_atom)(enum clock_source_id id, 46 - uint32_t *atom_pll_id); 47 - bool (*clock_source_id_to_ref_clk_src)( 48 - enum clock_source_id id, 49 - uint32_t *ref_clk_src_id); 50 - uint8_t (*transmitter_bp_to_atom)(enum transmitter t); 51 - uint8_t (*encoder_id_to_atom)(enum encoder_id id); 52 - uint8_t (*clock_source_id_to_atom_phy_clk_src_id)( 53 - enum clock_source_id id); 54 - uint8_t (*signal_type_to_atom_dig_mode)(enum signal_type s); 55 - uint8_t (*hpd_sel_to_atom)(enum hpd_source_id id); 56 - uint8_t (*dig_encoder_sel_to_atom)(enum engine_id engine_id); 57 - uint8_t (*phy_id_to_atom)(enum transmitter t); 58 - uint8_t (*disp_power_gating_action_to_atom)( 59 - enum bp_pipe_control_action action); 60 - bool (*dc_clock_type_to_atom)(enum bp_dce_clock_type id, 61 - uint32_t *atom_clock_type); 62 - uint8_t (*transmitter_color_depth_to_atom)(enum transmitter_color_depth id); 63 - }; 32 + #include "command_table_helper_struct.h" 64 33 65 34 bool dal_bios_parser_init_cmd_tbl_helper(const struct command_table_helper **h, 66 35 enum dce_version dce);
+1 -29
drivers/gpu/drm/amd/display/dc/bios/command_table_helper2.h
··· 29 29 #include "dce80/command_table_helper_dce80.h" 30 30 #include "dce110/command_table_helper_dce110.h" 31 31 #include "dce112/command_table_helper2_dce112.h" 32 - 33 - struct command_table_helper { 34 - bool (*controller_id_to_atom)(enum controller_id id, uint8_t *atom_id); 35 - uint8_t (*encoder_action_to_atom)( 36 - enum bp_encoder_control_action action); 37 - uint32_t (*encoder_mode_bp_to_atom)(enum signal_type s, 38 - bool enable_dp_audio); 39 - bool (*engine_bp_to_atom)(enum engine_id engine_id, 40 - uint32_t *atom_engine_id); 41 - bool (*clock_source_id_to_atom)(enum clock_source_id id, 42 - uint32_t *atom_pll_id); 43 - bool (*clock_source_id_to_ref_clk_src)( 44 - enum clock_source_id id, 45 - uint32_t *ref_clk_src_id); 46 - uint8_t (*transmitter_bp_to_atom)(enum transmitter t); 47 - uint8_t (*encoder_id_to_atom)(enum encoder_id id); 48 - uint8_t (*clock_source_id_to_atom_phy_clk_src_id)( 49 - enum clock_source_id id); 50 - uint8_t (*signal_type_to_atom_dig_mode)(enum signal_type s); 51 - uint8_t (*hpd_sel_to_atom)(enum hpd_source_id id); 52 - uint8_t (*dig_encoder_sel_to_atom)(enum engine_id engine_id); 53 - uint8_t (*phy_id_to_atom)(enum transmitter t); 54 - uint8_t (*disp_power_gating_action_to_atom)( 55 - enum bp_pipe_control_action action); 56 - bool (*dc_clock_type_to_atom)(enum bp_dce_clock_type id, 57 - uint32_t *atom_clock_type); 58 - uint8_t (*transmitter_color_depth_to_atom)( 59 - enum transmitter_color_depth id); 60 - }; 32 + #include "command_table_helper_struct.h" 61 33 62 34 bool dal_bios_parser_init_cmd_tbl_helper2(const struct command_table_helper **h, 63 35 enum dce_version dce);
+66
drivers/gpu/drm/amd/display/dc/bios/command_table_helper_struct.h
··· 1 + /* 2 + * Copyright 2012-15 Advanced Micro Devices, Inc. 3 + * 4 + * Permission is hereby granted, free of charge, to any person obtaining a 5 + * copy of this software and associated documentation files (the "Software"), 6 + * to deal in the Software without restriction, including without limitation 7 + * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 + * and/or sell copies of the Software, and to permit persons to whom the 9 + * Software is furnished to do so, subject to the following conditions: 10 + * 11 + * The above copyright notice and this permission notice shall be included in 12 + * all copies or substantial portions of the Software. 13 + * 14 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 + * OTHER DEALINGS IN THE SOFTWARE. 21 + * 22 + * Authors: AMD 23 + * 24 + */ 25 + 26 + #ifndef __DAL_COMMAND_TABLE_HELPER_STRUCT_H__ 27 + #define __DAL_COMMAND_TABLE_HELPER_STRUCT_H__ 28 + 29 + #include "dce80/command_table_helper_dce80.h" 30 + #include "dce110/command_table_helper_dce110.h" 31 + #include "dce112/command_table_helper_dce112.h" 32 + 33 + struct _DIG_ENCODER_CONTROL_PARAMETERS_V2; 34 + struct command_table_helper { 35 + bool (*controller_id_to_atom)(enum controller_id id, uint8_t *atom_id); 36 + uint8_t (*encoder_action_to_atom)( 37 + enum bp_encoder_control_action action); 38 + uint32_t (*encoder_mode_bp_to_atom)(enum signal_type s, 39 + bool enable_dp_audio); 40 + bool (*engine_bp_to_atom)(enum engine_id engine_id, 41 + uint32_t *atom_engine_id); 42 + void (*assign_control_parameter)( 43 + const struct command_table_helper *h, 44 + struct bp_encoder_control *control, 45 + struct _DIG_ENCODER_CONTROL_PARAMETERS_V2 *ctrl_param); 46 + bool (*clock_source_id_to_atom)(enum clock_source_id id, 47 + uint32_t *atom_pll_id); 48 + bool (*clock_source_id_to_ref_clk_src)( 49 + enum clock_source_id id, 50 + uint32_t *ref_clk_src_id); 51 + uint8_t (*transmitter_bp_to_atom)(enum transmitter t); 52 + uint8_t (*encoder_id_to_atom)(enum encoder_id id); 53 + uint8_t (*clock_source_id_to_atom_phy_clk_src_id)( 54 + enum clock_source_id id); 55 + uint8_t (*signal_type_to_atom_dig_mode)(enum signal_type s); 56 + uint8_t (*hpd_sel_to_atom)(enum hpd_source_id id); 57 + uint8_t (*dig_encoder_sel_to_atom)(enum engine_id engine_id); 58 + uint8_t (*phy_id_to_atom)(enum transmitter t); 59 + uint8_t (*disp_power_gating_action_to_atom)( 60 + enum bp_pipe_control_action action); 61 + bool (*dc_clock_type_to_atom)(enum bp_dce_clock_type id, 62 + uint32_t *atom_clock_type); 63 + uint8_t (*transmitter_color_depth_to_atom)(enum transmitter_color_depth id); 64 + }; 65 + 66 + #endif