Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge gregkh@master.kernel.org:/home/rmk/linux-2.6-arm

+184 -50
+5 -3
arch/arm/common/dmabounce.c
··· 179 179 static inline struct safe_buffer * 180 180 find_safe_buffer(struct dmabounce_device_info *device_info, dma_addr_t safe_dma_addr) 181 181 { 182 - struct safe_buffer *b = NULL; 182 + struct safe_buffer *b, *rb = NULL; 183 183 unsigned long flags; 184 184 185 185 read_lock_irqsave(&device_info->lock, flags); 186 186 187 187 list_for_each_entry(b, &device_info->safe_buffers, node) 188 - if (b->safe_dma_addr == safe_dma_addr) 188 + if (b->safe_dma_addr == safe_dma_addr) { 189 + rb = b; 189 190 break; 191 + } 190 192 191 193 read_unlock_irqrestore(&device_info->lock, flags); 192 - return b; 194 + return rb; 193 195 } 194 196 195 197 static inline void
+12 -9
arch/arm/kernel/entry-armv.S
··· 634 634 * purpose. 635 635 */ 636 636 637 + .macro usr_ret, reg 638 + #ifdef CONFIG_ARM_THUMB 639 + bx \reg 640 + #else 641 + mov pc, \reg 642 + #endif 643 + .endm 644 + 637 645 .align 5 638 646 .globl __kuser_helper_start 639 647 __kuser_helper_start: ··· 683 675 #if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP) 684 676 mcr p15, 0, r0, c7, c10, 5 @ dmb 685 677 #endif 686 - mov pc, lr 678 + usr_ret lr 687 679 688 680 .align 5 689 681 ··· 786 778 mov r0, #-1 787 779 adds r0, r0, #0 788 780 #endif 789 - mov pc, lr 781 + usr_ret lr 790 782 791 783 #else 792 784 ··· 800 792 #ifdef CONFIG_SMP 801 793 mcr p15, 0, r0, c7, c10, 5 @ dmb 802 794 #endif 803 - mov pc, lr 795 + usr_ret lr 804 796 805 797 #endif 806 798 ··· 842 834 __kuser_get_tls: @ 0xffff0fe0 843 835 844 836 #if !defined(CONFIG_HAS_TLS_REG) && !defined(CONFIG_TLS_REG_EMUL) 845 - 846 837 ldr r0, [pc, #(16 - 8)] @ TLS stored at 0xffff0ff0 847 - mov pc, lr 848 - 849 838 #else 850 - 851 839 mrc p15, 0, r0, c13, c0, 3 @ read TLS register 852 - mov pc, lr 853 - 854 840 #endif 841 + usr_ret lr 855 842 856 843 .rep 5 857 844 .word 0 @ pad up to __kuser_helper_version
+1 -1
arch/arm/kernel/head.S
··· 118 118 sub r4, r4, r5 @ mmu has been enabled 119 119 ldr r4, [r7, r4] @ get secondary_data.pgdir 120 120 adr lr, __enable_mmu @ return address 121 - add pc, r10, #12 @ initialise processor 121 + add pc, r10, #PROCINFO_INITFUNC @ initialise processor 122 122 @ (return control reg) 123 123 124 124 /*
+19 -17
arch/arm/mach-s3c2410/Makefile
··· 10 10 obj-n := 11 11 obj- := 12 12 13 + # DMA 14 + obj-$(CONFIG_S3C2410_DMA) += dma.o 15 + 13 16 # S3C2400 support files 14 - obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o 17 + obj-$(CONFIG_CPU_S3C2400) += s3c2400-gpio.o 15 18 16 19 # S3C2410 support files 17 20 18 - obj-$(CONFIG_CPU_S3C2410) += s3c2410.o 19 - obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o 20 - obj-$(CONFIG_S3C2410_DMA) += dma.o 21 + obj-$(CONFIG_CPU_S3C2410) += s3c2410.o 22 + obj-$(CONFIG_CPU_S3C2410) += s3c2410-gpio.o 21 23 22 24 # Power Management support 23 25 24 - obj-$(CONFIG_PM) += pm.o sleep.o 25 - obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o 26 + obj-$(CONFIG_PM) += pm.o sleep.o 27 + obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o 26 28 27 29 # S3C2412 support 28 - obj-$(CONFIG_CPU_S3C2412) += s3c2412.o 29 - obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o 30 + obj-$(CONFIG_CPU_S3C2412) += s3c2412.o 31 + obj-$(CONFIG_CPU_S3C2412) += s3c2412-clock.o 30 32 31 33 # 32 34 # S3C244X support 33 35 34 - obj-$(CONFIG_CPU_S3C244X) += s3c244x.o 35 - obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o 36 + obj-$(CONFIG_CPU_S3C244X) += s3c244x.o 37 + obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o 36 38 37 39 # Clock control 38 40 39 - obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o 41 + obj-$(CONFIG_S3C2410_CLOCK) += s3c2410-clock.o 40 42 41 43 # S3C2440 support 42 44 43 - obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o 44 - obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o 45 - obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o 46 - obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o 45 + obj-$(CONFIG_CPU_S3C2440) += s3c2440.o s3c2440-dsc.o 46 + obj-$(CONFIG_CPU_S3C2440) += s3c2440-irq.o 47 + obj-$(CONFIG_CPU_S3C2440) += s3c2440-clock.o 48 + obj-$(CONFIG_CPU_S3C2440) += s3c2410-gpio.o 47 49 48 50 # S3C2442 support 49 51 50 - obj-$(CONFIG_CPU_S3C2442) += s3c2442.o 51 - obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o 52 + obj-$(CONFIG_CPU_S3C2442) += s3c2442.o 53 + obj-$(CONFIG_CPU_S3C2442) += s3c2442-clock.o 52 54 53 55 # bast extras 54 56
+144 -19
arch/arm/mach-s3c2410/dma.c
··· 112 112 } 113 113 114 114 static void 115 - dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan, 115 + dmadbg_dumpregs(const char *fname, int line, s3c2410_dma_chan_t *chan, 116 116 struct s3c2410_dma_regstate *regs) 117 117 { 118 118 printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n", ··· 132 132 chan->number, fname, line, chan->load_state, 133 133 chan->curr, chan->next, chan->end); 134 134 135 - dmadbg_showregs(fname, line, chan, &state); 135 + dmadbg_dumpregs(fname, line, chan, &state); 136 + } 137 + 138 + static void 139 + dmadbg_showregs(const char *fname, int line, s3c2410_dma_chan_t *chan) 140 + { 141 + struct s3c2410_dma_regstate state; 142 + 143 + dmadbg_capture(chan, &state); 144 + dmadbg_dumpregs(fname, line, chan, &state); 136 145 } 137 146 138 147 #define dbg_showregs(chan) dmadbg_showregs(__FUNCTION__, __LINE__, (chan)) ··· 262 253 buf->next); 263 254 reload = (buf->next == NULL) ? S3C2410_DCON_NORELOAD : 0; 264 255 } else { 265 - pr_debug("load_state is %d => autoreload\n", chan->load_state); 256 + //pr_debug("load_state is %d => autoreload\n", chan->load_state); 266 257 reload = S3C2410_DCON_AUTORELOAD; 258 + } 259 + 260 + if ((buf->data & 0xf0000000) != 0x30000000) { 261 + dmawarn("dmaload: buffer is %p\n", (void *)buf->data); 267 262 } 268 263 269 264 writel(buf->data, chan->addr_reg); ··· 383 370 tmp |= S3C2410_DMASKTRIG_ON; 384 371 dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); 385 372 386 - pr_debug("wrote %08lx to DMASKTRIG\n", tmp); 373 + pr_debug("dma%d: %08lx to DMASKTRIG\n", chan->number, tmp); 387 374 388 375 #if 0 389 376 /* the dma buffer loads should take care of clearing the AUTO ··· 397 384 398 385 dbg_showchan(chan); 399 386 387 + /* if we've only loaded one buffer onto the channel, then chec 388 + * to see if we have another, and if so, try and load it so when 389 + * the first buffer is finished, the new one will be loaded onto 390 + * the channel */ 391 + 392 + if (chan->next != NULL) { 393 + if (chan->load_state == S3C2410_DMALOAD_1LOADED) { 394 + 395 + if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { 396 + pr_debug("%s: buff not yet loaded, no more todo\n", 397 + __FUNCTION__); 398 + } else { 399 + chan->load_state = S3C2410_DMALOAD_1RUNNING; 400 + s3c2410_dma_loadbuffer(chan, chan->next); 401 + } 402 + 403 + } else if (chan->load_state == S3C2410_DMALOAD_1RUNNING) { 404 + s3c2410_dma_loadbuffer(chan, chan->next); 405 + } 406 + } 407 + 408 + 400 409 local_irq_restore(flags); 410 + 401 411 return 0; 402 412 } 403 413 ··· 472 436 buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC); 473 437 if (buf == NULL) { 474 438 pr_debug("%s: out of memory (%ld alloc)\n", 475 - __FUNCTION__, sizeof(*buf)); 439 + __FUNCTION__, (long)sizeof(*buf)); 476 440 return -ENOMEM; 477 441 } 478 442 479 - pr_debug("%s: new buffer %p\n", __FUNCTION__, buf); 480 - 443 + //pr_debug("%s: new buffer %p\n", __FUNCTION__, buf); 481 444 //dbg_showchan(chan); 482 445 483 446 buf->next = NULL; ··· 572 537 case S3C2410_DMALOAD_1LOADED: 573 538 if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { 574 539 /* flag error? */ 575 - printk(KERN_ERR "dma%d: timeout waiting for load\n", 576 - chan->number); 540 + printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", 541 + chan->number, __FUNCTION__); 577 542 return; 578 543 } 579 544 break; 580 545 546 + case S3C2410_DMALOAD_1LOADED_1RUNNING: 547 + /* I belive in this case we do not have anything to do 548 + * until the next buffer comes along, and we turn off the 549 + * reload */ 550 + return; 551 + 581 552 default: 582 - pr_debug("dma%d: lastxfer: unhandled load_state %d with no next", 553 + pr_debug("dma%d: lastxfer: unhandled load_state %d with no next\n", 583 554 chan->number, chan->load_state); 584 555 return; 585 556 ··· 670 629 } else { 671 630 } 672 631 673 - if (chan->next != NULL) { 632 + /* only reload if the channel is still running... our buffer done 633 + * routine may have altered the state by requesting the dma channel 634 + * to stop or shutdown... */ 635 + 636 + /* todo: check that when the channel is shut-down from inside this 637 + * function, we cope with unsetting reload, etc */ 638 + 639 + if (chan->next != NULL && chan->state != S3C2410_DMA_IDLE) { 674 640 unsigned long flags; 675 641 676 642 switch (chan->load_state) { ··· 692 644 case S3C2410_DMALOAD_1LOADED: 693 645 if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { 694 646 /* flag error? */ 695 - printk(KERN_ERR "dma%d: timeout waiting for load\n", 696 - chan->number); 647 + printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", 648 + chan->number, __FUNCTION__); 697 649 return IRQ_HANDLED; 698 650 } 699 651 ··· 725 677 no_load: 726 678 return IRQ_HANDLED; 727 679 } 728 - 729 - 730 680 731 681 /* s3c2410_request_dma 732 682 * ··· 764 718 pr_debug("dma%d: %s : requesting irq %d\n", 765 719 channel, __FUNCTION__, chan->irq); 766 720 721 + chan->irq_claimed = 1; 722 + local_irq_restore(flags); 723 + 767 724 err = request_irq(chan->irq, s3c2410_dma_irq, IRQF_DISABLED, 768 725 client->name, (void *)chan); 769 726 727 + local_irq_save(flags); 728 + 770 729 if (err) { 771 730 chan->in_use = 0; 731 + chan->irq_claimed = 0; 772 732 local_irq_restore(flags); 773 733 774 734 printk(KERN_ERR "%s: cannot get IRQ %d for DMA %d\n", ··· 782 730 return err; 783 731 } 784 732 785 - chan->irq_claimed = 1; 786 733 chan->irq_enabled = 1; 787 734 } 788 735 ··· 861 810 862 811 tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); 863 812 tmp |= S3C2410_DMASKTRIG_STOP; 813 + //tmp &= ~S3C2410_DMASKTRIG_ON; 864 814 dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); 865 815 866 816 #if 0 ··· 871 819 dma_wrreg(chan, S3C2410_DMA_DCON, tmp); 872 820 #endif 873 821 822 + /* should stop do this, or should we wait for flush? */ 874 823 chan->state = S3C2410_DMA_IDLE; 875 824 chan->load_state = S3C2410_DMALOAD_NONE; 876 825 ··· 879 826 880 827 return 0; 881 828 } 829 + 830 + void s3c2410_dma_waitforstop(s3c2410_dma_chan_t *chan) 831 + { 832 + unsigned long tmp; 833 + unsigned int timeout = 0x10000; 834 + 835 + while (timeout-- > 0) { 836 + tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); 837 + 838 + if (!(tmp & S3C2410_DMASKTRIG_ON)) 839 + return; 840 + } 841 + 842 + pr_debug("dma%d: failed to stop?\n", chan->number); 843 + } 844 + 882 845 883 846 /* s3c2410_dma_flush 884 847 * ··· 906 837 s3c2410_dma_buf_t *buf, *next; 907 838 unsigned long flags; 908 839 909 - pr_debug("%s:\n", __FUNCTION__); 840 + pr_debug("%s: chan %p (%d)\n", __FUNCTION__, chan, chan->number); 841 + 842 + dbg_showchan(chan); 910 843 911 844 local_irq_save(flags); 912 845 ··· 935 864 } 936 865 } 937 866 867 + dbg_showregs(chan); 868 + 869 + s3c2410_dma_waitforstop(chan); 870 + 871 + #if 0 872 + /* should also clear interrupts, according to WinCE BSP */ 873 + { 874 + unsigned long tmp; 875 + 876 + tmp = dma_rdreg(chan, S3C2410_DMA_DCON); 877 + tmp |= S3C2410_DCON_NORELOAD; 878 + dma_wrreg(chan, S3C2410_DMA_DCON, tmp); 879 + } 880 + #endif 881 + 882 + dbg_showregs(chan); 883 + 938 884 local_irq_restore(flags); 939 885 940 886 return 0; 941 887 } 942 888 889 + int 890 + s3c2410_dma_started(s3c2410_dma_chan_t *chan) 891 + { 892 + unsigned long flags; 893 + 894 + local_irq_save(flags); 895 + 896 + dbg_showchan(chan); 897 + 898 + /* if we've only loaded one buffer onto the channel, then chec 899 + * to see if we have another, and if so, try and load it so when 900 + * the first buffer is finished, the new one will be loaded onto 901 + * the channel */ 902 + 903 + if (chan->next != NULL) { 904 + if (chan->load_state == S3C2410_DMALOAD_1LOADED) { 905 + 906 + if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { 907 + pr_debug("%s: buff not yet loaded, no more todo\n", 908 + __FUNCTION__); 909 + } else { 910 + chan->load_state = S3C2410_DMALOAD_1RUNNING; 911 + s3c2410_dma_loadbuffer(chan, chan->next); 912 + } 913 + 914 + } else if (chan->load_state == S3C2410_DMALOAD_1RUNNING) { 915 + s3c2410_dma_loadbuffer(chan, chan->next); 916 + } 917 + } 918 + 919 + 920 + local_irq_restore(flags); 921 + 922 + return 0; 923 + 924 + } 943 925 944 926 int 945 927 s3c2410_dma_ctrl(dmach_t channel, s3c2410_chan_op_t op) ··· 1009 885 return s3c2410_dma_dostop(chan); 1010 886 1011 887 case S3C2410_DMAOP_PAUSE: 1012 - return -ENOENT; 1013 - 1014 888 case S3C2410_DMAOP_RESUME: 1015 889 return -ENOENT; 1016 890 1017 891 case S3C2410_DMAOP_FLUSH: 1018 892 return s3c2410_dma_flush(chan); 893 + 894 + case S3C2410_DMAOP_STARTED: 895 + return s3c2410_dma_started(chan); 1019 896 1020 897 case S3C2410_DMAOP_TIMEOUT: 1021 898 return 0;
+1 -1
arch/arm/mach-versatile/core.c
··· 285 285 286 286 static struct resource versatile_flash_resource = { 287 287 .start = VERSATILE_FLASH_BASE, 288 - .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE, 288 + .end = VERSATILE_FLASH_BASE + VERSATILE_FLASH_SIZE - 1, 289 289 .flags = IORESOURCE_MEM, 290 290 }; 291 291
+1
include/asm-arm/arch-s3c2410/dma.h
··· 104 104 S3C2410_DMAOP_RESUME, 105 105 S3C2410_DMAOP_FLUSH, 106 106 S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ 107 + S3C2410_DMAOP_STARTED, /* indicate channel started */ 107 108 }; 108 109 109 110 typedef enum s3c2410_chan_op_e s3c2410_chan_op_t;
+1
include/asm-arm/procinfo.h
··· 55 55 #define HWCAP_VFP 64 56 56 #define HWCAP_EDSP 128 57 57 #define HWCAP_JAVA 256 58 + #define HWCAP_IWMMXT 512 58 59 59 60 #endif