Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[media] marvell-cam: Separate out the Marvell camera core

There will eventually be multiple users of the core camera controller, so
separate it from the bus/platform/i2c stuff. I've tried to do the minimal
set of changes to get the driver functioning in this configuration; I did
clean up a bunch of old checkpatch gripes in the process. This driver
works like the old one did on OLPC XO 1 systems.

Cc: Daniel Drake <dsd@laptop.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

authored by

Jonathan Corbet and committed by
Mauro Carvalho Chehab
abfa3df3 f8fc7298

+2571 -2433
+1
drivers/media/video/marvell-ccic/Makefile
··· 1 1 obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o 2 + cafe_ccic-y := cafe-driver.o mcam-core.o
+570
drivers/media/video/marvell-ccic/cafe-driver.c
··· 1 + /* 2 + * A driver for the CMOS camera controller in the Marvell 88ALP01 "cafe" 3 + * multifunction chip. Currently works with the Omnivision OV7670 4 + * sensor. 5 + * 6 + * The data sheet for this device can be found at: 7 + * http://www.marvell.com/products/pc_connectivity/88alp01/ 8 + * 9 + * Copyright 2006-11 One Laptop Per Child Association, Inc. 10 + * Copyright 2006-11 Jonathan Corbet <corbet@lwn.net> 11 + * 12 + * Written by Jonathan Corbet, corbet@lwn.net. 13 + * 14 + * v4l2_device/v4l2_subdev conversion by: 15 + * Copyright (C) 2009 Hans Verkuil <hverkuil@xs4all.nl> 16 + * 17 + * Note: this conversion is untested! Please contact the linux-media 18 + * mailinglist if you can test this, together with the test results. 19 + * 20 + * This file may be distributed under the terms of the GNU General 21 + * Public License, version 2. 22 + */ 23 + #include <linux/kernel.h> 24 + #include <linux/module.h> 25 + #include <linux/init.h> 26 + #include <linux/pci.h> 27 + #include <linux/i2c.h> 28 + #include <linux/interrupt.h> 29 + #include <linux/spinlock.h> 30 + #include <linux/slab.h> 31 + #include <linux/videodev2.h> 32 + #include <media/v4l2-device.h> 33 + #include <media/v4l2-chip-ident.h> 34 + #include <linux/device.h> 35 + #include <linux/wait.h> 36 + #include <linux/delay.h> 37 + #include <linux/io.h> 38 + 39 + #include "mcam-core.h" 40 + 41 + #define CAFE_VERSION 0x000002 42 + 43 + 44 + /* 45 + * Parameters. 46 + */ 47 + MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); 48 + MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver"); 49 + MODULE_LICENSE("GPL"); 50 + MODULE_SUPPORTED_DEVICE("Video"); 51 + 52 + 53 + 54 + 55 + struct cafe_camera { 56 + int registered; /* Fully initialized? */ 57 + struct mcam_camera mcam; 58 + struct pci_dev *pdev; 59 + wait_queue_head_t smbus_wait; /* Waiting on i2c events */ 60 + }; 61 + 62 + /* 63 + * Debugging and related. 64 + */ 65 + #define cam_err(cam, fmt, arg...) \ 66 + dev_err(&(cam)->pdev->dev, fmt, ##arg); 67 + #define cam_warn(cam, fmt, arg...) \ 68 + dev_warn(&(cam)->pdev->dev, fmt, ##arg); 69 + 70 + /* -------------------------------------------------------------------- */ 71 + /* 72 + * The I2C/SMBUS interface to the camera itself starts here. The 73 + * controller handles SMBUS itself, presenting a relatively simple register 74 + * interface; all we have to do is to tell it where to route the data. 75 + */ 76 + #define CAFE_SMBUS_TIMEOUT (HZ) /* generous */ 77 + 78 + static inline struct cafe_camera *to_cam(struct v4l2_device *dev) 79 + { 80 + struct mcam_camera *m = container_of(dev, struct mcam_camera, v4l2_dev); 81 + return container_of(m, struct cafe_camera, mcam); 82 + } 83 + 84 + 85 + static int cafe_smbus_write_done(struct mcam_camera *mcam) 86 + { 87 + unsigned long flags; 88 + int c1; 89 + 90 + /* 91 + * We must delay after the interrupt, or the controller gets confused 92 + * and never does give us good status. Fortunately, we don't do this 93 + * often. 94 + */ 95 + udelay(20); 96 + spin_lock_irqsave(&mcam->dev_lock, flags); 97 + c1 = mcam_reg_read(mcam, REG_TWSIC1); 98 + spin_unlock_irqrestore(&mcam->dev_lock, flags); 99 + return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT; 100 + } 101 + 102 + static int cafe_smbus_write_data(struct cafe_camera *cam, 103 + u16 addr, u8 command, u8 value) 104 + { 105 + unsigned int rval; 106 + unsigned long flags; 107 + struct mcam_camera *mcam = &cam->mcam; 108 + 109 + spin_lock_irqsave(&mcam->dev_lock, flags); 110 + rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID); 111 + rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */ 112 + /* 113 + * Marvell sez set clkdiv to all 1's for now. 114 + */ 115 + rval |= TWSIC0_CLKDIV; 116 + mcam_reg_write(mcam, REG_TWSIC0, rval); 117 + (void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */ 118 + rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR); 119 + mcam_reg_write(mcam, REG_TWSIC1, rval); 120 + spin_unlock_irqrestore(&mcam->dev_lock, flags); 121 + 122 + /* Unfortunately, reading TWSIC1 too soon after sending a command 123 + * causes the device to die. 124 + * Use a busy-wait because we often send a large quantity of small 125 + * commands at-once; using msleep() would cause a lot of context 126 + * switches which take longer than 2ms, resulting in a noticeable 127 + * boot-time and capture-start delays. 128 + */ 129 + mdelay(2); 130 + 131 + /* 132 + * Another sad fact is that sometimes, commands silently complete but 133 + * cafe_smbus_write_done() never becomes aware of this. 134 + * This happens at random and appears to possible occur with any 135 + * command. 136 + * We don't understand why this is. We work around this issue 137 + * with the timeout in the wait below, assuming that all commands 138 + * complete within the timeout. 139 + */ 140 + wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(mcam), 141 + CAFE_SMBUS_TIMEOUT); 142 + 143 + spin_lock_irqsave(&mcam->dev_lock, flags); 144 + rval = mcam_reg_read(mcam, REG_TWSIC1); 145 + spin_unlock_irqrestore(&mcam->dev_lock, flags); 146 + 147 + if (rval & TWSIC1_WSTAT) { 148 + cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr, 149 + command, value); 150 + return -EIO; 151 + } 152 + if (rval & TWSIC1_ERROR) { 153 + cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr, 154 + command, value); 155 + return -EIO; 156 + } 157 + return 0; 158 + } 159 + 160 + 161 + 162 + static int cafe_smbus_read_done(struct mcam_camera *mcam) 163 + { 164 + unsigned long flags; 165 + int c1; 166 + 167 + /* 168 + * We must delay after the interrupt, or the controller gets confused 169 + * and never does give us good status. Fortunately, we don't do this 170 + * often. 171 + */ 172 + udelay(20); 173 + spin_lock_irqsave(&mcam->dev_lock, flags); 174 + c1 = mcam_reg_read(mcam, REG_TWSIC1); 175 + spin_unlock_irqrestore(&mcam->dev_lock, flags); 176 + return c1 & (TWSIC1_RVALID|TWSIC1_ERROR); 177 + } 178 + 179 + 180 + 181 + static int cafe_smbus_read_data(struct cafe_camera *cam, 182 + u16 addr, u8 command, u8 *value) 183 + { 184 + unsigned int rval; 185 + unsigned long flags; 186 + struct mcam_camera *mcam = &cam->mcam; 187 + 188 + spin_lock_irqsave(&mcam->dev_lock, flags); 189 + rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID); 190 + rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */ 191 + /* 192 + * Marvel sez set clkdiv to all 1's for now. 193 + */ 194 + rval |= TWSIC0_CLKDIV; 195 + mcam_reg_write(mcam, REG_TWSIC0, rval); 196 + (void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */ 197 + rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR); 198 + mcam_reg_write(mcam, REG_TWSIC1, rval); 199 + spin_unlock_irqrestore(&mcam->dev_lock, flags); 200 + 201 + wait_event_timeout(cam->smbus_wait, 202 + cafe_smbus_read_done(mcam), CAFE_SMBUS_TIMEOUT); 203 + spin_lock_irqsave(&mcam->dev_lock, flags); 204 + rval = mcam_reg_read(mcam, REG_TWSIC1); 205 + spin_unlock_irqrestore(&mcam->dev_lock, flags); 206 + 207 + if (rval & TWSIC1_ERROR) { 208 + cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command); 209 + return -EIO; 210 + } 211 + if (!(rval & TWSIC1_RVALID)) { 212 + cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr, 213 + command); 214 + return -EIO; 215 + } 216 + *value = rval & 0xff; 217 + return 0; 218 + } 219 + 220 + /* 221 + * Perform a transfer over SMBUS. This thing is called under 222 + * the i2c bus lock, so we shouldn't race with ourselves... 223 + */ 224 + static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr, 225 + unsigned short flags, char rw, u8 command, 226 + int size, union i2c_smbus_data *data) 227 + { 228 + struct cafe_camera *cam = i2c_get_adapdata(adapter); 229 + int ret = -EINVAL; 230 + 231 + /* 232 + * This interface would appear to only do byte data ops. OK 233 + * it can do word too, but the cam chip has no use for that. 234 + */ 235 + if (size != I2C_SMBUS_BYTE_DATA) { 236 + cam_err(cam, "funky xfer size %d\n", size); 237 + return -EINVAL; 238 + } 239 + 240 + if (rw == I2C_SMBUS_WRITE) 241 + ret = cafe_smbus_write_data(cam, addr, command, data->byte); 242 + else if (rw == I2C_SMBUS_READ) 243 + ret = cafe_smbus_read_data(cam, addr, command, &data->byte); 244 + return ret; 245 + } 246 + 247 + 248 + static void cafe_smbus_enable_irq(struct cafe_camera *cam) 249 + { 250 + unsigned long flags; 251 + 252 + spin_lock_irqsave(&cam->mcam.dev_lock, flags); 253 + mcam_reg_set_bit(&cam->mcam, REG_IRQMASK, TWSIIRQS); 254 + spin_unlock_irqrestore(&cam->mcam.dev_lock, flags); 255 + } 256 + 257 + static u32 cafe_smbus_func(struct i2c_adapter *adapter) 258 + { 259 + return I2C_FUNC_SMBUS_READ_BYTE_DATA | 260 + I2C_FUNC_SMBUS_WRITE_BYTE_DATA; 261 + } 262 + 263 + static struct i2c_algorithm cafe_smbus_algo = { 264 + .smbus_xfer = cafe_smbus_xfer, 265 + .functionality = cafe_smbus_func 266 + }; 267 + 268 + static int cafe_smbus_setup(struct cafe_camera *cam) 269 + { 270 + struct i2c_adapter *adap = &cam->mcam.i2c_adapter; 271 + int ret; 272 + 273 + cafe_smbus_enable_irq(cam); 274 + adap->owner = THIS_MODULE; 275 + adap->algo = &cafe_smbus_algo; 276 + strcpy(adap->name, "cafe_ccic"); 277 + adap->dev.parent = &cam->pdev->dev; 278 + i2c_set_adapdata(adap, cam); 279 + ret = i2c_add_adapter(adap); 280 + if (ret) 281 + printk(KERN_ERR "Unable to register cafe i2c adapter\n"); 282 + return ret; 283 + } 284 + 285 + static void cafe_smbus_shutdown(struct cafe_camera *cam) 286 + { 287 + i2c_del_adapter(&cam->mcam.i2c_adapter); 288 + } 289 + 290 + 291 + /* 292 + * Controller-level stuff 293 + */ 294 + 295 + static void cafe_ctlr_init(struct mcam_camera *mcam) 296 + { 297 + unsigned long flags; 298 + 299 + spin_lock_irqsave(&mcam->dev_lock, flags); 300 + /* 301 + * Added magic to bring up the hardware on the B-Test board 302 + */ 303 + mcam_reg_write(mcam, 0x3038, 0x8); 304 + mcam_reg_write(mcam, 0x315c, 0x80008); 305 + /* 306 + * Go through the dance needed to wake the device up. 307 + * Note that these registers are global and shared 308 + * with the NAND and SD devices. Interaction between the 309 + * three still needs to be examined. 310 + */ 311 + mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */ 312 + mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRC); 313 + mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRS); 314 + /* 315 + * Here we must wait a bit for the controller to come around. 316 + */ 317 + spin_unlock_irqrestore(&mcam->dev_lock, flags); 318 + msleep(5); 319 + spin_lock_irqsave(&mcam->dev_lock, flags); 320 + 321 + mcam_reg_write(mcam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC); 322 + mcam_reg_set_bit(mcam, REG_GL_IMASK, GIMSK_CCIC_EN); 323 + /* 324 + * Mask all interrupts. 325 + */ 326 + mcam_reg_write(mcam, REG_IRQMASK, 0); 327 + spin_unlock_irqrestore(&mcam->dev_lock, flags); 328 + } 329 + 330 + 331 + static void cafe_ctlr_power_up(struct mcam_camera *mcam) 332 + { 333 + /* 334 + * Part one of the sensor dance: turn the global 335 + * GPIO signal on. 336 + */ 337 + mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON); 338 + mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL); 339 + /* 340 + * Put the sensor into operational mode (assumes OLPC-style 341 + * wiring). Control 0 is reset - set to 1 to operate. 342 + * Control 1 is power down, set to 0 to operate. 343 + */ 344 + mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */ 345 + mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0); 346 + } 347 + 348 + static void cafe_ctlr_power_down(struct mcam_camera *mcam) 349 + { 350 + mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1); 351 + mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON); 352 + mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT); 353 + } 354 + 355 + 356 + 357 + /* 358 + * The platform interrupt handler. 359 + */ 360 + static irqreturn_t cafe_irq(int irq, void *data) 361 + { 362 + struct cafe_camera *cam = data; 363 + struct mcam_camera *mcam = &cam->mcam; 364 + unsigned int irqs, handled; 365 + 366 + spin_lock(&mcam->dev_lock); 367 + irqs = mcam_reg_read(mcam, REG_IRQSTAT); 368 + handled = cam->registered && mccic_irq(mcam, irqs); 369 + if (irqs & TWSIIRQS) { 370 + mcam_reg_write(mcam, REG_IRQSTAT, TWSIIRQS); 371 + wake_up(&cam->smbus_wait); 372 + handled = 1; 373 + } 374 + spin_unlock(&mcam->dev_lock); 375 + return IRQ_RETVAL(handled); 376 + } 377 + 378 + 379 + /* -------------------------------------------------------------------------- */ 380 + /* 381 + * PCI interface stuff. 382 + */ 383 + 384 + static int cafe_pci_probe(struct pci_dev *pdev, 385 + const struct pci_device_id *id) 386 + { 387 + int ret; 388 + struct cafe_camera *cam; 389 + struct mcam_camera *mcam; 390 + 391 + /* 392 + * Start putting together one of our big camera structures. 393 + */ 394 + ret = -ENOMEM; 395 + cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL); 396 + if (cam == NULL) 397 + goto out; 398 + cam->pdev = pdev; 399 + mcam = &cam->mcam; 400 + mcam->chip_id = V4L2_IDENT_CAFE; 401 + spin_lock_init(&mcam->dev_lock); 402 + init_waitqueue_head(&cam->smbus_wait); 403 + mcam->plat_power_up = cafe_ctlr_power_up; 404 + mcam->plat_power_down = cafe_ctlr_power_down; 405 + mcam->dev = &pdev->dev; 406 + /* 407 + * Get set up on the PCI bus. 408 + */ 409 + ret = pci_enable_device(pdev); 410 + if (ret) 411 + goto out_free; 412 + pci_set_master(pdev); 413 + 414 + ret = -EIO; 415 + mcam->regs = pci_iomap(pdev, 0, 0); 416 + if (!mcam->regs) { 417 + printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n"); 418 + goto out_disable; 419 + } 420 + ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam); 421 + if (ret) 422 + goto out_iounmap; 423 + 424 + /* 425 + * Initialize the controller and leave it powered up. It will 426 + * stay that way until the sensor driver shows up. 427 + */ 428 + cafe_ctlr_init(mcam); 429 + cafe_ctlr_power_up(mcam); 430 + /* 431 + * Set up I2C/SMBUS communications. We have to drop the mutex here 432 + * because the sensor could attach in this call chain, leading to 433 + * unsightly deadlocks. 434 + */ 435 + ret = cafe_smbus_setup(cam); 436 + if (ret) 437 + goto out_pdown; 438 + 439 + ret = mccic_register(mcam); 440 + if (ret == 0) { 441 + cam->registered = 1; 442 + return 0; 443 + } 444 + 445 + cafe_smbus_shutdown(cam); 446 + out_pdown: 447 + cafe_ctlr_power_down(mcam); 448 + free_irq(pdev->irq, cam); 449 + out_iounmap: 450 + pci_iounmap(pdev, mcam->regs); 451 + out_disable: 452 + pci_disable_device(pdev); 453 + out_free: 454 + kfree(cam); 455 + out: 456 + return ret; 457 + } 458 + 459 + 460 + /* 461 + * Shut down an initialized device 462 + */ 463 + static void cafe_shutdown(struct cafe_camera *cam) 464 + { 465 + mccic_shutdown(&cam->mcam); 466 + cafe_smbus_shutdown(cam); 467 + free_irq(cam->pdev->irq, cam); 468 + pci_iounmap(cam->pdev, cam->mcam.regs); 469 + } 470 + 471 + 472 + static void cafe_pci_remove(struct pci_dev *pdev) 473 + { 474 + struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); 475 + struct cafe_camera *cam = to_cam(v4l2_dev); 476 + 477 + if (cam == NULL) { 478 + printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev); 479 + return; 480 + } 481 + cafe_shutdown(cam); 482 + kfree(cam); 483 + } 484 + 485 + 486 + #ifdef CONFIG_PM 487 + /* 488 + * Basic power management. 489 + */ 490 + static int cafe_pci_suspend(struct pci_dev *pdev, pm_message_t state) 491 + { 492 + struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); 493 + struct cafe_camera *cam = to_cam(v4l2_dev); 494 + int ret; 495 + 496 + ret = pci_save_state(pdev); 497 + if (ret) 498 + return ret; 499 + mccic_suspend(&cam->mcam); 500 + pci_disable_device(pdev); 501 + return 0; 502 + } 503 + 504 + 505 + static int cafe_pci_resume(struct pci_dev *pdev) 506 + { 507 + struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); 508 + struct cafe_camera *cam = to_cam(v4l2_dev); 509 + int ret = 0; 510 + 511 + pci_restore_state(pdev); 512 + ret = pci_enable_device(pdev); 513 + 514 + if (ret) { 515 + cam_warn(cam, "Unable to re-enable device on resume!\n"); 516 + return ret; 517 + } 518 + cafe_ctlr_init(&cam->mcam); 519 + return mccic_resume(&cam->mcam); 520 + } 521 + 522 + #endif /* CONFIG_PM */ 523 + 524 + static struct pci_device_id cafe_ids[] = { 525 + { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 526 + PCI_DEVICE_ID_MARVELL_88ALP01_CCIC) }, 527 + { 0, } 528 + }; 529 + 530 + MODULE_DEVICE_TABLE(pci, cafe_ids); 531 + 532 + static struct pci_driver cafe_pci_driver = { 533 + .name = "cafe1000-ccic", 534 + .id_table = cafe_ids, 535 + .probe = cafe_pci_probe, 536 + .remove = cafe_pci_remove, 537 + #ifdef CONFIG_PM 538 + .suspend = cafe_pci_suspend, 539 + .resume = cafe_pci_resume, 540 + #endif 541 + }; 542 + 543 + 544 + 545 + 546 + static int __init cafe_init(void) 547 + { 548 + int ret; 549 + 550 + printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n", 551 + CAFE_VERSION); 552 + ret = pci_register_driver(&cafe_pci_driver); 553 + if (ret) { 554 + printk(KERN_ERR "Unable to register cafe_ccic driver\n"); 555 + goto out; 556 + } 557 + ret = 0; 558 + 559 + out: 560 + return ret; 561 + } 562 + 563 + 564 + static void __exit cafe_exit(void) 565 + { 566 + pci_unregister_driver(&cafe_pci_driver); 567 + } 568 + 569 + module_init(cafe_init); 570 + module_exit(cafe_exit);
-166
drivers/media/video/marvell-ccic/cafe_ccic-regs.h
··· 1 - /* 2 - * Register definitions for the m88alp01 camera interface. Offsets in bytes 3 - * as given in the spec. 4 - * 5 - * Copyright 2006 One Laptop Per Child Association, Inc. 6 - * 7 - * Written by Jonathan Corbet, corbet@lwn.net. 8 - * 9 - * This file may be distributed under the terms of the GNU General 10 - * Public License, version 2. 11 - */ 12 - #define REG_Y0BAR 0x00 13 - #define REG_Y1BAR 0x04 14 - #define REG_Y2BAR 0x08 15 - /* ... */ 16 - 17 - #define REG_IMGPITCH 0x24 /* Image pitch register */ 18 - #define IMGP_YP_SHFT 2 /* Y pitch params */ 19 - #define IMGP_YP_MASK 0x00003ffc /* Y pitch field */ 20 - #define IMGP_UVP_SHFT 18 /* UV pitch (planar) */ 21 - #define IMGP_UVP_MASK 0x3ffc0000 22 - #define REG_IRQSTATRAW 0x28 /* RAW IRQ Status */ 23 - #define IRQ_EOF0 0x00000001 /* End of frame 0 */ 24 - #define IRQ_EOF1 0x00000002 /* End of frame 1 */ 25 - #define IRQ_EOF2 0x00000004 /* End of frame 2 */ 26 - #define IRQ_SOF0 0x00000008 /* Start of frame 0 */ 27 - #define IRQ_SOF1 0x00000010 /* Start of frame 1 */ 28 - #define IRQ_SOF2 0x00000020 /* Start of frame 2 */ 29 - #define IRQ_OVERFLOW 0x00000040 /* FIFO overflow */ 30 - #define IRQ_TWSIW 0x00010000 /* TWSI (smbus) write */ 31 - #define IRQ_TWSIR 0x00020000 /* TWSI read */ 32 - #define IRQ_TWSIE 0x00040000 /* TWSI error */ 33 - #define TWSIIRQS (IRQ_TWSIW|IRQ_TWSIR|IRQ_TWSIE) 34 - #define FRAMEIRQS (IRQ_EOF0|IRQ_EOF1|IRQ_EOF2|IRQ_SOF0|IRQ_SOF1|IRQ_SOF2) 35 - #define ALLIRQS (TWSIIRQS|FRAMEIRQS|IRQ_OVERFLOW) 36 - #define REG_IRQMASK 0x2c /* IRQ mask - same bits as IRQSTAT */ 37 - #define REG_IRQSTAT 0x30 /* IRQ status / clear */ 38 - 39 - #define REG_IMGSIZE 0x34 /* Image size */ 40 - #define IMGSZ_V_MASK 0x1fff0000 41 - #define IMGSZ_V_SHIFT 16 42 - #define IMGSZ_H_MASK 0x00003fff 43 - #define REG_IMGOFFSET 0x38 /* IMage offset */ 44 - 45 - #define REG_CTRL0 0x3c /* Control 0 */ 46 - #define C0_ENABLE 0x00000001 /* Makes the whole thing go */ 47 - 48 - /* Mask for all the format bits */ 49 - #define C0_DF_MASK 0x00fffffc /* Bits 2-23 */ 50 - 51 - /* RGB ordering */ 52 - #define C0_RGB4_RGBX 0x00000000 53 - #define C0_RGB4_XRGB 0x00000004 54 - #define C0_RGB4_BGRX 0x00000008 55 - #define C0_RGB4_XBGR 0x0000000c 56 - #define C0_RGB5_RGGB 0x00000000 57 - #define C0_RGB5_GRBG 0x00000004 58 - #define C0_RGB5_GBRG 0x00000008 59 - #define C0_RGB5_BGGR 0x0000000c 60 - 61 - /* Spec has two fields for DIN and DOUT, but they must match, so 62 - combine them here. */ 63 - #define C0_DF_YUV 0x00000000 /* Data is YUV */ 64 - #define C0_DF_RGB 0x000000a0 /* ... RGB */ 65 - #define C0_DF_BAYER 0x00000140 /* ... Bayer */ 66 - /* 8-8-8 must be missing from the below - ask */ 67 - #define C0_RGBF_565 0x00000000 68 - #define C0_RGBF_444 0x00000800 69 - #define C0_RGB_BGR 0x00001000 /* Blue comes first */ 70 - #define C0_YUV_PLANAR 0x00000000 /* YUV 422 planar format */ 71 - #define C0_YUV_PACKED 0x00008000 /* YUV 422 packed */ 72 - #define C0_YUV_420PL 0x0000a000 /* YUV 420 planar */ 73 - /* Think that 420 packed must be 111 - ask */ 74 - #define C0_YUVE_YUYV 0x00000000 /* Y1CbY0Cr */ 75 - #define C0_YUVE_YVYU 0x00010000 /* Y1CrY0Cb */ 76 - #define C0_YUVE_VYUY 0x00020000 /* CrY1CbY0 */ 77 - #define C0_YUVE_UYVY 0x00030000 /* CbY1CrY0 */ 78 - #define C0_YUVE_XYUV 0x00000000 /* 420: .YUV */ 79 - #define C0_YUVE_XYVU 0x00010000 /* 420: .YVU */ 80 - #define C0_YUVE_XUVY 0x00020000 /* 420: .UVY */ 81 - #define C0_YUVE_XVUY 0x00030000 /* 420: .VUY */ 82 - /* Bayer bits 18,19 if needed */ 83 - #define C0_HPOL_LOW 0x01000000 /* HSYNC polarity active low */ 84 - #define C0_VPOL_LOW 0x02000000 /* VSYNC polarity active low */ 85 - #define C0_VCLK_LOW 0x04000000 /* VCLK on falling edge */ 86 - #define C0_DOWNSCALE 0x08000000 /* Enable downscaler */ 87 - #define C0_SIFM_MASK 0xc0000000 /* SIF mode bits */ 88 - #define C0_SIF_HVSYNC 0x00000000 /* Use H/VSYNC */ 89 - #define CO_SOF_NOSYNC 0x40000000 /* Use inband active signaling */ 90 - 91 - 92 - #define REG_CTRL1 0x40 /* Control 1 */ 93 - #define C1_444ALPHA 0x00f00000 /* Alpha field in RGB444 */ 94 - #define C1_ALPHA_SHFT 20 95 - #define C1_DMAB32 0x00000000 /* 32-byte DMA burst */ 96 - #define C1_DMAB16 0x02000000 /* 16-byte DMA burst */ 97 - #define C1_DMAB64 0x04000000 /* 64-byte DMA burst */ 98 - #define C1_DMAB_MASK 0x06000000 99 - #define C1_TWOBUFS 0x08000000 /* Use only two DMA buffers */ 100 - #define C1_PWRDWN 0x10000000 /* Power down */ 101 - 102 - #define REG_CLKCTRL 0x88 /* Clock control */ 103 - #define CLK_DIV_MASK 0x0000ffff /* Upper bits RW "reserved" */ 104 - 105 - #define REG_GPR 0xb4 /* General purpose register. This 106 - controls inputs to the power and reset 107 - pins on the OV7670 used with OLPC; 108 - other deployments could differ. */ 109 - #define GPR_C1EN 0x00000020 /* Pad 1 (power down) enable */ 110 - #define GPR_C0EN 0x00000010 /* Pad 0 (reset) enable */ 111 - #define GPR_C1 0x00000002 /* Control 1 value */ 112 - /* 113 - * Control 0 is wired to reset on OLPC machines. For ov7x sensors, 114 - * it is active low, for 0v6x, instead, it's active high. What 115 - * fun. 116 - */ 117 - #define GPR_C0 0x00000001 /* Control 0 value */ 118 - 119 - #define REG_TWSIC0 0xb8 /* TWSI (smbus) control 0 */ 120 - #define TWSIC0_EN 0x00000001 /* TWSI enable */ 121 - #define TWSIC0_MODE 0x00000002 /* 1 = 16-bit, 0 = 8-bit */ 122 - #define TWSIC0_SID 0x000003fc /* Slave ID */ 123 - #define TWSIC0_SID_SHIFT 2 124 - #define TWSIC0_CLKDIV 0x0007fc00 /* Clock divider */ 125 - #define TWSIC0_MASKACK 0x00400000 /* Mask ack from sensor */ 126 - #define TWSIC0_OVMAGIC 0x00800000 /* Make it work on OV sensors */ 127 - 128 - #define REG_TWSIC1 0xbc /* TWSI control 1 */ 129 - #define TWSIC1_DATA 0x0000ffff /* Data to/from camchip */ 130 - #define TWSIC1_ADDR 0x00ff0000 /* Address (register) */ 131 - #define TWSIC1_ADDR_SHIFT 16 132 - #define TWSIC1_READ 0x01000000 /* Set for read op */ 133 - #define TWSIC1_WSTAT 0x02000000 /* Write status */ 134 - #define TWSIC1_RVALID 0x04000000 /* Read data valid */ 135 - #define TWSIC1_ERROR 0x08000000 /* Something screwed up */ 136 - 137 - 138 - #define REG_UBAR 0xc4 /* Upper base address register */ 139 - 140 - /* 141 - * Here's the weird global control registers which are said to live 142 - * way up here. 143 - */ 144 - #define REG_GL_CSR 0x3004 /* Control/status register */ 145 - #define GCSR_SRS 0x00000001 /* SW Reset set */ 146 - #define GCSR_SRC 0x00000002 /* SW Reset clear */ 147 - #define GCSR_MRS 0x00000004 /* Master reset set */ 148 - #define GCSR_MRC 0x00000008 /* HW Reset clear */ 149 - #define GCSR_CCIC_EN 0x00004000 /* CCIC Clock enable */ 150 - #define REG_GL_IMASK 0x300c /* Interrupt mask register */ 151 - #define GIMSK_CCIC_EN 0x00000004 /* CCIC Interrupt enable */ 152 - 153 - #define REG_GL_FCR 0x3038 /* GPIO functional control register */ 154 - #define GFCR_GPIO_ON 0x08 /* Camera GPIO enabled */ 155 - #define REG_GL_GPIOR 0x315c /* GPIO register */ 156 - #define GGPIO_OUT 0x80000 /* GPIO output */ 157 - #define GGPIO_VAL 0x00008 /* Output pin value */ 158 - 159 - #define REG_LEN REG_GL_IMASK + 4 160 - 161 - 162 - /* 163 - * Useful stuff that probably belongs somewhere global. 164 - */ 165 - #define VGA_WIDTH 640 166 - #define VGA_HEIGHT 480
-2267
drivers/media/video/marvell-ccic/cafe_ccic.c
··· 1 - /* 2 - * A driver for the CMOS camera controller in the Marvell 88ALP01 "cafe" 3 - * multifunction chip. Currently works with the Omnivision OV7670 4 - * sensor. 5 - * 6 - * The data sheet for this device can be found at: 7 - * http://www.marvell.com/products/pc_connectivity/88alp01/ 8 - * 9 - * Copyright 2006 One Laptop Per Child Association, Inc. 10 - * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net> 11 - * 12 - * Written by Jonathan Corbet, corbet@lwn.net. 13 - * 14 - * v4l2_device/v4l2_subdev conversion by: 15 - * Copyright (C) 2009 Hans Verkuil <hverkuil@xs4all.nl> 16 - * 17 - * Note: this conversion is untested! Please contact the linux-media 18 - * mailinglist if you can test this, together with the test results. 19 - * 20 - * This file may be distributed under the terms of the GNU General 21 - * Public License, version 2. 22 - */ 23 - 24 - #include <linux/kernel.h> 25 - #include <linux/module.h> 26 - #include <linux/init.h> 27 - #include <linux/fs.h> 28 - #include <linux/dmi.h> 29 - #include <linux/mm.h> 30 - #include <linux/pci.h> 31 - #include <linux/i2c.h> 32 - #include <linux/interrupt.h> 33 - #include <linux/spinlock.h> 34 - #include <linux/videodev2.h> 35 - #include <linux/slab.h> 36 - #include <media/v4l2-device.h> 37 - #include <media/v4l2-ioctl.h> 38 - #include <media/v4l2-chip-ident.h> 39 - #include <media/ov7670.h> 40 - #include <linux/device.h> 41 - #include <linux/wait.h> 42 - #include <linux/list.h> 43 - #include <linux/dma-mapping.h> 44 - #include <linux/delay.h> 45 - #include <linux/jiffies.h> 46 - #include <linux/vmalloc.h> 47 - 48 - #include <asm/uaccess.h> 49 - #include <asm/io.h> 50 - 51 - #include "cafe_ccic-regs.h" 52 - 53 - #define CAFE_VERSION 0x000002 54 - 55 - 56 - /* 57 - * Parameters. 58 - */ 59 - MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>"); 60 - MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver"); 61 - MODULE_LICENSE("GPL"); 62 - MODULE_SUPPORTED_DEVICE("Video"); 63 - 64 - /* 65 - * Internal DMA buffer management. Since the controller cannot do S/G I/O, 66 - * we must have physically contiguous buffers to bring frames into. 67 - * These parameters control how many buffers we use, whether we 68 - * allocate them at load time (better chance of success, but nails down 69 - * memory) or when somebody tries to use the camera (riskier), and, 70 - * for load-time allocation, how big they should be. 71 - * 72 - * The controller can cycle through three buffers. We could use 73 - * more by flipping pointers around, but it probably makes little 74 - * sense. 75 - */ 76 - 77 - #define MAX_DMA_BUFS 3 78 - static int alloc_bufs_at_read; 79 - module_param(alloc_bufs_at_read, bool, 0444); 80 - MODULE_PARM_DESC(alloc_bufs_at_read, 81 - "Non-zero value causes DMA buffers to be allocated when the " 82 - "video capture device is read, rather than at module load " 83 - "time. This saves memory, but decreases the chances of " 84 - "successfully getting those buffers."); 85 - 86 - static int n_dma_bufs = 3; 87 - module_param(n_dma_bufs, uint, 0644); 88 - MODULE_PARM_DESC(n_dma_bufs, 89 - "The number of DMA buffers to allocate. Can be either two " 90 - "(saves memory, makes timing tighter) or three."); 91 - 92 - static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */ 93 - module_param(dma_buf_size, uint, 0444); 94 - MODULE_PARM_DESC(dma_buf_size, 95 - "The size of the allocated DMA buffers. If actual operating " 96 - "parameters require larger buffers, an attempt to reallocate " 97 - "will be made."); 98 - 99 - static int min_buffers = 1; 100 - module_param(min_buffers, uint, 0644); 101 - MODULE_PARM_DESC(min_buffers, 102 - "The minimum number of streaming I/O buffers we are willing " 103 - "to work with."); 104 - 105 - static int max_buffers = 10; 106 - module_param(max_buffers, uint, 0644); 107 - MODULE_PARM_DESC(max_buffers, 108 - "The maximum number of streaming I/O buffers an application " 109 - "will be allowed to allocate. These buffers are big and live " 110 - "in vmalloc space."); 111 - 112 - static int flip; 113 - module_param(flip, bool, 0444); 114 - MODULE_PARM_DESC(flip, 115 - "If set, the sensor will be instructed to flip the image " 116 - "vertically."); 117 - 118 - 119 - enum cafe_state { 120 - S_NOTREADY, /* Not yet initialized */ 121 - S_IDLE, /* Just hanging around */ 122 - S_FLAKED, /* Some sort of problem */ 123 - S_SINGLEREAD, /* In read() */ 124 - S_SPECREAD, /* Speculative read (for future read()) */ 125 - S_STREAMING /* Streaming data */ 126 - }; 127 - 128 - /* 129 - * Tracking of streaming I/O buffers. 130 - */ 131 - struct cafe_sio_buffer { 132 - struct list_head list; 133 - struct v4l2_buffer v4lbuf; 134 - char *buffer; /* Where it lives in kernel space */ 135 - int mapcount; 136 - struct cafe_camera *cam; 137 - }; 138 - 139 - /* 140 - * A description of one of our devices. 141 - * Locking: controlled by s_mutex. Certain fields, however, require 142 - * the dev_lock spinlock; they are marked as such by comments. 143 - * dev_lock is also required for access to device registers. 144 - */ 145 - struct cafe_camera 146 - { 147 - struct v4l2_device v4l2_dev; 148 - enum cafe_state state; 149 - unsigned long flags; /* Buffer status, mainly (dev_lock) */ 150 - int users; /* How many open FDs */ 151 - struct file *owner; /* Who has data access (v4l2) */ 152 - 153 - /* 154 - * Subsystem structures. 155 - */ 156 - struct pci_dev *pdev; 157 - struct video_device vdev; 158 - struct i2c_adapter i2c_adapter; 159 - struct v4l2_subdev *sensor; 160 - unsigned short sensor_addr; 161 - 162 - unsigned char __iomem *regs; 163 - struct list_head dev_list; /* link to other devices */ 164 - 165 - /* DMA buffers */ 166 - unsigned int nbufs; /* How many are alloc'd */ 167 - int next_buf; /* Next to consume (dev_lock) */ 168 - unsigned int dma_buf_size; /* allocated size */ 169 - void *dma_bufs[MAX_DMA_BUFS]; /* Internal buffer addresses */ 170 - dma_addr_t dma_handles[MAX_DMA_BUFS]; /* Buffer bus addresses */ 171 - unsigned int specframes; /* Unconsumed spec frames (dev_lock) */ 172 - unsigned int sequence; /* Frame sequence number */ 173 - unsigned int buf_seq[MAX_DMA_BUFS]; /* Sequence for individual buffers */ 174 - 175 - /* Streaming buffers */ 176 - unsigned int n_sbufs; /* How many we have */ 177 - struct cafe_sio_buffer *sb_bufs; /* The array of housekeeping structs */ 178 - struct list_head sb_avail; /* Available for data (we own) (dev_lock) */ 179 - struct list_head sb_full; /* With data (user space owns) (dev_lock) */ 180 - struct tasklet_struct s_tasklet; 181 - 182 - /* Current operating parameters */ 183 - u32 sensor_type; /* Currently ov7670 only */ 184 - struct v4l2_pix_format pix_format; 185 - enum v4l2_mbus_pixelcode mbus_code; 186 - 187 - /* Locks */ 188 - struct mutex s_mutex; /* Access to this structure */ 189 - spinlock_t dev_lock; /* Access to device */ 190 - 191 - /* Misc */ 192 - wait_queue_head_t smbus_wait; /* Waiting on i2c events */ 193 - wait_queue_head_t iowait; /* Waiting on frame data */ 194 - }; 195 - 196 - /* 197 - * Status flags. Always manipulated with bit operations. 198 - */ 199 - #define CF_BUF0_VALID 0 /* Buffers valid - first three */ 200 - #define CF_BUF1_VALID 1 201 - #define CF_BUF2_VALID 2 202 - #define CF_DMA_ACTIVE 3 /* A frame is incoming */ 203 - #define CF_CONFIG_NEEDED 4 /* Must configure hardware */ 204 - 205 - #define sensor_call(cam, o, f, args...) \ 206 - v4l2_subdev_call(cam->sensor, o, f, ##args) 207 - 208 - static inline struct cafe_camera *to_cam(struct v4l2_device *dev) 209 - { 210 - return container_of(dev, struct cafe_camera, v4l2_dev); 211 - } 212 - 213 - static struct cafe_format_struct { 214 - __u8 *desc; 215 - __u32 pixelformat; 216 - int bpp; /* Bytes per pixel */ 217 - enum v4l2_mbus_pixelcode mbus_code; 218 - } cafe_formats[] = { 219 - { 220 - .desc = "YUYV 4:2:2", 221 - .pixelformat = V4L2_PIX_FMT_YUYV, 222 - .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 223 - .bpp = 2, 224 - }, 225 - { 226 - .desc = "RGB 444", 227 - .pixelformat = V4L2_PIX_FMT_RGB444, 228 - .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, 229 - .bpp = 2, 230 - }, 231 - { 232 - .desc = "RGB 565", 233 - .pixelformat = V4L2_PIX_FMT_RGB565, 234 - .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, 235 - .bpp = 2, 236 - }, 237 - { 238 - .desc = "Raw RGB Bayer", 239 - .pixelformat = V4L2_PIX_FMT_SBGGR8, 240 - .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8, 241 - .bpp = 1 242 - }, 243 - }; 244 - #define N_CAFE_FMTS ARRAY_SIZE(cafe_formats) 245 - 246 - static struct cafe_format_struct *cafe_find_format(u32 pixelformat) 247 - { 248 - unsigned i; 249 - 250 - for (i = 0; i < N_CAFE_FMTS; i++) 251 - if (cafe_formats[i].pixelformat == pixelformat) 252 - return cafe_formats + i; 253 - /* Not found? Then return the first format. */ 254 - return cafe_formats; 255 - } 256 - 257 - /* 258 - * Start over with DMA buffers - dev_lock needed. 259 - */ 260 - static void cafe_reset_buffers(struct cafe_camera *cam) 261 - { 262 - int i; 263 - 264 - cam->next_buf = -1; 265 - for (i = 0; i < cam->nbufs; i++) 266 - clear_bit(i, &cam->flags); 267 - cam->specframes = 0; 268 - } 269 - 270 - static inline int cafe_needs_config(struct cafe_camera *cam) 271 - { 272 - return test_bit(CF_CONFIG_NEEDED, &cam->flags); 273 - } 274 - 275 - static void cafe_set_config_needed(struct cafe_camera *cam, int needed) 276 - { 277 - if (needed) 278 - set_bit(CF_CONFIG_NEEDED, &cam->flags); 279 - else 280 - clear_bit(CF_CONFIG_NEEDED, &cam->flags); 281 - } 282 - 283 - 284 - 285 - 286 - /* 287 - * Debugging and related. 288 - */ 289 - #define cam_err(cam, fmt, arg...) \ 290 - dev_err(&(cam)->pdev->dev, fmt, ##arg); 291 - #define cam_warn(cam, fmt, arg...) \ 292 - dev_warn(&(cam)->pdev->dev, fmt, ##arg); 293 - #define cam_dbg(cam, fmt, arg...) \ 294 - dev_dbg(&(cam)->pdev->dev, fmt, ##arg); 295 - 296 - 297 - /* ---------------------------------------------------------------------*/ 298 - 299 - /* 300 - * Device register I/O 301 - */ 302 - static inline void cafe_reg_write(struct cafe_camera *cam, unsigned int reg, 303 - unsigned int val) 304 - { 305 - iowrite32(val, cam->regs + reg); 306 - } 307 - 308 - static inline unsigned int cafe_reg_read(struct cafe_camera *cam, 309 - unsigned int reg) 310 - { 311 - return ioread32(cam->regs + reg); 312 - } 313 - 314 - 315 - static inline void cafe_reg_write_mask(struct cafe_camera *cam, unsigned int reg, 316 - unsigned int val, unsigned int mask) 317 - { 318 - unsigned int v = cafe_reg_read(cam, reg); 319 - 320 - v = (v & ~mask) | (val & mask); 321 - cafe_reg_write(cam, reg, v); 322 - } 323 - 324 - static inline void cafe_reg_clear_bit(struct cafe_camera *cam, 325 - unsigned int reg, unsigned int val) 326 - { 327 - cafe_reg_write_mask(cam, reg, 0, val); 328 - } 329 - 330 - static inline void cafe_reg_set_bit(struct cafe_camera *cam, 331 - unsigned int reg, unsigned int val) 332 - { 333 - cafe_reg_write_mask(cam, reg, val, val); 334 - } 335 - 336 - 337 - 338 - /* -------------------------------------------------------------------- */ 339 - /* 340 - * The I2C/SMBUS interface to the camera itself starts here. The 341 - * controller handles SMBUS itself, presenting a relatively simple register 342 - * interface; all we have to do is to tell it where to route the data. 343 - */ 344 - #define CAFE_SMBUS_TIMEOUT (HZ) /* generous */ 345 - 346 - static int cafe_smbus_write_done(struct cafe_camera *cam) 347 - { 348 - unsigned long flags; 349 - int c1; 350 - 351 - /* 352 - * We must delay after the interrupt, or the controller gets confused 353 - * and never does give us good status. Fortunately, we don't do this 354 - * often. 355 - */ 356 - udelay(20); 357 - spin_lock_irqsave(&cam->dev_lock, flags); 358 - c1 = cafe_reg_read(cam, REG_TWSIC1); 359 - spin_unlock_irqrestore(&cam->dev_lock, flags); 360 - return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT; 361 - } 362 - 363 - static int cafe_smbus_write_data(struct cafe_camera *cam, 364 - u16 addr, u8 command, u8 value) 365 - { 366 - unsigned int rval; 367 - unsigned long flags; 368 - 369 - spin_lock_irqsave(&cam->dev_lock, flags); 370 - rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID); 371 - rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */ 372 - /* 373 - * Marvell sez set clkdiv to all 1's for now. 374 - */ 375 - rval |= TWSIC0_CLKDIV; 376 - cafe_reg_write(cam, REG_TWSIC0, rval); 377 - (void) cafe_reg_read(cam, REG_TWSIC1); /* force write */ 378 - rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR); 379 - cafe_reg_write(cam, REG_TWSIC1, rval); 380 - spin_unlock_irqrestore(&cam->dev_lock, flags); 381 - 382 - /* Unfortunately, reading TWSIC1 too soon after sending a command 383 - * causes the device to die. 384 - * Use a busy-wait because we often send a large quantity of small 385 - * commands at-once; using msleep() would cause a lot of context 386 - * switches which take longer than 2ms, resulting in a noticeable 387 - * boot-time and capture-start delays. 388 - */ 389 - mdelay(2); 390 - 391 - /* 392 - * Another sad fact is that sometimes, commands silently complete but 393 - * cafe_smbus_write_done() never becomes aware of this. 394 - * This happens at random and appears to possible occur with any 395 - * command. 396 - * We don't understand why this is. We work around this issue 397 - * with the timeout in the wait below, assuming that all commands 398 - * complete within the timeout. 399 - */ 400 - wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(cam), 401 - CAFE_SMBUS_TIMEOUT); 402 - 403 - spin_lock_irqsave(&cam->dev_lock, flags); 404 - rval = cafe_reg_read(cam, REG_TWSIC1); 405 - spin_unlock_irqrestore(&cam->dev_lock, flags); 406 - 407 - if (rval & TWSIC1_WSTAT) { 408 - cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr, 409 - command, value); 410 - return -EIO; 411 - } 412 - if (rval & TWSIC1_ERROR) { 413 - cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr, 414 - command, value); 415 - return -EIO; 416 - } 417 - return 0; 418 - } 419 - 420 - 421 - 422 - static int cafe_smbus_read_done(struct cafe_camera *cam) 423 - { 424 - unsigned long flags; 425 - int c1; 426 - 427 - /* 428 - * We must delay after the interrupt, or the controller gets confused 429 - * and never does give us good status. Fortunately, we don't do this 430 - * often. 431 - */ 432 - udelay(20); 433 - spin_lock_irqsave(&cam->dev_lock, flags); 434 - c1 = cafe_reg_read(cam, REG_TWSIC1); 435 - spin_unlock_irqrestore(&cam->dev_lock, flags); 436 - return c1 & (TWSIC1_RVALID|TWSIC1_ERROR); 437 - } 438 - 439 - 440 - 441 - static int cafe_smbus_read_data(struct cafe_camera *cam, 442 - u16 addr, u8 command, u8 *value) 443 - { 444 - unsigned int rval; 445 - unsigned long flags; 446 - 447 - spin_lock_irqsave(&cam->dev_lock, flags); 448 - rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID); 449 - rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */ 450 - /* 451 - * Marvel sez set clkdiv to all 1's for now. 452 - */ 453 - rval |= TWSIC0_CLKDIV; 454 - cafe_reg_write(cam, REG_TWSIC0, rval); 455 - (void) cafe_reg_read(cam, REG_TWSIC1); /* force write */ 456 - rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR); 457 - cafe_reg_write(cam, REG_TWSIC1, rval); 458 - spin_unlock_irqrestore(&cam->dev_lock, flags); 459 - 460 - wait_event_timeout(cam->smbus_wait, 461 - cafe_smbus_read_done(cam), CAFE_SMBUS_TIMEOUT); 462 - spin_lock_irqsave(&cam->dev_lock, flags); 463 - rval = cafe_reg_read(cam, REG_TWSIC1); 464 - spin_unlock_irqrestore(&cam->dev_lock, flags); 465 - 466 - if (rval & TWSIC1_ERROR) { 467 - cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command); 468 - return -EIO; 469 - } 470 - if (! (rval & TWSIC1_RVALID)) { 471 - cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr, 472 - command); 473 - return -EIO; 474 - } 475 - *value = rval & 0xff; 476 - return 0; 477 - } 478 - 479 - /* 480 - * Perform a transfer over SMBUS. This thing is called under 481 - * the i2c bus lock, so we shouldn't race with ourselves... 482 - */ 483 - static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr, 484 - unsigned short flags, char rw, u8 command, 485 - int size, union i2c_smbus_data *data) 486 - { 487 - struct v4l2_device *v4l2_dev = i2c_get_adapdata(adapter); 488 - struct cafe_camera *cam = to_cam(v4l2_dev); 489 - int ret = -EINVAL; 490 - 491 - /* 492 - * This interface would appear to only do byte data ops. OK 493 - * it can do word too, but the cam chip has no use for that. 494 - */ 495 - if (size != I2C_SMBUS_BYTE_DATA) { 496 - cam_err(cam, "funky xfer size %d\n", size); 497 - return -EINVAL; 498 - } 499 - 500 - if (rw == I2C_SMBUS_WRITE) 501 - ret = cafe_smbus_write_data(cam, addr, command, data->byte); 502 - else if (rw == I2C_SMBUS_READ) 503 - ret = cafe_smbus_read_data(cam, addr, command, &data->byte); 504 - return ret; 505 - } 506 - 507 - 508 - static void cafe_smbus_enable_irq(struct cafe_camera *cam) 509 - { 510 - unsigned long flags; 511 - 512 - spin_lock_irqsave(&cam->dev_lock, flags); 513 - cafe_reg_set_bit(cam, REG_IRQMASK, TWSIIRQS); 514 - spin_unlock_irqrestore(&cam->dev_lock, flags); 515 - } 516 - 517 - static u32 cafe_smbus_func(struct i2c_adapter *adapter) 518 - { 519 - return I2C_FUNC_SMBUS_READ_BYTE_DATA | 520 - I2C_FUNC_SMBUS_WRITE_BYTE_DATA; 521 - } 522 - 523 - static struct i2c_algorithm cafe_smbus_algo = { 524 - .smbus_xfer = cafe_smbus_xfer, 525 - .functionality = cafe_smbus_func 526 - }; 527 - 528 - /* Somebody is on the bus */ 529 - static void cafe_ctlr_stop_dma(struct cafe_camera *cam); 530 - static void cafe_ctlr_power_down(struct cafe_camera *cam); 531 - 532 - static int cafe_smbus_setup(struct cafe_camera *cam) 533 - { 534 - struct i2c_adapter *adap = &cam->i2c_adapter; 535 - int ret; 536 - 537 - cafe_smbus_enable_irq(cam); 538 - adap->owner = THIS_MODULE; 539 - adap->algo = &cafe_smbus_algo; 540 - strcpy(adap->name, "cafe_ccic"); 541 - adap->dev.parent = &cam->pdev->dev; 542 - i2c_set_adapdata(adap, &cam->v4l2_dev); 543 - ret = i2c_add_adapter(adap); 544 - if (ret) 545 - printk(KERN_ERR "Unable to register cafe i2c adapter\n"); 546 - return ret; 547 - } 548 - 549 - static void cafe_smbus_shutdown(struct cafe_camera *cam) 550 - { 551 - i2c_del_adapter(&cam->i2c_adapter); 552 - } 553 - 554 - 555 - /* ------------------------------------------------------------------- */ 556 - /* 557 - * Deal with the controller. 558 - */ 559 - 560 - /* 561 - * Do everything we think we need to have the interface operating 562 - * according to the desired format. 563 - */ 564 - static void cafe_ctlr_dma(struct cafe_camera *cam) 565 - { 566 - /* 567 - * Store the first two Y buffers (we aren't supporting 568 - * planar formats for now, so no UV bufs). Then either 569 - * set the third if it exists, or tell the controller 570 - * to just use two. 571 - */ 572 - cafe_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]); 573 - cafe_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]); 574 - if (cam->nbufs > 2) { 575 - cafe_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]); 576 - cafe_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS); 577 - } 578 - else 579 - cafe_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); 580 - cafe_reg_write(cam, REG_UBAR, 0); /* 32 bits only for now */ 581 - } 582 - 583 - static void cafe_ctlr_image(struct cafe_camera *cam) 584 - { 585 - int imgsz; 586 - struct v4l2_pix_format *fmt = &cam->pix_format; 587 - 588 - imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) | 589 - (fmt->bytesperline & IMGSZ_H_MASK); 590 - cafe_reg_write(cam, REG_IMGSIZE, imgsz); 591 - cafe_reg_write(cam, REG_IMGOFFSET, 0); 592 - /* YPITCH just drops the last two bits */ 593 - cafe_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline, 594 - IMGP_YP_MASK); 595 - /* 596 - * Tell the controller about the image format we are using. 597 - */ 598 - switch (cam->pix_format.pixelformat) { 599 - case V4L2_PIX_FMT_YUYV: 600 - cafe_reg_write_mask(cam, REG_CTRL0, 601 - C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV, 602 - C0_DF_MASK); 603 - break; 604 - 605 - case V4L2_PIX_FMT_RGB444: 606 - cafe_reg_write_mask(cam, REG_CTRL0, 607 - C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB, 608 - C0_DF_MASK); 609 - /* Alpha value? */ 610 - break; 611 - 612 - case V4L2_PIX_FMT_RGB565: 613 - cafe_reg_write_mask(cam, REG_CTRL0, 614 - C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR, 615 - C0_DF_MASK); 616 - break; 617 - 618 - default: 619 - cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat); 620 - break; 621 - } 622 - /* 623 - * Make sure it knows we want to use hsync/vsync. 624 - */ 625 - cafe_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, 626 - C0_SIFM_MASK); 627 - } 628 - 629 - 630 - /* 631 - * Configure the controller for operation; caller holds the 632 - * device mutex. 633 - */ 634 - static int cafe_ctlr_configure(struct cafe_camera *cam) 635 - { 636 - unsigned long flags; 637 - 638 - spin_lock_irqsave(&cam->dev_lock, flags); 639 - cafe_ctlr_dma(cam); 640 - cafe_ctlr_image(cam); 641 - cafe_set_config_needed(cam, 0); 642 - spin_unlock_irqrestore(&cam->dev_lock, flags); 643 - return 0; 644 - } 645 - 646 - static void cafe_ctlr_irq_enable(struct cafe_camera *cam) 647 - { 648 - /* 649 - * Clear any pending interrupts, since we do not 650 - * expect to have I/O active prior to enabling. 651 - */ 652 - cafe_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); 653 - cafe_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS); 654 - } 655 - 656 - static void cafe_ctlr_irq_disable(struct cafe_camera *cam) 657 - { 658 - cafe_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS); 659 - } 660 - 661 - /* 662 - * Make the controller start grabbing images. Everything must 663 - * be set up before doing this. 664 - */ 665 - static void cafe_ctlr_start(struct cafe_camera *cam) 666 - { 667 - /* set_bit performs a read, so no other barrier should be 668 - needed here */ 669 - cafe_reg_set_bit(cam, REG_CTRL0, C0_ENABLE); 670 - } 671 - 672 - static void cafe_ctlr_stop(struct cafe_camera *cam) 673 - { 674 - cafe_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); 675 - } 676 - 677 - static void cafe_ctlr_init(struct cafe_camera *cam) 678 - { 679 - unsigned long flags; 680 - 681 - spin_lock_irqsave(&cam->dev_lock, flags); 682 - /* 683 - * Added magic to bring up the hardware on the B-Test board 684 - */ 685 - cafe_reg_write(cam, 0x3038, 0x8); 686 - cafe_reg_write(cam, 0x315c, 0x80008); 687 - /* 688 - * Go through the dance needed to wake the device up. 689 - * Note that these registers are global and shared 690 - * with the NAND and SD devices. Interaction between the 691 - * three still needs to be examined. 692 - */ 693 - cafe_reg_write(cam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */ 694 - cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRC); 695 - cafe_reg_write(cam, REG_GL_CSR, GCSR_SRC|GCSR_MRS); 696 - /* 697 - * Here we must wait a bit for the controller to come around. 698 - */ 699 - spin_unlock_irqrestore(&cam->dev_lock, flags); 700 - msleep(5); 701 - spin_lock_irqsave(&cam->dev_lock, flags); 702 - 703 - cafe_reg_write(cam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC); 704 - cafe_reg_set_bit(cam, REG_GL_IMASK, GIMSK_CCIC_EN); 705 - /* 706 - * Make sure it's not powered down. 707 - */ 708 - cafe_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); 709 - /* 710 - * Turn off the enable bit. It sure should be off anyway, 711 - * but it's good to be sure. 712 - */ 713 - cafe_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); 714 - /* 715 - * Mask all interrupts. 716 - */ 717 - cafe_reg_write(cam, REG_IRQMASK, 0); 718 - /* 719 - * Clock the sensor appropriately. Controller clock should 720 - * be 48MHz, sensor "typical" value is half that. 721 - */ 722 - cafe_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK); 723 - spin_unlock_irqrestore(&cam->dev_lock, flags); 724 - } 725 - 726 - 727 - /* 728 - * Stop the controller, and don't return until we're really sure that no 729 - * further DMA is going on. 730 - */ 731 - static void cafe_ctlr_stop_dma(struct cafe_camera *cam) 732 - { 733 - unsigned long flags; 734 - 735 - /* 736 - * Theory: stop the camera controller (whether it is operating 737 - * or not). Delay briefly just in case we race with the SOF 738 - * interrupt, then wait until no DMA is active. 739 - */ 740 - spin_lock_irqsave(&cam->dev_lock, flags); 741 - cafe_ctlr_stop(cam); 742 - spin_unlock_irqrestore(&cam->dev_lock, flags); 743 - mdelay(1); 744 - wait_event_timeout(cam->iowait, 745 - !test_bit(CF_DMA_ACTIVE, &cam->flags), HZ); 746 - if (test_bit(CF_DMA_ACTIVE, &cam->flags)) 747 - cam_err(cam, "Timeout waiting for DMA to end\n"); 748 - /* This would be bad news - what now? */ 749 - spin_lock_irqsave(&cam->dev_lock, flags); 750 - cam->state = S_IDLE; 751 - cafe_ctlr_irq_disable(cam); 752 - spin_unlock_irqrestore(&cam->dev_lock, flags); 753 - } 754 - 755 - /* 756 - * Power up and down. 757 - */ 758 - static void cafe_ctlr_power_up(struct cafe_camera *cam) 759 - { 760 - unsigned long flags; 761 - 762 - spin_lock_irqsave(&cam->dev_lock, flags); 763 - cafe_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); 764 - /* 765 - * Part one of the sensor dance: turn the global 766 - * GPIO signal on. 767 - */ 768 - cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON); 769 - cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL); 770 - /* 771 - * Put the sensor into operational mode (assumes OLPC-style 772 - * wiring). Control 0 is reset - set to 1 to operate. 773 - * Control 1 is power down, set to 0 to operate. 774 - */ 775 - cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */ 776 - /* mdelay(1); */ /* Marvell says 1ms will do it */ 777 - cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0); 778 - /* mdelay(1); */ /* Enough? */ 779 - spin_unlock_irqrestore(&cam->dev_lock, flags); 780 - msleep(5); /* Just to be sure */ 781 - } 782 - 783 - static void cafe_ctlr_power_down(struct cafe_camera *cam) 784 - { 785 - unsigned long flags; 786 - 787 - spin_lock_irqsave(&cam->dev_lock, flags); 788 - cafe_reg_write(cam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1); 789 - cafe_reg_write(cam, REG_GL_FCR, GFCR_GPIO_ON); 790 - cafe_reg_write(cam, REG_GL_GPIOR, GGPIO_OUT); 791 - cafe_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN); 792 - spin_unlock_irqrestore(&cam->dev_lock, flags); 793 - } 794 - 795 - /* -------------------------------------------------------------------- */ 796 - /* 797 - * Communications with the sensor. 798 - */ 799 - 800 - static int __cafe_cam_reset(struct cafe_camera *cam) 801 - { 802 - return sensor_call(cam, core, reset, 0); 803 - } 804 - 805 - /* 806 - * We have found the sensor on the i2c. Let's try to have a 807 - * conversation. 808 - */ 809 - static int cafe_cam_init(struct cafe_camera *cam) 810 - { 811 - struct v4l2_dbg_chip_ident chip; 812 - int ret; 813 - 814 - mutex_lock(&cam->s_mutex); 815 - if (cam->state != S_NOTREADY) 816 - cam_warn(cam, "Cam init with device in funky state %d", 817 - cam->state); 818 - ret = __cafe_cam_reset(cam); 819 - if (ret) 820 - goto out; 821 - chip.ident = V4L2_IDENT_NONE; 822 - chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR; 823 - chip.match.addr = cam->sensor_addr; 824 - ret = sensor_call(cam, core, g_chip_ident, &chip); 825 - if (ret) 826 - goto out; 827 - cam->sensor_type = chip.ident; 828 - if (cam->sensor_type != V4L2_IDENT_OV7670) { 829 - cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type); 830 - ret = -EINVAL; 831 - goto out; 832 - } 833 - /* Get/set parameters? */ 834 - ret = 0; 835 - cam->state = S_IDLE; 836 - out: 837 - cafe_ctlr_power_down(cam); 838 - mutex_unlock(&cam->s_mutex); 839 - return ret; 840 - } 841 - 842 - /* 843 - * Configure the sensor to match the parameters we have. Caller should 844 - * hold s_mutex 845 - */ 846 - static int cafe_cam_set_flip(struct cafe_camera *cam) 847 - { 848 - struct v4l2_control ctrl; 849 - 850 - memset(&ctrl, 0, sizeof(ctrl)); 851 - ctrl.id = V4L2_CID_VFLIP; 852 - ctrl.value = flip; 853 - return sensor_call(cam, core, s_ctrl, &ctrl); 854 - } 855 - 856 - 857 - static int cafe_cam_configure(struct cafe_camera *cam) 858 - { 859 - struct v4l2_mbus_framefmt mbus_fmt; 860 - int ret; 861 - 862 - v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code); 863 - ret = sensor_call(cam, core, init, 0); 864 - if (ret == 0) 865 - ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt); 866 - /* 867 - * OV7670 does weird things if flip is set *before* format... 868 - */ 869 - ret += cafe_cam_set_flip(cam); 870 - return ret; 871 - } 872 - 873 - /* -------------------------------------------------------------------- */ 874 - /* 875 - * DMA buffer management. These functions need s_mutex held. 876 - */ 877 - 878 - /* FIXME: this is inefficient as hell, since dma_alloc_coherent just 879 - * does a get_free_pages() call, and we waste a good chunk of an orderN 880 - * allocation. Should try to allocate the whole set in one chunk. 881 - */ 882 - static int cafe_alloc_dma_bufs(struct cafe_camera *cam, int loadtime) 883 - { 884 - int i; 885 - 886 - cafe_set_config_needed(cam, 1); 887 - if (loadtime) 888 - cam->dma_buf_size = dma_buf_size; 889 - else 890 - cam->dma_buf_size = cam->pix_format.sizeimage; 891 - if (n_dma_bufs > 3) 892 - n_dma_bufs = 3; 893 - 894 - cam->nbufs = 0; 895 - for (i = 0; i < n_dma_bufs; i++) { 896 - cam->dma_bufs[i] = dma_alloc_coherent(&cam->pdev->dev, 897 - cam->dma_buf_size, cam->dma_handles + i, 898 - GFP_KERNEL); 899 - if (cam->dma_bufs[i] == NULL) { 900 - cam_warn(cam, "Failed to allocate DMA buffer\n"); 901 - break; 902 - } 903 - /* For debug, remove eventually */ 904 - memset(cam->dma_bufs[i], 0xcc, cam->dma_buf_size); 905 - (cam->nbufs)++; 906 - } 907 - 908 - switch (cam->nbufs) { 909 - case 1: 910 - dma_free_coherent(&cam->pdev->dev, cam->dma_buf_size, 911 - cam->dma_bufs[0], cam->dma_handles[0]); 912 - cam->nbufs = 0; 913 - case 0: 914 - cam_err(cam, "Insufficient DMA buffers, cannot operate\n"); 915 - return -ENOMEM; 916 - 917 - case 2: 918 - if (n_dma_bufs > 2) 919 - cam_warn(cam, "Will limp along with only 2 buffers\n"); 920 - break; 921 - } 922 - return 0; 923 - } 924 - 925 - static void cafe_free_dma_bufs(struct cafe_camera *cam) 926 - { 927 - int i; 928 - 929 - for (i = 0; i < cam->nbufs; i++) { 930 - dma_free_coherent(&cam->pdev->dev, cam->dma_buf_size, 931 - cam->dma_bufs[i], cam->dma_handles[i]); 932 - cam->dma_bufs[i] = NULL; 933 - } 934 - cam->nbufs = 0; 935 - } 936 - 937 - 938 - 939 - 940 - 941 - /* ----------------------------------------------------------------------- */ 942 - /* 943 - * Here starts the V4L2 interface code. 944 - */ 945 - 946 - /* 947 - * Read an image from the device. 948 - */ 949 - static ssize_t cafe_deliver_buffer(struct cafe_camera *cam, 950 - char __user *buffer, size_t len, loff_t *pos) 951 - { 952 - int bufno; 953 - unsigned long flags; 954 - 955 - spin_lock_irqsave(&cam->dev_lock, flags); 956 - if (cam->next_buf < 0) { 957 - cam_err(cam, "deliver_buffer: No next buffer\n"); 958 - spin_unlock_irqrestore(&cam->dev_lock, flags); 959 - return -EIO; 960 - } 961 - bufno = cam->next_buf; 962 - clear_bit(bufno, &cam->flags); 963 - if (++(cam->next_buf) >= cam->nbufs) 964 - cam->next_buf = 0; 965 - if (! test_bit(cam->next_buf, &cam->flags)) 966 - cam->next_buf = -1; 967 - cam->specframes = 0; 968 - spin_unlock_irqrestore(&cam->dev_lock, flags); 969 - 970 - if (len > cam->pix_format.sizeimage) 971 - len = cam->pix_format.sizeimage; 972 - if (copy_to_user(buffer, cam->dma_bufs[bufno], len)) 973 - return -EFAULT; 974 - (*pos) += len; 975 - return len; 976 - } 977 - 978 - /* 979 - * Get everything ready, and start grabbing frames. 980 - */ 981 - static int cafe_read_setup(struct cafe_camera *cam, enum cafe_state state) 982 - { 983 - int ret; 984 - unsigned long flags; 985 - 986 - /* 987 - * Configuration. If we still don't have DMA buffers, 988 - * make one last, desperate attempt. 989 - */ 990 - if (cam->nbufs == 0) 991 - if (cafe_alloc_dma_bufs(cam, 0)) 992 - return -ENOMEM; 993 - 994 - if (cafe_needs_config(cam)) { 995 - cafe_cam_configure(cam); 996 - ret = cafe_ctlr_configure(cam); 997 - if (ret) 998 - return ret; 999 - } 1000 - 1001 - /* 1002 - * Turn it loose. 1003 - */ 1004 - spin_lock_irqsave(&cam->dev_lock, flags); 1005 - cafe_reset_buffers(cam); 1006 - cafe_ctlr_irq_enable(cam); 1007 - cam->state = state; 1008 - cafe_ctlr_start(cam); 1009 - spin_unlock_irqrestore(&cam->dev_lock, flags); 1010 - return 0; 1011 - } 1012 - 1013 - 1014 - static ssize_t cafe_v4l_read(struct file *filp, 1015 - char __user *buffer, size_t len, loff_t *pos) 1016 - { 1017 - struct cafe_camera *cam = filp->private_data; 1018 - int ret = 0; 1019 - 1020 - /* 1021 - * Perhaps we're in speculative read mode and already 1022 - * have data? 1023 - */ 1024 - mutex_lock(&cam->s_mutex); 1025 - if (cam->state == S_SPECREAD) { 1026 - if (cam->next_buf >= 0) { 1027 - ret = cafe_deliver_buffer(cam, buffer, len, pos); 1028 - if (ret != 0) 1029 - goto out_unlock; 1030 - } 1031 - } else if (cam->state == S_FLAKED || cam->state == S_NOTREADY) { 1032 - ret = -EIO; 1033 - goto out_unlock; 1034 - } else if (cam->state != S_IDLE) { 1035 - ret = -EBUSY; 1036 - goto out_unlock; 1037 - } 1038 - 1039 - /* 1040 - * v4l2: multiple processes can open the device, but only 1041 - * one gets to grab data from it. 1042 - */ 1043 - if (cam->owner && cam->owner != filp) { 1044 - ret = -EBUSY; 1045 - goto out_unlock; 1046 - } 1047 - cam->owner = filp; 1048 - 1049 - /* 1050 - * Do setup if need be. 1051 - */ 1052 - if (cam->state != S_SPECREAD) { 1053 - ret = cafe_read_setup(cam, S_SINGLEREAD); 1054 - if (ret) 1055 - goto out_unlock; 1056 - } 1057 - /* 1058 - * Wait for something to happen. This should probably 1059 - * be interruptible (FIXME). 1060 - */ 1061 - wait_event_timeout(cam->iowait, cam->next_buf >= 0, HZ); 1062 - if (cam->next_buf < 0) { 1063 - cam_err(cam, "read() operation timed out\n"); 1064 - cafe_ctlr_stop_dma(cam); 1065 - ret = -EIO; 1066 - goto out_unlock; 1067 - } 1068 - /* 1069 - * Give them their data and we should be done. 1070 - */ 1071 - ret = cafe_deliver_buffer(cam, buffer, len, pos); 1072 - 1073 - out_unlock: 1074 - mutex_unlock(&cam->s_mutex); 1075 - return ret; 1076 - } 1077 - 1078 - 1079 - 1080 - 1081 - 1082 - 1083 - 1084 - 1085 - /* 1086 - * Streaming I/O support. 1087 - */ 1088 - 1089 - 1090 - 1091 - static int cafe_vidioc_streamon(struct file *filp, void *priv, 1092 - enum v4l2_buf_type type) 1093 - { 1094 - struct cafe_camera *cam = filp->private_data; 1095 - int ret = -EINVAL; 1096 - 1097 - if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 1098 - goto out; 1099 - mutex_lock(&cam->s_mutex); 1100 - if (cam->state != S_IDLE || cam->n_sbufs == 0) 1101 - goto out_unlock; 1102 - 1103 - cam->sequence = 0; 1104 - ret = cafe_read_setup(cam, S_STREAMING); 1105 - 1106 - out_unlock: 1107 - mutex_unlock(&cam->s_mutex); 1108 - out: 1109 - return ret; 1110 - } 1111 - 1112 - 1113 - static int cafe_vidioc_streamoff(struct file *filp, void *priv, 1114 - enum v4l2_buf_type type) 1115 - { 1116 - struct cafe_camera *cam = filp->private_data; 1117 - int ret = -EINVAL; 1118 - 1119 - if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 1120 - goto out; 1121 - mutex_lock(&cam->s_mutex); 1122 - if (cam->state != S_STREAMING) 1123 - goto out_unlock; 1124 - 1125 - cafe_ctlr_stop_dma(cam); 1126 - ret = 0; 1127 - 1128 - out_unlock: 1129 - mutex_unlock(&cam->s_mutex); 1130 - out: 1131 - return ret; 1132 - } 1133 - 1134 - 1135 - 1136 - static int cafe_setup_siobuf(struct cafe_camera *cam, int index) 1137 - { 1138 - struct cafe_sio_buffer *buf = cam->sb_bufs + index; 1139 - 1140 - INIT_LIST_HEAD(&buf->list); 1141 - buf->v4lbuf.length = PAGE_ALIGN(cam->pix_format.sizeimage); 1142 - buf->buffer = vmalloc_user(buf->v4lbuf.length); 1143 - if (buf->buffer == NULL) 1144 - return -ENOMEM; 1145 - buf->mapcount = 0; 1146 - buf->cam = cam; 1147 - 1148 - buf->v4lbuf.index = index; 1149 - buf->v4lbuf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 1150 - buf->v4lbuf.field = V4L2_FIELD_NONE; 1151 - buf->v4lbuf.memory = V4L2_MEMORY_MMAP; 1152 - /* 1153 - * Offset: must be 32-bit even on a 64-bit system. videobuf-dma-sg 1154 - * just uses the length times the index, but the spec warns 1155 - * against doing just that - vma merging problems. So we 1156 - * leave a gap between each pair of buffers. 1157 - */ 1158 - buf->v4lbuf.m.offset = 2*index*buf->v4lbuf.length; 1159 - return 0; 1160 - } 1161 - 1162 - static int cafe_free_sio_buffers(struct cafe_camera *cam) 1163 - { 1164 - int i; 1165 - 1166 - /* 1167 - * If any buffers are mapped, we cannot free them at all. 1168 - */ 1169 - for (i = 0; i < cam->n_sbufs; i++) 1170 - if (cam->sb_bufs[i].mapcount > 0) 1171 - return -EBUSY; 1172 - /* 1173 - * OK, let's do it. 1174 - */ 1175 - for (i = 0; i < cam->n_sbufs; i++) 1176 - vfree(cam->sb_bufs[i].buffer); 1177 - cam->n_sbufs = 0; 1178 - kfree(cam->sb_bufs); 1179 - cam->sb_bufs = NULL; 1180 - INIT_LIST_HEAD(&cam->sb_avail); 1181 - INIT_LIST_HEAD(&cam->sb_full); 1182 - return 0; 1183 - } 1184 - 1185 - 1186 - 1187 - static int cafe_vidioc_reqbufs(struct file *filp, void *priv, 1188 - struct v4l2_requestbuffers *req) 1189 - { 1190 - struct cafe_camera *cam = filp->private_data; 1191 - int ret = 0; /* Silence warning */ 1192 - 1193 - /* 1194 - * Make sure it's something we can do. User pointers could be 1195 - * implemented without great pain, but that's not been done yet. 1196 - */ 1197 - if (req->memory != V4L2_MEMORY_MMAP) 1198 - return -EINVAL; 1199 - /* 1200 - * If they ask for zero buffers, they really want us to stop streaming 1201 - * (if it's happening) and free everything. Should we check owner? 1202 - */ 1203 - mutex_lock(&cam->s_mutex); 1204 - if (req->count == 0) { 1205 - if (cam->state == S_STREAMING) 1206 - cafe_ctlr_stop_dma(cam); 1207 - ret = cafe_free_sio_buffers (cam); 1208 - goto out; 1209 - } 1210 - /* 1211 - * Device needs to be idle and working. We *could* try to do the 1212 - * right thing in S_SPECREAD by shutting things down, but it 1213 - * probably doesn't matter. 1214 - */ 1215 - if (cam->state != S_IDLE || (cam->owner && cam->owner != filp)) { 1216 - ret = -EBUSY; 1217 - goto out; 1218 - } 1219 - cam->owner = filp; 1220 - 1221 - if (req->count < min_buffers) 1222 - req->count = min_buffers; 1223 - else if (req->count > max_buffers) 1224 - req->count = max_buffers; 1225 - if (cam->n_sbufs > 0) { 1226 - ret = cafe_free_sio_buffers(cam); 1227 - if (ret) 1228 - goto out; 1229 - } 1230 - 1231 - cam->sb_bufs = kzalloc(req->count*sizeof(struct cafe_sio_buffer), 1232 - GFP_KERNEL); 1233 - if (cam->sb_bufs == NULL) { 1234 - ret = -ENOMEM; 1235 - goto out; 1236 - } 1237 - for (cam->n_sbufs = 0; cam->n_sbufs < req->count; (cam->n_sbufs++)) { 1238 - ret = cafe_setup_siobuf(cam, cam->n_sbufs); 1239 - if (ret) 1240 - break; 1241 - } 1242 - 1243 - if (cam->n_sbufs == 0) /* no luck at all - ret already set */ 1244 - kfree(cam->sb_bufs); 1245 - req->count = cam->n_sbufs; /* In case of partial success */ 1246 - 1247 - out: 1248 - mutex_unlock(&cam->s_mutex); 1249 - return ret; 1250 - } 1251 - 1252 - 1253 - static int cafe_vidioc_querybuf(struct file *filp, void *priv, 1254 - struct v4l2_buffer *buf) 1255 - { 1256 - struct cafe_camera *cam = filp->private_data; 1257 - int ret = -EINVAL; 1258 - 1259 - mutex_lock(&cam->s_mutex); 1260 - if (buf->index >= cam->n_sbufs) 1261 - goto out; 1262 - *buf = cam->sb_bufs[buf->index].v4lbuf; 1263 - ret = 0; 1264 - out: 1265 - mutex_unlock(&cam->s_mutex); 1266 - return ret; 1267 - } 1268 - 1269 - static int cafe_vidioc_qbuf(struct file *filp, void *priv, 1270 - struct v4l2_buffer *buf) 1271 - { 1272 - struct cafe_camera *cam = filp->private_data; 1273 - struct cafe_sio_buffer *sbuf; 1274 - int ret = -EINVAL; 1275 - unsigned long flags; 1276 - 1277 - mutex_lock(&cam->s_mutex); 1278 - if (buf->index >= cam->n_sbufs) 1279 - goto out; 1280 - sbuf = cam->sb_bufs + buf->index; 1281 - if (sbuf->v4lbuf.flags & V4L2_BUF_FLAG_QUEUED) { 1282 - ret = 0; /* Already queued?? */ 1283 - goto out; 1284 - } 1285 - if (sbuf->v4lbuf.flags & V4L2_BUF_FLAG_DONE) { 1286 - /* Spec doesn't say anything, seems appropriate tho */ 1287 - ret = -EBUSY; 1288 - goto out; 1289 - } 1290 - sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_QUEUED; 1291 - spin_lock_irqsave(&cam->dev_lock, flags); 1292 - list_add(&sbuf->list, &cam->sb_avail); 1293 - spin_unlock_irqrestore(&cam->dev_lock, flags); 1294 - ret = 0; 1295 - out: 1296 - mutex_unlock(&cam->s_mutex); 1297 - return ret; 1298 - } 1299 - 1300 - static int cafe_vidioc_dqbuf(struct file *filp, void *priv, 1301 - struct v4l2_buffer *buf) 1302 - { 1303 - struct cafe_camera *cam = filp->private_data; 1304 - struct cafe_sio_buffer *sbuf; 1305 - int ret = -EINVAL; 1306 - unsigned long flags; 1307 - 1308 - mutex_lock(&cam->s_mutex); 1309 - if (cam->state != S_STREAMING) 1310 - goto out_unlock; 1311 - if (list_empty(&cam->sb_full) && filp->f_flags & O_NONBLOCK) { 1312 - ret = -EAGAIN; 1313 - goto out_unlock; 1314 - } 1315 - 1316 - while (list_empty(&cam->sb_full) && cam->state == S_STREAMING) { 1317 - mutex_unlock(&cam->s_mutex); 1318 - if (wait_event_interruptible(cam->iowait, 1319 - !list_empty(&cam->sb_full))) { 1320 - ret = -ERESTARTSYS; 1321 - goto out; 1322 - } 1323 - mutex_lock(&cam->s_mutex); 1324 - } 1325 - 1326 - if (cam->state != S_STREAMING) 1327 - ret = -EINTR; 1328 - else { 1329 - spin_lock_irqsave(&cam->dev_lock, flags); 1330 - /* Should probably recheck !list_empty() here */ 1331 - sbuf = list_entry(cam->sb_full.next, 1332 - struct cafe_sio_buffer, list); 1333 - list_del_init(&sbuf->list); 1334 - spin_unlock_irqrestore(&cam->dev_lock, flags); 1335 - sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_DONE; 1336 - *buf = sbuf->v4lbuf; 1337 - ret = 0; 1338 - } 1339 - 1340 - out_unlock: 1341 - mutex_unlock(&cam->s_mutex); 1342 - out: 1343 - return ret; 1344 - } 1345 - 1346 - 1347 - 1348 - static void cafe_v4l_vm_open(struct vm_area_struct *vma) 1349 - { 1350 - struct cafe_sio_buffer *sbuf = vma->vm_private_data; 1351 - /* 1352 - * Locking: done under mmap_sem, so we don't need to 1353 - * go back to the camera lock here. 1354 - */ 1355 - sbuf->mapcount++; 1356 - } 1357 - 1358 - 1359 - static void cafe_v4l_vm_close(struct vm_area_struct *vma) 1360 - { 1361 - struct cafe_sio_buffer *sbuf = vma->vm_private_data; 1362 - 1363 - mutex_lock(&sbuf->cam->s_mutex); 1364 - sbuf->mapcount--; 1365 - /* Docs say we should stop I/O too... */ 1366 - if (sbuf->mapcount == 0) 1367 - sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_MAPPED; 1368 - mutex_unlock(&sbuf->cam->s_mutex); 1369 - } 1370 - 1371 - static const struct vm_operations_struct cafe_v4l_vm_ops = { 1372 - .open = cafe_v4l_vm_open, 1373 - .close = cafe_v4l_vm_close 1374 - }; 1375 - 1376 - 1377 - static int cafe_v4l_mmap(struct file *filp, struct vm_area_struct *vma) 1378 - { 1379 - struct cafe_camera *cam = filp->private_data; 1380 - unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; 1381 - int ret = -EINVAL; 1382 - int i; 1383 - struct cafe_sio_buffer *sbuf = NULL; 1384 - 1385 - if (! (vma->vm_flags & VM_WRITE) || ! (vma->vm_flags & VM_SHARED)) 1386 - return -EINVAL; 1387 - /* 1388 - * Find the buffer they are looking for. 1389 - */ 1390 - mutex_lock(&cam->s_mutex); 1391 - for (i = 0; i < cam->n_sbufs; i++) 1392 - if (cam->sb_bufs[i].v4lbuf.m.offset == offset) { 1393 - sbuf = cam->sb_bufs + i; 1394 - break; 1395 - } 1396 - if (sbuf == NULL) 1397 - goto out; 1398 - 1399 - ret = remap_vmalloc_range(vma, sbuf->buffer, 0); 1400 - if (ret) 1401 - goto out; 1402 - vma->vm_flags |= VM_DONTEXPAND; 1403 - vma->vm_private_data = sbuf; 1404 - vma->vm_ops = &cafe_v4l_vm_ops; 1405 - sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_MAPPED; 1406 - cafe_v4l_vm_open(vma); 1407 - ret = 0; 1408 - out: 1409 - mutex_unlock(&cam->s_mutex); 1410 - return ret; 1411 - } 1412 - 1413 - 1414 - 1415 - static int cafe_v4l_open(struct file *filp) 1416 - { 1417 - struct cafe_camera *cam = video_drvdata(filp); 1418 - 1419 - filp->private_data = cam; 1420 - 1421 - mutex_lock(&cam->s_mutex); 1422 - if (cam->users == 0) { 1423 - cafe_ctlr_power_up(cam); 1424 - __cafe_cam_reset(cam); 1425 - cafe_set_config_needed(cam, 1); 1426 - /* FIXME make sure this is complete */ 1427 - } 1428 - (cam->users)++; 1429 - mutex_unlock(&cam->s_mutex); 1430 - return 0; 1431 - } 1432 - 1433 - 1434 - static int cafe_v4l_release(struct file *filp) 1435 - { 1436 - struct cafe_camera *cam = filp->private_data; 1437 - 1438 - mutex_lock(&cam->s_mutex); 1439 - (cam->users)--; 1440 - if (filp == cam->owner) { 1441 - cafe_ctlr_stop_dma(cam); 1442 - cafe_free_sio_buffers(cam); 1443 - cam->owner = NULL; 1444 - } 1445 - if (cam->users == 0) { 1446 - cafe_ctlr_power_down(cam); 1447 - if (alloc_bufs_at_read) 1448 - cafe_free_dma_bufs(cam); 1449 - } 1450 - mutex_unlock(&cam->s_mutex); 1451 - return 0; 1452 - } 1453 - 1454 - 1455 - 1456 - static unsigned int cafe_v4l_poll(struct file *filp, 1457 - struct poll_table_struct *pt) 1458 - { 1459 - struct cafe_camera *cam = filp->private_data; 1460 - 1461 - poll_wait(filp, &cam->iowait, pt); 1462 - if (cam->next_buf >= 0) 1463 - return POLLIN | POLLRDNORM; 1464 - return 0; 1465 - } 1466 - 1467 - 1468 - 1469 - static int cafe_vidioc_queryctrl(struct file *filp, void *priv, 1470 - struct v4l2_queryctrl *qc) 1471 - { 1472 - struct cafe_camera *cam = priv; 1473 - int ret; 1474 - 1475 - mutex_lock(&cam->s_mutex); 1476 - ret = sensor_call(cam, core, queryctrl, qc); 1477 - mutex_unlock(&cam->s_mutex); 1478 - return ret; 1479 - } 1480 - 1481 - 1482 - static int cafe_vidioc_g_ctrl(struct file *filp, void *priv, 1483 - struct v4l2_control *ctrl) 1484 - { 1485 - struct cafe_camera *cam = priv; 1486 - int ret; 1487 - 1488 - mutex_lock(&cam->s_mutex); 1489 - ret = sensor_call(cam, core, g_ctrl, ctrl); 1490 - mutex_unlock(&cam->s_mutex); 1491 - return ret; 1492 - } 1493 - 1494 - 1495 - static int cafe_vidioc_s_ctrl(struct file *filp, void *priv, 1496 - struct v4l2_control *ctrl) 1497 - { 1498 - struct cafe_camera *cam = priv; 1499 - int ret; 1500 - 1501 - mutex_lock(&cam->s_mutex); 1502 - ret = sensor_call(cam, core, s_ctrl, ctrl); 1503 - mutex_unlock(&cam->s_mutex); 1504 - return ret; 1505 - } 1506 - 1507 - 1508 - 1509 - 1510 - 1511 - static int cafe_vidioc_querycap(struct file *file, void *priv, 1512 - struct v4l2_capability *cap) 1513 - { 1514 - strcpy(cap->driver, "cafe_ccic"); 1515 - strcpy(cap->card, "cafe_ccic"); 1516 - cap->version = CAFE_VERSION; 1517 - cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | 1518 - V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; 1519 - return 0; 1520 - } 1521 - 1522 - 1523 - /* 1524 - * The default format we use until somebody says otherwise. 1525 - */ 1526 - static const struct v4l2_pix_format cafe_def_pix_format = { 1527 - .width = VGA_WIDTH, 1528 - .height = VGA_HEIGHT, 1529 - .pixelformat = V4L2_PIX_FMT_YUYV, 1530 - .field = V4L2_FIELD_NONE, 1531 - .bytesperline = VGA_WIDTH*2, 1532 - .sizeimage = VGA_WIDTH*VGA_HEIGHT*2, 1533 - }; 1534 - 1535 - static const enum v4l2_mbus_pixelcode cafe_def_mbus_code = 1536 - V4L2_MBUS_FMT_YUYV8_2X8; 1537 - 1538 - static int cafe_vidioc_enum_fmt_vid_cap(struct file *filp, 1539 - void *priv, struct v4l2_fmtdesc *fmt) 1540 - { 1541 - if (fmt->index >= N_CAFE_FMTS) 1542 - return -EINVAL; 1543 - strlcpy(fmt->description, cafe_formats[fmt->index].desc, 1544 - sizeof(fmt->description)); 1545 - fmt->pixelformat = cafe_formats[fmt->index].pixelformat; 1546 - return 0; 1547 - } 1548 - 1549 - static int cafe_vidioc_try_fmt_vid_cap(struct file *filp, void *priv, 1550 - struct v4l2_format *fmt) 1551 - { 1552 - struct cafe_camera *cam = priv; 1553 - struct cafe_format_struct *f; 1554 - struct v4l2_pix_format *pix = &fmt->fmt.pix; 1555 - struct v4l2_mbus_framefmt mbus_fmt; 1556 - int ret; 1557 - 1558 - f = cafe_find_format(pix->pixelformat); 1559 - pix->pixelformat = f->pixelformat; 1560 - v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code); 1561 - mutex_lock(&cam->s_mutex); 1562 - ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt); 1563 - mutex_unlock(&cam->s_mutex); 1564 - v4l2_fill_pix_format(pix, &mbus_fmt); 1565 - pix->bytesperline = pix->width * f->bpp; 1566 - pix->sizeimage = pix->height * pix->bytesperline; 1567 - return ret; 1568 - } 1569 - 1570 - static int cafe_vidioc_s_fmt_vid_cap(struct file *filp, void *priv, 1571 - struct v4l2_format *fmt) 1572 - { 1573 - struct cafe_camera *cam = priv; 1574 - struct cafe_format_struct *f; 1575 - int ret; 1576 - 1577 - /* 1578 - * Can't do anything if the device is not idle 1579 - * Also can't if there are streaming buffers in place. 1580 - */ 1581 - if (cam->state != S_IDLE || cam->n_sbufs > 0) 1582 - return -EBUSY; 1583 - 1584 - f = cafe_find_format(fmt->fmt.pix.pixelformat); 1585 - 1586 - /* 1587 - * See if the formatting works in principle. 1588 - */ 1589 - ret = cafe_vidioc_try_fmt_vid_cap(filp, priv, fmt); 1590 - if (ret) 1591 - return ret; 1592 - /* 1593 - * Now we start to change things for real, so let's do it 1594 - * under lock. 1595 - */ 1596 - mutex_lock(&cam->s_mutex); 1597 - cam->pix_format = fmt->fmt.pix; 1598 - cam->mbus_code = f->mbus_code; 1599 - 1600 - /* 1601 - * Make sure we have appropriate DMA buffers. 1602 - */ 1603 - ret = -ENOMEM; 1604 - if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage) 1605 - cafe_free_dma_bufs(cam); 1606 - if (cam->nbufs == 0) { 1607 - if (cafe_alloc_dma_bufs(cam, 0)) 1608 - goto out; 1609 - } 1610 - /* 1611 - * It looks like this might work, so let's program the sensor. 1612 - */ 1613 - ret = cafe_cam_configure(cam); 1614 - if (! ret) 1615 - ret = cafe_ctlr_configure(cam); 1616 - out: 1617 - mutex_unlock(&cam->s_mutex); 1618 - return ret; 1619 - } 1620 - 1621 - /* 1622 - * Return our stored notion of how the camera is/should be configured. 1623 - * The V4l2 spec wants us to be smarter, and actually get this from 1624 - * the camera (and not mess with it at open time). Someday. 1625 - */ 1626 - static int cafe_vidioc_g_fmt_vid_cap(struct file *filp, void *priv, 1627 - struct v4l2_format *f) 1628 - { 1629 - struct cafe_camera *cam = priv; 1630 - 1631 - f->fmt.pix = cam->pix_format; 1632 - return 0; 1633 - } 1634 - 1635 - /* 1636 - * We only have one input - the sensor - so minimize the nonsense here. 1637 - */ 1638 - static int cafe_vidioc_enum_input(struct file *filp, void *priv, 1639 - struct v4l2_input *input) 1640 - { 1641 - if (input->index != 0) 1642 - return -EINVAL; 1643 - 1644 - input->type = V4L2_INPUT_TYPE_CAMERA; 1645 - input->std = V4L2_STD_ALL; /* Not sure what should go here */ 1646 - strcpy(input->name, "Camera"); 1647 - return 0; 1648 - } 1649 - 1650 - static int cafe_vidioc_g_input(struct file *filp, void *priv, unsigned int *i) 1651 - { 1652 - *i = 0; 1653 - return 0; 1654 - } 1655 - 1656 - static int cafe_vidioc_s_input(struct file *filp, void *priv, unsigned int i) 1657 - { 1658 - if (i != 0) 1659 - return -EINVAL; 1660 - return 0; 1661 - } 1662 - 1663 - /* from vivi.c */ 1664 - static int cafe_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a) 1665 - { 1666 - return 0; 1667 - } 1668 - 1669 - /* 1670 - * G/S_PARM. Most of this is done by the sensor, but we are 1671 - * the level which controls the number of read buffers. 1672 - */ 1673 - static int cafe_vidioc_g_parm(struct file *filp, void *priv, 1674 - struct v4l2_streamparm *parms) 1675 - { 1676 - struct cafe_camera *cam = priv; 1677 - int ret; 1678 - 1679 - mutex_lock(&cam->s_mutex); 1680 - ret = sensor_call(cam, video, g_parm, parms); 1681 - mutex_unlock(&cam->s_mutex); 1682 - parms->parm.capture.readbuffers = n_dma_bufs; 1683 - return ret; 1684 - } 1685 - 1686 - static int cafe_vidioc_s_parm(struct file *filp, void *priv, 1687 - struct v4l2_streamparm *parms) 1688 - { 1689 - struct cafe_camera *cam = priv; 1690 - int ret; 1691 - 1692 - mutex_lock(&cam->s_mutex); 1693 - ret = sensor_call(cam, video, s_parm, parms); 1694 - mutex_unlock(&cam->s_mutex); 1695 - parms->parm.capture.readbuffers = n_dma_bufs; 1696 - return ret; 1697 - } 1698 - 1699 - static int cafe_vidioc_g_chip_ident(struct file *file, void *priv, 1700 - struct v4l2_dbg_chip_ident *chip) 1701 - { 1702 - struct cafe_camera *cam = priv; 1703 - 1704 - chip->ident = V4L2_IDENT_NONE; 1705 - chip->revision = 0; 1706 - if (v4l2_chip_match_host(&chip->match)) { 1707 - chip->ident = V4L2_IDENT_CAFE; 1708 - return 0; 1709 - } 1710 - return sensor_call(cam, core, g_chip_ident, chip); 1711 - } 1712 - 1713 - static int cafe_vidioc_enum_framesizes(struct file *filp, void *priv, 1714 - struct v4l2_frmsizeenum *sizes) 1715 - { 1716 - struct cafe_camera *cam = priv; 1717 - int ret; 1718 - 1719 - mutex_lock(&cam->s_mutex); 1720 - ret = sensor_call(cam, video, enum_framesizes, sizes); 1721 - mutex_unlock(&cam->s_mutex); 1722 - return ret; 1723 - } 1724 - 1725 - static int cafe_vidioc_enum_frameintervals(struct file *filp, void *priv, 1726 - struct v4l2_frmivalenum *interval) 1727 - { 1728 - struct cafe_camera *cam = priv; 1729 - int ret; 1730 - 1731 - mutex_lock(&cam->s_mutex); 1732 - ret = sensor_call(cam, video, enum_frameintervals, interval); 1733 - mutex_unlock(&cam->s_mutex); 1734 - return ret; 1735 - } 1736 - 1737 - #ifdef CONFIG_VIDEO_ADV_DEBUG 1738 - static int cafe_vidioc_g_register(struct file *file, void *priv, 1739 - struct v4l2_dbg_register *reg) 1740 - { 1741 - struct cafe_camera *cam = priv; 1742 - 1743 - if (v4l2_chip_match_host(&reg->match)) { 1744 - reg->val = cafe_reg_read(cam, reg->reg); 1745 - reg->size = 4; 1746 - return 0; 1747 - } 1748 - return sensor_call(cam, core, g_register, reg); 1749 - } 1750 - 1751 - static int cafe_vidioc_s_register(struct file *file, void *priv, 1752 - struct v4l2_dbg_register *reg) 1753 - { 1754 - struct cafe_camera *cam = priv; 1755 - 1756 - if (v4l2_chip_match_host(&reg->match)) { 1757 - cafe_reg_write(cam, reg->reg, reg->val); 1758 - return 0; 1759 - } 1760 - return sensor_call(cam, core, s_register, reg); 1761 - } 1762 - #endif 1763 - 1764 - /* 1765 - * This template device holds all of those v4l2 methods; we 1766 - * clone it for specific real devices. 1767 - */ 1768 - 1769 - static const struct v4l2_file_operations cafe_v4l_fops = { 1770 - .owner = THIS_MODULE, 1771 - .open = cafe_v4l_open, 1772 - .release = cafe_v4l_release, 1773 - .read = cafe_v4l_read, 1774 - .poll = cafe_v4l_poll, 1775 - .mmap = cafe_v4l_mmap, 1776 - .unlocked_ioctl = video_ioctl2, 1777 - }; 1778 - 1779 - static const struct v4l2_ioctl_ops cafe_v4l_ioctl_ops = { 1780 - .vidioc_querycap = cafe_vidioc_querycap, 1781 - .vidioc_enum_fmt_vid_cap = cafe_vidioc_enum_fmt_vid_cap, 1782 - .vidioc_try_fmt_vid_cap = cafe_vidioc_try_fmt_vid_cap, 1783 - .vidioc_s_fmt_vid_cap = cafe_vidioc_s_fmt_vid_cap, 1784 - .vidioc_g_fmt_vid_cap = cafe_vidioc_g_fmt_vid_cap, 1785 - .vidioc_enum_input = cafe_vidioc_enum_input, 1786 - .vidioc_g_input = cafe_vidioc_g_input, 1787 - .vidioc_s_input = cafe_vidioc_s_input, 1788 - .vidioc_s_std = cafe_vidioc_s_std, 1789 - .vidioc_reqbufs = cafe_vidioc_reqbufs, 1790 - .vidioc_querybuf = cafe_vidioc_querybuf, 1791 - .vidioc_qbuf = cafe_vidioc_qbuf, 1792 - .vidioc_dqbuf = cafe_vidioc_dqbuf, 1793 - .vidioc_streamon = cafe_vidioc_streamon, 1794 - .vidioc_streamoff = cafe_vidioc_streamoff, 1795 - .vidioc_queryctrl = cafe_vidioc_queryctrl, 1796 - .vidioc_g_ctrl = cafe_vidioc_g_ctrl, 1797 - .vidioc_s_ctrl = cafe_vidioc_s_ctrl, 1798 - .vidioc_g_parm = cafe_vidioc_g_parm, 1799 - .vidioc_s_parm = cafe_vidioc_s_parm, 1800 - .vidioc_enum_framesizes = cafe_vidioc_enum_framesizes, 1801 - .vidioc_enum_frameintervals = cafe_vidioc_enum_frameintervals, 1802 - .vidioc_g_chip_ident = cafe_vidioc_g_chip_ident, 1803 - #ifdef CONFIG_VIDEO_ADV_DEBUG 1804 - .vidioc_g_register = cafe_vidioc_g_register, 1805 - .vidioc_s_register = cafe_vidioc_s_register, 1806 - #endif 1807 - }; 1808 - 1809 - static struct video_device cafe_v4l_template = { 1810 - .name = "cafe", 1811 - .tvnorms = V4L2_STD_NTSC_M, 1812 - .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */ 1813 - 1814 - .fops = &cafe_v4l_fops, 1815 - .ioctl_ops = &cafe_v4l_ioctl_ops, 1816 - .release = video_device_release_empty, 1817 - }; 1818 - 1819 - 1820 - /* ---------------------------------------------------------------------- */ 1821 - /* 1822 - * Interrupt handler stuff 1823 - */ 1824 - 1825 - 1826 - 1827 - static void cafe_frame_tasklet(unsigned long data) 1828 - { 1829 - struct cafe_camera *cam = (struct cafe_camera *) data; 1830 - int i; 1831 - unsigned long flags; 1832 - struct cafe_sio_buffer *sbuf; 1833 - 1834 - spin_lock_irqsave(&cam->dev_lock, flags); 1835 - for (i = 0; i < cam->nbufs; i++) { 1836 - int bufno = cam->next_buf; 1837 - if (bufno < 0) { /* "will never happen" */ 1838 - cam_err(cam, "No valid bufs in tasklet!\n"); 1839 - break; 1840 - } 1841 - if (++(cam->next_buf) >= cam->nbufs) 1842 - cam->next_buf = 0; 1843 - if (! test_bit(bufno, &cam->flags)) 1844 - continue; 1845 - if (list_empty(&cam->sb_avail)) 1846 - break; /* Leave it valid, hope for better later */ 1847 - clear_bit(bufno, &cam->flags); 1848 - sbuf = list_entry(cam->sb_avail.next, 1849 - struct cafe_sio_buffer, list); 1850 - /* 1851 - * Drop the lock during the big copy. This *should* be safe... 1852 - */ 1853 - spin_unlock_irqrestore(&cam->dev_lock, flags); 1854 - memcpy(sbuf->buffer, cam->dma_bufs[bufno], 1855 - cam->pix_format.sizeimage); 1856 - sbuf->v4lbuf.bytesused = cam->pix_format.sizeimage; 1857 - sbuf->v4lbuf.sequence = cam->buf_seq[bufno]; 1858 - sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_QUEUED; 1859 - sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_DONE; 1860 - spin_lock_irqsave(&cam->dev_lock, flags); 1861 - list_move_tail(&sbuf->list, &cam->sb_full); 1862 - } 1863 - if (! list_empty(&cam->sb_full)) 1864 - wake_up(&cam->iowait); 1865 - spin_unlock_irqrestore(&cam->dev_lock, flags); 1866 - } 1867 - 1868 - 1869 - 1870 - static void cafe_frame_complete(struct cafe_camera *cam, int frame) 1871 - { 1872 - /* 1873 - * Basic frame housekeeping. 1874 - */ 1875 - if (test_bit(frame, &cam->flags) && printk_ratelimit()) 1876 - cam_err(cam, "Frame overrun on %d, frames lost\n", frame); 1877 - set_bit(frame, &cam->flags); 1878 - clear_bit(CF_DMA_ACTIVE, &cam->flags); 1879 - if (cam->next_buf < 0) 1880 - cam->next_buf = frame; 1881 - cam->buf_seq[frame] = ++(cam->sequence); 1882 - 1883 - switch (cam->state) { 1884 - /* 1885 - * If in single read mode, try going speculative. 1886 - */ 1887 - case S_SINGLEREAD: 1888 - cam->state = S_SPECREAD; 1889 - cam->specframes = 0; 1890 - wake_up(&cam->iowait); 1891 - break; 1892 - 1893 - /* 1894 - * If we are already doing speculative reads, and nobody is 1895 - * reading them, just stop. 1896 - */ 1897 - case S_SPECREAD: 1898 - if (++(cam->specframes) >= cam->nbufs) { 1899 - cafe_ctlr_stop(cam); 1900 - cafe_ctlr_irq_disable(cam); 1901 - cam->state = S_IDLE; 1902 - } 1903 - wake_up(&cam->iowait); 1904 - break; 1905 - /* 1906 - * For the streaming case, we defer the real work to the 1907 - * camera tasklet. 1908 - * 1909 - * FIXME: if the application is not consuming the buffers, 1910 - * we should eventually put things on hold and restart in 1911 - * vidioc_dqbuf(). 1912 - */ 1913 - case S_STREAMING: 1914 - tasklet_schedule(&cam->s_tasklet); 1915 - break; 1916 - 1917 - default: 1918 - cam_err(cam, "Frame interrupt in non-operational state\n"); 1919 - break; 1920 - } 1921 - } 1922 - 1923 - 1924 - 1925 - 1926 - static void cafe_frame_irq(struct cafe_camera *cam, unsigned int irqs) 1927 - { 1928 - unsigned int frame; 1929 - 1930 - cafe_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */ 1931 - /* 1932 - * Handle any frame completions. There really should 1933 - * not be more than one of these, or we have fallen 1934 - * far behind. 1935 - */ 1936 - for (frame = 0; frame < cam->nbufs; frame++) 1937 - if (irqs & (IRQ_EOF0 << frame)) 1938 - cafe_frame_complete(cam, frame); 1939 - /* 1940 - * If a frame starts, note that we have DMA active. This 1941 - * code assumes that we won't get multiple frame interrupts 1942 - * at once; may want to rethink that. 1943 - */ 1944 - if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) 1945 - set_bit(CF_DMA_ACTIVE, &cam->flags); 1946 - } 1947 - 1948 - 1949 - 1950 - static irqreturn_t cafe_irq(int irq, void *data) 1951 - { 1952 - struct cafe_camera *cam = data; 1953 - unsigned int irqs; 1954 - 1955 - spin_lock(&cam->dev_lock); 1956 - irqs = cafe_reg_read(cam, REG_IRQSTAT); 1957 - if ((irqs & ALLIRQS) == 0) { 1958 - spin_unlock(&cam->dev_lock); 1959 - return IRQ_NONE; 1960 - } 1961 - if (irqs & FRAMEIRQS) 1962 - cafe_frame_irq(cam, irqs); 1963 - if (irqs & TWSIIRQS) { 1964 - cafe_reg_write(cam, REG_IRQSTAT, TWSIIRQS); 1965 - wake_up(&cam->smbus_wait); 1966 - } 1967 - spin_unlock(&cam->dev_lock); 1968 - return IRQ_HANDLED; 1969 - } 1970 - 1971 - 1972 - /* -------------------------------------------------------------------------- */ 1973 - /* 1974 - * PCI interface stuff. 1975 - */ 1976 - 1977 - static const struct dmi_system_id olpc_xo1_dmi[] = { 1978 - { 1979 - .matches = { 1980 - DMI_MATCH(DMI_SYS_VENDOR, "OLPC"), 1981 - DMI_MATCH(DMI_PRODUCT_NAME, "XO"), 1982 - DMI_MATCH(DMI_PRODUCT_VERSION, "1"), 1983 - }, 1984 - }, 1985 - { } 1986 - }; 1987 - 1988 - static int cafe_pci_probe(struct pci_dev *pdev, 1989 - const struct pci_device_id *id) 1990 - { 1991 - int ret; 1992 - struct cafe_camera *cam; 1993 - struct ov7670_config sensor_cfg = { 1994 - /* This controller only does SMBUS */ 1995 - .use_smbus = true, 1996 - 1997 - /* 1998 - * Exclude QCIF mode, because it only captures a tiny portion 1999 - * of the sensor FOV 2000 - */ 2001 - .min_width = 320, 2002 - .min_height = 240, 2003 - }; 2004 - struct i2c_board_info ov7670_info = { 2005 - .type = "ov7670", 2006 - .addr = 0x42, 2007 - .platform_data = &sensor_cfg, 2008 - }; 2009 - 2010 - /* 2011 - * Start putting together one of our big camera structures. 2012 - */ 2013 - ret = -ENOMEM; 2014 - cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL); 2015 - if (cam == NULL) 2016 - goto out; 2017 - ret = v4l2_device_register(&pdev->dev, &cam->v4l2_dev); 2018 - if (ret) 2019 - goto out_free; 2020 - 2021 - mutex_init(&cam->s_mutex); 2022 - spin_lock_init(&cam->dev_lock); 2023 - cam->state = S_NOTREADY; 2024 - cafe_set_config_needed(cam, 1); 2025 - init_waitqueue_head(&cam->smbus_wait); 2026 - init_waitqueue_head(&cam->iowait); 2027 - cam->pdev = pdev; 2028 - cam->pix_format = cafe_def_pix_format; 2029 - cam->mbus_code = cafe_def_mbus_code; 2030 - INIT_LIST_HEAD(&cam->dev_list); 2031 - INIT_LIST_HEAD(&cam->sb_avail); 2032 - INIT_LIST_HEAD(&cam->sb_full); 2033 - tasklet_init(&cam->s_tasklet, cafe_frame_tasklet, (unsigned long) cam); 2034 - /* 2035 - * Get set up on the PCI bus. 2036 - */ 2037 - ret = pci_enable_device(pdev); 2038 - if (ret) 2039 - goto out_unreg; 2040 - pci_set_master(pdev); 2041 - 2042 - ret = -EIO; 2043 - cam->regs = pci_iomap(pdev, 0, 0); 2044 - if (! cam->regs) { 2045 - printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n"); 2046 - goto out_unreg; 2047 - } 2048 - ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam); 2049 - if (ret) 2050 - goto out_iounmap; 2051 - /* 2052 - * Initialize the controller and leave it powered up. It will 2053 - * stay that way until the sensor driver shows up. 2054 - */ 2055 - cafe_ctlr_init(cam); 2056 - cafe_ctlr_power_up(cam); 2057 - /* 2058 - * Set up I2C/SMBUS communications. We have to drop the mutex here 2059 - * because the sensor could attach in this call chain, leading to 2060 - * unsightly deadlocks. 2061 - */ 2062 - ret = cafe_smbus_setup(cam); 2063 - if (ret) 2064 - goto out_freeirq; 2065 - 2066 - /* Apply XO-1 clock speed */ 2067 - if (dmi_check_system(olpc_xo1_dmi)) 2068 - sensor_cfg.clock_speed = 45; 2069 - 2070 - cam->sensor_addr = ov7670_info.addr; 2071 - cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev, &cam->i2c_adapter, 2072 - &ov7670_info, NULL); 2073 - if (cam->sensor == NULL) { 2074 - ret = -ENODEV; 2075 - goto out_smbus; 2076 - } 2077 - 2078 - ret = cafe_cam_init(cam); 2079 - if (ret) 2080 - goto out_smbus; 2081 - 2082 - /* 2083 - * Get the v4l2 setup done. 2084 - */ 2085 - mutex_lock(&cam->s_mutex); 2086 - cam->vdev = cafe_v4l_template; 2087 - cam->vdev.debug = 0; 2088 - /* cam->vdev.debug = V4L2_DEBUG_IOCTL_ARG;*/ 2089 - cam->vdev.v4l2_dev = &cam->v4l2_dev; 2090 - ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1); 2091 - if (ret) 2092 - goto out_unlock; 2093 - video_set_drvdata(&cam->vdev, cam); 2094 - 2095 - /* 2096 - * If so requested, try to get our DMA buffers now. 2097 - */ 2098 - if (!alloc_bufs_at_read) { 2099 - if (cafe_alloc_dma_bufs(cam, 1)) 2100 - cam_warn(cam, "Unable to alloc DMA buffers at load" 2101 - " will try again later."); 2102 - } 2103 - 2104 - mutex_unlock(&cam->s_mutex); 2105 - return 0; 2106 - 2107 - out_unlock: 2108 - mutex_unlock(&cam->s_mutex); 2109 - out_smbus: 2110 - cafe_smbus_shutdown(cam); 2111 - out_freeirq: 2112 - cafe_ctlr_power_down(cam); 2113 - free_irq(pdev->irq, cam); 2114 - out_iounmap: 2115 - pci_iounmap(pdev, cam->regs); 2116 - out_free: 2117 - v4l2_device_unregister(&cam->v4l2_dev); 2118 - out_unreg: 2119 - kfree(cam); 2120 - out: 2121 - return ret; 2122 - } 2123 - 2124 - 2125 - /* 2126 - * Shut down an initialized device 2127 - */ 2128 - static void cafe_shutdown(struct cafe_camera *cam) 2129 - { 2130 - /* FIXME: Make sure we take care of everything here */ 2131 - if (cam->n_sbufs > 0) 2132 - /* What if they are still mapped? Shouldn't be, but... */ 2133 - cafe_free_sio_buffers(cam); 2134 - cafe_ctlr_stop_dma(cam); 2135 - cafe_ctlr_power_down(cam); 2136 - cafe_smbus_shutdown(cam); 2137 - cafe_free_dma_bufs(cam); 2138 - free_irq(cam->pdev->irq, cam); 2139 - pci_iounmap(cam->pdev, cam->regs); 2140 - video_unregister_device(&cam->vdev); 2141 - } 2142 - 2143 - 2144 - static void cafe_pci_remove(struct pci_dev *pdev) 2145 - { 2146 - struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); 2147 - struct cafe_camera *cam = to_cam(v4l2_dev); 2148 - 2149 - if (cam == NULL) { 2150 - printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev); 2151 - return; 2152 - } 2153 - mutex_lock(&cam->s_mutex); 2154 - if (cam->users > 0) 2155 - cam_warn(cam, "Removing a device with users!\n"); 2156 - cafe_shutdown(cam); 2157 - v4l2_device_unregister(&cam->v4l2_dev); 2158 - kfree(cam); 2159 - /* No unlock - it no longer exists */ 2160 - } 2161 - 2162 - 2163 - #ifdef CONFIG_PM 2164 - /* 2165 - * Basic power management. 2166 - */ 2167 - static int cafe_pci_suspend(struct pci_dev *pdev, pm_message_t state) 2168 - { 2169 - struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); 2170 - struct cafe_camera *cam = to_cam(v4l2_dev); 2171 - int ret; 2172 - enum cafe_state cstate; 2173 - 2174 - ret = pci_save_state(pdev); 2175 - if (ret) 2176 - return ret; 2177 - cstate = cam->state; /* HACK - stop_dma sets to idle */ 2178 - cafe_ctlr_stop_dma(cam); 2179 - cafe_ctlr_power_down(cam); 2180 - pci_disable_device(pdev); 2181 - cam->state = cstate; 2182 - return 0; 2183 - } 2184 - 2185 - 2186 - static int cafe_pci_resume(struct pci_dev *pdev) 2187 - { 2188 - struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev); 2189 - struct cafe_camera *cam = to_cam(v4l2_dev); 2190 - int ret = 0; 2191 - 2192 - pci_restore_state(pdev); 2193 - ret = pci_enable_device(pdev); 2194 - 2195 - if (ret) { 2196 - cam_warn(cam, "Unable to re-enable device on resume!\n"); 2197 - return ret; 2198 - } 2199 - cafe_ctlr_init(cam); 2200 - 2201 - mutex_lock(&cam->s_mutex); 2202 - if (cam->users > 0) { 2203 - cafe_ctlr_power_up(cam); 2204 - __cafe_cam_reset(cam); 2205 - } else { 2206 - cafe_ctlr_power_down(cam); 2207 - } 2208 - mutex_unlock(&cam->s_mutex); 2209 - 2210 - set_bit(CF_CONFIG_NEEDED, &cam->flags); 2211 - if (cam->state == S_SPECREAD) 2212 - cam->state = S_IDLE; /* Don't bother restarting */ 2213 - else if (cam->state == S_SINGLEREAD || cam->state == S_STREAMING) 2214 - ret = cafe_read_setup(cam, cam->state); 2215 - return ret; 2216 - } 2217 - 2218 - #endif /* CONFIG_PM */ 2219 - 2220 - 2221 - static struct pci_device_id cafe_ids[] = { 2222 - { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 2223 - PCI_DEVICE_ID_MARVELL_88ALP01_CCIC) }, 2224 - { 0, } 2225 - }; 2226 - 2227 - MODULE_DEVICE_TABLE(pci, cafe_ids); 2228 - 2229 - static struct pci_driver cafe_pci_driver = { 2230 - .name = "cafe1000-ccic", 2231 - .id_table = cafe_ids, 2232 - .probe = cafe_pci_probe, 2233 - .remove = cafe_pci_remove, 2234 - #ifdef CONFIG_PM 2235 - .suspend = cafe_pci_suspend, 2236 - .resume = cafe_pci_resume, 2237 - #endif 2238 - }; 2239 - 2240 - 2241 - 2242 - 2243 - static int __init cafe_init(void) 2244 - { 2245 - int ret; 2246 - 2247 - printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n", 2248 - CAFE_VERSION); 2249 - ret = pci_register_driver(&cafe_pci_driver); 2250 - if (ret) { 2251 - printk(KERN_ERR "Unable to register cafe_ccic driver\n"); 2252 - goto out; 2253 - } 2254 - ret = 0; 2255 - 2256 - out: 2257 - return ret; 2258 - } 2259 - 2260 - 2261 - static void __exit cafe_exit(void) 2262 - { 2263 - pci_unregister_driver(&cafe_pci_driver); 2264 - } 2265 - 2266 - module_init(cafe_init); 2267 - module_exit(cafe_exit);
+1689
drivers/media/video/marvell-ccic/mcam-core.c
··· 1 + /* 2 + * The Marvell camera core. This device appears in a number of settings, 3 + * so it needs platform-specific support outside of the core. 4 + * 5 + * Copyright 2011 Jonathan Corbet corbet@lwn.net 6 + */ 7 + #include <linux/kernel.h> 8 + #include <linux/module.h> 9 + #include <linux/fs.h> 10 + #include <linux/dmi.h> 11 + #include <linux/mm.h> 12 + #include <linux/i2c.h> 13 + #include <linux/interrupt.h> 14 + #include <linux/spinlock.h> 15 + #include <linux/videodev2.h> 16 + #include <linux/slab.h> 17 + #include <media/v4l2-device.h> 18 + #include <media/v4l2-ioctl.h> 19 + #include <media/v4l2-chip-ident.h> 20 + #include <media/ov7670.h> 21 + #include <linux/device.h> 22 + #include <linux/wait.h> 23 + #include <linux/list.h> 24 + #include <linux/dma-mapping.h> 25 + #include <linux/delay.h> 26 + #include <linux/jiffies.h> 27 + #include <linux/vmalloc.h> 28 + #include <linux/uaccess.h> 29 + #include <linux/io.h> 30 + 31 + #include "mcam-core.h" 32 + 33 + 34 + /* 35 + * Internal DMA buffer management. Since the controller cannot do S/G I/O, 36 + * we must have physically contiguous buffers to bring frames into. 37 + * These parameters control how many buffers we use, whether we 38 + * allocate them at load time (better chance of success, but nails down 39 + * memory) or when somebody tries to use the camera (riskier), and, 40 + * for load-time allocation, how big they should be. 41 + * 42 + * The controller can cycle through three buffers. We could use 43 + * more by flipping pointers around, but it probably makes little 44 + * sense. 45 + */ 46 + 47 + static int alloc_bufs_at_read; 48 + module_param(alloc_bufs_at_read, bool, 0444); 49 + MODULE_PARM_DESC(alloc_bufs_at_read, 50 + "Non-zero value causes DMA buffers to be allocated when the " 51 + "video capture device is read, rather than at module load " 52 + "time. This saves memory, but decreases the chances of " 53 + "successfully getting those buffers."); 54 + 55 + static int n_dma_bufs = 3; 56 + module_param(n_dma_bufs, uint, 0644); 57 + MODULE_PARM_DESC(n_dma_bufs, 58 + "The number of DMA buffers to allocate. Can be either two " 59 + "(saves memory, makes timing tighter) or three."); 60 + 61 + static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */ 62 + module_param(dma_buf_size, uint, 0444); 63 + MODULE_PARM_DESC(dma_buf_size, 64 + "The size of the allocated DMA buffers. If actual operating " 65 + "parameters require larger buffers, an attempt to reallocate " 66 + "will be made."); 67 + 68 + static int min_buffers = 1; 69 + module_param(min_buffers, uint, 0644); 70 + MODULE_PARM_DESC(min_buffers, 71 + "The minimum number of streaming I/O buffers we are willing " 72 + "to work with."); 73 + 74 + static int max_buffers = 10; 75 + module_param(max_buffers, uint, 0644); 76 + MODULE_PARM_DESC(max_buffers, 77 + "The maximum number of streaming I/O buffers an application " 78 + "will be allowed to allocate. These buffers are big and live " 79 + "in vmalloc space."); 80 + 81 + static int flip; 82 + module_param(flip, bool, 0444); 83 + MODULE_PARM_DESC(flip, 84 + "If set, the sensor will be instructed to flip the image " 85 + "vertically."); 86 + 87 + /* 88 + * Status flags. Always manipulated with bit operations. 89 + */ 90 + #define CF_BUF0_VALID 0 /* Buffers valid - first three */ 91 + #define CF_BUF1_VALID 1 92 + #define CF_BUF2_VALID 2 93 + #define CF_DMA_ACTIVE 3 /* A frame is incoming */ 94 + #define CF_CONFIG_NEEDED 4 /* Must configure hardware */ 95 + 96 + #define sensor_call(cam, o, f, args...) \ 97 + v4l2_subdev_call(cam->sensor, o, f, ##args) 98 + 99 + static struct mcam_format_struct { 100 + __u8 *desc; 101 + __u32 pixelformat; 102 + int bpp; /* Bytes per pixel */ 103 + enum v4l2_mbus_pixelcode mbus_code; 104 + } mcam_formats[] = { 105 + { 106 + .desc = "YUYV 4:2:2", 107 + .pixelformat = V4L2_PIX_FMT_YUYV, 108 + .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8, 109 + .bpp = 2, 110 + }, 111 + { 112 + .desc = "RGB 444", 113 + .pixelformat = V4L2_PIX_FMT_RGB444, 114 + .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE, 115 + .bpp = 2, 116 + }, 117 + { 118 + .desc = "RGB 565", 119 + .pixelformat = V4L2_PIX_FMT_RGB565, 120 + .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE, 121 + .bpp = 2, 122 + }, 123 + { 124 + .desc = "Raw RGB Bayer", 125 + .pixelformat = V4L2_PIX_FMT_SBGGR8, 126 + .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8, 127 + .bpp = 1 128 + }, 129 + }; 130 + #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats) 131 + 132 + static struct mcam_format_struct *mcam_find_format(u32 pixelformat) 133 + { 134 + unsigned i; 135 + 136 + for (i = 0; i < N_MCAM_FMTS; i++) 137 + if (mcam_formats[i].pixelformat == pixelformat) 138 + return mcam_formats + i; 139 + /* Not found? Then return the first format. */ 140 + return mcam_formats; 141 + } 142 + 143 + /* 144 + * Start over with DMA buffers - dev_lock needed. 145 + */ 146 + static void mcam_reset_buffers(struct mcam_camera *cam) 147 + { 148 + int i; 149 + 150 + cam->next_buf = -1; 151 + for (i = 0; i < cam->nbufs; i++) 152 + clear_bit(i, &cam->flags); 153 + cam->specframes = 0; 154 + } 155 + 156 + static inline int mcam_needs_config(struct mcam_camera *cam) 157 + { 158 + return test_bit(CF_CONFIG_NEEDED, &cam->flags); 159 + } 160 + 161 + static void mcam_set_config_needed(struct mcam_camera *cam, int needed) 162 + { 163 + if (needed) 164 + set_bit(CF_CONFIG_NEEDED, &cam->flags); 165 + else 166 + clear_bit(CF_CONFIG_NEEDED, &cam->flags); 167 + } 168 + 169 + 170 + /* 171 + * Debugging and related. FIXME these are broken 172 + */ 173 + #define cam_err(cam, fmt, arg...) \ 174 + dev_err((cam)->dev, fmt, ##arg); 175 + #define cam_warn(cam, fmt, arg...) \ 176 + dev_warn((cam)->dev, fmt, ##arg); 177 + #define cam_dbg(cam, fmt, arg...) \ 178 + dev_dbg((cam)->dev, fmt, ##arg); 179 + 180 + 181 + 182 + /* ------------------------------------------------------------------- */ 183 + /* 184 + * Deal with the controller. 185 + */ 186 + 187 + /* 188 + * Do everything we think we need to have the interface operating 189 + * according to the desired format. 190 + */ 191 + static void mcam_ctlr_dma(struct mcam_camera *cam) 192 + { 193 + /* 194 + * Store the first two Y buffers (we aren't supporting 195 + * planar formats for now, so no UV bufs). Then either 196 + * set the third if it exists, or tell the controller 197 + * to just use two. 198 + */ 199 + mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]); 200 + mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]); 201 + if (cam->nbufs > 2) { 202 + mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]); 203 + mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS); 204 + } else 205 + mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS); 206 + mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only for now */ 207 + } 208 + 209 + static void mcam_ctlr_image(struct mcam_camera *cam) 210 + { 211 + int imgsz; 212 + struct v4l2_pix_format *fmt = &cam->pix_format; 213 + 214 + imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) | 215 + (fmt->bytesperline & IMGSZ_H_MASK); 216 + mcam_reg_write(cam, REG_IMGSIZE, imgsz); 217 + mcam_reg_write(cam, REG_IMGOFFSET, 0); 218 + /* YPITCH just drops the last two bits */ 219 + mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline, 220 + IMGP_YP_MASK); 221 + /* 222 + * Tell the controller about the image format we are using. 223 + */ 224 + switch (cam->pix_format.pixelformat) { 225 + case V4L2_PIX_FMT_YUYV: 226 + mcam_reg_write_mask(cam, REG_CTRL0, 227 + C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV, 228 + C0_DF_MASK); 229 + break; 230 + 231 + case V4L2_PIX_FMT_RGB444: 232 + mcam_reg_write_mask(cam, REG_CTRL0, 233 + C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB, 234 + C0_DF_MASK); 235 + /* Alpha value? */ 236 + break; 237 + 238 + case V4L2_PIX_FMT_RGB565: 239 + mcam_reg_write_mask(cam, REG_CTRL0, 240 + C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR, 241 + C0_DF_MASK); 242 + break; 243 + 244 + default: 245 + cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat); 246 + break; 247 + } 248 + /* 249 + * Make sure it knows we want to use hsync/vsync. 250 + */ 251 + mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC, 252 + C0_SIFM_MASK); 253 + } 254 + 255 + 256 + /* 257 + * Configure the controller for operation; caller holds the 258 + * device mutex. 259 + */ 260 + static int mcam_ctlr_configure(struct mcam_camera *cam) 261 + { 262 + unsigned long flags; 263 + 264 + spin_lock_irqsave(&cam->dev_lock, flags); 265 + mcam_ctlr_dma(cam); 266 + mcam_ctlr_image(cam); 267 + mcam_set_config_needed(cam, 0); 268 + spin_unlock_irqrestore(&cam->dev_lock, flags); 269 + return 0; 270 + } 271 + 272 + static void mcam_ctlr_irq_enable(struct mcam_camera *cam) 273 + { 274 + /* 275 + * Clear any pending interrupts, since we do not 276 + * expect to have I/O active prior to enabling. 277 + */ 278 + mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); 279 + mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS); 280 + } 281 + 282 + static void mcam_ctlr_irq_disable(struct mcam_camera *cam) 283 + { 284 + mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS); 285 + } 286 + 287 + /* 288 + * Make the controller start grabbing images. Everything must 289 + * be set up before doing this. 290 + */ 291 + static void mcam_ctlr_start(struct mcam_camera *cam) 292 + { 293 + /* set_bit performs a read, so no other barrier should be 294 + needed here */ 295 + mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE); 296 + } 297 + 298 + static void mcam_ctlr_stop(struct mcam_camera *cam) 299 + { 300 + mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); 301 + } 302 + 303 + static void mcam_ctlr_init(struct mcam_camera *cam) 304 + { 305 + unsigned long flags; 306 + 307 + spin_lock_irqsave(&cam->dev_lock, flags); 308 + /* 309 + * Make sure it's not powered down. 310 + */ 311 + mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); 312 + /* 313 + * Turn off the enable bit. It sure should be off anyway, 314 + * but it's good to be sure. 315 + */ 316 + mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE); 317 + /* 318 + * Clock the sensor appropriately. Controller clock should 319 + * be 48MHz, sensor "typical" value is half that. 320 + */ 321 + mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK); 322 + spin_unlock_irqrestore(&cam->dev_lock, flags); 323 + } 324 + 325 + 326 + /* 327 + * Stop the controller, and don't return until we're really sure that no 328 + * further DMA is going on. 329 + */ 330 + static void mcam_ctlr_stop_dma(struct mcam_camera *cam) 331 + { 332 + unsigned long flags; 333 + 334 + /* 335 + * Theory: stop the camera controller (whether it is operating 336 + * or not). Delay briefly just in case we race with the SOF 337 + * interrupt, then wait until no DMA is active. 338 + */ 339 + spin_lock_irqsave(&cam->dev_lock, flags); 340 + mcam_ctlr_stop(cam); 341 + spin_unlock_irqrestore(&cam->dev_lock, flags); 342 + mdelay(1); 343 + wait_event_timeout(cam->iowait, 344 + !test_bit(CF_DMA_ACTIVE, &cam->flags), HZ); 345 + if (test_bit(CF_DMA_ACTIVE, &cam->flags)) 346 + cam_err(cam, "Timeout waiting for DMA to end\n"); 347 + /* This would be bad news - what now? */ 348 + spin_lock_irqsave(&cam->dev_lock, flags); 349 + cam->state = S_IDLE; 350 + mcam_ctlr_irq_disable(cam); 351 + spin_unlock_irqrestore(&cam->dev_lock, flags); 352 + } 353 + 354 + /* 355 + * Power up and down. 356 + */ 357 + static void mcam_ctlr_power_up(struct mcam_camera *cam) 358 + { 359 + unsigned long flags; 360 + 361 + spin_lock_irqsave(&cam->dev_lock, flags); 362 + mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN); 363 + cam->plat_power_up(cam); 364 + spin_unlock_irqrestore(&cam->dev_lock, flags); 365 + msleep(5); /* Just to be sure */ 366 + } 367 + 368 + static void mcam_ctlr_power_down(struct mcam_camera *cam) 369 + { 370 + unsigned long flags; 371 + 372 + spin_lock_irqsave(&cam->dev_lock, flags); 373 + cam->plat_power_down(cam); 374 + mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN); 375 + spin_unlock_irqrestore(&cam->dev_lock, flags); 376 + } 377 + 378 + /* -------------------------------------------------------------------- */ 379 + /* 380 + * Communications with the sensor. 381 + */ 382 + 383 + static int __mcam_cam_reset(struct mcam_camera *cam) 384 + { 385 + return sensor_call(cam, core, reset, 0); 386 + } 387 + 388 + /* 389 + * We have found the sensor on the i2c. Let's try to have a 390 + * conversation. 391 + */ 392 + static int mcam_cam_init(struct mcam_camera *cam) 393 + { 394 + struct v4l2_dbg_chip_ident chip; 395 + int ret; 396 + 397 + mutex_lock(&cam->s_mutex); 398 + if (cam->state != S_NOTREADY) 399 + cam_warn(cam, "Cam init with device in funky state %d", 400 + cam->state); 401 + ret = __mcam_cam_reset(cam); 402 + if (ret) 403 + goto out; 404 + chip.ident = V4L2_IDENT_NONE; 405 + chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR; 406 + chip.match.addr = cam->sensor_addr; 407 + ret = sensor_call(cam, core, g_chip_ident, &chip); 408 + if (ret) 409 + goto out; 410 + cam->sensor_type = chip.ident; 411 + if (cam->sensor_type != V4L2_IDENT_OV7670) { 412 + cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type); 413 + ret = -EINVAL; 414 + goto out; 415 + } 416 + /* Get/set parameters? */ 417 + ret = 0; 418 + cam->state = S_IDLE; 419 + out: 420 + mcam_ctlr_power_down(cam); 421 + mutex_unlock(&cam->s_mutex); 422 + return ret; 423 + } 424 + 425 + /* 426 + * Configure the sensor to match the parameters we have. Caller should 427 + * hold s_mutex 428 + */ 429 + static int mcam_cam_set_flip(struct mcam_camera *cam) 430 + { 431 + struct v4l2_control ctrl; 432 + 433 + memset(&ctrl, 0, sizeof(ctrl)); 434 + ctrl.id = V4L2_CID_VFLIP; 435 + ctrl.value = flip; 436 + return sensor_call(cam, core, s_ctrl, &ctrl); 437 + } 438 + 439 + 440 + static int mcam_cam_configure(struct mcam_camera *cam) 441 + { 442 + struct v4l2_mbus_framefmt mbus_fmt; 443 + int ret; 444 + 445 + v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code); 446 + ret = sensor_call(cam, core, init, 0); 447 + if (ret == 0) 448 + ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt); 449 + /* 450 + * OV7670 does weird things if flip is set *before* format... 451 + */ 452 + ret += mcam_cam_set_flip(cam); 453 + return ret; 454 + } 455 + 456 + /* -------------------------------------------------------------------- */ 457 + /* 458 + * DMA buffer management. These functions need s_mutex held. 459 + */ 460 + 461 + /* FIXME: this is inefficient as hell, since dma_alloc_coherent just 462 + * does a get_free_pages() call, and we waste a good chunk of an orderN 463 + * allocation. Should try to allocate the whole set in one chunk. 464 + */ 465 + static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime) 466 + { 467 + int i; 468 + 469 + mcam_set_config_needed(cam, 1); 470 + if (loadtime) 471 + cam->dma_buf_size = dma_buf_size; 472 + else 473 + cam->dma_buf_size = cam->pix_format.sizeimage; 474 + if (n_dma_bufs > 3) 475 + n_dma_bufs = 3; 476 + 477 + cam->nbufs = 0; 478 + for (i = 0; i < n_dma_bufs; i++) { 479 + cam->dma_bufs[i] = dma_alloc_coherent(cam->dev, 480 + cam->dma_buf_size, cam->dma_handles + i, 481 + GFP_KERNEL); 482 + if (cam->dma_bufs[i] == NULL) { 483 + cam_warn(cam, "Failed to allocate DMA buffer\n"); 484 + break; 485 + } 486 + /* For debug, remove eventually */ 487 + memset(cam->dma_bufs[i], 0xcc, cam->dma_buf_size); 488 + (cam->nbufs)++; 489 + } 490 + 491 + switch (cam->nbufs) { 492 + case 1: 493 + dma_free_coherent(cam->dev, cam->dma_buf_size, 494 + cam->dma_bufs[0], cam->dma_handles[0]); 495 + cam->nbufs = 0; 496 + case 0: 497 + cam_err(cam, "Insufficient DMA buffers, cannot operate\n"); 498 + return -ENOMEM; 499 + 500 + case 2: 501 + if (n_dma_bufs > 2) 502 + cam_warn(cam, "Will limp along with only 2 buffers\n"); 503 + break; 504 + } 505 + return 0; 506 + } 507 + 508 + static void mcam_free_dma_bufs(struct mcam_camera *cam) 509 + { 510 + int i; 511 + 512 + for (i = 0; i < cam->nbufs; i++) { 513 + dma_free_coherent(cam->dev, cam->dma_buf_size, 514 + cam->dma_bufs[i], cam->dma_handles[i]); 515 + cam->dma_bufs[i] = NULL; 516 + } 517 + cam->nbufs = 0; 518 + } 519 + 520 + 521 + 522 + 523 + 524 + /* ----------------------------------------------------------------------- */ 525 + /* 526 + * Here starts the V4L2 interface code. 527 + */ 528 + 529 + /* 530 + * Read an image from the device. 531 + */ 532 + static ssize_t mcam_deliver_buffer(struct mcam_camera *cam, 533 + char __user *buffer, size_t len, loff_t *pos) 534 + { 535 + int bufno; 536 + unsigned long flags; 537 + 538 + spin_lock_irqsave(&cam->dev_lock, flags); 539 + if (cam->next_buf < 0) { 540 + cam_err(cam, "deliver_buffer: No next buffer\n"); 541 + spin_unlock_irqrestore(&cam->dev_lock, flags); 542 + return -EIO; 543 + } 544 + bufno = cam->next_buf; 545 + clear_bit(bufno, &cam->flags); 546 + if (++(cam->next_buf) >= cam->nbufs) 547 + cam->next_buf = 0; 548 + if (!test_bit(cam->next_buf, &cam->flags)) 549 + cam->next_buf = -1; 550 + cam->specframes = 0; 551 + spin_unlock_irqrestore(&cam->dev_lock, flags); 552 + 553 + if (len > cam->pix_format.sizeimage) 554 + len = cam->pix_format.sizeimage; 555 + if (copy_to_user(buffer, cam->dma_bufs[bufno], len)) 556 + return -EFAULT; 557 + (*pos) += len; 558 + return len; 559 + } 560 + 561 + /* 562 + * Get everything ready, and start grabbing frames. 563 + */ 564 + static int mcam_read_setup(struct mcam_camera *cam, enum mcam_state state) 565 + { 566 + int ret; 567 + unsigned long flags; 568 + 569 + /* 570 + * Configuration. If we still don't have DMA buffers, 571 + * make one last, desperate attempt. 572 + */ 573 + if (cam->nbufs == 0) 574 + if (mcam_alloc_dma_bufs(cam, 0)) 575 + return -ENOMEM; 576 + 577 + if (mcam_needs_config(cam)) { 578 + mcam_cam_configure(cam); 579 + ret = mcam_ctlr_configure(cam); 580 + if (ret) 581 + return ret; 582 + } 583 + 584 + /* 585 + * Turn it loose. 586 + */ 587 + spin_lock_irqsave(&cam->dev_lock, flags); 588 + mcam_reset_buffers(cam); 589 + mcam_ctlr_irq_enable(cam); 590 + cam->state = state; 591 + mcam_ctlr_start(cam); 592 + spin_unlock_irqrestore(&cam->dev_lock, flags); 593 + return 0; 594 + } 595 + 596 + 597 + static ssize_t mcam_v4l_read(struct file *filp, 598 + char __user *buffer, size_t len, loff_t *pos) 599 + { 600 + struct mcam_camera *cam = filp->private_data; 601 + int ret = 0; 602 + 603 + /* 604 + * Perhaps we're in speculative read mode and already 605 + * have data? 606 + */ 607 + mutex_lock(&cam->s_mutex); 608 + if (cam->state == S_SPECREAD) { 609 + if (cam->next_buf >= 0) { 610 + ret = mcam_deliver_buffer(cam, buffer, len, pos); 611 + if (ret != 0) 612 + goto out_unlock; 613 + } 614 + } else if (cam->state == S_FLAKED || cam->state == S_NOTREADY) { 615 + ret = -EIO; 616 + goto out_unlock; 617 + } else if (cam->state != S_IDLE) { 618 + ret = -EBUSY; 619 + goto out_unlock; 620 + } 621 + 622 + /* 623 + * v4l2: multiple processes can open the device, but only 624 + * one gets to grab data from it. 625 + */ 626 + if (cam->owner && cam->owner != filp) { 627 + ret = -EBUSY; 628 + goto out_unlock; 629 + } 630 + cam->owner = filp; 631 + 632 + /* 633 + * Do setup if need be. 634 + */ 635 + if (cam->state != S_SPECREAD) { 636 + ret = mcam_read_setup(cam, S_SINGLEREAD); 637 + if (ret) 638 + goto out_unlock; 639 + } 640 + /* 641 + * Wait for something to happen. This should probably 642 + * be interruptible (FIXME). 643 + */ 644 + wait_event_timeout(cam->iowait, cam->next_buf >= 0, HZ); 645 + if (cam->next_buf < 0) { 646 + cam_err(cam, "read() operation timed out\n"); 647 + mcam_ctlr_stop_dma(cam); 648 + ret = -EIO; 649 + goto out_unlock; 650 + } 651 + /* 652 + * Give them their data and we should be done. 653 + */ 654 + ret = mcam_deliver_buffer(cam, buffer, len, pos); 655 + 656 + out_unlock: 657 + mutex_unlock(&cam->s_mutex); 658 + return ret; 659 + } 660 + 661 + 662 + 663 + 664 + 665 + 666 + 667 + 668 + /* 669 + * Streaming I/O support. 670 + */ 671 + 672 + 673 + 674 + static int mcam_vidioc_streamon(struct file *filp, void *priv, 675 + enum v4l2_buf_type type) 676 + { 677 + struct mcam_camera *cam = filp->private_data; 678 + int ret = -EINVAL; 679 + 680 + if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 681 + goto out; 682 + mutex_lock(&cam->s_mutex); 683 + if (cam->state != S_IDLE || cam->n_sbufs == 0) 684 + goto out_unlock; 685 + 686 + cam->sequence = 0; 687 + ret = mcam_read_setup(cam, S_STREAMING); 688 + 689 + out_unlock: 690 + mutex_unlock(&cam->s_mutex); 691 + out: 692 + return ret; 693 + } 694 + 695 + 696 + static int mcam_vidioc_streamoff(struct file *filp, void *priv, 697 + enum v4l2_buf_type type) 698 + { 699 + struct mcam_camera *cam = filp->private_data; 700 + int ret = -EINVAL; 701 + 702 + if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 703 + goto out; 704 + mutex_lock(&cam->s_mutex); 705 + if (cam->state != S_STREAMING) 706 + goto out_unlock; 707 + 708 + mcam_ctlr_stop_dma(cam); 709 + ret = 0; 710 + 711 + out_unlock: 712 + mutex_unlock(&cam->s_mutex); 713 + out: 714 + return ret; 715 + } 716 + 717 + 718 + 719 + static int mcam_setup_siobuf(struct mcam_camera *cam, int index) 720 + { 721 + struct mcam_sio_buffer *buf = cam->sb_bufs + index; 722 + 723 + INIT_LIST_HEAD(&buf->list); 724 + buf->v4lbuf.length = PAGE_ALIGN(cam->pix_format.sizeimage); 725 + buf->buffer = vmalloc_user(buf->v4lbuf.length); 726 + if (buf->buffer == NULL) 727 + return -ENOMEM; 728 + buf->mapcount = 0; 729 + buf->cam = cam; 730 + 731 + buf->v4lbuf.index = index; 732 + buf->v4lbuf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; 733 + buf->v4lbuf.field = V4L2_FIELD_NONE; 734 + buf->v4lbuf.memory = V4L2_MEMORY_MMAP; 735 + /* 736 + * Offset: must be 32-bit even on a 64-bit system. videobuf-dma-sg 737 + * just uses the length times the index, but the spec warns 738 + * against doing just that - vma merging problems. So we 739 + * leave a gap between each pair of buffers. 740 + */ 741 + buf->v4lbuf.m.offset = 2*index*buf->v4lbuf.length; 742 + return 0; 743 + } 744 + 745 + static int mcam_free_sio_buffers(struct mcam_camera *cam) 746 + { 747 + int i; 748 + 749 + /* 750 + * If any buffers are mapped, we cannot free them at all. 751 + */ 752 + for (i = 0; i < cam->n_sbufs; i++) 753 + if (cam->sb_bufs[i].mapcount > 0) 754 + return -EBUSY; 755 + /* 756 + * OK, let's do it. 757 + */ 758 + for (i = 0; i < cam->n_sbufs; i++) 759 + vfree(cam->sb_bufs[i].buffer); 760 + cam->n_sbufs = 0; 761 + kfree(cam->sb_bufs); 762 + cam->sb_bufs = NULL; 763 + INIT_LIST_HEAD(&cam->sb_avail); 764 + INIT_LIST_HEAD(&cam->sb_full); 765 + return 0; 766 + } 767 + 768 + 769 + 770 + static int mcam_vidioc_reqbufs(struct file *filp, void *priv, 771 + struct v4l2_requestbuffers *req) 772 + { 773 + struct mcam_camera *cam = filp->private_data; 774 + int ret = 0; /* Silence warning */ 775 + 776 + /* 777 + * Make sure it's something we can do. User pointers could be 778 + * implemented without great pain, but that's not been done yet. 779 + */ 780 + if (req->memory != V4L2_MEMORY_MMAP) 781 + return -EINVAL; 782 + /* 783 + * If they ask for zero buffers, they really want us to stop streaming 784 + * (if it's happening) and free everything. Should we check owner? 785 + */ 786 + mutex_lock(&cam->s_mutex); 787 + if (req->count == 0) { 788 + if (cam->state == S_STREAMING) 789 + mcam_ctlr_stop_dma(cam); 790 + ret = mcam_free_sio_buffers(cam); 791 + goto out; 792 + } 793 + /* 794 + * Device needs to be idle and working. We *could* try to do the 795 + * right thing in S_SPECREAD by shutting things down, but it 796 + * probably doesn't matter. 797 + */ 798 + if (cam->state != S_IDLE || (cam->owner && cam->owner != filp)) { 799 + ret = -EBUSY; 800 + goto out; 801 + } 802 + cam->owner = filp; 803 + 804 + if (req->count < min_buffers) 805 + req->count = min_buffers; 806 + else if (req->count > max_buffers) 807 + req->count = max_buffers; 808 + if (cam->n_sbufs > 0) { 809 + ret = mcam_free_sio_buffers(cam); 810 + if (ret) 811 + goto out; 812 + } 813 + 814 + cam->sb_bufs = kzalloc(req->count*sizeof(struct mcam_sio_buffer), 815 + GFP_KERNEL); 816 + if (cam->sb_bufs == NULL) { 817 + ret = -ENOMEM; 818 + goto out; 819 + } 820 + for (cam->n_sbufs = 0; cam->n_sbufs < req->count; (cam->n_sbufs++)) { 821 + ret = mcam_setup_siobuf(cam, cam->n_sbufs); 822 + if (ret) 823 + break; 824 + } 825 + 826 + if (cam->n_sbufs == 0) /* no luck at all - ret already set */ 827 + kfree(cam->sb_bufs); 828 + req->count = cam->n_sbufs; /* In case of partial success */ 829 + 830 + out: 831 + mutex_unlock(&cam->s_mutex); 832 + return ret; 833 + } 834 + 835 + 836 + static int mcam_vidioc_querybuf(struct file *filp, void *priv, 837 + struct v4l2_buffer *buf) 838 + { 839 + struct mcam_camera *cam = filp->private_data; 840 + int ret = -EINVAL; 841 + 842 + mutex_lock(&cam->s_mutex); 843 + if (buf->index >= cam->n_sbufs) 844 + goto out; 845 + *buf = cam->sb_bufs[buf->index].v4lbuf; 846 + ret = 0; 847 + out: 848 + mutex_unlock(&cam->s_mutex); 849 + return ret; 850 + } 851 + 852 + static int mcam_vidioc_qbuf(struct file *filp, void *priv, 853 + struct v4l2_buffer *buf) 854 + { 855 + struct mcam_camera *cam = filp->private_data; 856 + struct mcam_sio_buffer *sbuf; 857 + int ret = -EINVAL; 858 + unsigned long flags; 859 + 860 + mutex_lock(&cam->s_mutex); 861 + if (buf->index >= cam->n_sbufs) 862 + goto out; 863 + sbuf = cam->sb_bufs + buf->index; 864 + if (sbuf->v4lbuf.flags & V4L2_BUF_FLAG_QUEUED) { 865 + ret = 0; /* Already queued?? */ 866 + goto out; 867 + } 868 + if (sbuf->v4lbuf.flags & V4L2_BUF_FLAG_DONE) { 869 + /* Spec doesn't say anything, seems appropriate tho */ 870 + ret = -EBUSY; 871 + goto out; 872 + } 873 + sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_QUEUED; 874 + spin_lock_irqsave(&cam->dev_lock, flags); 875 + list_add(&sbuf->list, &cam->sb_avail); 876 + spin_unlock_irqrestore(&cam->dev_lock, flags); 877 + ret = 0; 878 + out: 879 + mutex_unlock(&cam->s_mutex); 880 + return ret; 881 + } 882 + 883 + static int mcam_vidioc_dqbuf(struct file *filp, void *priv, 884 + struct v4l2_buffer *buf) 885 + { 886 + struct mcam_camera *cam = filp->private_data; 887 + struct mcam_sio_buffer *sbuf; 888 + int ret = -EINVAL; 889 + unsigned long flags; 890 + 891 + mutex_lock(&cam->s_mutex); 892 + if (cam->state != S_STREAMING) 893 + goto out_unlock; 894 + if (list_empty(&cam->sb_full) && filp->f_flags & O_NONBLOCK) { 895 + ret = -EAGAIN; 896 + goto out_unlock; 897 + } 898 + 899 + while (list_empty(&cam->sb_full) && cam->state == S_STREAMING) { 900 + mutex_unlock(&cam->s_mutex); 901 + if (wait_event_interruptible(cam->iowait, 902 + !list_empty(&cam->sb_full))) { 903 + ret = -ERESTARTSYS; 904 + goto out; 905 + } 906 + mutex_lock(&cam->s_mutex); 907 + } 908 + 909 + if (cam->state != S_STREAMING) 910 + ret = -EINTR; 911 + else { 912 + spin_lock_irqsave(&cam->dev_lock, flags); 913 + /* Should probably recheck !list_empty() here */ 914 + sbuf = list_entry(cam->sb_full.next, 915 + struct mcam_sio_buffer, list); 916 + list_del_init(&sbuf->list); 917 + spin_unlock_irqrestore(&cam->dev_lock, flags); 918 + sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_DONE; 919 + *buf = sbuf->v4lbuf; 920 + ret = 0; 921 + } 922 + 923 + out_unlock: 924 + mutex_unlock(&cam->s_mutex); 925 + out: 926 + return ret; 927 + } 928 + 929 + 930 + 931 + static void mcam_v4l_vm_open(struct vm_area_struct *vma) 932 + { 933 + struct mcam_sio_buffer *sbuf = vma->vm_private_data; 934 + /* 935 + * Locking: done under mmap_sem, so we don't need to 936 + * go back to the camera lock here. 937 + */ 938 + sbuf->mapcount++; 939 + } 940 + 941 + 942 + static void mcam_v4l_vm_close(struct vm_area_struct *vma) 943 + { 944 + struct mcam_sio_buffer *sbuf = vma->vm_private_data; 945 + 946 + mutex_lock(&sbuf->cam->s_mutex); 947 + sbuf->mapcount--; 948 + /* Docs say we should stop I/O too... */ 949 + if (sbuf->mapcount == 0) 950 + sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_MAPPED; 951 + mutex_unlock(&sbuf->cam->s_mutex); 952 + } 953 + 954 + static const struct vm_operations_struct mcam_v4l_vm_ops = { 955 + .open = mcam_v4l_vm_open, 956 + .close = mcam_v4l_vm_close 957 + }; 958 + 959 + 960 + static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma) 961 + { 962 + struct mcam_camera *cam = filp->private_data; 963 + unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; 964 + int ret = -EINVAL; 965 + int i; 966 + struct mcam_sio_buffer *sbuf = NULL; 967 + 968 + if (!(vma->vm_flags & VM_WRITE) || !(vma->vm_flags & VM_SHARED)) 969 + return -EINVAL; 970 + /* 971 + * Find the buffer they are looking for. 972 + */ 973 + mutex_lock(&cam->s_mutex); 974 + for (i = 0; i < cam->n_sbufs; i++) 975 + if (cam->sb_bufs[i].v4lbuf.m.offset == offset) { 976 + sbuf = cam->sb_bufs + i; 977 + break; 978 + } 979 + if (sbuf == NULL) 980 + goto out; 981 + 982 + ret = remap_vmalloc_range(vma, sbuf->buffer, 0); 983 + if (ret) 984 + goto out; 985 + vma->vm_flags |= VM_DONTEXPAND; 986 + vma->vm_private_data = sbuf; 987 + vma->vm_ops = &mcam_v4l_vm_ops; 988 + sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_MAPPED; 989 + mcam_v4l_vm_open(vma); 990 + ret = 0; 991 + out: 992 + mutex_unlock(&cam->s_mutex); 993 + return ret; 994 + } 995 + 996 + 997 + 998 + static int mcam_v4l_open(struct file *filp) 999 + { 1000 + struct mcam_camera *cam = video_drvdata(filp); 1001 + 1002 + filp->private_data = cam; 1003 + 1004 + mutex_lock(&cam->s_mutex); 1005 + if (cam->users == 0) { 1006 + mcam_ctlr_power_up(cam); 1007 + __mcam_cam_reset(cam); 1008 + mcam_set_config_needed(cam, 1); 1009 + /* FIXME make sure this is complete */ 1010 + } 1011 + (cam->users)++; 1012 + mutex_unlock(&cam->s_mutex); 1013 + return 0; 1014 + } 1015 + 1016 + 1017 + static int mcam_v4l_release(struct file *filp) 1018 + { 1019 + struct mcam_camera *cam = filp->private_data; 1020 + 1021 + mutex_lock(&cam->s_mutex); 1022 + (cam->users)--; 1023 + if (filp == cam->owner) { 1024 + mcam_ctlr_stop_dma(cam); 1025 + mcam_free_sio_buffers(cam); 1026 + cam->owner = NULL; 1027 + } 1028 + if (cam->users == 0) { 1029 + mcam_ctlr_power_down(cam); 1030 + if (alloc_bufs_at_read) 1031 + mcam_free_dma_bufs(cam); 1032 + } 1033 + mutex_unlock(&cam->s_mutex); 1034 + return 0; 1035 + } 1036 + 1037 + 1038 + 1039 + static unsigned int mcam_v4l_poll(struct file *filp, 1040 + struct poll_table_struct *pt) 1041 + { 1042 + struct mcam_camera *cam = filp->private_data; 1043 + 1044 + poll_wait(filp, &cam->iowait, pt); 1045 + if (cam->next_buf >= 0) 1046 + return POLLIN | POLLRDNORM; 1047 + return 0; 1048 + } 1049 + 1050 + 1051 + 1052 + static int mcam_vidioc_queryctrl(struct file *filp, void *priv, 1053 + struct v4l2_queryctrl *qc) 1054 + { 1055 + struct mcam_camera *cam = priv; 1056 + int ret; 1057 + 1058 + mutex_lock(&cam->s_mutex); 1059 + ret = sensor_call(cam, core, queryctrl, qc); 1060 + mutex_unlock(&cam->s_mutex); 1061 + return ret; 1062 + } 1063 + 1064 + 1065 + static int mcam_vidioc_g_ctrl(struct file *filp, void *priv, 1066 + struct v4l2_control *ctrl) 1067 + { 1068 + struct mcam_camera *cam = priv; 1069 + int ret; 1070 + 1071 + mutex_lock(&cam->s_mutex); 1072 + ret = sensor_call(cam, core, g_ctrl, ctrl); 1073 + mutex_unlock(&cam->s_mutex); 1074 + return ret; 1075 + } 1076 + 1077 + 1078 + static int mcam_vidioc_s_ctrl(struct file *filp, void *priv, 1079 + struct v4l2_control *ctrl) 1080 + { 1081 + struct mcam_camera *cam = priv; 1082 + int ret; 1083 + 1084 + mutex_lock(&cam->s_mutex); 1085 + ret = sensor_call(cam, core, s_ctrl, ctrl); 1086 + mutex_unlock(&cam->s_mutex); 1087 + return ret; 1088 + } 1089 + 1090 + 1091 + 1092 + 1093 + 1094 + static int mcam_vidioc_querycap(struct file *file, void *priv, 1095 + struct v4l2_capability *cap) 1096 + { 1097 + strcpy(cap->driver, "marvell_ccic"); 1098 + strcpy(cap->card, "marvell_ccic"); 1099 + cap->version = 1; 1100 + cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | 1101 + V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; 1102 + return 0; 1103 + } 1104 + 1105 + 1106 + /* 1107 + * The default format we use until somebody says otherwise. 1108 + */ 1109 + static const struct v4l2_pix_format mcam_def_pix_format = { 1110 + .width = VGA_WIDTH, 1111 + .height = VGA_HEIGHT, 1112 + .pixelformat = V4L2_PIX_FMT_YUYV, 1113 + .field = V4L2_FIELD_NONE, 1114 + .bytesperline = VGA_WIDTH*2, 1115 + .sizeimage = VGA_WIDTH*VGA_HEIGHT*2, 1116 + }; 1117 + 1118 + static const enum v4l2_mbus_pixelcode mcam_def_mbus_code = 1119 + V4L2_MBUS_FMT_YUYV8_2X8; 1120 + 1121 + static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp, 1122 + void *priv, struct v4l2_fmtdesc *fmt) 1123 + { 1124 + if (fmt->index >= N_MCAM_FMTS) 1125 + return -EINVAL; 1126 + strlcpy(fmt->description, mcam_formats[fmt->index].desc, 1127 + sizeof(fmt->description)); 1128 + fmt->pixelformat = mcam_formats[fmt->index].pixelformat; 1129 + return 0; 1130 + } 1131 + 1132 + static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv, 1133 + struct v4l2_format *fmt) 1134 + { 1135 + struct mcam_camera *cam = priv; 1136 + struct mcam_format_struct *f; 1137 + struct v4l2_pix_format *pix = &fmt->fmt.pix; 1138 + struct v4l2_mbus_framefmt mbus_fmt; 1139 + int ret; 1140 + 1141 + f = mcam_find_format(pix->pixelformat); 1142 + pix->pixelformat = f->pixelformat; 1143 + v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code); 1144 + mutex_lock(&cam->s_mutex); 1145 + ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt); 1146 + mutex_unlock(&cam->s_mutex); 1147 + v4l2_fill_pix_format(pix, &mbus_fmt); 1148 + pix->bytesperline = pix->width * f->bpp; 1149 + pix->sizeimage = pix->height * pix->bytesperline; 1150 + return ret; 1151 + } 1152 + 1153 + static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv, 1154 + struct v4l2_format *fmt) 1155 + { 1156 + struct mcam_camera *cam = priv; 1157 + struct mcam_format_struct *f; 1158 + int ret; 1159 + 1160 + /* 1161 + * Can't do anything if the device is not idle 1162 + * Also can't if there are streaming buffers in place. 1163 + */ 1164 + if (cam->state != S_IDLE || cam->n_sbufs > 0) 1165 + return -EBUSY; 1166 + 1167 + f = mcam_find_format(fmt->fmt.pix.pixelformat); 1168 + 1169 + /* 1170 + * See if the formatting works in principle. 1171 + */ 1172 + ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt); 1173 + if (ret) 1174 + return ret; 1175 + /* 1176 + * Now we start to change things for real, so let's do it 1177 + * under lock. 1178 + */ 1179 + mutex_lock(&cam->s_mutex); 1180 + cam->pix_format = fmt->fmt.pix; 1181 + cam->mbus_code = f->mbus_code; 1182 + 1183 + /* 1184 + * Make sure we have appropriate DMA buffers. 1185 + */ 1186 + ret = -ENOMEM; 1187 + if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage) 1188 + mcam_free_dma_bufs(cam); 1189 + if (cam->nbufs == 0) { 1190 + if (mcam_alloc_dma_bufs(cam, 0)) 1191 + goto out; 1192 + } 1193 + /* 1194 + * It looks like this might work, so let's program the sensor. 1195 + */ 1196 + ret = mcam_cam_configure(cam); 1197 + if (!ret) 1198 + ret = mcam_ctlr_configure(cam); 1199 + out: 1200 + mutex_unlock(&cam->s_mutex); 1201 + return ret; 1202 + } 1203 + 1204 + /* 1205 + * Return our stored notion of how the camera is/should be configured. 1206 + * The V4l2 spec wants us to be smarter, and actually get this from 1207 + * the camera (and not mess with it at open time). Someday. 1208 + */ 1209 + static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv, 1210 + struct v4l2_format *f) 1211 + { 1212 + struct mcam_camera *cam = priv; 1213 + 1214 + f->fmt.pix = cam->pix_format; 1215 + return 0; 1216 + } 1217 + 1218 + /* 1219 + * We only have one input - the sensor - so minimize the nonsense here. 1220 + */ 1221 + static int mcam_vidioc_enum_input(struct file *filp, void *priv, 1222 + struct v4l2_input *input) 1223 + { 1224 + if (input->index != 0) 1225 + return -EINVAL; 1226 + 1227 + input->type = V4L2_INPUT_TYPE_CAMERA; 1228 + input->std = V4L2_STD_ALL; /* Not sure what should go here */ 1229 + strcpy(input->name, "Camera"); 1230 + return 0; 1231 + } 1232 + 1233 + static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i) 1234 + { 1235 + *i = 0; 1236 + return 0; 1237 + } 1238 + 1239 + static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i) 1240 + { 1241 + if (i != 0) 1242 + return -EINVAL; 1243 + return 0; 1244 + } 1245 + 1246 + /* from vivi.c */ 1247 + static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a) 1248 + { 1249 + return 0; 1250 + } 1251 + 1252 + /* 1253 + * G/S_PARM. Most of this is done by the sensor, but we are 1254 + * the level which controls the number of read buffers. 1255 + */ 1256 + static int mcam_vidioc_g_parm(struct file *filp, void *priv, 1257 + struct v4l2_streamparm *parms) 1258 + { 1259 + struct mcam_camera *cam = priv; 1260 + int ret; 1261 + 1262 + mutex_lock(&cam->s_mutex); 1263 + ret = sensor_call(cam, video, g_parm, parms); 1264 + mutex_unlock(&cam->s_mutex); 1265 + parms->parm.capture.readbuffers = n_dma_bufs; 1266 + return ret; 1267 + } 1268 + 1269 + static int mcam_vidioc_s_parm(struct file *filp, void *priv, 1270 + struct v4l2_streamparm *parms) 1271 + { 1272 + struct mcam_camera *cam = priv; 1273 + int ret; 1274 + 1275 + mutex_lock(&cam->s_mutex); 1276 + ret = sensor_call(cam, video, s_parm, parms); 1277 + mutex_unlock(&cam->s_mutex); 1278 + parms->parm.capture.readbuffers = n_dma_bufs; 1279 + return ret; 1280 + } 1281 + 1282 + static int mcam_vidioc_g_chip_ident(struct file *file, void *priv, 1283 + struct v4l2_dbg_chip_ident *chip) 1284 + { 1285 + struct mcam_camera *cam = priv; 1286 + 1287 + chip->ident = V4L2_IDENT_NONE; 1288 + chip->revision = 0; 1289 + if (v4l2_chip_match_host(&chip->match)) { 1290 + chip->ident = cam->chip_id; 1291 + return 0; 1292 + } 1293 + return sensor_call(cam, core, g_chip_ident, chip); 1294 + } 1295 + 1296 + static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv, 1297 + struct v4l2_frmsizeenum *sizes) 1298 + { 1299 + struct mcam_camera *cam = priv; 1300 + int ret; 1301 + 1302 + mutex_lock(&cam->s_mutex); 1303 + ret = sensor_call(cam, video, enum_framesizes, sizes); 1304 + mutex_unlock(&cam->s_mutex); 1305 + return ret; 1306 + } 1307 + 1308 + static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv, 1309 + struct v4l2_frmivalenum *interval) 1310 + { 1311 + struct mcam_camera *cam = priv; 1312 + int ret; 1313 + 1314 + mutex_lock(&cam->s_mutex); 1315 + ret = sensor_call(cam, video, enum_frameintervals, interval); 1316 + mutex_unlock(&cam->s_mutex); 1317 + return ret; 1318 + } 1319 + 1320 + #ifdef CONFIG_VIDEO_ADV_DEBUG 1321 + static int mcam_vidioc_g_register(struct file *file, void *priv, 1322 + struct v4l2_dbg_register *reg) 1323 + { 1324 + struct mcam_camera *cam = priv; 1325 + 1326 + if (v4l2_chip_match_host(&reg->match)) { 1327 + reg->val = mcam_reg_read(cam, reg->reg); 1328 + reg->size = 4; 1329 + return 0; 1330 + } 1331 + return sensor_call(cam, core, g_register, reg); 1332 + } 1333 + 1334 + static int mcam_vidioc_s_register(struct file *file, void *priv, 1335 + struct v4l2_dbg_register *reg) 1336 + { 1337 + struct mcam_camera *cam = priv; 1338 + 1339 + if (v4l2_chip_match_host(&reg->match)) { 1340 + mcam_reg_write(cam, reg->reg, reg->val); 1341 + return 0; 1342 + } 1343 + return sensor_call(cam, core, s_register, reg); 1344 + } 1345 + #endif 1346 + 1347 + /* 1348 + * This template device holds all of those v4l2 methods; we 1349 + * clone it for specific real devices. 1350 + */ 1351 + 1352 + static const struct v4l2_file_operations mcam_v4l_fops = { 1353 + .owner = THIS_MODULE, 1354 + .open = mcam_v4l_open, 1355 + .release = mcam_v4l_release, 1356 + .read = mcam_v4l_read, 1357 + .poll = mcam_v4l_poll, 1358 + .mmap = mcam_v4l_mmap, 1359 + .unlocked_ioctl = video_ioctl2, 1360 + }; 1361 + 1362 + static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = { 1363 + .vidioc_querycap = mcam_vidioc_querycap, 1364 + .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap, 1365 + .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap, 1366 + .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap, 1367 + .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap, 1368 + .vidioc_enum_input = mcam_vidioc_enum_input, 1369 + .vidioc_g_input = mcam_vidioc_g_input, 1370 + .vidioc_s_input = mcam_vidioc_s_input, 1371 + .vidioc_s_std = mcam_vidioc_s_std, 1372 + .vidioc_reqbufs = mcam_vidioc_reqbufs, 1373 + .vidioc_querybuf = mcam_vidioc_querybuf, 1374 + .vidioc_qbuf = mcam_vidioc_qbuf, 1375 + .vidioc_dqbuf = mcam_vidioc_dqbuf, 1376 + .vidioc_streamon = mcam_vidioc_streamon, 1377 + .vidioc_streamoff = mcam_vidioc_streamoff, 1378 + .vidioc_queryctrl = mcam_vidioc_queryctrl, 1379 + .vidioc_g_ctrl = mcam_vidioc_g_ctrl, 1380 + .vidioc_s_ctrl = mcam_vidioc_s_ctrl, 1381 + .vidioc_g_parm = mcam_vidioc_g_parm, 1382 + .vidioc_s_parm = mcam_vidioc_s_parm, 1383 + .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes, 1384 + .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals, 1385 + .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident, 1386 + #ifdef CONFIG_VIDEO_ADV_DEBUG 1387 + .vidioc_g_register = mcam_vidioc_g_register, 1388 + .vidioc_s_register = mcam_vidioc_s_register, 1389 + #endif 1390 + }; 1391 + 1392 + static struct video_device mcam_v4l_template = { 1393 + .name = "mcam", 1394 + .tvnorms = V4L2_STD_NTSC_M, 1395 + .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */ 1396 + 1397 + .fops = &mcam_v4l_fops, 1398 + .ioctl_ops = &mcam_v4l_ioctl_ops, 1399 + .release = video_device_release_empty, 1400 + }; 1401 + 1402 + /* ---------------------------------------------------------------------- */ 1403 + /* 1404 + * Interrupt handler stuff 1405 + */ 1406 + 1407 + 1408 + 1409 + static void mcam_frame_tasklet(unsigned long data) 1410 + { 1411 + struct mcam_camera *cam = (struct mcam_camera *) data; 1412 + int i; 1413 + unsigned long flags; 1414 + struct mcam_sio_buffer *sbuf; 1415 + 1416 + spin_lock_irqsave(&cam->dev_lock, flags); 1417 + for (i = 0; i < cam->nbufs; i++) { 1418 + int bufno = cam->next_buf; 1419 + if (bufno < 0) { /* "will never happen" */ 1420 + cam_err(cam, "No valid bufs in tasklet!\n"); 1421 + break; 1422 + } 1423 + if (++(cam->next_buf) >= cam->nbufs) 1424 + cam->next_buf = 0; 1425 + if (!test_bit(bufno, &cam->flags)) 1426 + continue; 1427 + if (list_empty(&cam->sb_avail)) 1428 + break; /* Leave it valid, hope for better later */ 1429 + clear_bit(bufno, &cam->flags); 1430 + sbuf = list_entry(cam->sb_avail.next, 1431 + struct mcam_sio_buffer, list); 1432 + /* 1433 + * Drop the lock during the big copy. This *should* be safe... 1434 + */ 1435 + spin_unlock_irqrestore(&cam->dev_lock, flags); 1436 + memcpy(sbuf->buffer, cam->dma_bufs[bufno], 1437 + cam->pix_format.sizeimage); 1438 + sbuf->v4lbuf.bytesused = cam->pix_format.sizeimage; 1439 + sbuf->v4lbuf.sequence = cam->buf_seq[bufno]; 1440 + sbuf->v4lbuf.flags &= ~V4L2_BUF_FLAG_QUEUED; 1441 + sbuf->v4lbuf.flags |= V4L2_BUF_FLAG_DONE; 1442 + spin_lock_irqsave(&cam->dev_lock, flags); 1443 + list_move_tail(&sbuf->list, &cam->sb_full); 1444 + } 1445 + if (!list_empty(&cam->sb_full)) 1446 + wake_up(&cam->iowait); 1447 + spin_unlock_irqrestore(&cam->dev_lock, flags); 1448 + } 1449 + 1450 + 1451 + 1452 + static void mcam_frame_complete(struct mcam_camera *cam, int frame) 1453 + { 1454 + /* 1455 + * Basic frame housekeeping. 1456 + */ 1457 + if (test_bit(frame, &cam->flags) && printk_ratelimit()) 1458 + cam_err(cam, "Frame overrun on %d, frames lost\n", frame); 1459 + set_bit(frame, &cam->flags); 1460 + clear_bit(CF_DMA_ACTIVE, &cam->flags); 1461 + if (cam->next_buf < 0) 1462 + cam->next_buf = frame; 1463 + cam->buf_seq[frame] = ++(cam->sequence); 1464 + 1465 + switch (cam->state) { 1466 + /* 1467 + * If in single read mode, try going speculative. 1468 + */ 1469 + case S_SINGLEREAD: 1470 + cam->state = S_SPECREAD; 1471 + cam->specframes = 0; 1472 + wake_up(&cam->iowait); 1473 + break; 1474 + 1475 + /* 1476 + * If we are already doing speculative reads, and nobody is 1477 + * reading them, just stop. 1478 + */ 1479 + case S_SPECREAD: 1480 + if (++(cam->specframes) >= cam->nbufs) { 1481 + mcam_ctlr_stop(cam); 1482 + mcam_ctlr_irq_disable(cam); 1483 + cam->state = S_IDLE; 1484 + } 1485 + wake_up(&cam->iowait); 1486 + break; 1487 + /* 1488 + * For the streaming case, we defer the real work to the 1489 + * camera tasklet. 1490 + * 1491 + * FIXME: if the application is not consuming the buffers, 1492 + * we should eventually put things on hold and restart in 1493 + * vidioc_dqbuf(). 1494 + */ 1495 + case S_STREAMING: 1496 + tasklet_schedule(&cam->s_tasklet); 1497 + break; 1498 + 1499 + default: 1500 + cam_err(cam, "Frame interrupt in non-operational state\n"); 1501 + break; 1502 + } 1503 + } 1504 + 1505 + 1506 + 1507 + 1508 + int mccic_irq(struct mcam_camera *cam, unsigned int irqs) 1509 + { 1510 + unsigned int frame, handled = 0; 1511 + 1512 + mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */ 1513 + /* 1514 + * Handle any frame completions. There really should 1515 + * not be more than one of these, or we have fallen 1516 + * far behind. 1517 + */ 1518 + for (frame = 0; frame < cam->nbufs; frame++) 1519 + if (irqs & (IRQ_EOF0 << frame)) { 1520 + mcam_frame_complete(cam, frame); 1521 + handled = 1; 1522 + } 1523 + /* 1524 + * If a frame starts, note that we have DMA active. This 1525 + * code assumes that we won't get multiple frame interrupts 1526 + * at once; may want to rethink that. 1527 + */ 1528 + if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) { 1529 + set_bit(CF_DMA_ACTIVE, &cam->flags); 1530 + handled = 1; 1531 + } 1532 + return handled; 1533 + } 1534 + 1535 + /* 1536 + * Registration and such. 1537 + */ 1538 + 1539 + /* FIXME this is really platform stuff */ 1540 + static const struct dmi_system_id olpc_xo1_dmi[] = { 1541 + { 1542 + .matches = { 1543 + DMI_MATCH(DMI_SYS_VENDOR, "OLPC"), 1544 + DMI_MATCH(DMI_PRODUCT_NAME, "XO"), 1545 + DMI_MATCH(DMI_PRODUCT_VERSION, "1"), 1546 + }, 1547 + }, 1548 + { } 1549 + }; 1550 + 1551 + static struct ov7670_config sensor_cfg = { 1552 + /* This controller only does SMBUS */ 1553 + .use_smbus = true, 1554 + 1555 + /* 1556 + * Exclude QCIF mode, because it only captures a tiny portion 1557 + * of the sensor FOV 1558 + */ 1559 + .min_width = 320, 1560 + .min_height = 240, 1561 + }; 1562 + 1563 + 1564 + int mccic_register(struct mcam_camera *cam) 1565 + { 1566 + struct i2c_board_info ov7670_info = { 1567 + .type = "ov7670", 1568 + .addr = 0x42, 1569 + .platform_data = &sensor_cfg, 1570 + }; 1571 + int ret; 1572 + 1573 + /* 1574 + * Register with V4L 1575 + */ 1576 + ret = v4l2_device_register(cam->dev, &cam->v4l2_dev); 1577 + if (ret) 1578 + return ret; 1579 + 1580 + mutex_init(&cam->s_mutex); 1581 + cam->state = S_NOTREADY; 1582 + mcam_set_config_needed(cam, 1); 1583 + init_waitqueue_head(&cam->iowait); 1584 + cam->pix_format = mcam_def_pix_format; 1585 + cam->mbus_code = mcam_def_mbus_code; 1586 + INIT_LIST_HEAD(&cam->dev_list); 1587 + INIT_LIST_HEAD(&cam->sb_avail); 1588 + INIT_LIST_HEAD(&cam->sb_full); 1589 + tasklet_init(&cam->s_tasklet, mcam_frame_tasklet, (unsigned long) cam); 1590 + 1591 + mcam_ctlr_init(cam); 1592 + 1593 + /* Apply XO-1 clock speed */ 1594 + if (dmi_check_system(olpc_xo1_dmi)) 1595 + sensor_cfg.clock_speed = 45; 1596 + 1597 + /* 1598 + * Try to find the sensor. 1599 + */ 1600 + cam->sensor_addr = ov7670_info.addr; 1601 + cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev, 1602 + &cam->i2c_adapter, &ov7670_info, NULL); 1603 + if (cam->sensor == NULL) { 1604 + ret = -ENODEV; 1605 + goto out_unregister; 1606 + } 1607 + 1608 + ret = mcam_cam_init(cam); 1609 + if (ret) 1610 + goto out_unregister; 1611 + /* 1612 + * Get the v4l2 setup done. 1613 + */ 1614 + mutex_lock(&cam->s_mutex); 1615 + cam->vdev = mcam_v4l_template; 1616 + cam->vdev.debug = 0; 1617 + cam->vdev.v4l2_dev = &cam->v4l2_dev; 1618 + ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1); 1619 + if (ret) 1620 + goto out; 1621 + video_set_drvdata(&cam->vdev, cam); 1622 + 1623 + /* 1624 + * If so requested, try to get our DMA buffers now. 1625 + */ 1626 + if (!alloc_bufs_at_read) { 1627 + if (mcam_alloc_dma_bufs(cam, 1)) 1628 + cam_warn(cam, "Unable to alloc DMA buffers at load" 1629 + " will try again later."); 1630 + } 1631 + 1632 + out: 1633 + mutex_unlock(&cam->s_mutex); 1634 + return ret; 1635 + out_unregister: 1636 + v4l2_device_unregister(&cam->v4l2_dev); 1637 + return ret; 1638 + } 1639 + 1640 + 1641 + void mccic_shutdown(struct mcam_camera *cam) 1642 + { 1643 + if (cam->users > 0) 1644 + cam_warn(cam, "Removing a device with users!\n"); 1645 + if (cam->n_sbufs > 0) 1646 + /* What if they are still mapped? Shouldn't be, but... */ 1647 + mcam_free_sio_buffers(cam); 1648 + mcam_ctlr_stop_dma(cam); 1649 + mcam_ctlr_power_down(cam); 1650 + mcam_free_dma_bufs(cam); 1651 + video_unregister_device(&cam->vdev); 1652 + v4l2_device_unregister(&cam->v4l2_dev); 1653 + } 1654 + 1655 + /* 1656 + * Power management 1657 + */ 1658 + #ifdef CONFIG_PM 1659 + 1660 + void mccic_suspend(struct mcam_camera *cam) 1661 + { 1662 + enum mcam_state cstate = cam->state; 1663 + 1664 + mcam_ctlr_stop_dma(cam); 1665 + mcam_ctlr_power_down(cam); 1666 + cam->state = cstate; 1667 + } 1668 + 1669 + int mccic_resume(struct mcam_camera *cam) 1670 + { 1671 + int ret = 0; 1672 + 1673 + mutex_lock(&cam->s_mutex); 1674 + if (cam->users > 0) { 1675 + mcam_ctlr_power_up(cam); 1676 + __mcam_cam_reset(cam); 1677 + } else { 1678 + mcam_ctlr_power_down(cam); 1679 + } 1680 + mutex_unlock(&cam->s_mutex); 1681 + 1682 + set_bit(CF_CONFIG_NEEDED, &cam->flags); 1683 + if (cam->state == S_SPECREAD) 1684 + cam->state = S_IDLE; /* Don't bother restarting */ 1685 + else if (cam->state == S_SINGLEREAD || cam->state == S_STREAMING) 1686 + ret = mcam_read_setup(cam, cam->state); 1687 + return ret; 1688 + } 1689 + #endif /* CONFIG_PM */
+311
drivers/media/video/marvell-ccic/mcam-core.h
··· 1 + /* 2 + * Marvell camera core structures. 3 + * 4 + * Copyright 2011 Jonathan Corbet corbet@lwn.net 5 + */ 6 + 7 + /* 8 + * Tracking of streaming I/O buffers. 9 + * FIXME doesn't belong in this file 10 + */ 11 + struct mcam_sio_buffer { 12 + struct list_head list; 13 + struct v4l2_buffer v4lbuf; 14 + char *buffer; /* Where it lives in kernel space */ 15 + int mapcount; 16 + struct mcam_camera *cam; 17 + }; 18 + 19 + enum mcam_state { 20 + S_NOTREADY, /* Not yet initialized */ 21 + S_IDLE, /* Just hanging around */ 22 + S_FLAKED, /* Some sort of problem */ 23 + S_SINGLEREAD, /* In read() */ 24 + S_SPECREAD, /* Speculative read (for future read()) */ 25 + S_STREAMING /* Streaming data */ 26 + }; 27 + #define MAX_DMA_BUFS 3 28 + 29 + /* 30 + * A description of one of our devices. 31 + * Locking: controlled by s_mutex. Certain fields, however, require 32 + * the dev_lock spinlock; they are marked as such by comments. 33 + * dev_lock is also required for access to device registers. 34 + */ 35 + struct mcam_camera { 36 + /* 37 + * These fields should be set by the platform code prior to 38 + * calling mcam_register(). 39 + */ 40 + struct i2c_adapter i2c_adapter; 41 + unsigned char __iomem *regs; 42 + spinlock_t dev_lock; 43 + struct device *dev; /* For messages, dma alloc */ 44 + unsigned int chip_id; 45 + 46 + /* 47 + * Callbacks from the core to the platform code. 48 + */ 49 + void (*plat_power_up) (struct mcam_camera *cam); 50 + void (*plat_power_down) (struct mcam_camera *cam); 51 + 52 + /* 53 + * Everything below here is private to the mcam core and 54 + * should not be touched by the platform code. 55 + */ 56 + struct v4l2_device v4l2_dev; 57 + enum mcam_state state; 58 + unsigned long flags; /* Buffer status, mainly (dev_lock) */ 59 + int users; /* How many open FDs */ 60 + struct file *owner; /* Who has data access (v4l2) */ 61 + 62 + /* 63 + * Subsystem structures. 64 + */ 65 + struct video_device vdev; 66 + struct v4l2_subdev *sensor; 67 + unsigned short sensor_addr; 68 + 69 + struct list_head dev_list; /* link to other devices */ 70 + 71 + /* DMA buffers */ 72 + unsigned int nbufs; /* How many are alloc'd */ 73 + int next_buf; /* Next to consume (dev_lock) */ 74 + unsigned int dma_buf_size; /* allocated size */ 75 + void *dma_bufs[MAX_DMA_BUFS]; /* Internal buffer addresses */ 76 + dma_addr_t dma_handles[MAX_DMA_BUFS]; /* Buffer bus addresses */ 77 + unsigned int specframes; /* Unconsumed spec frames (dev_lock) */ 78 + unsigned int sequence; /* Frame sequence number */ 79 + unsigned int buf_seq[MAX_DMA_BUFS]; /* Sequence for individual buffers */ 80 + 81 + /* Streaming buffers */ 82 + unsigned int n_sbufs; /* How many we have */ 83 + struct mcam_sio_buffer *sb_bufs; /* The array of housekeeping structs */ 84 + struct list_head sb_avail; /* Available for data (we own) (dev_lock) */ 85 + struct list_head sb_full; /* With data (user space owns) (dev_lock) */ 86 + struct tasklet_struct s_tasklet; 87 + 88 + /* Current operating parameters */ 89 + u32 sensor_type; /* Currently ov7670 only */ 90 + struct v4l2_pix_format pix_format; 91 + enum v4l2_mbus_pixelcode mbus_code; 92 + 93 + /* Locks */ 94 + struct mutex s_mutex; /* Access to this structure */ 95 + 96 + /* Misc */ 97 + wait_queue_head_t iowait; /* Waiting on frame data */ 98 + }; 99 + 100 + 101 + /* 102 + * Register I/O functions. These are here because the platform code 103 + * may legitimately need to mess with the register space. 104 + */ 105 + /* 106 + * Device register I/O 107 + */ 108 + static inline void mcam_reg_write(struct mcam_camera *cam, unsigned int reg, 109 + unsigned int val) 110 + { 111 + iowrite32(val, cam->regs + reg); 112 + } 113 + 114 + static inline unsigned int mcam_reg_read(struct mcam_camera *cam, 115 + unsigned int reg) 116 + { 117 + return ioread32(cam->regs + reg); 118 + } 119 + 120 + 121 + static inline void mcam_reg_write_mask(struct mcam_camera *cam, unsigned int reg, 122 + unsigned int val, unsigned int mask) 123 + { 124 + unsigned int v = mcam_reg_read(cam, reg); 125 + 126 + v = (v & ~mask) | (val & mask); 127 + mcam_reg_write(cam, reg, v); 128 + } 129 + 130 + static inline void mcam_reg_clear_bit(struct mcam_camera *cam, 131 + unsigned int reg, unsigned int val) 132 + { 133 + mcam_reg_write_mask(cam, reg, 0, val); 134 + } 135 + 136 + static inline void mcam_reg_set_bit(struct mcam_camera *cam, 137 + unsigned int reg, unsigned int val) 138 + { 139 + mcam_reg_write_mask(cam, reg, val, val); 140 + } 141 + 142 + /* 143 + * Functions for use by platform code. 144 + */ 145 + int mccic_register(struct mcam_camera *cam); 146 + int mccic_irq(struct mcam_camera *cam, unsigned int irqs); 147 + void mccic_shutdown(struct mcam_camera *cam); 148 + #ifdef CONFIG_PM 149 + void mccic_suspend(struct mcam_camera *cam); 150 + int mccic_resume(struct mcam_camera *cam); 151 + #endif 152 + 153 + /* 154 + * Register definitions for the m88alp01 camera interface. Offsets in bytes 155 + * as given in the spec. 156 + */ 157 + #define REG_Y0BAR 0x00 158 + #define REG_Y1BAR 0x04 159 + #define REG_Y2BAR 0x08 160 + /* ... */ 161 + 162 + #define REG_IMGPITCH 0x24 /* Image pitch register */ 163 + #define IMGP_YP_SHFT 2 /* Y pitch params */ 164 + #define IMGP_YP_MASK 0x00003ffc /* Y pitch field */ 165 + #define IMGP_UVP_SHFT 18 /* UV pitch (planar) */ 166 + #define IMGP_UVP_MASK 0x3ffc0000 167 + #define REG_IRQSTATRAW 0x28 /* RAW IRQ Status */ 168 + #define IRQ_EOF0 0x00000001 /* End of frame 0 */ 169 + #define IRQ_EOF1 0x00000002 /* End of frame 1 */ 170 + #define IRQ_EOF2 0x00000004 /* End of frame 2 */ 171 + #define IRQ_SOF0 0x00000008 /* Start of frame 0 */ 172 + #define IRQ_SOF1 0x00000010 /* Start of frame 1 */ 173 + #define IRQ_SOF2 0x00000020 /* Start of frame 2 */ 174 + #define IRQ_OVERFLOW 0x00000040 /* FIFO overflow */ 175 + #define IRQ_TWSIW 0x00010000 /* TWSI (smbus) write */ 176 + #define IRQ_TWSIR 0x00020000 /* TWSI read */ 177 + #define IRQ_TWSIE 0x00040000 /* TWSI error */ 178 + #define TWSIIRQS (IRQ_TWSIW|IRQ_TWSIR|IRQ_TWSIE) 179 + #define FRAMEIRQS (IRQ_EOF0|IRQ_EOF1|IRQ_EOF2|IRQ_SOF0|IRQ_SOF1|IRQ_SOF2) 180 + #define ALLIRQS (TWSIIRQS|FRAMEIRQS|IRQ_OVERFLOW) 181 + #define REG_IRQMASK 0x2c /* IRQ mask - same bits as IRQSTAT */ 182 + #define REG_IRQSTAT 0x30 /* IRQ status / clear */ 183 + 184 + #define REG_IMGSIZE 0x34 /* Image size */ 185 + #define IMGSZ_V_MASK 0x1fff0000 186 + #define IMGSZ_V_SHIFT 16 187 + #define IMGSZ_H_MASK 0x00003fff 188 + #define REG_IMGOFFSET 0x38 /* IMage offset */ 189 + 190 + #define REG_CTRL0 0x3c /* Control 0 */ 191 + #define C0_ENABLE 0x00000001 /* Makes the whole thing go */ 192 + 193 + /* Mask for all the format bits */ 194 + #define C0_DF_MASK 0x00fffffc /* Bits 2-23 */ 195 + 196 + /* RGB ordering */ 197 + #define C0_RGB4_RGBX 0x00000000 198 + #define C0_RGB4_XRGB 0x00000004 199 + #define C0_RGB4_BGRX 0x00000008 200 + #define C0_RGB4_XBGR 0x0000000c 201 + #define C0_RGB5_RGGB 0x00000000 202 + #define C0_RGB5_GRBG 0x00000004 203 + #define C0_RGB5_GBRG 0x00000008 204 + #define C0_RGB5_BGGR 0x0000000c 205 + 206 + /* Spec has two fields for DIN and DOUT, but they must match, so 207 + combine them here. */ 208 + #define C0_DF_YUV 0x00000000 /* Data is YUV */ 209 + #define C0_DF_RGB 0x000000a0 /* ... RGB */ 210 + #define C0_DF_BAYER 0x00000140 /* ... Bayer */ 211 + /* 8-8-8 must be missing from the below - ask */ 212 + #define C0_RGBF_565 0x00000000 213 + #define C0_RGBF_444 0x00000800 214 + #define C0_RGB_BGR 0x00001000 /* Blue comes first */ 215 + #define C0_YUV_PLANAR 0x00000000 /* YUV 422 planar format */ 216 + #define C0_YUV_PACKED 0x00008000 /* YUV 422 packed */ 217 + #define C0_YUV_420PL 0x0000a000 /* YUV 420 planar */ 218 + /* Think that 420 packed must be 111 - ask */ 219 + #define C0_YUVE_YUYV 0x00000000 /* Y1CbY0Cr */ 220 + #define C0_YUVE_YVYU 0x00010000 /* Y1CrY0Cb */ 221 + #define C0_YUVE_VYUY 0x00020000 /* CrY1CbY0 */ 222 + #define C0_YUVE_UYVY 0x00030000 /* CbY1CrY0 */ 223 + #define C0_YUVE_XYUV 0x00000000 /* 420: .YUV */ 224 + #define C0_YUVE_XYVU 0x00010000 /* 420: .YVU */ 225 + #define C0_YUVE_XUVY 0x00020000 /* 420: .UVY */ 226 + #define C0_YUVE_XVUY 0x00030000 /* 420: .VUY */ 227 + /* Bayer bits 18,19 if needed */ 228 + #define C0_HPOL_LOW 0x01000000 /* HSYNC polarity active low */ 229 + #define C0_VPOL_LOW 0x02000000 /* VSYNC polarity active low */ 230 + #define C0_VCLK_LOW 0x04000000 /* VCLK on falling edge */ 231 + #define C0_DOWNSCALE 0x08000000 /* Enable downscaler */ 232 + #define C0_SIFM_MASK 0xc0000000 /* SIF mode bits */ 233 + #define C0_SIF_HVSYNC 0x00000000 /* Use H/VSYNC */ 234 + #define CO_SOF_NOSYNC 0x40000000 /* Use inband active signaling */ 235 + 236 + 237 + #define REG_CTRL1 0x40 /* Control 1 */ 238 + #define C1_444ALPHA 0x00f00000 /* Alpha field in RGB444 */ 239 + #define C1_ALPHA_SHFT 20 240 + #define C1_DMAB32 0x00000000 /* 32-byte DMA burst */ 241 + #define C1_DMAB16 0x02000000 /* 16-byte DMA burst */ 242 + #define C1_DMAB64 0x04000000 /* 64-byte DMA burst */ 243 + #define C1_DMAB_MASK 0x06000000 244 + #define C1_TWOBUFS 0x08000000 /* Use only two DMA buffers */ 245 + #define C1_PWRDWN 0x10000000 /* Power down */ 246 + 247 + #define REG_CLKCTRL 0x88 /* Clock control */ 248 + #define CLK_DIV_MASK 0x0000ffff /* Upper bits RW "reserved" */ 249 + 250 + #define REG_GPR 0xb4 /* General purpose register. This 251 + controls inputs to the power and reset 252 + pins on the OV7670 used with OLPC; 253 + other deployments could differ. */ 254 + #define GPR_C1EN 0x00000020 /* Pad 1 (power down) enable */ 255 + #define GPR_C0EN 0x00000010 /* Pad 0 (reset) enable */ 256 + #define GPR_C1 0x00000002 /* Control 1 value */ 257 + /* 258 + * Control 0 is wired to reset on OLPC machines. For ov7x sensors, 259 + * it is active low, for 0v6x, instead, it's active high. What 260 + * fun. 261 + */ 262 + #define GPR_C0 0x00000001 /* Control 0 value */ 263 + 264 + #define REG_TWSIC0 0xb8 /* TWSI (smbus) control 0 */ 265 + #define TWSIC0_EN 0x00000001 /* TWSI enable */ 266 + #define TWSIC0_MODE 0x00000002 /* 1 = 16-bit, 0 = 8-bit */ 267 + #define TWSIC0_SID 0x000003fc /* Slave ID */ 268 + #define TWSIC0_SID_SHIFT 2 269 + #define TWSIC0_CLKDIV 0x0007fc00 /* Clock divider */ 270 + #define TWSIC0_MASKACK 0x00400000 /* Mask ack from sensor */ 271 + #define TWSIC0_OVMAGIC 0x00800000 /* Make it work on OV sensors */ 272 + 273 + #define REG_TWSIC1 0xbc /* TWSI control 1 */ 274 + #define TWSIC1_DATA 0x0000ffff /* Data to/from camchip */ 275 + #define TWSIC1_ADDR 0x00ff0000 /* Address (register) */ 276 + #define TWSIC1_ADDR_SHIFT 16 277 + #define TWSIC1_READ 0x01000000 /* Set for read op */ 278 + #define TWSIC1_WSTAT 0x02000000 /* Write status */ 279 + #define TWSIC1_RVALID 0x04000000 /* Read data valid */ 280 + #define TWSIC1_ERROR 0x08000000 /* Something screwed up */ 281 + 282 + 283 + #define REG_UBAR 0xc4 /* Upper base address register */ 284 + 285 + /* 286 + * Here's the weird global control registers which are said to live 287 + * way up here. 288 + */ 289 + #define REG_GL_CSR 0x3004 /* Control/status register */ 290 + #define GCSR_SRS 0x00000001 /* SW Reset set */ 291 + #define GCSR_SRC 0x00000002 /* SW Reset clear */ 292 + #define GCSR_MRS 0x00000004 /* Master reset set */ 293 + #define GCSR_MRC 0x00000008 /* HW Reset clear */ 294 + #define GCSR_CCIC_EN 0x00004000 /* CCIC Clock enable */ 295 + #define REG_GL_IMASK 0x300c /* Interrupt mask register */ 296 + #define GIMSK_CCIC_EN 0x00000004 /* CCIC Interrupt enable */ 297 + 298 + #define REG_GL_FCR 0x3038 /* GPIO functional control register */ 299 + #define GFCR_GPIO_ON 0x08 /* Camera GPIO enabled */ 300 + #define REG_GL_GPIOR 0x315c /* GPIO register */ 301 + #define GGPIO_OUT 0x80000 /* GPIO output */ 302 + #define GGPIO_VAL 0x00008 /* Output pin value */ 303 + 304 + #define REG_LEN (REG_GL_IMASK + 4) 305 + 306 + 307 + /* 308 + * Useful stuff that probably belongs somewhere global. 309 + */ 310 + #define VGA_WIDTH 640 311 + #define VGA_HEIGHT 480