Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: sprd: add mux clock support

This patch adds clock multiplexor support for Spreadtrum platforms,
the mux clocks also can be found in sprd composite clocks, so
provides two helpers that can be reused later on.

Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

authored by

Chunyan Zhang and committed by
Stephen Boyd
ab73cf2a cdb09f67

+151
+1
drivers/clk/sprd/Makefile
··· 2 2 3 3 clk-sprd-y += common.o 4 4 clk-sprd-y += gate.o 5 + clk-sprd-y += mux.o
+76
drivers/clk/sprd/mux.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + // 3 + // Spreadtrum multiplexer clock driver 4 + // 5 + // Copyright (C) 2017 Spreadtrum, Inc. 6 + // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com> 7 + 8 + #include <linux/clk.h> 9 + #include <linux/clk-provider.h> 10 + #include <linux/regmap.h> 11 + 12 + #include "mux.h" 13 + 14 + u8 sprd_mux_helper_get_parent(const struct sprd_clk_common *common, 15 + const struct sprd_mux_ssel *mux) 16 + { 17 + unsigned int reg; 18 + u8 parent; 19 + int num_parents; 20 + int i; 21 + 22 + regmap_read(common->regmap, common->reg, &reg); 23 + parent = reg >> mux->shift; 24 + parent &= (1 << mux->width) - 1; 25 + 26 + if (!mux->table) 27 + return parent; 28 + 29 + num_parents = clk_hw_get_num_parents(&common->hw); 30 + 31 + for (i = 0; i < num_parents - 1; i++) 32 + if (parent >= mux->table[i] && parent < mux->table[i + 1]) 33 + return i; 34 + 35 + return num_parents - 1; 36 + } 37 + EXPORT_SYMBOL_GPL(sprd_mux_helper_get_parent); 38 + 39 + static u8 sprd_mux_get_parent(struct clk_hw *hw) 40 + { 41 + struct sprd_mux *cm = hw_to_sprd_mux(hw); 42 + 43 + return sprd_mux_helper_get_parent(&cm->common, &cm->mux); 44 + } 45 + 46 + int sprd_mux_helper_set_parent(const struct sprd_clk_common *common, 47 + const struct sprd_mux_ssel *mux, 48 + u8 index) 49 + { 50 + unsigned int reg; 51 + 52 + if (mux->table) 53 + index = mux->table[index]; 54 + 55 + regmap_read(common->regmap, common->reg, &reg); 56 + reg &= ~GENMASK(mux->width + mux->shift - 1, mux->shift); 57 + regmap_write(common->regmap, common->reg, 58 + reg | (index << mux->shift)); 59 + 60 + return 0; 61 + } 62 + EXPORT_SYMBOL_GPL(sprd_mux_helper_set_parent); 63 + 64 + static int sprd_mux_set_parent(struct clk_hw *hw, u8 index) 65 + { 66 + struct sprd_mux *cm = hw_to_sprd_mux(hw); 67 + 68 + return sprd_mux_helper_set_parent(&cm->common, &cm->mux, index); 69 + } 70 + 71 + const struct clk_ops sprd_mux_ops = { 72 + .get_parent = sprd_mux_get_parent, 73 + .set_parent = sprd_mux_set_parent, 74 + .determine_rate = __clk_mux_determine_rate, 75 + }; 76 + EXPORT_SYMBOL_GPL(sprd_mux_ops);
+74
drivers/clk/sprd/mux.h
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + // 3 + // Spreadtrum multiplexer clock driver 4 + // 5 + // Copyright (C) 2017 Spreadtrum, Inc. 6 + // Author: Chunyan Zhang <chunyan.zhang@spreadtrum.com> 7 + 8 + #ifndef _SPRD_MUX_H_ 9 + #define _SPRD_MUX_H_ 10 + 11 + #include "common.h" 12 + 13 + /** 14 + * struct sprd_mux_ssel - Mux clock's source select bits in its register 15 + * @shift: Bit offset of the divider in its register 16 + * @width: Width of the divider field in its register 17 + * @table: For some mux clocks, not all sources are used on some special 18 + * chips, this matches the value of mux clock's register and the 19 + * sources which are used for this mux clock 20 + */ 21 + struct sprd_mux_ssel { 22 + u8 shift; 23 + u8 width; 24 + const u8 *table; 25 + }; 26 + 27 + struct sprd_mux { 28 + struct sprd_mux_ssel mux; 29 + struct sprd_clk_common common; 30 + }; 31 + 32 + #define _SPRD_MUX_CLK(_shift, _width, _table) \ 33 + { \ 34 + .shift = _shift, \ 35 + .width = _width, \ 36 + .table = _table, \ 37 + } 38 + 39 + #define SPRD_MUX_CLK_TABLE(_struct, _name, _parents, _table, \ 40 + _reg, _shift, _width, \ 41 + _flags) \ 42 + struct sprd_mux _struct = { \ 43 + .mux = _SPRD_MUX_CLK(_shift, _width, _table), \ 44 + .common = { \ 45 + .regmap = NULL, \ 46 + .reg = _reg, \ 47 + .hw.init = CLK_HW_INIT_PARENTS(_name, \ 48 + _parents, \ 49 + &sprd_mux_ops, \ 50 + _flags), \ 51 + } \ 52 + } 53 + 54 + #define SPRD_MUX_CLK(_struct, _name, _parents, _reg, \ 55 + _shift, _width, _flags) \ 56 + SPRD_MUX_CLK_TABLE(_struct, _name, _parents, NULL, \ 57 + _reg, _shift, _width, _flags) 58 + 59 + static inline struct sprd_mux *hw_to_sprd_mux(const struct clk_hw *hw) 60 + { 61 + struct sprd_clk_common *common = hw_to_sprd_clk_common(hw); 62 + 63 + return container_of(common, struct sprd_mux, common); 64 + } 65 + 66 + extern const struct clk_ops sprd_mux_ops; 67 + 68 + u8 sprd_mux_helper_get_parent(const struct sprd_clk_common *common, 69 + const struct sprd_mux_ssel *mux); 70 + int sprd_mux_helper_set_parent(const struct sprd_clk_common *common, 71 + const struct sprd_mux_ssel *mux, 72 + u8 index); 73 + 74 + #endif /* _SPRD_MUX_H_ */