Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: imx6sll: add mmdc1 ipg clock

i.MX6SLL has MMDC1 ipg clock in CCM CCGR, add it into
clock tree for clock management.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Anson Huang and committed by
Stephen Boyd
aac7ff20 891f30bf

+3 -1
+1
drivers/clk/imx/clk-imx6sll.c
··· 293 293 clks[IMX6SLL_CLK_WDOG1] = imx_clk_gate2("wdog1", "ipg", base + 0x74, 16); 294 294 clks[IMX6SLL_CLK_MMDC_P0_FAST] = imx_clk_gate_flags("mmdc_p0_fast", "mmdc_podf", base + 0x74, 20, CLK_IS_CRITICAL); 295 295 clks[IMX6SLL_CLK_MMDC_P0_IPG] = imx_clk_gate2_flags("mmdc_p0_ipg", "ipg", base + 0x74, 24, CLK_IS_CRITICAL); 296 + clks[IMX6SLL_CLK_MMDC_P1_IPG] = imx_clk_gate2("mmdc_p1_ipg", "ipg", base + 0x74, 26); 296 297 clks[IMX6SLL_CLK_OCRAM] = imx_clk_gate_flags("ocram","ahb", base + 0x74, 28, CLK_IS_CRITICAL); 297 298 298 299 /* CCGR4 */
+2 -1
include/dt-bindings/clock/imx6sll-clock.h
··· 203 203 #define IMX6SLL_CLK_GPIO4 176 204 204 #define IMX6SLL_CLK_GPIO5 177 205 205 #define IMX6SLL_CLK_GPIO6 178 206 + #define IMX6SLL_CLK_MMDC_P1_IPG 179 206 207 207 - #define IMX6SLL_CLK_END 179 208 + #define IMX6SLL_CLK_END 180 208 209 209 210 #endif /* __DT_BINDINGS_CLOCK_IMX6SLL_H */