···2424- vcc10-supply: The input supply for LDO_REG62525- vcc11-supply: The input supply for LDO_REG82626- vcc12-supply: The input supply for SWITCH_REG22727+- dvs-gpios: buck1/2 can be controlled by gpio dvs, this is GPIO specifiers2828+ for 2 host gpio's used for dvs. The format of the gpio specifier depends in2929+ the gpio controller. If DVS GPIOs aren't present, voltage changes will happen3030+ very quickly with no slow ramp time.27312832Regulators: All the regulators of RK808 to be instantiated shall be2933listed in a child node named 'regulators'. Each regulator is represented···5955 interrupt-parent = <&gpio0>;6056 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;6157 pinctrl-names = "default";6262- pinctrl-0 = <&pmic_int>;5858+ pinctrl-0 = <&pmic_int &dvs_1 &dvs_2>;5959+ dvs-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>,6060+ <&gpio7 15 GPIO_ACTIVE_HIGH>;6361 reg = <0x1b>;6462 rockchip,system-power-controller;6563 wakeup-source;
···9191- regulator-initial-mode:9292 Usage: optional9393 Value type: <u32>9494- Descrption: 1 = Set initial mode to high power mode (HPM), also referred9595- to as NPM. HPM consumes more ground current than LPM, but9494+ Description: 2 = Set initial mode to auto mode (automatically select9595+ between HPM and LPM); not available on boost type9696+ regulators.9797+9898+ 1 = Set initial mode to high power mode (HPM), also referred9999+ to as NPM. HPM consumes more ground current than LPM, but96100 it can source significantly higher load current. HPM is not97101 available on boost type regulators. For voltage switch type98102 regulators, HPM implies that over current protection and9999- soft start are active all the time. 0 = Set initial mode to100100- low power mode (LPM).103103+ soft start are active all the time.104104+105105+ 0 = Set initial mode to low power mode (LPM).106106+107107+- qcom,ocp-max-retries:108108+ Usage: optional109109+ Value type: <u32>110110+ Description: Maximum number of times to try toggling a voltage switch111111+ off and back on as a result of consecutive over current112112+ events.113113+114114+- qcom,ocp-retry-delay:115115+ Usage: optional116116+ Value type: <u32>117117+ Description: Time to delay in milliseconds between each voltage switch118118+ toggle after an over current event takes place.119119+120120+- qcom,pin-ctrl-enable:121121+ Usage: optional122122+ Value type: <u32>123123+ Description: Bit mask specifying which hardware pins should be used to124124+ enable the regulator, if any; supported bits are:125125+ 0 = ignore all hardware enable signals126126+ BIT(0) = follow HW0_EN signal127127+ BIT(1) = follow HW1_EN signal128128+ BIT(2) = follow HW2_EN signal129129+ BIT(3) = follow HW3_EN signal130130+131131+- qcom,pin-ctrl-hpm:132132+ Usage: optional133133+ Value type: <u32>134134+ Description: Bit mask specifying which hardware pins should be used to135135+ force the regulator into high power mode, if any;136136+ supported bits are:137137+ 0 = ignore all hardware enable signals138138+ BIT(0) = follow HW0_EN signal139139+ BIT(1) = follow HW1_EN signal140140+ BIT(2) = follow HW2_EN signal141141+ BIT(3) = follow HW3_EN signal142142+ BIT(4) = follow PMIC awake state143143+144144+- qcom,vs-soft-start-strength:145145+ Usage: optional146146+ Value type: <u32>147147+ Description: This property sets the soft start strength for voltage148148+ switch type regulators; supported values are:149149+ 0 = 0.05 uA150150+ 1 = 0.25 uA151151+ 2 = 0.55 uA152152+ 3 = 0.75 uA101153102154Example:103155
+12
drivers/regulator/Kconfig
···523523 Qualcomm RPM as a module. The module will be named524524 "qcom_rpm-regulator".525525526526+config REGULATOR_QCOM_SMD_RPM527527+ tristate "Qualcomm SMD based RPM regulator driver"528528+ depends on QCOM_SMD_RPM529529+ help530530+ If you say yes to this option, support will be included for the531531+ regulators exposed by the Resource Power Manager found in Qualcomm532532+ 8974 based devices.533533+534534+ Say M here if you want to include support for the regulators on the535535+ Qualcomm RPM as a module. The module will be named536536+ "qcom_smd-regulator".537537+526538config REGULATOR_QCOM_SPMI527539 tristate "Qualcomm SPMI regulator driver"528540 depends on SPMI || COMPILE_TEST
···2626#include <linux/regmap.h>2727#include <linux/list.h>28282929+/* Pin control enable input pins. */3030+#define SPMI_REGULATOR_PIN_CTRL_ENABLE_NONE 0x003131+#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN0 0x013232+#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN1 0x023333+#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN2 0x043434+#define SPMI_REGULATOR_PIN_CTRL_ENABLE_EN3 0x083535+#define SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT 0x103636+3737+/* Pin control high power mode input pins. */3838+#define SPMI_REGULATOR_PIN_CTRL_HPM_NONE 0x003939+#define SPMI_REGULATOR_PIN_CTRL_HPM_EN0 0x014040+#define SPMI_REGULATOR_PIN_CTRL_HPM_EN1 0x024141+#define SPMI_REGULATOR_PIN_CTRL_HPM_EN2 0x044242+#define SPMI_REGULATOR_PIN_CTRL_HPM_EN3 0x084343+#define SPMI_REGULATOR_PIN_CTRL_HPM_SLEEP_B 0x104444+#define SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT 0x204545+4646+/*4747+ * Used with enable parameters to specify that hardware default register values4848+ * should be left unaltered.4949+ */5050+#define SPMI_REGULATOR_USE_HW_DEFAULT 25151+5252+/* Soft start strength of a voltage switch type regulator */5353+enum spmi_vs_soft_start_str {5454+ SPMI_VS_SOFT_START_STR_0P05_UA = 0,5555+ SPMI_VS_SOFT_START_STR_0P25_UA,5656+ SPMI_VS_SOFT_START_STR_0P55_UA,5757+ SPMI_VS_SOFT_START_STR_0P75_UA,5858+ SPMI_VS_SOFT_START_STR_HW_DEFAULT,5959+};6060+6161+/**6262+ * struct spmi_regulator_init_data - spmi-regulator initialization data6363+ * @pin_ctrl_enable: Bit mask specifying which hardware pins should be6464+ * used to enable the regulator, if any6565+ * Value should be an ORing of6666+ * SPMI_REGULATOR_PIN_CTRL_ENABLE_* constants. If6767+ * the bit specified by6868+ * SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT is6969+ * set, then pin control enable hardware registers7070+ * will not be modified.7171+ * @pin_ctrl_hpm: Bit mask specifying which hardware pins should be7272+ * used to force the regulator into high power7373+ * mode, if any7474+ * Value should be an ORing of7575+ * SPMI_REGULATOR_PIN_CTRL_HPM_* constants. If7676+ * the bit specified by7777+ * SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT is7878+ * set, then pin control mode hardware registers7979+ * will not be modified.8080+ * @vs_soft_start_strength: This parameter sets the soft start strength for8181+ * voltage switch type regulators. Its value8282+ * should be one of SPMI_VS_SOFT_START_STR_*. If8383+ * its value is SPMI_VS_SOFT_START_STR_HW_DEFAULT,8484+ * then the soft start strength will be left at its8585+ * default hardware value.8686+ */8787+struct spmi_regulator_init_data {8888+ unsigned pin_ctrl_enable;8989+ unsigned pin_ctrl_hpm;9090+ enum spmi_vs_soft_start_str vs_soft_start_strength;9191+};9292+2993/* These types correspond to unique register layouts. */3094enum spmi_regulator_logical_type {3195 SPMI_REGULATOR_LOGICAL_TYPE_SMPS,···522458 return spmi_regulator_common_enable(rdev);523459}524460461461+static int spmi_regulator_vs_ocp(struct regulator_dev *rdev)462462+{463463+ struct spmi_regulator *vreg = rdev_get_drvdata(rdev);464464+ u8 reg = SPMI_VS_OCP_OVERRIDE;465465+466466+ return spmi_vreg_write(vreg, SPMI_VS_REG_OCP, ®, 1);467467+}468468+525469static int spmi_regulator_common_disable(struct regulator_dev *rdev)526470{527471 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);···576504 * Force uV to be an allowed set point by applying a ceiling function to577505 * the uV value.578506 */579579- *voltage_sel = (uV - range->min_uV + range->step_uV - 1)580580- / range->step_uV;507507+ *voltage_sel = DIV_ROUND_UP(uV - range->min_uV, range->step_uV);581508 uV = *voltage_sel * range->step_uV + range->min_uV;582509583510 if (uV > max_uV) {···863792 if (reg & SPMI_COMMON_MODE_HPM_MASK)864793 return REGULATOR_MODE_NORMAL;865794795795+ if (reg & SPMI_COMMON_MODE_AUTO_MASK)796796+ return REGULATOR_MODE_FAST;797797+866798 return REGULATOR_MODE_IDLE;867799}868800···873799spmi_regulator_common_set_mode(struct regulator_dev *rdev, unsigned int mode)874800{875801 struct spmi_regulator *vreg = rdev_get_drvdata(rdev);876876- u8 mask = SPMI_COMMON_MODE_HPM_MASK;802802+ u8 mask = SPMI_COMMON_MODE_HPM_MASK | SPMI_COMMON_MODE_AUTO_MASK;877803 u8 val = 0;878804879805 if (mode == REGULATOR_MODE_NORMAL)880880- val = mask;806806+ val = SPMI_COMMON_MODE_HPM_MASK;807807+ else if (mode == REGULATOR_MODE_FAST)808808+ val = SPMI_COMMON_MODE_AUTO_MASK;881809882810 return spmi_vreg_update_bits(vreg, SPMI_COMMON_REG_MODE, val, mask);883811}···1049973 .is_enabled = spmi_regulator_common_is_enabled,1050974 .set_pull_down = spmi_regulator_common_set_pull_down,1051975 .set_soft_start = spmi_regulator_common_set_soft_start,976976+ .set_over_current_protection = spmi_regulator_vs_ocp,1052977};10539781054979static struct regulator_ops spmi_boost_ops = {···12801203 return ret;12811204}1282120512061206+static int spmi_regulator_init_registers(struct spmi_regulator *vreg,12071207+ const struct spmi_regulator_init_data *data)12081208+{12091209+ int ret;12101210+ enum spmi_regulator_logical_type type;12111211+ u8 ctrl_reg[8], reg, mask;12121212+12131213+ type = vreg->logical_type;12141214+12151215+ ret = spmi_vreg_read(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);12161216+ if (ret)12171217+ return ret;12181218+12191219+ /* Set up enable pin control. */12201220+ if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS12211221+ || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO12221222+ || type == SPMI_REGULATOR_LOGICAL_TYPE_VS)12231223+ && !(data->pin_ctrl_enable12241224+ & SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT)) {12251225+ ctrl_reg[SPMI_COMMON_IDX_ENABLE] &=12261226+ ~SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;12271227+ ctrl_reg[SPMI_COMMON_IDX_ENABLE] |=12281228+ data->pin_ctrl_enable & SPMI_COMMON_ENABLE_FOLLOW_ALL_MASK;12291229+ }12301230+12311231+ /* Set up mode pin control. */12321232+ if ((type == SPMI_REGULATOR_LOGICAL_TYPE_SMPS12331233+ || type == SPMI_REGULATOR_LOGICAL_TYPE_LDO)12341234+ && !(data->pin_ctrl_hpm12351235+ & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {12361236+ ctrl_reg[SPMI_COMMON_IDX_MODE] &=12371237+ ~SPMI_COMMON_MODE_FOLLOW_ALL_MASK;12381238+ ctrl_reg[SPMI_COMMON_IDX_MODE] |=12391239+ data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_ALL_MASK;12401240+ }12411241+12421242+ if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS12431243+ && !(data->pin_ctrl_hpm & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {12441244+ ctrl_reg[SPMI_COMMON_IDX_MODE] &=12451245+ ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;12461246+ ctrl_reg[SPMI_COMMON_IDX_MODE] |=12471247+ data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;12481248+ }12491249+12501250+ if ((type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LO_SMPS12511251+ || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_HO_SMPS12521252+ || type == SPMI_REGULATOR_LOGICAL_TYPE_ULT_LDO)12531253+ && !(data->pin_ctrl_hpm12541254+ & SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT)) {12551255+ ctrl_reg[SPMI_COMMON_IDX_MODE] &=12561256+ ~SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;12571257+ ctrl_reg[SPMI_COMMON_IDX_MODE] |=12581258+ data->pin_ctrl_hpm & SPMI_COMMON_MODE_FOLLOW_AWAKE_MASK;12591259+ }12601260+12611261+ /* Write back any control register values that were modified. */12621262+ ret = spmi_vreg_write(vreg, SPMI_COMMON_REG_VOLTAGE_RANGE, ctrl_reg, 8);12631263+ if (ret)12641264+ return ret;12651265+12661266+ /* Set soft start strength and over current protection for VS. */12671267+ if (type == SPMI_REGULATOR_LOGICAL_TYPE_VS) {12681268+ if (data->vs_soft_start_strength12691269+ != SPMI_VS_SOFT_START_STR_HW_DEFAULT) {12701270+ reg = data->vs_soft_start_strength12711271+ & SPMI_VS_SOFT_START_SEL_MASK;12721272+ mask = SPMI_VS_SOFT_START_SEL_MASK;12731273+ return spmi_vreg_update_bits(vreg,12741274+ SPMI_VS_REG_SOFT_START,12751275+ reg, mask);12761276+ }12771277+ }12781278+12791279+ return 0;12801280+}12811281+12821282+static void spmi_regulator_get_dt_config(struct spmi_regulator *vreg,12831283+ struct device_node *node, struct spmi_regulator_init_data *data)12841284+{12851285+ /*12861286+ * Initialize configuration parameters to use hardware default in case12871287+ * no value is specified via device tree.12881288+ */12891289+ data->pin_ctrl_enable = SPMI_REGULATOR_PIN_CTRL_ENABLE_HW_DEFAULT;12901290+ data->pin_ctrl_hpm = SPMI_REGULATOR_PIN_CTRL_HPM_HW_DEFAULT;12911291+ data->vs_soft_start_strength = SPMI_VS_SOFT_START_STR_HW_DEFAULT;12921292+12931293+ /* These bindings are optional, so it is okay if they aren't found. */12941294+ of_property_read_u32(node, "qcom,ocp-max-retries",12951295+ &vreg->ocp_max_retries);12961296+ of_property_read_u32(node, "qcom,ocp-retry-delay",12971297+ &vreg->ocp_retry_delay_ms);12981298+ of_property_read_u32(node, "qcom,pin-ctrl-enable",12991299+ &data->pin_ctrl_enable);13001300+ of_property_read_u32(node, "qcom,pin-ctrl-hpm", &data->pin_ctrl_hpm);13011301+ of_property_read_u32(node, "qcom,vs-soft-start-strength",13021302+ &data->vs_soft_start_strength);13031303+}13041304+12831305static unsigned int spmi_regulator_of_map_mode(unsigned int mode)12841306{12851285- if (mode)13071307+ if (mode == 1)12861308 return REGULATOR_MODE_NORMAL;13091309+ if (mode == 2)13101310+ return REGULATOR_MODE_FAST;1287131112881312 return REGULATOR_MODE_IDLE;12891313}···13931215 const struct regulator_desc *desc,13941216 struct regulator_config *config)13951217{12181218+ struct spmi_regulator_init_data data = { };13961219 struct spmi_regulator *vreg = config->driver_data;13971220 struct device *dev = config->dev;13981221 int ret;1399122214001400- vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES;14011401- vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS;12231223+ spmi_regulator_get_dt_config(vreg, node, &data);12241224+12251225+ if (!vreg->ocp_max_retries)12261226+ vreg->ocp_max_retries = SPMI_VS_OCP_DEFAULT_MAX_RETRIES;12271227+ if (!vreg->ocp_retry_delay_ms)12281228+ vreg->ocp_retry_delay_ms = SPMI_VS_OCP_DEFAULT_RETRY_DELAY_MS;12291229+12301230+ ret = spmi_regulator_init_registers(vreg, &data);12311231+ if (ret) {12321232+ dev_err(dev, "common initialization failed, ret=%d\n", ret);12331233+ return ret;12341234+ }1402123514031236 if (vreg->logical_type == SPMI_REGULATOR_LOGICAL_TYPE_FTSMPS) {14041237 ret = spmi_regulator_ftsmps_init_slew_rate(vreg);
+200-12
drivers/regulator/rk808-regulator.c
···1616 * more details.1717 */18181919-#include <linux/module.h>1919+#include <linux/delay.h>2020+#include <linux/gpio.h>2021#include <linux/i2c.h>2121-#include <linux/mfd/rk808.h>2222+#include <linux/module.h>2223#include <linux/of_device.h>2424+#include <linux/of_gpio.h>2525+#include <linux/mfd/rk808.h>2326#include <linux/regulator/driver.h>2427#include <linux/regulator/of_regulator.h>2828+#include <linux/gpio/consumer.h>25292630/* Field Definitions */2731#define RK808_BUCK_VSEL_MASK 0x3f···4036#define RK808_RAMP_RATE_6MV_PER_US (2 << RK808_RAMP_RATE_OFFSET)4137#define RK808_RAMP_RATE_10MV_PER_US (3 << RK808_RAMP_RATE_OFFSET)42383939+#define RK808_DVS2_POL BIT(2)4040+#define RK808_DVS1_POL BIT(1)4141+4342/* Offset from XXX_ON_VSEL to XXX_SLP_VSEL */4443#define RK808_SLP_REG_OFFSET 145444545+/* Offset from XXX_ON_VSEL to XXX_DVS_VSEL */4646+#define RK808_DVS_REG_OFFSET 24747+4648/* Offset from XXX_EN_REG to SLEEP_SET_OFF_XXX */4749#define RK808_SLP_SET_OFF_REG_OFFSET 25050+5151+/* max steps for increase voltage of Buck1/2, equal 100mv*/5252+#define MAX_STEPS_ONE_TIME 85353+5454+struct rk808_regulator_data {5555+ struct gpio_desc *dvs_gpio[2];5656+};48574958static const int rk808_buck_config_regs[] = {5059 RK808_BUCK1_CONFIG_REG,···8669static const struct regulator_linear_range rk808_ldo6_voltage_ranges[] = {8770 REGULATOR_LINEAR_RANGE(800000, 0, 17, 100000),8871};7272+7373+static int rk808_buck1_2_get_voltage_sel_regmap(struct regulator_dev *rdev)7474+{7575+ struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev);7676+ int id = rdev->desc->id - RK808_ID_DCDC1;7777+ struct gpio_desc *gpio = pdata->dvs_gpio[id];7878+ unsigned int val;7979+ int ret;8080+8181+ if (!gpio || gpiod_get_value(gpio) == 0)8282+ return regulator_get_voltage_sel_regmap(rdev);8383+8484+ ret = regmap_read(rdev->regmap,8585+ rdev->desc->vsel_reg + RK808_DVS_REG_OFFSET,8686+ &val);8787+ if (ret != 0)8888+ return ret;8989+9090+ val &= rdev->desc->vsel_mask;9191+ val >>= ffs(rdev->desc->vsel_mask) - 1;9292+9393+ return val;9494+}9595+9696+static int rk808_buck1_2_i2c_set_voltage_sel(struct regulator_dev *rdev,9797+ unsigned sel)9898+{9999+ int ret, delta_sel;100100+ unsigned int old_sel, tmp, val, mask = rdev->desc->vsel_mask;101101+102102+ ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val);103103+ if (ret != 0)104104+ return ret;105105+106106+ tmp = val & ~mask;107107+ old_sel = val & mask;108108+ old_sel >>= ffs(mask) - 1;109109+ delta_sel = sel - old_sel;110110+111111+ /*112112+ * If directly modify the register to change the voltage, we will face113113+ * the risk of overshoot. Put it into a multi-step, can effectively114114+ * avoid this problem, a step is 100mv here.115115+ */116116+ while (delta_sel > MAX_STEPS_ONE_TIME) {117117+ old_sel += MAX_STEPS_ONE_TIME;118118+ val = old_sel << (ffs(mask) - 1);119119+ val |= tmp;120120+121121+ /*122122+ * i2c is 400kHz (2.5us per bit) and we must transmit _at least_123123+ * 3 bytes (24 bits) plus start and stop so 26 bits. So we've124124+ * got more than 65 us between each voltage change and thus125125+ * won't ramp faster than ~1500 uV / us.126126+ */127127+ ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val);128128+ delta_sel = sel - old_sel;129129+ }130130+131131+ sel <<= ffs(mask) - 1;132132+ val = tmp | sel;133133+ ret = regmap_write(rdev->regmap, rdev->desc->vsel_reg, val);134134+135135+ /*136136+ * When we change the voltage register directly, the ramp rate is about137137+ * 100000uv/us, wait 1us to make sure the target voltage to be stable,138138+ * so we needn't wait extra time after that.139139+ */140140+ udelay(1);141141+142142+ return ret;143143+}144144+145145+static int rk808_buck1_2_set_voltage_sel(struct regulator_dev *rdev,146146+ unsigned sel)147147+{148148+ struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev);149149+ int id = rdev->desc->id - RK808_ID_DCDC1;150150+ struct gpio_desc *gpio = pdata->dvs_gpio[id];151151+ unsigned int reg = rdev->desc->vsel_reg;152152+ unsigned old_sel;153153+ int ret, gpio_level;154154+155155+ if (!gpio)156156+ return rk808_buck1_2_i2c_set_voltage_sel(rdev, sel);157157+158158+ gpio_level = gpiod_get_value(gpio);159159+ if (gpio_level == 0) {160160+ reg += RK808_DVS_REG_OFFSET;161161+ ret = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &old_sel);162162+ } else {163163+ ret = regmap_read(rdev->regmap,164164+ reg + RK808_DVS_REG_OFFSET,165165+ &old_sel);166166+ }167167+168168+ if (ret != 0)169169+ return ret;170170+171171+ sel <<= ffs(rdev->desc->vsel_mask) - 1;172172+ sel |= old_sel & ~rdev->desc->vsel_mask;173173+174174+ ret = regmap_write(rdev->regmap, reg, sel);175175+ if (ret)176176+ return ret;177177+178178+ gpiod_set_value(gpio, !gpio_level);179179+180180+ return ret;181181+}182182+183183+static int rk808_buck1_2_set_voltage_time_sel(struct regulator_dev *rdev,184184+ unsigned int old_selector,185185+ unsigned int new_selector)186186+{187187+ struct rk808_regulator_data *pdata = rdev_get_drvdata(rdev);188188+ int id = rdev->desc->id - RK808_ID_DCDC1;189189+ struct gpio_desc *gpio = pdata->dvs_gpio[id];190190+191191+ /* if there is no dvs1/2 pin, we don't need wait extra time here. */192192+ if (!gpio)193193+ return 0;194194+195195+ return regulator_set_voltage_time_sel(rdev, old_selector, new_selector);196196+}8919790198static int rk808_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)91199{···279137static struct regulator_ops rk808_buck1_2_ops = {280138 .list_voltage = regulator_list_voltage_linear_range,281139 .map_voltage = regulator_map_voltage_linear_range,282282- .get_voltage_sel = regulator_get_voltage_sel_regmap,283283- .set_voltage_sel = regulator_set_voltage_sel_regmap,140140+ .get_voltage_sel = rk808_buck1_2_get_voltage_sel_regmap,141141+ .set_voltage_sel = rk808_buck1_2_set_voltage_sel,142142+ .set_voltage_time_sel = rk808_buck1_2_set_voltage_time_sel,284143 .enable = regulator_enable_regmap,285144 .disable = regulator_disable_regmap,286145 .is_enabled = regulator_is_enabled_regmap,···523380 [RK808_ID_SWITCH2] = { .name = "SWITCH_REG2" },524381};525382383383+static int rk808_regulator_dt_parse_pdata(struct device *dev,384384+ struct device *client_dev,385385+ struct regmap *map,386386+ struct rk808_regulator_data *pdata)387387+{388388+ struct device_node *np;389389+ int tmp, ret, i;390390+391391+ np = of_get_child_by_name(client_dev->of_node, "regulators");392392+ if (!np)393393+ return -ENXIO;394394+395395+ ret = of_regulator_match(dev, np, rk808_reg_matches,396396+ RK808_NUM_REGULATORS);397397+ if (ret < 0)398398+ goto dt_parse_end;399399+400400+ for (i = 0; i < ARRAY_SIZE(pdata->dvs_gpio); i++) {401401+ pdata->dvs_gpio[i] =402402+ devm_gpiod_get_index_optional(client_dev, "dvs", i,403403+ GPIOD_OUT_LOW);404404+ if (IS_ERR(pdata->dvs_gpio[i])) {405405+ ret = PTR_ERR(pdata->dvs_gpio[i]);406406+ dev_err(dev, "failed to get dvs%d gpio (%d)\n", i, ret);407407+ goto dt_parse_end;408408+ }409409+410410+ if (!pdata->dvs_gpio[i]) {411411+ dev_warn(dev, "there is no dvs%d gpio\n", i);412412+ continue;413413+ }414414+415415+ tmp = i ? RK808_DVS2_POL : RK808_DVS1_POL;416416+ ret = regmap_update_bits(map, RK808_IO_POL_REG, tmp,417417+ gpiod_is_active_low(pdata->dvs_gpio[i]) ?418418+ 0 : tmp);419419+ }420420+421421+dt_parse_end:422422+ of_node_put(np);423423+ return ret;424424+}425425+526426static int rk808_regulator_probe(struct platform_device *pdev)527427{528428 struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent);529429 struct i2c_client *client = rk808->i2c;530530- struct device_node *reg_np;531430 struct regulator_config config = {};532431 struct regulator_dev *rk808_rdev;432432+ struct rk808_regulator_data *pdata;533433 int ret, i;534434535535- reg_np = of_get_child_by_name(client->dev.of_node, "regulators");536536- if (!reg_np)537537- return -ENXIO;435435+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);436436+ if (!pdata)437437+ return -ENOMEM;538438539539- ret = of_regulator_match(&pdev->dev, reg_np, rk808_reg_matches,540540- RK808_NUM_REGULATORS);541541- of_node_put(reg_np);439439+ ret = rk808_regulator_dt_parse_pdata(&pdev->dev, &client->dev,440440+ rk808->regmap, pdata);542441 if (ret < 0)543442 return ret;443443+444444+ platform_set_drvdata(pdev, pdata);544445545446 /* Instantiate the regulators */546447 for (i = 0; i < RK808_NUM_REGULATORS; i++) {···593406 continue;594407595408 config.dev = &client->dev;596596- config.driver_data = rk808;409409+ config.driver_data = pdata;597410 config.regmap = rk808->regmap;598411 config.of_node = rk808_reg_matches[i].of_node;599412 config.init_data = rk808_reg_matches[i].init_data;···614427 .probe = rk808_regulator_probe,615428 .driver = {616429 .name = "rk808-regulator",430430+ .owner = THIS_MODULE,617431 },618432};619433
+16
include/linux/regulator/consumer.h
···550550{551551 return 0;552552}553553+554554+static inline int regulator_list_voltage(struct regulator *regulator, unsigned selector)555555+{556556+ return -EINVAL;557557+}558558+553559#endif560560+561561+static inline int regulator_set_voltage_triplet(struct regulator *regulator,562562+ int min_uV, int target_uV,563563+ int max_uV)564564+{565565+ if (regulator_set_voltage(regulator, target_uV, max_uV) == 0)566566+ return 0;567567+568568+ return regulator_set_voltage(regulator, min_uV, max_uV);569569+}554570555571static inline int regulator_set_voltage_tol(struct regulator *regulator,556572 int new_uV, int tol_uV)