[PATCH] ia64/sn __iomem annotations · tjh.dev/kernel@a9f627c

tjh.dev / kernel

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Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

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[PATCH] ia64/sn __iomem annotations

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

authored by

Al Viro and committed by

Linus Torvalds 19 years ago a9f627c9 cfa7fd72

+26 -26

5 changed files

expand all

arch

ia64

pci

pcibr

pcibr_ate.c

tioce_provider.c

include

asm-ia64

pcibr_provider.h

tioca_provider.h

tioce_provider.h

+1 -1

arch/ia64/sn/pci/pcibr/pcibr_ate.c

··· 126 126 * Setup an Address Translation Entry as specified. Use either the Bridge 127 127 * internal maps or the external map RAM, as appropriate. 128 128 */ 129 - static inline u64 *pcibr_ate_addr(struct pcibus_info *pcibus_info, 129 + static inline u64 __iomem *pcibr_ate_addr(struct pcibus_info *pcibus_info, 130 130 int ate_index) 131 131 { 132 132 if (ate_index < pcibus_info->pbi_int_ate_size) {

+21 -21

arch/ia64/sn/pci/tioce_provider.c

··· 53 53 */ 54 54 55 55 static void inline 56 - tioce_mmr_war_pre(struct tioce_kernel *kern, void *mmr_addr) 56 + tioce_mmr_war_pre(struct tioce_kernel *kern, void __iomem *mmr_addr) 57 57 { 58 58 u64 mmr_base; 59 59 u64 mmr_offset; ··· 62 62 return; 63 63 64 64 mmr_base = kern->ce_common->ce_pcibus.bs_base; 65 - mmr_offset = (u64)mmr_addr - mmr_base; 65 + mmr_offset = (unsigned long)mmr_addr - mmr_base; 66 66 67 67 if (mmr_offset < 0x45000) { 68 68 u64 mmr_war_offset; ··· 79 79 } 80 80 81 81 static void inline 82 - tioce_mmr_war_post(struct tioce_kernel *kern, void *mmr_addr) 82 + tioce_mmr_war_post(struct tioce_kernel *kern, void __iomem *mmr_addr) 83 83 { 84 84 u64 mmr_base; 85 85 u64 mmr_offset; ··· 88 88 return; 89 89 90 90 mmr_base = kern->ce_common->ce_pcibus.bs_base; 91 - mmr_offset = (u64)mmr_addr - mmr_base; 91 + mmr_offset = (unsigned long)mmr_addr - mmr_base; 92 92 93 93 if (mmr_offset < 0x45000) { 94 94 if (mmr_offset == 0x100) ··· 223 223 * @pci_dev. 224 224 */ 225 225 static inline void 226 - pcidev_to_tioce(struct pci_dev *pdev, struct tioce **base, 226 + pcidev_to_tioce(struct pci_dev *pdev, struct tioce __iomem **base, 227 227 struct tioce_kernel **kernel, int *port) 228 228 { 229 229 struct pcidev_info *pcidev_info; ··· 235 235 ce_kernel = (struct tioce_kernel *)ce_common->ce_kernel_private; 236 236 237 237 if (base) 238 - *base = (struct tioce *)ce_common->ce_pcibus.bs_base; 238 + *base = (struct tioce __iomem *)ce_common->ce_pcibus.bs_base; 239 239 if (kernel) 240 240 *kernel = ce_kernel; 241 241 ··· 275 275 u64 pagesize; 276 276 int msi_capable, msi_wanted; 277 277 u64 *ate_shadow; 278 - u64 *ate_reg; 278 + u64 __iomem *ate_reg; 279 279 u64 addr; 280 - struct tioce *ce_mmr; 280 + struct tioce __iomem *ce_mmr; 281 281 u64 bus_base; 282 282 struct tioce_dmamap *map; 283 283 284 - ce_mmr = (struct tioce *)ce_kern->ce_common->ce_pcibus.bs_base; 284 + ce_mmr = (struct tioce __iomem *)ce_kern->ce_common->ce_pcibus.bs_base; 285 285 286 286 switch (type) { 287 287 case TIOCE_ATE_M32: ··· 386 386 { 387 387 int dma_ok; 388 388 int port; 389 - struct tioce *ce_mmr; 389 + struct tioce __iomem *ce_mmr; 390 390 struct tioce_kernel *ce_kern; 391 391 u64 ct_upper; 392 392 u64 ct_lower; ··· 461 461 int i; 462 462 int port; 463 463 struct tioce_kernel *ce_kern; 464 - struct tioce *ce_mmr; 464 + struct tioce __iomem *ce_mmr; 465 465 unsigned long flags; 466 466 467 467 bus_addr = tioce_dma_barrier(bus_addr, 0); ··· 700 700 tioce_reserve_m32(struct tioce_kernel *ce_kern, u64 base, u64 limit) 701 701 { 702 702 int ate_index, last_ate, ps; 703 - struct tioce *ce_mmr; 703 + struct tioce __iomem *ce_mmr; 704 704 705 - ce_mmr = (struct tioce *)ce_kern->ce_common->ce_pcibus.bs_base; 705 + ce_mmr = (struct tioce __iomem *)ce_kern->ce_common->ce_pcibus.bs_base; 706 706 ps = ce_kern->ce_ate3240_pagesize; 707 707 ate_index = ATE_PAGE(base, ps); 708 708 last_ate = ate_index + ATE_NPAGES(base, limit-base+1, ps) - 1; ··· 736 736 int dev; 737 737 u32 tmp; 738 738 unsigned int seg, bus; 739 - struct tioce *tioce_mmr; 739 + struct tioce __iomem *tioce_mmr; 740 740 struct tioce_kernel *tioce_kern; 741 741 742 742 tioce_kern = kzalloc(sizeof(struct tioce_kernel), GFP_KERNEL); ··· 767 767 * the ate's. 768 768 */ 769 769 770 - tioce_mmr = (struct tioce *)tioce_common->ce_pcibus.bs_base; 770 + tioce_mmr = (struct tioce __iomem *)tioce_common->ce_pcibus.bs_base; 771 771 tioce_mmr_clri(tioce_kern, &tioce_mmr->ce_ure_page_map, 772 772 CE_URE_PAGESIZE_MASK); 773 773 tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_ure_page_map, ··· 858 858 struct pcidev_info *pcidev_info; 859 859 struct tioce_common *ce_common; 860 860 struct tioce_kernel *ce_kern; 861 - struct tioce *ce_mmr; 861 + struct tioce __iomem *ce_mmr; 862 862 u64 force_int_val; 863 863 864 864 if (!sn_irq_info->irq_bridge) ··· 872 872 return; 873 873 874 874 ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info; 875 - ce_mmr = (struct tioce *)ce_common->ce_pcibus.bs_base; 875 + ce_mmr = (struct tioce __iomem *)ce_common->ce_pcibus.bs_base; 876 876 ce_kern = (struct tioce_kernel *)ce_common->ce_kernel_private; 877 877 878 878 /* ··· 953 953 struct pcidev_info *pcidev_info; 954 954 struct tioce_common *ce_common; 955 955 struct tioce_kernel *ce_kern; 956 - struct tioce *ce_mmr; 956 + struct tioce __iomem *ce_mmr; 957 957 int bit; 958 958 u64 vector; 959 959 ··· 962 962 return; 963 963 964 964 ce_common = (struct tioce_common *)pcidev_info->pdi_pcibus_info; 965 - ce_mmr = (struct tioce *)ce_common->ce_pcibus.bs_base; 965 + ce_mmr = (struct tioce __iomem *)ce_common->ce_pcibus.bs_base; 966 966 ce_kern = (struct tioce_kernel *)ce_common->ce_kernel_private; 967 967 968 968 bit = sn_irq_info->irq_int_bit; ··· 994 994 cnodeid_t my_cnode, mem_cnode; 995 995 struct tioce_common *tioce_common; 996 996 struct tioce_kernel *tioce_kern; 997 - struct tioce *tioce_mmr; 997 + struct tioce __iomem *tioce_mmr; 998 998 999 999 /* 1000 1000 * Allocate kernel bus soft and copy from prom. ··· 1018 1018 * interrupt handler. 1019 1019 */ 1020 1020 1021 - tioce_mmr = (struct tioce *)tioce_common->ce_pcibus.bs_base; 1021 + tioce_mmr = (struct tioce __iomem *)tioce_common->ce_pcibus.bs_base; 1022 1022 tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_adm_int_status_alias, ~0ULL); 1023 1023 tioce_mmr_seti(tioce_kern, &tioce_mmr->ce_adm_error_summary_alias, 1024 1024 ~0ULL);

+1 -1

include/asm-ia64/sn/pcibr_provider.h

··· 135 135 extern void pcireg_force_intr_set(struct pcibus_info *, int); 136 136 extern u64 pcireg_wrb_flush_get(struct pcibus_info *, int); 137 137 extern void pcireg_int_ate_set(struct pcibus_info *, int, u64); 138 - extern u64 * pcireg_int_ate_addr(struct pcibus_info *, int); 138 + extern u64 __iomem * pcireg_int_ate_addr(struct pcibus_info *, int); 139 139 extern void pcibr_force_interrupt(struct sn_irq_info *sn_irq_info); 140 140 extern void pcibr_change_devices_irq(struct sn_irq_info *sn_irq_info); 141 141 extern int pcibr_ate_alloc(struct pcibus_info *, int);

+2 -2

include/asm-ia64/sn/tioca_provider.h

··· 162 162 tioca_tlbflush(struct tioca_kernel *tioca_kernel) 163 163 { 164 164 volatile u64 tmp; 165 - volatile struct tioca *ca_base; 165 + volatile struct tioca __iomem *ca_base; 166 166 struct tioca_common *tioca_common; 167 167 168 168 tioca_common = tioca_kernel->ca_common; 169 - ca_base = (struct tioca *)tioca_common->ca_common.bs_base; 169 + ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base; 170 170 171 171 /* 172 172 * Explicit flushes not needed if GART is in cached mode

+1 -1

include/asm-ia64/sn/tioce_provider.h

··· 53 53 u64 ct_start; /* coretalk start address */ 54 54 u64 pci_start; /* bus start address */ 55 55 56 - u64 *ate_hw; /* hw ptr of first ate in map */ 56 + u64 __iomem *ate_hw;/* hw ptr of first ate in map */ 57 57 u64 *ate_shadow; /* shadow ptr of firat ate */ 58 58 u16 ate_count; /* # ate's in the map */ 59 59 };