Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

spi: pxa2xx: Get rid of unused ->cs_control()

Since the last user of the custom ->cs_control() gone, we may get rid of
this legacy API completely.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20211123192723.44537-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Andy Shevchenko and committed by
Mark Brown
a9c8f68c 342e3ce0

+4 -52
+3 -26
Documentation/spi/pxa2xx.rst
··· 102 102 u8 dma_burst_size; 103 103 u32 timeout; 104 104 u8 enable_loopback; 105 - void (*cs_control)(u32 command); 105 + int gpio_cs; 106 106 }; 107 107 108 108 The "pxa2xx_spi_chip.tx_threshold" and "pxa2xx_spi_chip.rx_threshold" fields are ··· 133 133 connects the SSPTX pin to the SSPRX pin. This is useful for initial setup 134 134 testing. 135 135 136 - The "pxa2xx_spi_chip.cs_control" field is used to point to a board specific 137 - function for asserting/deasserting a slave device chip select. If the field is 138 - NULL, the pxa2xx_spi master controller driver assumes that the SSP port is 139 - configured to use GPIO or SSPFRM instead. 140 - 141 136 NOTE: the SPI driver cannot control the chip select if SSPFRM is used, so the 142 137 chipselect is dropped after each spi_transfer. Most devices need chip select 143 138 asserted around the complete message. Use SSPFRM as a GPIO (through a descriptor) ··· 147 152 148 153 :: 149 154 150 - /* Chip Select control for the CS8415A SPI slave device */ 151 - static void cs8415a_cs_control(u32 command) 152 - { 153 - if (command & PXA2XX_CS_ASSERT) 154 - GPCR(2) = GPIO_bit(2); 155 - else 156 - GPSR(2) = GPIO_bit(2); 157 - } 158 - 159 - /* Chip Select control for the CS8405A SPI slave device */ 160 - static void cs8405a_cs_control(u32 command) 161 - { 162 - if (command & PXA2XX_CS_ASSERT) 163 - GPCR(3) = GPIO_bit(3); 164 - else 165 - GPSR(3) = GPIO_bit(3); 166 - } 167 - 168 155 static struct pxa2xx_spi_chip cs8415a_chip_info = { 169 156 .tx_threshold = 8, /* SSP hardward FIFO threshold */ 170 157 .rx_threshold = 8, /* SSP hardward FIFO threshold */ 171 158 .dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */ 172 159 .timeout = 235, /* See Intel documentation */ 173 - .cs_control = cs8415a_cs_control, /* Use external chip select */ 160 + .gpio_cs = 2, /* Use external chip select */ 174 161 }; 175 162 176 163 static struct pxa2xx_spi_chip cs8405a_chip_info = { ··· 160 183 .rx_threshold = 8, /* SSP hardward FIFO threshold */ 161 184 .dma_burst_size = 8, /* Byte wide transfers used so 8 byte bursts */ 162 185 .timeout = 235, /* See Intel documentation */ 163 - .cs_control = cs8405a_cs_control, /* Use external chip select */ 186 + .gpio_cs = 3, /* Use external chip select */ 164 187 }; 165 188 166 189 static struct spi_board_info streetracer_spi_board_info[] __initdata = {
+1 -1
arch/arm/mach-pxa/stargate2.c
··· 347 347 }; 348 348 349 349 /* An upcoming kernel change will scrap SFRM usage so these 350 - * drivers have been moved to use gpio's via cs_control */ 350 + * drivers have been moved to use GPIOs */ 351 351 static struct pxa2xx_spi_chip staccel_chip_info = { 352 352 .tx_threshold = 8, 353 353 .rx_threshold = 8,
-18
drivers/spi/spi-pxa2xx.c
··· 427 427 428 428 static void cs_assert(struct spi_device *spi) 429 429 { 430 - struct chip_data *chip = spi_get_ctldata(spi); 431 430 struct driver_data *drv_data = 432 431 spi_controller_get_devdata(spi->controller); 433 432 434 433 if (drv_data->ssp_type == CE4100_SSP) { 435 434 pxa2xx_spi_write(drv_data, SSSR, spi->chip_select); 436 - return; 437 - } 438 - 439 - if (chip->cs_control) { 440 - chip->cs_control(PXA2XX_CS_ASSERT); 441 435 return; 442 436 } 443 437 ··· 441 447 442 448 static void cs_deassert(struct spi_device *spi) 443 449 { 444 - struct chip_data *chip = spi_get_ctldata(spi); 445 450 struct driver_data *drv_data = 446 451 spi_controller_get_devdata(spi->controller); 447 452 unsigned long timeout; ··· 453 460 while (pxa2xx_spi_read(drv_data, SSSR) & SSSR_BSY && 454 461 !time_after(jiffies, timeout)) 455 462 cpu_relax(); 456 - 457 - if (chip->cs_control) { 458 - chip->cs_control(PXA2XX_CS_DEASSERT); 459 - return; 460 - } 461 463 462 464 if (is_lpss_ssp(drv_data)) 463 465 lpss_ssp_cs_control(spi, false); ··· 1191 1203 * different chip_info, release previously requested GPIO. 1192 1204 */ 1193 1205 cleanup_cs(spi); 1194 - 1195 - /* If ->cs_control() is provided, ignore GPIO chip select */ 1196 - if (chip_info->cs_control) { 1197 - chip->cs_control = chip_info->cs_control; 1198 - return 0; 1199 - } 1200 1206 1201 1207 if (gpio_is_valid(chip_info->gpio_cs)) { 1202 1208 int gpio = chip_info->gpio_cs;
-3
drivers/spi/spi-pxa2xx.h
··· 49 49 int (*write)(struct driver_data *drv_data); 50 50 int (*read)(struct driver_data *drv_data); 51 51 irqreturn_t (*transfer_handler)(struct driver_data *drv_data); 52 - void (*cs_control)(u32 command); 53 52 54 53 void __iomem *lpss_base; 55 54 ··· 66 67 u32 threshold; 67 68 u16 lpss_rx_threshold; 68 69 u16 lpss_tx_threshold; 69 - 70 - void (*cs_control)(u32 command); 71 70 }; 72 71 73 72 static inline u32 pxa2xx_spi_read(const struct driver_data *drv_data, u32 reg)
-4
include/linux/spi/pxa2xx_spi.h
··· 9 9 10 10 #include <linux/pxa2xx_ssp.h> 11 11 12 - #define PXA2XX_CS_ASSERT (0x01) 13 - #define PXA2XX_CS_DEASSERT (0x02) 14 - 15 12 struct dma_chan; 16 13 17 14 /* ··· 44 47 u32 timeout; 45 48 u8 enable_loopback; 46 49 int gpio_cs; 47 - void (*cs_control)(u32 command); 48 50 }; 49 51 50 52 #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)