Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'devicetree-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

Pull devicetree updates from Rob Herring:

- Sync dtc to upstream version v1.6.0-51-g183df9e9c2b9 and build host
fdtoverlay

- Add kbuild support to build DT overlays (%.dtbo)

- Drop NULLifying match table in of_match_device().

In preparation for this, there are several driver cleanups to use
(of_)?device_get_match_data().

- Drop pointless wrappers from DT struct device API

- Convert USB binding schemas to use graph schema and remove old plain
text graph binding doc

- Convert spi-nor and v3d GPU bindings to DT schema

- Tree wide schema fixes for if/then schemas, array size constraints,
and undocumented compatible strings in examples

- Handle 'no-map' correctly for already reserved memblock regions

* tag 'devicetree-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (35 commits)
driver core: platform: Drop of_device_node_put() wrapper
of: Remove of_dev_{get,put}()
dt-bindings: usb: Change descibe to describe in usbmisc-imx.txt
dt-bindings: can: rcar_canfd: Group tuples in pin control properties
dt-bindings: power: renesas,apmu: Group tuples in cpus properties
dt-bindings: mtd: spi-nor: Convert to DT schema format
dt-bindings: Use portable sort for version cmp
dt-bindings: ethernet-controller: fix fixed-link specification
dt-bindings: irqchip: Add node name to PRUSS INTC
dt-bindings: interconnect: Fix the expected number of cells
dt-bindings: Fix errors in 'if' schemas
dt-bindings: iommu: renesas,ipmmu-vmsa: Make 'power-domains' conditionally required
dt-bindings: Fix undocumented compatible strings in examples
kbuild: Add support to build overlays (%.dtbo)
scripts: dtc: Remove the unused fdtdump.c file
scripts: dtc: Build fdtoverlay tool
scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9
scripts: dtc: Fetch fdtoverlay.c from external DTC project
dt-bindings: thermal: sun8i: Fix misplaced schema keyword in compatible strings
dt-bindings: iio: dac: Fix AD5686 references
...

+824 -710
+1
.gitignore
··· 18 18 *.c.[012]*.* 19 19 *.dt.yaml 20 20 *.dtb 21 + *.dtbo 21 22 *.dtb.S 22 23 *.dwo 23 24 *.elf
+1 -1
Documentation/devicetree/bindings/Makefile
··· 10 10 PHONY += check_dtschema_version 11 11 check_dtschema_version: 12 12 @{ echo $(DT_SCHEMA_MIN_VERSION); \ 13 - $(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -VC || \ 13 + $(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -Vc >/dev/null || \ 14 14 { echo "ERROR: dtschema minimum version is v$(DT_SCHEMA_MIN_VERSION)" >&2; false; } 15 15 16 16 quiet_cmd_extract_ex = DTEX $@
+2 -2
Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml
··· 30 30 Interrupts can be used to notify the completion of cache operations. 31 31 The number of interrupts should match to the number of CPU cores. 32 32 The specified interrupts correspond to CPU0, CPU1, ... in this order. 33 - minItems: 1 34 - maxItems: 4 33 + minItems: 1 34 + maxItems: 4 35 35 36 36 cache-unified: true 37 37
+1
Documentation/devicetree/bindings/ata/sata_highbank.yaml
··· 61 61 maxItems: 8 62 62 63 63 calxeda,sgpio-gpio: 64 + maxItems: 3 64 65 description: | 65 66 phandle-gpio bank, bit offset, and default on or off, which indicates 66 67 that the driver supports SGPIO indicator lights using the indicated
+2 -2
Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clocks.yaml Documentation/devicetree/bindings/clock/allwinner,sun9i-a80-usb-clks.yaml
··· 1 1 # SPDX-License-Identifier: GPL-2.0+ 2 2 %YAML 1.2 3 3 --- 4 - $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clocks.yaml# 4 + $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clks.yaml# 5 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 7 title: Allwinner A80 USB Clock Controller Device Tree Bindings ··· 18 18 const: 1 19 19 20 20 compatible: 21 - const: allwinner,sun9i-a80-usb-clocks 21 + const: allwinner,sun9i-a80-usb-clks 22 22 23 23 reg: 24 24 maxItems: 1
+2 -2
Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml
··· 66 66 - arm,syscon-icst525-integratorcp-cm-mem 67 67 - arm,integrator-cm-auxosc 68 68 - arm,versatile-cm-auxosc 69 - - arm,impd-vco1 70 - - arm,impd-vco2 69 + - arm,impd1-vco1 70 + - arm,impd1-vco2 71 71 72 72 clocks: 73 73 description: Parent clock for the ICST VCO
+1
Documentation/devicetree/bindings/clock/canaan,k210-clk.yaml
··· 22 22 const: canaan,k210-clk 23 23 24 24 clocks: 25 + maxItems: 1 25 26 description: 26 27 Phandle of the SoC 26MHz fixed-rate oscillator clock. 27 28
+9 -8
Documentation/devicetree/bindings/connector/usb-connector.yaml
··· 155 155 power dual role. 156 156 157 157 ports: 158 - description: OF graph bindings (specified in bindings/graph.txt) that model 159 - any data bus to the connector unless the bus is between parent node and 160 - the connector. Since a single connector can have multiple data buses every 161 - bus has an assigned OF graph port number as described below. 162 - type: object 158 + $ref: /schemas/graph.yaml#/properties/ports 159 + description: OF graph bindings modeling any data bus to the connector 160 + unless the bus is between parent node and the connector. Since a single 161 + connector can have multiple data buses every bus has an assigned OF graph 162 + port number as described below. 163 + 163 164 properties: 164 165 port@0: 165 - type: object 166 + $ref: /schemas/graph.yaml#/properties/port 166 167 description: High Speed (HS), present in all connectors. 167 168 168 169 port@1: 169 - type: object 170 + $ref: /schemas/graph.yaml#/properties/port 170 171 description: Super Speed (SS), present in SS capable connectors. 171 172 172 173 port@2: 173 - type: object 174 + $ref: /schemas/graph.yaml#/properties/port 174 175 description: Sideband Use (SBU), present in USB-C. This describes the 175 176 alternate mode connection of which SBU is a part. 176 177
+1 -2
Documentation/devicetree/bindings/crypto/allwinner,sun8i-ce.yaml
··· 46 46 if: 47 47 properties: 48 48 compatible: 49 - items: 50 - const: allwinner,sun50i-h6-crypto 49 + const: allwinner,sun50i-h6-crypto 51 50 then: 52 51 properties: 53 52 clocks:
+1 -1
Documentation/devicetree/bindings/crypto/ti,sa2ul.yaml
··· 66 66 #include <dt-bindings/soc/ti,sci_pm_domain.h> 67 67 68 68 main_crypto: crypto@4e00000 { 69 - compatible = "ti,j721-sa2ul"; 69 + compatible = "ti,j721e-sa2ul"; 70 70 reg = <0x4e00000 0x1200>; 71 71 power-domains = <&k3_pds 264 TI_SCI_PD_EXCLUSIVE>; 72 72 dmas = <&main_udmap 0xc000>, <&main_udmap 0x4000>,
+1
Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml
··· 78 78 Phandle of the I2C controller used for DDC EDID probing 79 79 80 80 hpd-gpios: 81 + maxItems: 1 81 82 description: > 82 83 The GPIO pin for the HDMI hotplug detect (if it doesn't appear 83 84 as an interrupt/status bit in the HDMI controller itself)
+1
Documentation/devicetree/bindings/display/brcm,bcm2835-hdmi.yaml
··· 37 37 Phandle of the I2C controller used for DDC EDID probing 38 38 39 39 hpd-gpios: 40 + maxItems: 1 40 41 description: > 41 42 The GPIO pin for the HDMI hotplug detect (if it doesn't appear 42 43 as an interrupt/status bit in the HDMI controller itself)
+1 -1
Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml
··· 36 36 properties: 37 37 compatible: 38 38 contains: 39 - const: brcm,bcm2711-hvs" 39 + const: brcm,bcm2711-hvs 40 40 41 41 then: 42 42 required:
+1
Documentation/devicetree/bindings/display/panel/jdi,lt070me05000.yaml
··· 30 30 power supply for LCM (1.8V) 31 31 32 32 dcdc-en-gpios: 33 + maxItems: 1 33 34 description: | 34 35 phandle of the gpio for power ic line 35 36 Power IC supply enable, High active
+2 -1
Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml
··· 38 38 39 39 reset-gpios: true 40 40 41 - 'mantix,tp-rstn-gpios': 41 + mantix,tp-rstn-gpios: 42 + maxItems: 1 42 43 description: second reset line that triggers DSI config load 43 44 44 45 backlight: true
+1
Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml
··· 30 30 panel. The novatek,nt36672a compatible shall always be provided as a fallback. 31 31 32 32 reset-gpios: 33 + maxItems: 1 33 34 description: phandle of gpio for reset line - This should be 8mA, gpio 34 35 can be configured using mux, pinctrl, pinctrl-names (active high) 35 36
+1 -1
Documentation/devicetree/bindings/dsp/fsl,dsp.yaml
··· 21 21 - fsl,imx8mp-dsp 22 22 23 23 reg: 24 - description: Should contain register location and length 24 + maxItems: 1 25 25 26 26 clocks: 27 27 items:
+1 -2
Documentation/devicetree/bindings/eeprom/at25.yaml
··· 39 39 - const: atmel,at25 40 40 41 41 reg: 42 - description: 43 - Chip select number. 42 + maxItems: 1 44 43 45 44 spi-max-frequency: true 46 45
+2
Documentation/devicetree/bindings/extcon/extcon-ptn5150.yaml
··· 19 19 const: nxp,ptn5150 20 20 21 21 int-gpios: 22 + maxItems: 1 22 23 deprecated: true 23 24 description: 24 25 GPIO pin (input) connected to the PTN5150's INTB pin. ··· 32 31 maxItems: 1 33 32 34 33 vbus-gpios: 34 + maxItems: 1 35 35 description: 36 36 GPIO pin (output) used to control VBUS. If skipped, no such control 37 37 takes place.
+1
Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml
··· 82 82 const: 2 83 83 84 84 reset-gpios: 85 + maxItems: 1 85 86 description: 86 87 GPIO specification for the RESET input. This is an active low signal to 87 88 the PCA953x. Not valid for Maxim MAX732x devices.
+1 -1
Documentation/devicetree/bindings/gpio/mstar,msc313-gpio.yaml
··· 46 46 #include <dt-bindings/gpio/msc313-gpio.h> 47 47 48 48 gpio: gpio@207800 { 49 - compatible = "mstar,msc313e-gpio"; 49 + compatible = "mstar,msc313-gpio"; 50 50 #gpio-cells = <2>; 51 51 reg = <0x207800 0x200>; 52 52 gpio-controller;
-33
Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.txt
··· 1 - Broadcom V3D GPU 2 - 3 - Only the Broadcom V3D 3.x and newer GPUs are covered by this binding. 4 - For V3D 2.x, see brcm,bcm-vc4.txt. 5 - 6 - Required properties: 7 - - compatible: Should be "brcm,7268-v3d" or "brcm,7278-v3d" 8 - - reg: Physical base addresses and lengths of the register areas 9 - - reg-names: Names for the register areas. The "hub" and "core0" 10 - register areas are always required. The "gca" register area 11 - is required if the GCA cache controller is present. The 12 - "bridge" register area is required if an external reset 13 - controller is not present. 14 - - interrupts: The interrupt numbers. The first interrupt is for the hub, 15 - while the following interrupts are separate interrupt lines 16 - for the cores (if they don't share the hub's interrupt). 17 - See bindings/interrupt-controller/interrupts.txt 18 - 19 - Optional properties: 20 - - clocks: The core clock the unit runs on 21 - - resets: The reset line for v3d, if not using a mapping of the bridge 22 - See bindings/reset/reset.txt 23 - 24 - v3d { 25 - compatible = "brcm,7268-v3d"; 26 - reg = <0xf1204000 0x100>, 27 - <0xf1200000 0x4000>, 28 - <0xf1208000 0x4000>, 29 - <0xf1204100 0x100>; 30 - reg-names = "bridge", "hub", "core0", "gca"; 31 - interrupts = <0 78 4>, 32 - <0 77 4>; 33 - };
+75
Documentation/devicetree/bindings/gpu/brcm,bcm-v3d.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/gpu/brcm,bcm-v3d.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Broadcom V3D GPU Bindings 8 + 9 + maintainers: 10 + - Eric Anholt <eric@anholt.net> 11 + - Nicolas Saenz Julienne <nsaenzjulienne@suse.de> 12 + 13 + properties: 14 + $nodename: 15 + pattern: '^gpu@[a-f0-9]+$' 16 + 17 + compatible: 18 + enum: 19 + - brcm,7268-v3d 20 + - brcm,7278-v3d 21 + 22 + reg: 23 + items: 24 + - description: hub register (required) 25 + - description: core0 register (required) 26 + - description: GCA cache controller register (if GCA controller present) 27 + - description: bridge register (if no external reset controller) 28 + minItems: 2 29 + 30 + reg-names: 31 + items: 32 + - const: hub 33 + - const: core0 34 + - enum: [ bridge, gca ] 35 + - enum: [ bridge, gca ] 36 + minItems: 2 37 + maxItems: 4 38 + 39 + interrupts: 40 + items: 41 + - description: hub interrupt (required) 42 + - description: core interrupts (if it doesn't share the hub's interrupt) 43 + minItems: 1 44 + 45 + clocks: 46 + maxItems: 1 47 + 48 + resets: 49 + maxItems: 1 50 + 51 + power-domains: 52 + maxItems: 1 53 + 54 + required: 55 + - compatible 56 + - reg 57 + - reg-names 58 + - interrupts 59 + 60 + additionalProperties: false 61 + 62 + examples: 63 + - | 64 + gpu@f1200000 { 65 + compatible = "brcm,7268-v3d"; 66 + reg = <0xf1200000 0x4000>, 67 + <0xf1208000 0x4000>, 68 + <0xf1204000 0x100>, 69 + <0xf1204100 0x100>; 70 + reg-names = "hub", "core0", "bridge", "gca"; 71 + interrupts = <0 78 4>, 72 + <0 77 4>; 73 + }; 74 + 75 + ...
+1 -128
Documentation/devicetree/bindings/graph.txt
··· 1 - Common bindings for device graphs 2 - 3 - General concept 4 - --------------- 5 - 6 - The hierarchical organisation of the device tree is well suited to describe 7 - control flow to devices, but there can be more complex connections between 8 - devices that work together to form a logical compound device, following an 9 - arbitrarily complex graph. 10 - There already is a simple directed graph between devices tree nodes using 11 - phandle properties pointing to other nodes to describe connections that 12 - can not be inferred from device tree parent-child relationships. The device 13 - tree graph bindings described herein abstract more complex devices that can 14 - have multiple specifiable ports, each of which can be linked to one or more 15 - ports of other devices. 16 - 17 - These common bindings do not contain any information about the direction or 18 - type of the connections, they just map their existence. Specific properties 19 - may be described by specialized bindings depending on the type of connection. 20 - 21 - To see how this binding applies to video pipelines, for example, see 22 - Documentation/devicetree/bindings/media/video-interfaces.txt. 23 - Here the ports describe data interfaces, and the links between them are 24 - the connecting data buses. A single port with multiple connections can 25 - correspond to multiple devices being connected to the same physical bus. 26 - 27 - Organisation of ports and endpoints 28 - ----------------------------------- 29 - 30 - Ports are described by child 'port' nodes contained in the device node. 31 - Each port node contains an 'endpoint' subnode for each remote device port 32 - connected to this port. If a single port is connected to more than one 33 - remote device, an 'endpoint' child node must be provided for each link. 34 - If more than one port is present in a device node or there is more than one 35 - endpoint at a port, or a port node needs to be associated with a selected 36 - hardware interface, a common scheme using '#address-cells', '#size-cells' 37 - and 'reg' properties is used to number the nodes. 38 - 39 - device { 40 - ... 41 - #address-cells = <1>; 42 - #size-cells = <0>; 43 - 44 - port@0 { 45 - #address-cells = <1>; 46 - #size-cells = <0>; 47 - reg = <0>; 48 - 49 - endpoint@0 { 50 - reg = <0>; 51 - ... 52 - }; 53 - endpoint@1 { 54 - reg = <1>; 55 - ... 56 - }; 57 - }; 58 - 59 - port@1 { 60 - reg = <1>; 61 - 62 - endpoint { ... }; 63 - }; 64 - }; 65 - 66 - All 'port' nodes can be grouped under an optional 'ports' node, which 67 - allows to specify #address-cells, #size-cells properties for the 'port' 68 - nodes independently from any other child device nodes a device might 69 - have. 70 - 71 - device { 72 - ... 73 - ports { 74 - #address-cells = <1>; 75 - #size-cells = <0>; 76 - 77 - port@0 { 78 - ... 79 - endpoint@0 { ... }; 80 - endpoint@1 { ... }; 81 - }; 82 - 83 - port@1 { ... }; 84 - }; 85 - }; 86 - 87 - Links between endpoints 88 - ----------------------- 89 - 90 - Each endpoint should contain a 'remote-endpoint' phandle property that points 91 - to the corresponding endpoint in the port of the remote device. In turn, the 92 - remote endpoint should contain a 'remote-endpoint' property. If it has one, it 93 - must not point to anything other than the local endpoint. Two endpoints with 94 - their 'remote-endpoint' phandles pointing at each other form a link between the 95 - containing ports. 96 - 97 - device-1 { 98 - port { 99 - device_1_output: endpoint { 100 - remote-endpoint = <&device_2_input>; 101 - }; 102 - }; 103 - }; 104 - 105 - device-2 { 106 - port { 107 - device_2_input: endpoint { 108 - remote-endpoint = <&device_1_output>; 109 - }; 110 - }; 111 - }; 112 - 113 - Required properties 114 - ------------------- 115 - 116 - If there is more than one 'port' or more than one 'endpoint' node or 'reg' 117 - property present in the port and/or endpoint nodes then the following 118 - properties are required in a relevant parent node: 119 - 120 - - #address-cells : number of cells required to define port/endpoint 121 - identifier, should be 1. 122 - - #size-cells : should be zero. 123 - 124 - Optional endpoint properties 125 - ---------------------------- 126 - 127 - - remote-endpoint: phandle to an 'endpoint' subnode of a remote device node. 128 - 1 + This file has moved to graph.yaml in dt-schema repo
+1 -1
Documentation/devicetree/bindings/i2c/nuvoton,npcm7xx-i2c.yaml
··· 17 17 18 18 properties: 19 19 compatible: 20 - const: nuvoton,npcm7xx-i2c 20 + const: nuvoton,npcm750-i2c 21 21 22 22 reg: 23 23 maxItems: 1
+2
Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml
··· 40 40 ADC reference voltage supply 41 41 42 42 adi,sync-in-gpios: 43 + maxItems: 1 43 44 description: 44 45 Enables synchronization of multiple devices that require simultaneous 45 46 sampling. A pulse is always required if the configuration is changed ··· 77 76 78 77 properties: 79 78 reg: 79 + maxItems: 1 80 80 description: | 81 81 The channel number. 82 82
+1
Documentation/devicetree/bindings/iio/adc/aspeed,ast2400-adc.yaml
··· 23 23 maxItems: 1 24 24 25 25 clocks: 26 + maxItems: 1 26 27 description: 27 28 Input clock used to derive the sample clock. Expected to be the 28 29 SoC's APB clock.
+1 -1
Documentation/devicetree/bindings/iio/adc/lltc,ltc2496.yaml
··· 20 20 description: Power supply for the reference voltage 21 21 22 22 reg: 23 - description: spi chipselect number according to the usual spi bindings 23 + maxItems: 1 24 24 25 25 spi-max-frequency: 26 26 description: maximal spi bus frequency supported
+1
Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml
··· 68 68 69 69 properties: 70 70 reg: 71 + maxItems: 1 71 72 description: | 72 73 ADC channel number. 73 74 See include/dt-bindings/iio/qcom,spmi-vadc.h
+2
Documentation/devicetree/bindings/iio/adc/st,stm32-adc.yaml
··· 41 41 maxItems: 2 42 42 43 43 clocks: 44 + minItems: 1 45 + maxItems: 2 44 46 description: | 45 47 Core can use up to two clocks, depending on part used: 46 48 - "adc" clock: for the analog circuitry, common to all ADCs.
+5 -5
Documentation/devicetree/bindings/iio/dac/adi,ad5686.yaml Documentation/devicetree/bindings/iio/dac/adi,ad5696.yaml
··· 1 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 2 %YAML 1.2 3 3 --- 4 - $id: http://devicetree.org/schemas/iio/dac/adi,ad5686.yaml# 4 + $id: http://devicetree.org/schemas/iio/dac/adi,ad5696.yaml# 5 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 6 6 7 - title: Analog Devices AD5686 and similar multi-channel DACs 7 + title: Analog Devices AD5696 and similar multi-channel DACs 8 8 9 9 maintainers: 10 10 - Michael Auchter <michael.auchter@ni.com> 11 11 12 12 description: | 13 - Binding for Analog Devices AD5686 and similar multi-channel DACs 13 + Binding for Analog Devices AD5696 and similar multi-channel DACs 14 14 15 15 properties: 16 16 compatible: ··· 48 48 #address-cells = <1>; 49 49 #size-cells = <0>; 50 50 51 - ad5686: dac@0 { 52 - compatible = "adi,ad5686"; 51 + ad5696: dac@0 { 52 + compatible = "adi,ad5696"; 53 53 reg = <0>; 54 54 vcc-supply = <&dac_vref>; 55 55 };
+1 -1
Documentation/devicetree/bindings/iio/health/ti,afe4404.yaml
··· 11 11 12 12 properties: 13 13 compatible: 14 - const: ti,afe4403 14 + const: ti,afe4404 15 15 16 16 reg: 17 17 maxItems: 1
+1
Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml
··· 47 47 description: an optional 3x3 mounting rotation matrix. 48 48 49 49 reset-gpios: 50 + maxItems: 1 50 51 description: | 51 52 an optional pin needed for AK09911 to set the reset state. This should 52 53 be usually active low
+1
Documentation/devicetree/bindings/iio/potentiometer/adi,ad5272.yaml
··· 25 25 maxItems: 1 26 26 27 27 reset-gpios: 28 + maxItems: 1 28 29 description: 29 30 Active low signal to the AD5272 RESET input. 30 31
+1
Documentation/devicetree/bindings/input/touchscreen/elan,elants_i2c.yaml
··· 29 29 description: touchscreen can be used as a wakeup source. 30 30 31 31 reset-gpios: 32 + maxItems: 1 32 33 description: reset gpio the chip is connected to. 33 34 34 35 vcc33-supply:
+1 -1
Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
··· 69 69 - qcom,sm8250-system-noc 70 70 71 71 '#interconnect-cells': 72 - const: 1 72 + enum: [ 1, 2 ] 73 73 74 74 qcom,bcm-voters: 75 75 $ref: /schemas/types.yaml#/definitions/phandle-array
+1 -1
Documentation/devicetree/bindings/interrupt-controller/fsl,intmux.yaml
··· 31 31 The 1st cell is hw interrupt number, the 2nd cell is channel index. 32 32 33 33 clocks: 34 - description: ipg clock. 34 + maxItems: 1 35 35 36 36 clock-names: 37 37 const: ipg
+2
Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.yaml
··· 36 36 Reference to a phandle of a hardware spinlock provider node. 37 37 38 38 interrupts: 39 + minItems: 1 40 + maxItems: 96 39 41 description: 40 42 Interrupts references to primary interrupt controller 41 43
+3
Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml
··· 33 33 corresponding PRUSS node. The node should be named "interrupt-controller". 34 34 35 35 properties: 36 + $nodename: 37 + pattern: "^interrupt-controller@[0-9a-f]+$" 38 + 36 39 compatible: 37 40 enum: 38 41 - ti,pruss-intc
+12 -2
Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml
··· 76 76 - compatible 77 77 - reg 78 78 - '#iommu-cells' 79 - - power-domains 80 79 81 80 oneOf: 82 81 - required: ··· 85 86 86 87 additionalProperties: false 87 88 89 + allOf: 90 + - if: 91 + properties: 92 + compatible: 93 + not: 94 + contains: 95 + const: renesas,ipmmu-vmsa 96 + then: 97 + required: 98 + - power-domains 99 + 88 100 examples: 89 101 - | 90 102 #include <dt-bindings/clock/r8a7791-cpg-mssr.h> ··· 103 93 #include <dt-bindings/power/r8a7791-sysc.h> 104 94 105 95 ipmmu_mx: iommu@fe951000 { 106 - compatible = "renasas,ipmmu-r8a7791", "renasas,ipmmu-vmsa"; 96 + compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; 107 97 reg = <0xfe951000 0x1000>; 108 98 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, 109 99 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
+1
Documentation/devicetree/bindings/leds/ti,tca6507.yaml
··· 69 69 if: 70 70 patternProperties: 71 71 "^gpio@[0-6]$": 72 + type: object 72 73 properties: 73 74 compatible: 74 75 contains:
+1
Documentation/devicetree/bindings/media/allwinner,sun4i-a10-video-engine.yaml
··· 53 53 maxItems: 1 54 54 55 55 memory-region: 56 + maxItems: 1 56 57 description: 57 58 CMA pool to use for buffers allocation instead of the default 58 59 CMA pool.
+1
Documentation/devicetree/bindings/media/i2c/imx219.yaml
··· 40 40 Digital core voltage supply, 1.2 volts 41 41 42 42 reset-gpios: 43 + maxItems: 1 43 44 description: |- 44 45 Reference to the GPIO connected to the xclr pin, if any. 45 46 Must be released (set high) after all supplies are applied.
+2
Documentation/devicetree/bindings/memory-controllers/exynos-srom.yaml
··· 28 28 const: 1 29 29 30 30 ranges: 31 + minItems: 1 32 + maxItems: 4 31 33 description: | 32 34 Reflects the memory layout with four integer values per bank. Format: 33 35 <bank-number> 0 <parent address of bank> <size>
+1
Documentation/devicetree/bindings/misc/fsl,dpaa2-console.yaml
··· 15 15 const: "fsl,dpaa2-console" 16 16 17 17 reg: 18 + maxItems: 1 18 19 description: A standard property. Specifies the region where the MCFBA 19 20 (MC firmware base address) register can be found. 20 21
+2
Documentation/devicetree/bindings/mmc/mmc-controller.yaml
··· 40 40 There is no card detection available; polling must be used. 41 41 42 42 cd-gpios: 43 + maxItems: 1 43 44 description: 44 45 The card detection will be done using the GPIO provided. 45 46 ··· 105 104 line. Not used in combination with eMMC or SDIO. 106 105 107 106 wp-gpios: 107 + maxItems: 1 108 108 description: 109 109 GPIO to use for the write-protect detection. 110 110
+1 -1
Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml
··· 124 124 if: 125 125 properties: 126 126 compatible: 127 - items: 127 + contains: 128 128 enum: 129 129 - renesas,sdhi-r7s72100 130 130 - renesas,sdhi-r7s9210
-91
Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
··· 1 - * SPI NOR flash: ST M25Pxx (and similar) serial flash chips 2 - 3 - Required properties: 4 - - #address-cells, #size-cells : Must be present if the device has sub-nodes 5 - representing partitions. 6 - - compatible : May include a device-specific string consisting of the 7 - manufacturer and name of the chip. A list of supported chip 8 - names follows. 9 - Must also include "jedec,spi-nor" for any SPI NOR flash that can 10 - be identified by the JEDEC READ ID opcode (0x9F). 11 - 12 - Supported chip names: 13 - at25df321a 14 - at25df641 15 - at26df081a 16 - mr25h128 17 - mr25h256 18 - mr25h10 19 - mr25h40 20 - mx25l4005a 21 - mx25l1606e 22 - mx25l6405d 23 - mx25l12805d 24 - mx25l25635e 25 - n25q064 26 - n25q128a11 27 - n25q128a13 28 - n25q512a 29 - s25fl256s1 30 - s25fl512s 31 - s25sl12801 32 - s25fl008k 33 - s25fl064k 34 - sst25vf040b 35 - m25p40 36 - m25p80 37 - m25p16 38 - m25p32 39 - m25p64 40 - m25p128 41 - w25x80 42 - w25x32 43 - w25q32 44 - w25q64 45 - w25q32dw 46 - w25q80bl 47 - w25q128 48 - w25q256 49 - 50 - The following chip names have been used historically to 51 - designate quirky versions of flash chips that do not support the 52 - JEDEC READ ID opcode (0x9F): 53 - m25p05-nonjedec 54 - m25p10-nonjedec 55 - m25p20-nonjedec 56 - m25p40-nonjedec 57 - m25p80-nonjedec 58 - m25p16-nonjedec 59 - m25p32-nonjedec 60 - m25p64-nonjedec 61 - m25p128-nonjedec 62 - 63 - - reg : Chip-Select number 64 - - spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at 65 - 66 - Optional properties: 67 - - m25p,fast-read : Use the "fast read" opcode to read data from the chip instead 68 - of the usual "read" opcode. This opcode is not supported by 69 - all chips and support for it can not be detected at runtime. 70 - Refer to your chips' datasheet to check if this is supported 71 - by your chip. 72 - - broken-flash-reset : Some flash devices utilize stateful addressing modes 73 - (e.g., for 32-bit addressing) which need to be managed 74 - carefully by a system. Because these sorts of flash don't 75 - have a standardized software reset command, and because some 76 - systems don't toggle the flash RESET# pin upon system reset 77 - (if the pin even exists at all), there are systems which 78 - cannot reboot properly if the flash is left in the "wrong" 79 - state. This boolean flag can be used on such systems, to 80 - denote the absence of a reliable reset mechanism. 81 - 82 - Example: 83 - 84 - flash: m25p80@0 { 85 - #address-cells = <1>; 86 - #size-cells = <1>; 87 - compatible = "spansion,m25p80", "jedec,spi-nor"; 88 - reg = <0>; 89 - spi-max-frequency = <40000000>; 90 - m25p,fast-read; 91 - };
+102
Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: SPI NOR flash ST M25Pxx (and similar) serial flash chips 8 + 9 + maintainers: 10 + - Rob Herring <robh@kernel.org> 11 + 12 + properties: 13 + compatible: 14 + oneOf: 15 + - items: 16 + - pattern: "^((((micron|spansion|st),)?\ 17 + (m25p(40|80|16|32|64|128)|\ 18 + n25q(32b|064|128a11|128a13|256a|512a|164k)))|\ 19 + atmel,at25df(321a|641|081a)|\ 20 + everspin,mr25h(10|40|128|256)|\ 21 + (mxicy|macronix),mx25l(4005a|1606e|6405d|8005|12805d|25635e)|\ 22 + (mxicy|macronix),mx25u(4033|4035)|\ 23 + (spansion,)?s25fl(128s|256s1|512s|008k|064k|164k)|\ 24 + (sst|microchip),sst25vf(016b|032b|040b)|\ 25 + (sst,)?sst26wf016b|\ 26 + (sst,)?sst25wf(040b|080)|\ 27 + winbond,w25x(80|32)|\ 28 + (winbond,)?w25q(16|32(w|dw)?|64(dw)?|80bl|128(fw)?|256))$" 29 + - const: jedec,spi-nor 30 + - items: 31 + - enum: 32 + - issi,is25lp016d 33 + - micron,mt25qu02g 34 + - mxicy,mx25r1635f 35 + - mxicy,mx25u6435f 36 + - mxicy,mx25v8035f 37 + - spansion,s25sl12801 38 + - spansion,s25fs512s 39 + - const: jedec,spi-nor 40 + - const: jedec,spi-nor 41 + description: 42 + Must also include "jedec,spi-nor" for any SPI NOR flash that can be 43 + identified by the JEDEC READ ID opcode (0x9F). 44 + 45 + reg: 46 + maxItems: 1 47 + 48 + spi-max-frequency: true 49 + spi-rx-bus-width: true 50 + spi-tx-bus-width: true 51 + 52 + m25p,fast-read: 53 + type: boolean 54 + description: 55 + Use the "fast read" opcode to read data from the chip instead of the usual 56 + "read" opcode. This opcode is not supported by all chips and support for 57 + it can not be detected at runtime. Refer to your chips' datasheet to check 58 + if this is supported by your chip. 59 + 60 + broken-flash-reset: 61 + type: boolean 62 + description: 63 + Some flash devices utilize stateful addressing modes (e.g., for 32-bit 64 + addressing) which need to be managed carefully by a system. Because these 65 + sorts of flash don't have a standardized software reset command, and 66 + because some systems don't toggle the flash RESET# pin upon system reset 67 + (if the pin even exists at all), there are systems which cannot reboot 68 + properly if the flash is left in the "wrong" state. This boolean flag can 69 + be used on such systems, to denote the absence of a reliable reset 70 + mechanism. 71 + 72 + label: true 73 + 74 + partitions: 75 + type: object 76 + 77 + '#address-cells': true 78 + '#size-cells': true 79 + 80 + patternProperties: 81 + # Note: use 'partitions' node for new users 82 + '^partition@': 83 + type: object 84 + 85 + additionalProperties: false 86 + 87 + examples: 88 + - | 89 + spi { 90 + #address-cells = <1>; 91 + #size-cells = <0>; 92 + 93 + flash@0 { 94 + #address-cells = <1>; 95 + #size-cells = <1>; 96 + compatible = "spansion,m25p80", "jedec,spi-nor"; 97 + reg = <0>; 98 + spi-max-frequency = <40000000>; 99 + m25p,fast-read; 100 + }; 101 + }; 102 + ...
+1 -1
Documentation/devicetree/bindings/net/can/rcar_canfd.txt
··· 97 97 as fCAN clock. 98 98 99 99 &canfd { 100 - pinctrl-0 = <&canfd0_pins &can_clk_pins>; 100 + pinctrl-0 = <&canfd0_pins>, <&can_clk_pins>; 101 101 pinctrl-names = "default"; 102 102 status = "okay"; 103 103
+5
Documentation/devicetree/bindings/net/ethernet-controller.yaml
··· 206 206 Indicates that full-duplex is used. When absent, half 207 207 duplex is assumed. 208 208 209 + pause: 210 + $ref: /schemas/types.yaml#definitions/flag 211 + description: 212 + Indicates that pause should be enabled. 213 + 209 214 asym-pause: 210 215 $ref: /schemas/types.yaml#/definitions/flag 211 216 description:
+1
Documentation/devicetree/bindings/net/ti,k3-am654-cpsw-nuss.yaml
··· 72 72 dma-coherent: true 73 73 74 74 clocks: 75 + maxItems: 1 75 76 description: CPSWxG NUSS functional clock 76 77 77 78 clock-names:
+1
Documentation/devicetree/bindings/net/ti,k3-am654-cpts.yaml
··· 59 59 - const: cpts 60 60 61 61 clocks: 62 + maxItems: 1 62 63 description: CPTS reference clock 63 64 64 65 clock-names:
+2
Documentation/devicetree/bindings/phy/allwinner,sun4i-a10-usb-phy.yaml
··· 51 51 - const: usb2_reset 52 52 53 53 usb0_id_det-gpios: 54 + maxItems: 1 54 55 description: GPIO to the USB OTG ID pin 55 56 56 57 usb0_vbus_det-gpios: 58 + maxItems: 1 57 59 description: GPIO to the USB OTG VBUS detect pin 58 60 59 61 usb0_vbus_power-supply:
+2
Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml
··· 50 50 - const: usb1_reset 51 51 52 52 usb0_id_det-gpios: 53 + maxItems: 1 53 54 description: GPIO to the USB OTG ID pin 54 55 55 56 usb0_vbus_det-gpios: 57 + maxItems: 1 56 58 description: GPIO to the USB OTG VBUS detect pin 57 59 58 60 usb0_vbus_power-supply:
+2
Documentation/devicetree/bindings/phy/allwinner,sun50i-h6-usb-phy.yaml
··· 50 50 - const: usb3_reset 51 51 52 52 usb0_id_det-gpios: 53 + maxItems: 1 53 54 description: GPIO to the USB OTG ID pin 54 55 55 56 usb0_vbus_det-gpios: 57 + maxItems: 1 56 58 description: GPIO to the USB OTG VBUS detect pin 57 59 58 60 usb0_vbus_power-supply:
+2
Documentation/devicetree/bindings/phy/allwinner,sun5i-a13-usb-phy.yaml
··· 45 45 - const: usb1_reset 46 46 47 47 usb0_id_det-gpios: 48 + maxItems: 1 48 49 description: GPIO to the USB OTG ID pin 49 50 50 51 usb0_vbus_det-gpios: 52 + maxItems: 1 51 53 description: GPIO to the USB OTG VBUS detect pin 52 54 53 55 usb0_vbus_power-supply:
+2
Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-usb-phy.yaml
··· 54 54 - const: usb2_reset 55 55 56 56 usb0_id_det-gpios: 57 + maxItems: 1 57 58 description: GPIO to the USB OTG ID pin 58 59 59 60 usb0_vbus_det-gpios: 61 + maxItems: 1 60 62 description: GPIO to the USB OTG VBUS detect pin 61 63 62 64 usb0_vbus_power-supply:
+2
Documentation/devicetree/bindings/phy/allwinner,sun8i-a23-usb-phy.yaml
··· 50 50 - const: usb1_reset 51 51 52 52 usb0_id_det-gpios: 53 + maxItems: 1 53 54 description: GPIO to the USB OTG ID pin 54 55 55 56 usb0_vbus_det-gpios: 57 + maxItems: 1 56 58 description: GPIO to the USB OTG VBUS detect pin 57 59 58 60 usb0_vbus_power-supply:
+2
Documentation/devicetree/bindings/phy/allwinner,sun8i-a83t-usb-phy.yaml
··· 56 56 - const: usb2_reset 57 57 58 58 usb0_id_det-gpios: 59 + maxItems: 1 59 60 description: GPIO to the USB OTG ID pin 60 61 61 62 usb0_vbus_det-gpios: 63 + maxItems: 1 62 64 description: GPIO to the USB OTG VBUS detect pin 63 65 64 66 usb0_vbus_power-supply:
+2
Documentation/devicetree/bindings/phy/allwinner,sun8i-h3-usb-phy.yaml
··· 62 62 - const: usb3_reset 63 63 64 64 usb0_id_det-gpios: 65 + maxItems: 1 65 66 description: GPIO to the USB OTG ID pin 66 67 67 68 usb0_vbus_det-gpios: 69 + maxItems: 1 68 70 description: GPIO to the USB OTG VBUS detect pin 69 71 70 72 usb0_vbus_power-supply:
+2
Documentation/devicetree/bindings/phy/allwinner,sun8i-r40-usb-phy.yaml
··· 56 56 - const: usb2_reset 57 57 58 58 usb0_id_det-gpios: 59 + maxItems: 1 59 60 description: GPIO to the USB OTG ID pin 60 61 61 62 usb0_vbus_det-gpios: 63 + maxItems: 1 62 64 description: GPIO to the USB OTG VBUS detect pin 63 65 64 66 usb0_vbus_power-supply:
+2
Documentation/devicetree/bindings/phy/allwinner,sun8i-v3s-usb-phy.yaml
··· 42 42 const: usb0_reset 43 43 44 44 usb0_id_det-gpios: 45 + maxItems: 1 45 46 description: GPIO to the USB OTG ID pin 46 47 47 48 usb0_vbus_det-gpios: 49 + maxItems: 1 48 50 description: GPIO to the USB OTG VBUS detect pin 49 51 50 52 usb0_vbus_power-supply:
+8 -11
Documentation/devicetree/bindings/phy/allwinner,sun9i-a80-usb-phy.yaml
··· 22 22 23 23 clocks: 24 24 anyOf: 25 - - description: Main PHY Clock 25 + - maxItems: 1 26 + description: Main PHY Clock 26 27 27 28 - items: 28 29 - description: Main PHY clock ··· 40 39 - const: hsic_480M 41 40 42 41 resets: 43 - anyOf: 42 + minItems: 1 43 + items: 44 44 - description: Normal USB PHY reset 45 - 46 - - items: 47 - - description: Normal USB PHY reset 48 - - description: HSIC Reset 45 + - description: HSIC Reset 49 46 50 47 reset-names: 51 - oneOf: 48 + minItems: 1 49 + items: 52 50 - const: phy 53 - 54 - - items: 55 - - const: phy 56 - - const: hsic 51 + - const: hsic 57 52 58 53 phy_type: 59 54 const: hsic
+1 -2
Documentation/devicetree/bindings/phy/brcm,sata-phy.yaml
··· 99 99 if: 100 100 properties: 101 101 compatible: 102 - items: 103 - const: brcm,iproc-ns2-sata-phy 102 + const: brcm,iproc-ns2-sata-phy 104 103 then: 105 104 properties: 106 105 reg:
+2 -3
Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml
··· 81 81 if: 82 82 properties: 83 83 compatible: 84 - items: 85 - enum: 86 - - renesas,usb2-phy-r7s9210 84 + contains: 85 + const: renesas,usb2-phy-r7s9210 87 86 then: 88 87 required: 89 88 - clock-names
+1 -1
Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml
··· 20 20 - socionext,uniphier-pxs3-ahci-phy 21 21 22 22 reg: 23 - description: PHY register region (offset and length) 23 + maxItems: 1 24 24 25 25 "#phy-cells": 26 26 const: 0
+1 -1
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml
··· 21 21 - socionext,uniphier-pxs3-pcie-phy 22 22 23 23 reg: 24 - description: PHY register region (offset and length) 24 + maxItems: 1 25 25 26 26 "#phy-cells": 27 27 const: 0
+1 -1
Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
··· 24 24 - socionext,uniphier-pxs3-usb3-hsphy 25 25 26 26 reg: 27 - description: PHY register region (offset and length) 27 + maxItems: 1 28 28 29 29 "#phy-cells": 30 30 const: 0
+1 -1
Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
··· 25 25 - socionext,uniphier-pxs3-usb3-ssphy 26 26 27 27 reg: 28 - description: PHY register region (offset and length) 28 + maxItems: 1 29 29 30 30 "#phy-cells": 31 31 const: 0
+1 -1
Documentation/devicetree/bindings/phy/ti,phy-gmii-sel.yaml
··· 55 55 - ti,am654-phy-gmii-sel 56 56 57 57 reg: 58 - description: Address and length of the register set for the device 58 + maxItems: 1 59 59 60 60 '#phy-cells': true 61 61
+2 -3
Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
··· 23 23 compatible: 24 24 const: aspeed,ast2400-pinctrl 25 25 reg: 26 - description: | 27 - A hint for the memory regions associated with the pin-controller 26 + maxItems: 2 28 27 29 28 patternProperties: 30 29 '^.*$': ··· 62 63 reg = <0x1e6e2000 0x1a8>; 63 64 64 65 pinctrl: pinctrl { 65 - compatible = "aspeed,g4-pinctrl"; 66 + compatible = "aspeed,ast2400-pinctrl"; 66 67 67 68 pinctrl_i2c3_default: i2c3_default { 68 69 function = "I2C3";
+3 -3
Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
··· 24 24 compatible: 25 25 const: aspeed,ast2500-pinctrl 26 26 reg: 27 - description: | 28 - A hint for the memory regions associated with the pin-controller 27 + maxItems: 2 28 + 29 29 aspeed,external-nodes: 30 30 minItems: 2 31 31 maxItems: 2 ··· 81 81 reg = <0x1e6e2000 0x1a8>; 82 82 83 83 pinctrl: pinctrl { 84 - compatible = "aspeed,g5-pinctrl"; 84 + compatible = "aspeed,ast2500-pinctrl"; 85 85 aspeed,external-nodes = <&gfx>, <&lhc>; 86 86 87 87 pinctrl_i2c3_default: i2c3_default {
+1 -1
Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml
··· 95 95 reg = <0x1e6e2000 0xf6c>; 96 96 97 97 pinctrl: pinctrl { 98 - compatible = "aspeed,g6-pinctrl"; 98 + compatible = "aspeed,ast2600-pinctrl"; 99 99 100 100 pinctrl_pwm10g1_default: pwm10g1_default { 101 101 function = "PWM10";
+4 -5
Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml
··· 76 76 if: 77 77 properties: 78 78 compatible: 79 - items: 80 - enum: 81 - - renesas,pfc-r8a73a4 82 - - renesas,pfc-r8a7740 83 - - renesas,pfc-sh73a0 79 + enum: 80 + - renesas,pfc-r8a73a4 81 + - renesas,pfc-r8a7740 82 + - renesas,pfc-sh73a0 84 83 then: 85 84 required: 86 85 - interrupts-extended
+1 -1
Documentation/devicetree/bindings/power/renesas,apmu.yaml
··· 52 52 apmu@e6152000 { 53 53 compatible = "renesas,r8a7791-apmu", "renesas,apmu"; 54 54 reg = <0xe6152000 0x188>; 55 - cpus = <&cpu0 &cpu1>; 55 + cpus = <&cpu0>, <&cpu1>; 56 56 };
+1
Documentation/devicetree/bindings/power/supply/bq25980.yaml
··· 70 70 description: Enables bypass mode at boot time 71 71 72 72 interrupts: 73 + maxItems: 1 73 74 description: | 74 75 Indicates that the device state has changed. 75 76
+1 -3
Documentation/devicetree/bindings/ptp/ptp-idtcm.yaml
··· 59 59 60 60 examples: 61 61 - | 62 - i2c@1 { 63 - compatible = "abc,acme-1234"; 64 - reg = <0x01 0x400>; 62 + i2c { 65 63 #address-cells = <1>; 66 64 #size-cells = <0>; 67 65 phc@5b {
+1 -1
Documentation/devicetree/bindings/remoteproc/ingenic,vpu.yaml
··· 44 44 - const: vpu 45 45 46 46 interrupts: 47 - description: VPU hardware interrupt 47 + maxItems: 1 48 48 49 49 required: 50 50 - compatible
+3
Documentation/devicetree/bindings/remoteproc/ti,omap-remoteproc.yaml
··· 70 70 the firmware image. 71 71 72 72 clocks: 73 + maxItems: 1 73 74 description: | 74 75 Main functional clock for the remote processor 75 76 76 77 resets: 78 + minItems: 1 79 + maxItems: 2 77 80 description: | 78 81 Reset handles for the remote processor 79 82
+1
Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml
··· 63 63 next-level-cache: true 64 64 65 65 memory-region: 66 + maxItems: 1 66 67 description: | 67 68 The reference to the reserved-memory for the L2 Loosely Integrated Memory region. 68 69 The reserved memory node should be defined as per the bindings in reserved-memory.txt.
+2
Documentation/devicetree/bindings/serial/renesas,hscif.yaml
··· 82 82 maxItems: 1 83 83 84 84 dmas: 85 + minItems: 2 86 + maxItems: 4 85 87 description: 86 88 Must contain a list of pairs of references to DMA specifiers, one for 87 89 transmission, and one for reception.
+2
Documentation/devicetree/bindings/serial/renesas,scif.yaml
··· 120 120 maxItems: 1 121 121 122 122 dmas: 123 + minItems: 2 124 + maxItems: 4 123 125 description: 124 126 Must contain a list of pairs of references to DMA specifiers, one for 125 127 transmission, and one for reception.
+2
Documentation/devicetree/bindings/serial/renesas,scifa.yaml
··· 55 55 maxItems: 1 56 56 57 57 dmas: 58 + minItems: 2 59 + maxItems: 4 58 60 description: 59 61 Must contain a list of pairs of references to DMA specifiers, one for 60 62 transmission, and one for reception.
+2
Documentation/devicetree/bindings/serial/renesas,scifb.yaml
··· 55 55 maxItems: 1 56 56 57 57 dmas: 58 + minItems: 2 59 + maxItems: 4 58 60 description: 59 61 Must contain a list of pairs of references to DMA specifiers, one for 60 62 transmission, and one for reception.
+1
Documentation/devicetree/bindings/sound/allwinner,sun4i-a10-codec.yaml
··· 88 88 description: Phandle to the codec analog controls in the PRCM 89 89 90 90 allwinner,pa-gpios: 91 + maxItems: 1 91 92 description: GPIO to enable the external amplifier 92 93 93 94 required:
+1
Documentation/devicetree/bindings/sound/google,sc7180-trogdor.yaml
··· 55 55 maxItems: 1 56 56 57 57 reg: 58 + maxItems: 1 58 59 description: dai link address. 59 60 60 61 cpu:
+3
Documentation/devicetree/bindings/sound/samsung,aries-wm8994.yaml
··· 62 62 description: Supply for the micbias on the headset mic 63 63 64 64 earpath-sel-gpios: 65 + maxItems: 1 65 66 description: GPIO for switching between tv-out and mic paths 66 67 67 68 headset-detect-gpios: 69 + maxItems: 1 68 70 description: GPIO for detection of headset insertion 69 71 70 72 headset-key-gpios: 73 + maxItems: 1 71 74 description: GPIO for detection of headset key press 72 75 73 76 io-channels:
+2
Documentation/devicetree/bindings/sound/samsung,midas-audio.yaml
··· 53 53 description: Supply for the micbias on the Sub microphone 54 54 55 55 fm-sel-gpios: 56 + maxItems: 1 56 57 description: GPIO pin for FM selection 57 58 58 59 lineout-sel-gpios: 60 + maxItems: 1 59 61 description: GPIO pin for line out selection 60 62 61 63 required:
+2
Documentation/devicetree/bindings/sound/tas2562.yaml
··· 36 36 I2C address of the device can be one of these 0x4c, 0x4d, 0x4e or 0x4f 37 37 38 38 shut-down-gpios: 39 + maxItems: 1 39 40 description: GPIO used to control the state of the device. 40 41 deprecated: true 41 42 42 43 shutdown-gpios: 44 + maxItems: 1 43 45 description: GPIO used to control the state of the device. 44 46 45 47 interrupts:
+2
Documentation/devicetree/bindings/sound/tas2770.yaml
··· 27 27 I2C address of the device can be between 0x41 to 0x48. 28 28 29 29 reset-gpio: 30 + maxItems: 1 30 31 description: GPIO used to reset the device. 31 32 32 33 shutdown-gpios: 34 + maxItems: 1 33 35 description: GPIO used to control the state of the device. 34 36 35 37 interrupts:
+1
Documentation/devicetree/bindings/sound/tlv320adcx140.yaml
··· 35 35 I2C addresss of the device can be one of these 0x4c, 0x4d, 0x4e or 0x4f 36 36 37 37 reset-gpios: 38 + maxItems: 1 38 39 description: | 39 40 GPIO used for hardware reset. 40 41
+2
Documentation/devicetree/bindings/spi/renesas,rspi.yaml
··· 68 68 maxItems: 1 69 69 70 70 dmas: 71 + minItems: 2 72 + maxItems: 4 71 73 description: 72 74 Must contain a list of pairs of references to DMA specifiers, one for 73 75 transmission, and one for reception.
+2
Documentation/devicetree/bindings/sram/sram.yaml
··· 35 35 maxItems: 1 36 36 37 37 clocks: 38 + maxItems: 1 38 39 description: 39 40 A list of phandle and clock specifier pair that controls the single 40 41 SRAM clock. ··· 47 46 const: 1 48 47 49 48 ranges: 49 + maxItems: 1 50 50 description: 51 51 Should translate from local addresses within the sram to bus addresses. 52 52
+6 -6
Documentation/devicetree/bindings/thermal/allwinner,sun8i-a83t-ths.yaml
··· 103 103 compatible: 104 104 contains: 105 105 enum: 106 - - const: allwinner,sun8i-h3-ths 107 - - const: allwinner,sun8i-r40-ths 108 - - const: allwinner,sun50i-a64-ths 109 - - const: allwinner,sun50i-a100-ths 110 - - const: allwinner,sun50i-h5-ths 111 - - const: allwinner,sun50i-h6-ths 106 + - allwinner,sun8i-h3-ths 107 + - allwinner,sun8i-r40-ths 108 + - allwinner,sun50i-a64-ths 109 + - allwinner,sun50i-a100-ths 110 + - allwinner,sun50i-h5-ths 111 + - allwinner,sun50i-h6-ths 112 112 113 113 then: 114 114 required:
+2
Documentation/devicetree/bindings/timer/allwinner,sun4i-a10-timer.yaml
··· 22 22 maxItems: 1 23 23 24 24 interrupts: 25 + minItems: 2 26 + maxItems: 6 25 27 description: 26 28 List of timers interrupts 27 29
+1 -2
Documentation/devicetree/bindings/timer/allwinner,sun5i-a13-hstimer.yaml
··· 46 46 if: 47 47 properties: 48 48 compatible: 49 - items: 50 - const: allwinner,sun5i-a13-hstimer 49 + const: allwinner,sun5i-a13-hstimer 51 50 52 51 then: 53 52 properties:
+1 -1
Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml
··· 18 18 - const: intel,ixp4xx-timer 19 19 20 20 reg: 21 - description: Should contain registers location and length 21 + maxItems: 1 22 22 23 23 interrupts: 24 24 minItems: 1
+1 -1
Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml
··· 39 39 maxItems: 1 40 40 41 41 phys: 42 - description: PHY specifier for the OTG PHY 42 + maxItems: 1 43 43 44 44 phy-names: 45 45 const: usb
+3
Documentation/devicetree/bindings/usb/brcm,usb-pinmap.yaml
··· 22 22 description: Interrupt for signals mirrored to out-gpios. 23 23 24 24 in-gpios: 25 + minItems: 1 26 + maxItems: 2 25 27 description: Array of one or two GPIO pins used for input signals. 26 28 27 29 brcm,in-functions: ··· 35 33 description: Array of enable and mask pairs, one per gpio in-gpios. 36 34 37 35 out-gpios: 36 + maxItems: 1 38 37 description: Array of one GPIO pin used for output signals. 39 38 40 39 brcm,out-functions:
+1 -1
Documentation/devicetree/bindings/usb/generic-ehci.yaml
··· 128 128 Phandle of a companion. 129 129 130 130 phys: 131 - description: PHY specifier for the USB PHY 131 + maxItems: 1 132 132 133 133 phy-names: 134 134 const: usb
+1 -1
Documentation/devicetree/bindings/usb/generic-ohci.yaml
··· 101 101 Overrides the detected port count 102 102 103 103 phys: 104 - description: PHY specifier for the USB PHY 104 + maxItems: 1 105 105 106 106 phy-names: 107 107 const: usb
+1 -1
Documentation/devicetree/bindings/usb/ingenic,musb.yaml
··· 40 40 - const: mc 41 41 42 42 phys: 43 - description: PHY specifier for the USB PHY 43 + maxItems: 1 44 44 45 45 usb-role-switch: 46 46 type: boolean
+4 -3
Documentation/devicetree/bindings/usb/renesas,usb3-peri.yaml
··· 54 54 description: phandle of a companion. 55 55 56 56 ports: 57 + $ref: /schemas/graph.yaml#/properties/ports 57 58 description: | 58 59 any connector to the data bus of this controller should be modelled 59 60 using the OF graph bindings specified, if the "usb-role-switch" 60 61 property is used. 61 - type: object 62 + 62 63 properties: 63 64 port@0: 64 - type: object 65 + $ref: /schemas/graph.yaml#/properties/port 65 66 description: High Speed (HS) data bus. 66 67 67 68 port@1: 68 - type: object 69 + $ref: /schemas/graph.yaml#/properties/port 69 70 description: Super Speed (SS) data bus. 70 71 71 72 required:
+1
Documentation/devicetree/bindings/usb/renesas,usbhs.yaml
··· 68 68 Integer to use BUSWAIT register. 69 69 70 70 renesas,enable-gpio: 71 + maxItems: 1 71 72 description: | 72 73 gpio specifier to check GPIO determining if USB function should be 73 74 enabled.
+4 -4
Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml
··· 26 26 maxItems: 1 27 27 28 28 ports: 29 + $ref: /schemas/graph.yaml#/properties/ports 29 30 description: OF graph bindings (specified in bindings/graph.txt) that model 30 31 SS data bus to the SS capable connector. 31 - type: object 32 + 32 33 properties: 33 34 port@0: 34 - type: object 35 + $ref: /schemas/graph.yaml#/properties/port 35 36 description: Super Speed (SS) MUX inputs connected to SS capable connector. 36 - $ref: /connector/usb-connector.yaml#/properties/ports/properties/port@1 37 37 38 38 port@1: 39 - type: object 39 + $ref: /schemas/graph.yaml#/properties/port 40 40 description: Output of 2:1 MUX connected to Super Speed (SS) data bus. 41 41 42 42 required:
+2 -1
Documentation/devicetree/bindings/usb/ti,j721e-usb.yaml
··· 19 19 - const: ti,am64-usb 20 20 21 21 reg: 22 - description: module registers 22 + maxItems: 1 23 23 24 24 ranges: true 25 25 ··· 28 28 PM domain provider node and an args specifier containing 29 29 the USB device id value. See, 30 30 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt 31 + maxItems: 1 31 32 32 33 clocks: 33 34 description: Clock phandles to usb2_refclk and lpm_clk
+2
Documentation/devicetree/bindings/usb/ti,keystone-dwc3.yaml
··· 43 43 maxItems: 2 44 44 45 45 power-domains: 46 + maxItems: 1 46 47 description: Should contain a phandle to a PM domain provider node 47 48 and an args specifier containing the USB device id 48 49 value. This property is as per the binding, 49 50 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt 50 51 51 52 phys: 53 + maxItems: 1 52 54 description: 53 55 PHY specifier for the USB3.0 PHY. Some SoCs need the USB3.0 PHY 54 56 to be turned on before the controller.
+2 -2
Documentation/devicetree/bindings/watchdog/ti,rti-wdt.yaml
··· 57 57 */ 58 58 #include <dt-bindings/soc/ti,sci_pm_domain.h> 59 59 60 - watchdog0: rti@2200000 { 61 - compatible = "ti,rti-wdt"; 60 + watchdog@2200000 { 61 + compatible = "ti,j7-rti-wdt"; 62 62 reg = <0x2200000 0x100>; 63 63 clocks = <&k3_clks 252 1>; 64 64 power-domains = <&k3_pds 252 TI_SCI_PD_EXCLUSIVE>;
+4 -1
Makefile
··· 1344 1344 %.dtb: include/config/kernel.release scripts_dtc 1345 1345 $(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@ 1346 1346 1347 + %.dtbo: include/config/kernel.release scripts_dtc 1348 + $(Q)$(MAKE) $(build)=$(dtstree) $(dtstree)/$@ 1349 + 1347 1350 PHONY += dtbs dtbs_install dtbs_check 1348 1351 dtbs: include/config/kernel.release scripts_dtc 1349 1352 $(Q)$(MAKE) $(build)=$(dtstree) ··· 1826 1823 @find $(if $(KBUILD_EXTMOD), $(KBUILD_EXTMOD), .) $(RCS_FIND_IGNORE) \ 1827 1824 \( -name '*.[aios]' -o -name '*.ko' -o -name '.*.cmd' \ 1828 1825 -o -name '*.ko.*' \ 1829 - -o -name '*.dtb' -o -name '*.dtb.S' -o -name '*.dt.yaml' \ 1826 + -o -name '*.dtb' -o -name '*.dtbo' -o -name '*.dtb.S' -o -name '*.dt.yaml' \ 1830 1827 -o -name '*.dwo' -o -name '*.lst' \ 1831 1828 -o -name '*.su' -o -name '*.mod' \ 1832 1829 -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \
+2 -2
arch/powerpc/platforms/pseries/ibmebus.c
··· 355 355 if (!drv->probe) 356 356 return error; 357 357 358 - of_dev_get(of_dev); 358 + get_device(dev); 359 359 360 360 if (of_driver_match_device(dev, dev->driver)) 361 361 error = drv->probe(of_dev); 362 362 if (error) 363 - of_dev_put(of_dev); 363 + put_device(dev); 364 364 365 365 return error; 366 366 }
+1 -1
drivers/base/platform.c
··· 573 573 struct platform_object *pa = container_of(dev, struct platform_object, 574 574 pdev.dev); 575 575 576 - of_device_node_put(&pa->pdev.dev); 576 + of_node_put(pa->pdev.dev.of_node); 577 577 kfree(pa->pdev.dev.platform_data); 578 578 kfree(pa->pdev.mfd_cell); 579 579 kfree(pa->pdev.resource);
+5 -15
drivers/hwmon/lm70.c
··· 22 22 #include <linux/hwmon.h> 23 23 #include <linux/mutex.h> 24 24 #include <linux/mod_devicetable.h> 25 + #include <linux/property.h> 25 26 #include <linux/spi/spi.h> 26 27 #include <linux/slab.h> 27 - #include <linux/of_device.h> 28 28 #include <linux/acpi.h> 29 29 30 30 #define DRVNAME "lm70" ··· 173 173 174 174 static int lm70_probe(struct spi_device *spi) 175 175 { 176 - const struct of_device_id *of_match; 177 176 struct device *hwmon_dev; 178 177 struct lm70 *p_lm70; 179 178 int chip; 180 179 181 - of_match = of_match_device(lm70_of_ids, &spi->dev); 182 - if (of_match) 183 - chip = (int)(uintptr_t)of_match->data; 184 - else { 185 - #ifdef CONFIG_ACPI 186 - const struct acpi_device_id *acpi_match; 180 + if (dev_fwnode(&spi->dev)) 181 + chip = (int)(uintptr_t)device_get_match_data(&spi->dev); 182 + else 183 + chip = spi_get_device_id(spi)->driver_data; 187 184 188 - acpi_match = acpi_match_device(lm70_acpi_ids, &spi->dev); 189 - if (acpi_match) 190 - chip = (int)(uintptr_t)acpi_match->driver_data; 191 - else 192 - #endif 193 - chip = spi_get_device_id(spi)->driver_data; 194 - } 195 185 196 186 /* signaling is SPI_MODE_0 */ 197 187 if (spi->mode & (SPI_CPOL | SPI_CPHA))
+1 -1
drivers/media/platform/renesas-ceu.c
··· 1669 1669 v4l2_async_notifier_init(&ceudev->notifier); 1670 1670 1671 1671 if (IS_ENABLED(CONFIG_OF) && dev->of_node) { 1672 - ceu_data = of_match_device(ceu_of_match, dev)->data; 1672 + ceu_data = of_device_get_match_data(dev); 1673 1673 num_subdevs = ceu_parse_dt(ceudev); 1674 1674 } else if (dev->platform_data) { 1675 1675 /* Assume SH4 if booting with platform data. */
+8 -7
drivers/net/ethernet/ibm/emac/core.c
··· 38 38 #include <linux/of_irq.h> 39 39 #include <linux/of_net.h> 40 40 #include <linux/of_mdio.h> 41 + #include <linux/platform_device.h> 41 42 #include <linux/slab.h> 42 43 43 44 #include <asm/processor.h> ··· 2391 2390 2392 2391 static void emac_put_deps(struct emac_instance *dev) 2393 2392 { 2394 - of_dev_put(dev->mal_dev); 2395 - of_dev_put(dev->zmii_dev); 2396 - of_dev_put(dev->rgmii_dev); 2397 - of_dev_put(dev->mdio_dev); 2398 - of_dev_put(dev->tah_dev); 2393 + platform_device_put(dev->mal_dev); 2394 + platform_device_put(dev->zmii_dev); 2395 + platform_device_put(dev->rgmii_dev); 2396 + platform_device_put(dev->mdio_dev); 2397 + platform_device_put(dev->tah_dev); 2399 2398 } 2400 2399 2401 2400 static int emac_of_bus_notify(struct notifier_block *nb, unsigned long action, ··· 2436 2435 for (i = 0; i < EMAC_DEP_COUNT; i++) { 2437 2436 of_node_put(deps[i].node); 2438 2437 if (err) 2439 - of_dev_put(deps[i].ofdev); 2438 + platform_device_put(deps[i].ofdev); 2440 2439 } 2441 2440 if (err == 0) { 2442 2441 dev->mal_dev = deps[EMAC_DEP_MAL_IDX].ofdev; ··· 2445 2444 dev->tah_dev = deps[EMAC_DEP_TAH_IDX].ofdev; 2446 2445 dev->mdio_dev = deps[EMAC_DEP_MDIO_IDX].ofdev; 2447 2446 } 2448 - of_dev_put(deps[EMAC_DEP_PREV_IDX].ofdev); 2447 + platform_device_put(deps[EMAC_DEP_PREV_IDX].ofdev); 2449 2448 return err; 2450 2449 } 2451 2450
+4 -8
drivers/net/ethernet/ti/davinci_mdio.c
··· 358 358 } 359 359 360 360 if (IS_ENABLED(CONFIG_OF) && dev->of_node) { 361 - const struct of_device_id *of_id; 361 + const struct davinci_mdio_of_param *of_mdio_data; 362 362 363 363 ret = davinci_mdio_probe_dt(&data->pdata, pdev); 364 364 if (ret) 365 365 return ret; 366 366 snprintf(data->bus->id, MII_BUS_ID_SIZE, "%s", pdev->name); 367 367 368 - of_id = of_match_device(davinci_mdio_of_mtable, &pdev->dev); 369 - if (of_id) { 370 - const struct davinci_mdio_of_param *of_mdio_data; 371 - 372 - of_mdio_data = of_id->data; 373 - if (of_mdio_data) 374 - autosuspend_delay_ms = 368 + of_mdio_data = of_device_get_match_data(&pdev->dev); 369 + if (of_mdio_data) { 370 + autosuspend_delay_ms = 375 371 of_mdio_data->autosuspend_delay_ms; 376 372 } 377 373 } else {
+2 -2
drivers/of/base.c
··· 1297 1297 1298 1298 if (it->cells_name) { 1299 1299 if (!it->node) { 1300 - pr_err("%pOF: could not find phandle\n", 1301 - it->parent); 1300 + pr_err("%pOF: could not find phandle %d\n", 1301 + it->parent, it->phandle); 1302 1302 goto err; 1303 1303 } 1304 1304
-21
drivers/of/device.c
··· 33 33 } 34 34 EXPORT_SYMBOL(of_match_device); 35 35 36 - struct platform_device *of_dev_get(struct platform_device *dev) 37 - { 38 - struct device *tmp; 39 - 40 - if (!dev) 41 - return NULL; 42 - tmp = get_device(&dev->dev); 43 - if (tmp) 44 - return to_platform_device(tmp); 45 - else 46 - return NULL; 47 - } 48 - EXPORT_SYMBOL(of_dev_get); 49 - 50 - void of_dev_put(struct platform_device *dev) 51 - { 52 - if (dev) 53 - put_device(&dev->dev); 54 - } 55 - EXPORT_SYMBOL(of_dev_put); 56 - 57 36 int of_device_add(struct platform_device *ofdev) 58 37 { 59 38 BUG_ON(ofdev->dev.of_node == NULL);
+10 -2
drivers/of/fdt.c
··· 1146 1146 int __init __weak early_init_dt_reserve_memory_arch(phys_addr_t base, 1147 1147 phys_addr_t size, bool nomap) 1148 1148 { 1149 - if (nomap) 1150 - return memblock_remove(base, size); 1149 + if (nomap) { 1150 + /* 1151 + * If the memory is already reserved (by another region), we 1152 + * should not allow it to be marked nomap. 1153 + */ 1154 + if (memblock_is_region_reserved(base, size)) 1155 + return -EBUSY; 1156 + 1157 + return memblock_mark_nomap(base, size); 1158 + } 1151 1159 return memblock_reserve(base, size); 1152 1160 } 1153 1161
+2 -2
drivers/of/platform.c
··· 687 687 pdev_parent = of_find_device_by_node(rd->dn->parent); 688 688 pdev = of_platform_device_create(rd->dn, NULL, 689 689 pdev_parent ? &pdev_parent->dev : NULL); 690 - of_dev_put(pdev_parent); 690 + platform_device_put(pdev_parent); 691 691 692 692 if (pdev == NULL) { 693 693 pr_err("%s: failed to create for '%pOF'\n", ··· 712 712 of_platform_device_destroy(&pdev->dev, &children_left); 713 713 714 714 /* and put the reference of the find */ 715 - of_dev_put(pdev); 715 + platform_device_put(pdev); 716 716 break; 717 717 } 718 718
+1 -1
drivers/of/unittest.c
··· 1286 1286 unittest(pdev, 1287 1287 "Could not create device for node '%pOFn'\n", 1288 1288 grandchild); 1289 - of_dev_put(pdev); 1289 + platform_device_put(pdev); 1290 1290 } 1291 1291 } 1292 1292
+34 -37
drivers/tty/serial/stm32-usart.c
··· 100 100 struct serial_rs485 *rs485conf) 101 101 { 102 102 struct stm32_port *stm32_port = to_stm32_port(port); 103 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 104 - struct stm32_usart_config *cfg = &stm32_port->info->cfg; 103 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 104 + const struct stm32_usart_config *cfg = &stm32_port->info->cfg; 105 105 u32 usartdiv, baud, cr1, cr3; 106 106 bool over8; 107 107 ··· 169 169 int *last_res, bool threaded) 170 170 { 171 171 struct stm32_port *stm32_port = to_stm32_port(port); 172 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 172 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 173 173 enum dma_status status; 174 174 struct dma_tx_state state; 175 175 ··· 193 193 int *last_res) 194 194 { 195 195 struct stm32_port *stm32_port = to_stm32_port(port); 196 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 196 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 197 197 unsigned long c; 198 198 199 199 if (stm32_port->rx_ch) { ··· 213 213 { 214 214 struct tty_port *tport = &port->state->port; 215 215 struct stm32_port *stm32_port = to_stm32_port(port); 216 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 216 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 217 217 unsigned long c; 218 218 u32 sr; 219 219 char flag; ··· 285 285 { 286 286 struct uart_port *port = arg; 287 287 struct stm32_port *stm32port = to_stm32_port(port); 288 - struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 288 + const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 289 289 290 290 stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT); 291 291 stm32port->tx_dma_busy = false; ··· 297 297 static void stm32_usart_tx_interrupt_enable(struct uart_port *port) 298 298 { 299 299 struct stm32_port *stm32_port = to_stm32_port(port); 300 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 300 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 301 301 302 302 /* 303 303 * Enables TX FIFO threashold irq when FIFO is enabled, ··· 312 312 static void stm32_usart_tx_interrupt_disable(struct uart_port *port) 313 313 { 314 314 struct stm32_port *stm32_port = to_stm32_port(port); 315 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 315 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 316 316 317 317 if (stm32_port->fifoen) 318 318 stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_TXFTIE); ··· 323 323 static void stm32_usart_transmit_chars_pio(struct uart_port *port) 324 324 { 325 325 struct stm32_port *stm32_port = to_stm32_port(port); 326 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 326 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 327 327 struct circ_buf *xmit = &port->state->xmit; 328 328 329 329 if (stm32_port->tx_dma_busy) { ··· 350 350 static void stm32_usart_transmit_chars_dma(struct uart_port *port) 351 351 { 352 352 struct stm32_port *stm32port = to_stm32_port(port); 353 - struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 353 + const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 354 354 struct circ_buf *xmit = &port->state->xmit; 355 355 struct dma_async_tx_descriptor *desc = NULL; 356 356 unsigned int count, i; ··· 416 416 static void stm32_usart_transmit_chars(struct uart_port *port) 417 417 { 418 418 struct stm32_port *stm32_port = to_stm32_port(port); 419 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 419 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 420 420 struct circ_buf *xmit = &port->state->xmit; 421 421 422 422 if (port->x_char) { ··· 456 456 { 457 457 struct uart_port *port = ptr; 458 458 struct stm32_port *stm32_port = to_stm32_port(port); 459 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 459 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 460 460 u32 sr; 461 461 462 462 spin_lock(&port->lock); ··· 503 503 static unsigned int stm32_usart_tx_empty(struct uart_port *port) 504 504 { 505 505 struct stm32_port *stm32_port = to_stm32_port(port); 506 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 506 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 507 507 508 508 return readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE; 509 509 } ··· 511 511 static void stm32_usart_set_mctrl(struct uart_port *port, unsigned int mctrl) 512 512 { 513 513 struct stm32_port *stm32_port = to_stm32_port(port); 514 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 514 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 515 515 516 516 if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) 517 517 stm32_usart_set_bits(port, ofs->cr3, USART_CR3_RTSE); ··· 588 588 static void stm32_usart_throttle(struct uart_port *port) 589 589 { 590 590 struct stm32_port *stm32_port = to_stm32_port(port); 591 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 591 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 592 592 unsigned long flags; 593 593 594 594 spin_lock_irqsave(&port->lock, flags); ··· 603 603 static void stm32_usart_unthrottle(struct uart_port *port) 604 604 { 605 605 struct stm32_port *stm32_port = to_stm32_port(port); 606 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 606 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 607 607 unsigned long flags; 608 608 609 609 spin_lock_irqsave(&port->lock, flags); ··· 618 618 static void stm32_usart_stop_rx(struct uart_port *port) 619 619 { 620 620 struct stm32_port *stm32_port = to_stm32_port(port); 621 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 621 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 622 622 623 623 stm32_usart_clr_bits(port, ofs->cr1, stm32_port->cr1_irq); 624 624 if (stm32_port->cr3_irq) ··· 633 633 static int stm32_usart_startup(struct uart_port *port) 634 634 { 635 635 struct stm32_port *stm32_port = to_stm32_port(port); 636 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 636 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 637 637 const char *name = to_platform_device(port->dev)->name; 638 638 u32 val; 639 639 int ret; ··· 669 669 static void stm32_usart_shutdown(struct uart_port *port) 670 670 { 671 671 struct stm32_port *stm32_port = to_stm32_port(port); 672 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 673 - struct stm32_usart_config *cfg = &stm32_port->info->cfg; 672 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 673 + const struct stm32_usart_config *cfg = &stm32_port->info->cfg; 674 674 u32 val, isr; 675 675 int ret; 676 676 ··· 731 731 struct ktermios *old) 732 732 { 733 733 struct stm32_port *stm32_port = to_stm32_port(port); 734 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 735 - struct stm32_usart_config *cfg = &stm32_port->info->cfg; 734 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 735 + const struct stm32_usart_config *cfg = &stm32_port->info->cfg; 736 736 struct serial_rs485 *rs485conf = &port->rs485; 737 737 unsigned int baud, bits; 738 738 u32 usartdiv, mantissa, fraction, oversampling; ··· 932 932 { 933 933 struct stm32_port *stm32port = container_of(port, 934 934 struct stm32_port, port); 935 - struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 936 - struct stm32_usart_config *cfg = &stm32port->info->cfg; 935 + const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 936 + const struct stm32_usart_config *cfg = &stm32port->info->cfg; 937 937 unsigned long flags = 0; 938 938 939 939 switch (state) { ··· 1099 1099 static int stm32_usart_of_dma_rx_probe(struct stm32_port *stm32port, 1100 1100 struct platform_device *pdev) 1101 1101 { 1102 - struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 1102 + const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 1103 1103 struct uart_port *port = &stm32port->port; 1104 1104 struct device *dev = &pdev->dev; 1105 1105 struct dma_slave_config config; ··· 1174 1174 static int stm32_usart_of_dma_tx_probe(struct stm32_port *stm32port, 1175 1175 struct platform_device *pdev) 1176 1176 { 1177 - struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 1177 + const struct stm32_usart_offsets *ofs = &stm32port->info->ofs; 1178 1178 struct uart_port *port = &stm32port->port; 1179 1179 struct device *dev = &pdev->dev; 1180 1180 struct dma_slave_config config; ··· 1224 1224 1225 1225 static int stm32_usart_serial_probe(struct platform_device *pdev) 1226 1226 { 1227 - const struct of_device_id *match; 1228 1227 struct stm32_port *stm32port; 1229 1228 int ret; 1230 1229 ··· 1231 1232 if (!stm32port) 1232 1233 return -ENODEV; 1233 1234 1234 - match = of_match_device(stm32_match, &pdev->dev); 1235 - if (match && match->data) 1236 - stm32port->info = (struct stm32_usart_info *)match->data; 1237 - else 1235 + stm32port->info = of_device_get_match_data(&pdev->dev); 1236 + if (!stm32port->info) 1238 1237 return -EINVAL; 1239 1238 1240 1239 ret = stm32_usart_init_port(stm32port, pdev); ··· 1291 1294 { 1292 1295 struct uart_port *port = platform_get_drvdata(pdev); 1293 1296 struct stm32_port *stm32_port = to_stm32_port(port); 1294 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 1297 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 1295 1298 int err; 1296 1299 1297 1300 pm_runtime_get_sync(&pdev->dev); ··· 1335 1338 static void stm32_usart_console_putchar(struct uart_port *port, int ch) 1336 1339 { 1337 1340 struct stm32_port *stm32_port = to_stm32_port(port); 1338 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 1341 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 1339 1342 1340 1343 while (!(readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE)) 1341 1344 cpu_relax(); ··· 1348 1351 { 1349 1352 struct uart_port *port = &stm32_ports[co->index].port; 1350 1353 struct stm32_port *stm32_port = to_stm32_port(port); 1351 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 1352 - struct stm32_usart_config *cfg = &stm32_port->info->cfg; 1354 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 1355 + const struct stm32_usart_config *cfg = &stm32_port->info->cfg; 1353 1356 unsigned long flags; 1354 1357 u32 old_cr1, new_cr1; 1355 1358 int locked = 1; ··· 1435 1438 bool enable) 1436 1439 { 1437 1440 struct stm32_port *stm32_port = to_stm32_port(port); 1438 - struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 1439 - struct stm32_usart_config *cfg = &stm32_port->info->cfg; 1441 + const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs; 1442 + const struct stm32_usart_config *cfg = &stm32_port->info->cfg; 1440 1443 u32 val; 1441 1444 1442 1445 if (stm32_port->wakeirq <= 0)
+1 -1
drivers/tty/serial/stm32-usart.h
··· 259 259 struct stm32_port { 260 260 struct uart_port port; 261 261 struct clk *clk; 262 - struct stm32_usart_info *info; 262 + const struct stm32_usart_info *info; 263 263 struct dma_chan *rx_ch; /* dma rx channel */ 264 264 dma_addr_t rx_dma_buf; /* dma rx buffer bus address */ 265 265 unsigned char *rx_buf; /* dma rx buffer cpu address */
+1 -1
drivers/usb/dwc3/dwc3-st.c
··· 274 274 275 275 dwc3_data->dr_mode = usb_get_dr_mode(&child_pdev->dev); 276 276 of_node_put(child); 277 - of_dev_put(child_pdev); 277 + platform_device_put(child_pdev); 278 278 279 279 /* 280 280 * Configure the USB port as device or host according to the static
+5 -7
drivers/usb/misc/usb251xb.c
··· 396 396 } 397 397 398 398 static int usb251xb_get_ofdata(struct usb251xb *hub, 399 - struct usb251xb_data *data) 399 + const struct usb251xb_data *data) 400 400 { 401 401 struct device *dev = hub->dev; 402 402 struct device_node *np = dev->of_node; ··· 630 630 MODULE_DEVICE_TABLE(of, usb251xb_of_match); 631 631 #else /* CONFIG_OF */ 632 632 static int usb251xb_get_ofdata(struct usb251xb *hub, 633 - struct usb251xb_data *data) 633 + const struct usb251xb_data *data) 634 634 { 635 635 return 0; 636 636 } ··· 647 647 { 648 648 struct device *dev = hub->dev; 649 649 struct device_node *np = dev->of_node; 650 - const struct of_device_id *of_id = of_match_device(usb251xb_of_match, 651 - dev); 650 + const struct usb251xb_data *usb_data = of_device_get_match_data(dev); 652 651 int err; 653 652 654 - if (np && of_id) { 655 - err = usb251xb_get_ofdata(hub, 656 - (struct usb251xb_data *)of_id->data); 653 + if (np && usb_data) { 654 + err = usb251xb_get_ofdata(hub, usb_data); 657 655 if (err) { 658 656 dev_err(dev, "failed to get ofdata: %d\n", err); 659 657 return err;
+1 -13
include/linux/of_device.h
··· 26 26 return of_match_device(drv->of_match_table, dev) != NULL; 27 27 } 28 28 29 - extern struct platform_device *of_dev_get(struct platform_device *dev); 30 - extern void of_dev_put(struct platform_device *dev); 31 - 32 29 extern int of_device_add(struct platform_device *pdev); 33 30 extern int of_device_register(struct platform_device *ofdev); 34 31 extern void of_device_unregister(struct platform_device *ofdev); ··· 37 40 38 41 extern void of_device_uevent(struct device *dev, struct kobj_uevent_env *env); 39 42 extern int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env); 40 - 41 - static inline void of_device_node_put(struct device *dev) 42 - { 43 - of_node_put(dev->of_node); 44 - } 45 43 46 44 static inline struct device_node *of_cpu_device_node_get(int cpu) 47 45 { ··· 89 97 return -ENODEV; 90 98 } 91 99 92 - static inline void of_device_node_put(struct device *dev) { } 93 - 94 - static inline const struct of_device_id *__of_match_device( 100 + static inline const struct of_device_id *of_match_device( 95 101 const struct of_device_id *matches, const struct device *dev) 96 102 { 97 103 return NULL; 98 104 } 99 - #define of_match_device(matches, dev) \ 100 - __of_match_device(of_match_ptr(matches), (dev)) 101 105 102 106 static inline struct device_node *of_cpu_device_node_get(int cpu) 103 107 {
+3
scripts/Makefile.dtbinst
··· 29 29 $(dst)/%.dtb: $(obj)/%.dtb 30 30 $(call cmd,dtb_install) 31 31 32 + $(dst)/%.dtbo: $(obj)/%.dtbo 33 + $(call cmd,dtb_install) 34 + 32 35 PHONY += $(subdirs) 33 36 $(subdirs): 34 37 $(Q)$(MAKE) $(dtbinst)=$@ dst=$(patsubst $(obj)/%,$(dst)/%,$@)
+5
scripts/Makefile.lib
··· 86 86 87 87 ifneq ($(CHECK_DTBS),) 88 88 extra-y += $(patsubst %.dtb,%.dt.yaml, $(dtb-y)) 89 + extra-y += $(patsubst %.dtbo,%.dt.yaml, $(dtb-y)) 89 90 extra-$(CONFIG_OF_ALL_DTBS) += $(patsubst %.dtb,%.dt.yaml, $(dtb-)) 91 + extra-$(CONFIG_OF_ALL_DTBS) += $(patsubst %.dtbo,%.dt.yaml, $(dtb-)) 90 92 endif 91 93 92 94 # Add subdir path ··· 327 325 cat $(depfile).pre.tmp $(depfile).dtc.tmp > $(depfile) 328 326 329 327 $(obj)/%.dtb: $(src)/%.dts $(DTC) FORCE 328 + $(call if_changed_dep,dtc) 329 + 330 + $(obj)/%.dtbo: $(src)/%.dts $(DTC) FORCE 330 331 $(call if_changed_dep,dtc) 331 332 332 333 DT_CHECKER ?= dt-validate
-1
scripts/coccinelle/free/put_device.cocci
··· 21 21 if (id == NULL || ...) { ... return ...; } 22 22 ... when != put_device(&id->dev) 23 23 when != platform_device_put(id) 24 - when != of_dev_put(id) 25 24 when != if (id) { ... put_device(&id->dev) ... } 26 25 when != e1 = (T)id 27 26 when != e1 = (T)(&id->dev)
+7 -1
scripts/dtc/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 # scripts/dtc makefile 3 3 4 - hostprogs-always-$(CONFIG_DTC) += dtc 4 + hostprogs-always-$(CONFIG_DTC) += dtc fdtoverlay 5 5 hostprogs-always-$(CHECK_DT_BINDING) += dtc 6 6 7 7 dtc-objs := dtc.o flattree.o fstree.o data.o livetree.o treesource.o \ 8 8 srcpos.o checks.o util.o 9 9 dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o 10 + 11 + # The upstream project builds libfdt as a separate library. We are choosing to 12 + # instead directly link the libfdt object files into fdtoverlay. 13 + libfdt-objs := fdt.o fdt_ro.o fdt_wip.o fdt_sw.o fdt_rw.o fdt_strerror.o fdt_empty_tree.o fdt_addresses.o fdt_overlay.o 14 + libfdt = $(addprefix libfdt/,$(libfdt-objs)) 15 + fdtoverlay-objs := $(libfdt) fdtoverlay.o util.o 10 16 11 17 # Source files need to get at the userspace version of libfdt_env.h to compile 12 18 HOST_EXTRACFLAGS += -I $(srctree)/$(src)/libfdt
+3 -3
scripts/dtc/data.c
··· 21 21 free(d.val); 22 22 } 23 23 24 - struct data data_grow_for(struct data d, int xlen) 24 + struct data data_grow_for(struct data d, unsigned int xlen) 25 25 { 26 26 struct data nd; 27 - int newsize; 27 + unsigned int newsize; 28 28 29 29 if (xlen == 0) 30 30 return d; ··· 84 84 while (!feof(f) && (d.len < maxlen)) { 85 85 size_t chunksize, ret; 86 86 87 - if (maxlen == -1) 87 + if (maxlen == (size_t)-1) 88 88 chunksize = 4096; 89 89 else 90 90 chunksize = maxlen - d.len;
+4
scripts/dtc/dtc.c
··· 122 122 return "dts"; 123 123 if (!strcasecmp(s, ".yaml")) 124 124 return "yaml"; 125 + if (!strcasecmp(s, ".dtbo")) 126 + return "dtb"; 125 127 if (!strcasecmp(s, ".dtb")) 126 128 return "dtb"; 127 129 return fallback; ··· 358 356 dt_to_yaml(outf, dti); 359 357 #endif 360 358 } else if (streq(outform, "dtb")) { 359 + dt_to_blob(outf, dti, outversion); 360 + } else if (streq(outform, "dtbo")) { 361 361 dt_to_blob(outf, dti, outversion); 362 362 } else if (streq(outform, "asm")) { 363 363 dt_to_asm(outf, dti, outversion);
+4 -4
scripts/dtc/dtc.h
··· 105 105 106 106 struct marker { 107 107 enum markertype type; 108 - int offset; 108 + unsigned int offset; 109 109 char *ref; 110 110 struct marker *next; 111 111 }; 112 112 113 113 struct data { 114 - int len; 114 + unsigned int len; 115 115 char *val; 116 116 struct marker *markers; 117 117 }; ··· 129 129 130 130 void data_free(struct data d); 131 131 132 - struct data data_grow_for(struct data d, int xlen); 132 + struct data data_grow_for(struct data d, unsigned int xlen); 133 133 134 134 struct data data_copy_mem(const char *mem, int len); 135 135 struct data data_copy_escape_string(const char *s, int len); ··· 253 253 const char *get_unitname(struct node *node); 254 254 struct property *get_property(struct node *node, const char *propname); 255 255 cell_t propval_cell(struct property *prop); 256 - cell_t propval_cell_n(struct property *prop, int n); 256 + cell_t propval_cell_n(struct property *prop, unsigned int n); 257 257 struct property *get_property_by_label(struct node *tree, const char *label, 258 258 struct node **node); 259 259 struct marker *get_marker_label(struct node *tree, const char *label,
-163
scripts/dtc/fdtdump.c
··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /* 3 - * fdtdump.c - Contributed by Pantelis Antoniou <pantelis.antoniou AT gmail.com> 4 - */ 5 - 6 - #include <stdint.h> 7 - #include <stdio.h> 8 - #include <stdlib.h> 9 - #include <string.h> 10 - #include <ctype.h> 11 - 12 - #include <fdt.h> 13 - #include <libfdt_env.h> 14 - 15 - #include "util.h" 16 - 17 - #define ALIGN(x, a) (((x) + ((a) - 1)) & ~((a) - 1)) 18 - #define PALIGN(p, a) ((void *)(ALIGN((unsigned long)(p), (a)))) 19 - #define GET_CELL(p) (p += 4, *((const uint32_t *)(p-4))) 20 - 21 - static void print_data(const char *data, int len) 22 - { 23 - int i; 24 - const char *p = data; 25 - 26 - /* no data, don't print */ 27 - if (len == 0) 28 - return; 29 - 30 - if (util_is_printable_string(data, len)) { 31 - printf(" = \"%s\"", (const char *)data); 32 - } else if ((len % 4) == 0) { 33 - printf(" = <"); 34 - for (i = 0; i < len; i += 4) 35 - printf("0x%08x%s", fdt32_to_cpu(GET_CELL(p)), 36 - i < (len - 4) ? " " : ""); 37 - printf(">"); 38 - } else { 39 - printf(" = ["); 40 - for (i = 0; i < len; i++) 41 - printf("%02x%s", *p++, i < len - 1 ? " " : ""); 42 - printf("]"); 43 - } 44 - } 45 - 46 - static void dump_blob(void *blob) 47 - { 48 - struct fdt_header *bph = blob; 49 - uint32_t off_mem_rsvmap = fdt32_to_cpu(bph->off_mem_rsvmap); 50 - uint32_t off_dt = fdt32_to_cpu(bph->off_dt_struct); 51 - uint32_t off_str = fdt32_to_cpu(bph->off_dt_strings); 52 - struct fdt_reserve_entry *p_rsvmap = 53 - (struct fdt_reserve_entry *)((char *)blob + off_mem_rsvmap); 54 - const char *p_struct = (const char *)blob + off_dt; 55 - const char *p_strings = (const char *)blob + off_str; 56 - uint32_t version = fdt32_to_cpu(bph->version); 57 - uint32_t totalsize = fdt32_to_cpu(bph->totalsize); 58 - uint32_t tag; 59 - const char *p, *s, *t; 60 - int depth, sz, shift; 61 - int i; 62 - uint64_t addr, size; 63 - 64 - depth = 0; 65 - shift = 4; 66 - 67 - printf("/dts-v1/;\n"); 68 - printf("// magic:\t\t0x%x\n", fdt32_to_cpu(bph->magic)); 69 - printf("// totalsize:\t\t0x%x (%d)\n", totalsize, totalsize); 70 - printf("// off_dt_struct:\t0x%x\n", off_dt); 71 - printf("// off_dt_strings:\t0x%x\n", off_str); 72 - printf("// off_mem_rsvmap:\t0x%x\n", off_mem_rsvmap); 73 - printf("// version:\t\t%d\n", version); 74 - printf("// last_comp_version:\t%d\n", 75 - fdt32_to_cpu(bph->last_comp_version)); 76 - if (version >= 2) 77 - printf("// boot_cpuid_phys:\t0x%x\n", 78 - fdt32_to_cpu(bph->boot_cpuid_phys)); 79 - 80 - if (version >= 3) 81 - printf("// size_dt_strings:\t0x%x\n", 82 - fdt32_to_cpu(bph->size_dt_strings)); 83 - if (version >= 17) 84 - printf("// size_dt_struct:\t0x%x\n", 85 - fdt32_to_cpu(bph->size_dt_struct)); 86 - printf("\n"); 87 - 88 - for (i = 0; ; i++) { 89 - addr = fdt64_to_cpu(p_rsvmap[i].address); 90 - size = fdt64_to_cpu(p_rsvmap[i].size); 91 - if (addr == 0 && size == 0) 92 - break; 93 - 94 - printf("/memreserve/ %llx %llx;\n", 95 - (unsigned long long)addr, (unsigned long long)size); 96 - } 97 - 98 - p = p_struct; 99 - while ((tag = fdt32_to_cpu(GET_CELL(p))) != FDT_END) { 100 - 101 - /* printf("tag: 0x%08x (%d)\n", tag, p - p_struct); */ 102 - 103 - if (tag == FDT_BEGIN_NODE) { 104 - s = p; 105 - p = PALIGN(p + strlen(s) + 1, 4); 106 - 107 - if (*s == '\0') 108 - s = "/"; 109 - 110 - printf("%*s%s {\n", depth * shift, "", s); 111 - 112 - depth++; 113 - continue; 114 - } 115 - 116 - if (tag == FDT_END_NODE) { 117 - depth--; 118 - 119 - printf("%*s};\n", depth * shift, ""); 120 - continue; 121 - } 122 - 123 - if (tag == FDT_NOP) { 124 - printf("%*s// [NOP]\n", depth * shift, ""); 125 - continue; 126 - } 127 - 128 - if (tag != FDT_PROP) { 129 - fprintf(stderr, "%*s ** Unknown tag 0x%08x\n", depth * shift, "", tag); 130 - break; 131 - } 132 - sz = fdt32_to_cpu(GET_CELL(p)); 133 - s = p_strings + fdt32_to_cpu(GET_CELL(p)); 134 - if (version < 16 && sz >= 8) 135 - p = PALIGN(p, 8); 136 - t = p; 137 - 138 - p = PALIGN(p + sz, 4); 139 - 140 - printf("%*s%s", depth * shift, "", s); 141 - print_data(t, sz); 142 - printf(";\n"); 143 - } 144 - } 145 - 146 - 147 - int main(int argc, char *argv[]) 148 - { 149 - char *buf; 150 - 151 - if (argc < 2) { 152 - fprintf(stderr, "supply input filename\n"); 153 - return 5; 154 - } 155 - 156 - buf = utilfdt_read(argv[1]); 157 - if (buf) 158 - dump_blob(buf); 159 - else 160 - return 10; 161 - 162 - return 0; 163 - }
+208
scripts/dtc/fdtoverlay.c
··· 1 + // SPDX-License-Identifier: GPL-2.0-or-later 2 + /* 3 + * Copyright (c) 2017 Konsulko Group Inc. All rights reserved. 4 + * 5 + * Author: 6 + * Pantelis Antoniou <pantelis.antoniou@konsulko.com> 7 + */ 8 + 9 + #include <assert.h> 10 + #include <ctype.h> 11 + #include <getopt.h> 12 + #include <stdio.h> 13 + #include <stdlib.h> 14 + #include <string.h> 15 + #include <inttypes.h> 16 + 17 + #include <libfdt.h> 18 + 19 + #include "util.h" 20 + 21 + #define BUF_INCREMENT 65536 22 + 23 + /* Usage related data. */ 24 + static const char usage_synopsis[] = 25 + "apply a number of overlays to a base blob\n" 26 + " fdtoverlay <options> [<overlay.dtbo> [<overlay.dtbo>]]\n" 27 + "\n" 28 + USAGE_TYPE_MSG; 29 + static const char usage_short_opts[] = "i:o:v" USAGE_COMMON_SHORT_OPTS; 30 + static struct option const usage_long_opts[] = { 31 + {"input", required_argument, NULL, 'i'}, 32 + {"output", required_argument, NULL, 'o'}, 33 + {"verbose", no_argument, NULL, 'v'}, 34 + USAGE_COMMON_LONG_OPTS, 35 + }; 36 + static const char * const usage_opts_help[] = { 37 + "Input base DT blob", 38 + "Output DT blob", 39 + "Verbose messages", 40 + USAGE_COMMON_OPTS_HELP 41 + }; 42 + 43 + int verbose = 0; 44 + 45 + static void *apply_one(char *base, const char *overlay, size_t *buf_len, 46 + const char *name) 47 + { 48 + char *tmp = NULL; 49 + char *tmpo; 50 + int ret; 51 + 52 + /* 53 + * We take a copies first, because a a failed apply can trash 54 + * both the base blob and the overlay 55 + */ 56 + tmpo = xmalloc(fdt_totalsize(overlay)); 57 + 58 + do { 59 + tmp = xrealloc(tmp, *buf_len); 60 + ret = fdt_open_into(base, tmp, *buf_len); 61 + if (ret) { 62 + fprintf(stderr, 63 + "\nFailed to make temporary copy: %s\n", 64 + fdt_strerror(ret)); 65 + goto fail; 66 + } 67 + 68 + memcpy(tmpo, overlay, fdt_totalsize(overlay)); 69 + 70 + ret = fdt_overlay_apply(tmp, tmpo); 71 + if (ret == -FDT_ERR_NOSPACE) { 72 + *buf_len += BUF_INCREMENT; 73 + } 74 + } while (ret == -FDT_ERR_NOSPACE); 75 + 76 + if (ret) { 77 + fprintf(stderr, "\nFailed to apply '%s': %s\n", 78 + name, fdt_strerror(ret)); 79 + goto fail; 80 + } 81 + 82 + free(base); 83 + free(tmpo); 84 + return tmp; 85 + 86 + fail: 87 + free(tmpo); 88 + if (tmp) 89 + free(tmp); 90 + 91 + return NULL; 92 + } 93 + static int do_fdtoverlay(const char *input_filename, 94 + const char *output_filename, 95 + int argc, char *argv[]) 96 + { 97 + char *blob = NULL; 98 + char **ovblob = NULL; 99 + size_t buf_len; 100 + int i, ret = -1; 101 + 102 + blob = utilfdt_read(input_filename, &buf_len); 103 + if (!blob) { 104 + fprintf(stderr, "\nFailed to read '%s'\n", input_filename); 105 + goto out_err; 106 + } 107 + if (fdt_totalsize(blob) > buf_len) { 108 + fprintf(stderr, 109 + "\nBase blob is incomplete (%lu / %" PRIu32 " bytes read)\n", 110 + (unsigned long)buf_len, fdt_totalsize(blob)); 111 + goto out_err; 112 + } 113 + 114 + /* allocate blob pointer array */ 115 + ovblob = xmalloc(sizeof(*ovblob) * argc); 116 + memset(ovblob, 0, sizeof(*ovblob) * argc); 117 + 118 + /* read and keep track of the overlay blobs */ 119 + for (i = 0; i < argc; i++) { 120 + size_t ov_len; 121 + ovblob[i] = utilfdt_read(argv[i], &ov_len); 122 + if (!ovblob[i]) { 123 + fprintf(stderr, "\nFailed to read '%s'\n", argv[i]); 124 + goto out_err; 125 + } 126 + if (fdt_totalsize(ovblob[i]) > ov_len) { 127 + fprintf(stderr, 128 + "\nOverlay '%s' is incomplete (%lu / %" PRIu32 " bytes read)\n", 129 + argv[i], (unsigned long)ov_len, 130 + fdt_totalsize(ovblob[i])); 131 + goto out_err; 132 + } 133 + } 134 + 135 + buf_len = fdt_totalsize(blob); 136 + 137 + /* apply the overlays in sequence */ 138 + for (i = 0; i < argc; i++) { 139 + blob = apply_one(blob, ovblob[i], &buf_len, argv[i]); 140 + if (!blob) 141 + goto out_err; 142 + } 143 + 144 + fdt_pack(blob); 145 + ret = utilfdt_write(output_filename, blob); 146 + if (ret) 147 + fprintf(stderr, "\nFailed to write '%s'\n", 148 + output_filename); 149 + 150 + out_err: 151 + if (ovblob) { 152 + for (i = 0; i < argc; i++) { 153 + if (ovblob[i]) 154 + free(ovblob[i]); 155 + } 156 + free(ovblob); 157 + } 158 + free(blob); 159 + 160 + return ret; 161 + } 162 + 163 + int main(int argc, char *argv[]) 164 + { 165 + int opt, i; 166 + char *input_filename = NULL; 167 + char *output_filename = NULL; 168 + 169 + while ((opt = util_getopt_long()) != EOF) { 170 + switch (opt) { 171 + case_USAGE_COMMON_FLAGS 172 + 173 + case 'i': 174 + input_filename = optarg; 175 + break; 176 + case 'o': 177 + output_filename = optarg; 178 + break; 179 + case 'v': 180 + verbose = 1; 181 + break; 182 + } 183 + } 184 + 185 + if (!input_filename) 186 + usage("missing input file"); 187 + 188 + if (!output_filename) 189 + usage("missing output file"); 190 + 191 + argv += optind; 192 + argc -= optind; 193 + 194 + if (argc <= 0) 195 + usage("missing overlay file(s)"); 196 + 197 + if (verbose) { 198 + printf("input = %s\n", input_filename); 199 + printf("output = %s\n", output_filename); 200 + for (i = 0; i < argc; i++) 201 + printf("overlay[%d] = %s\n", i, argv[i]); 202 + } 203 + 204 + if (do_fdtoverlay(input_filename, output_filename, argc, argv)) 205 + return 1; 206 + 207 + return 0; 208 + }
+4 -4
scripts/dtc/flattree.c
··· 149 149 static void asm_emit_data(void *e, struct data d) 150 150 { 151 151 FILE *f = e; 152 - int off = 0; 152 + unsigned int off = 0; 153 153 struct marker *m = d.markers; 154 154 155 155 for_each_marker_of_type(m, LABEL) ··· 219 219 220 220 static int stringtable_insert(struct data *d, const char *str) 221 221 { 222 - int i; 222 + unsigned int i; 223 223 224 224 /* FIXME: do this more efficiently? */ 225 225 ··· 345 345 void dt_to_blob(FILE *f, struct dt_info *dti, int version) 346 346 { 347 347 struct version_info *vi = NULL; 348 - int i; 348 + unsigned int i; 349 349 struct data blob = empty_data; 350 350 struct data reservebuf = empty_data; 351 351 struct data dtbuf = empty_data; ··· 446 446 void dt_to_asm(FILE *f, struct dt_info *dti, int version) 447 447 { 448 448 struct version_info *vi = NULL; 449 - int i; 449 + unsigned int i; 450 450 struct data strbuf = empty_data; 451 451 struct reserve_info *re; 452 452 const char *symprefix = "dt";
+4
scripts/dtc/libfdt/fdt.c
··· 22 22 if (can_assume(VALID_DTB)) 23 23 return totalsize; 24 24 25 + /* The device tree must be at an 8-byte aligned address */ 26 + if ((uintptr_t)fdt & 7) 27 + return -FDT_ERR_ALIGNMENT; 28 + 25 29 if (fdt_magic(fdt) == FDT_MAGIC) { 26 30 /* Complete tree */ 27 31 if (!can_assume(LATEST)) {
+10 -10
scripts/dtc/libfdt/fdt_ro.c
··· 181 181 if (!can_assume(VALID_INPUT) && !re) 182 182 return -FDT_ERR_BADOFFSET; 183 183 184 - *address = fdt64_ld(&re->address); 185 - *size = fdt64_ld(&re->size); 184 + *address = fdt64_ld_(&re->address); 185 + *size = fdt64_ld_(&re->size); 186 186 return 0; 187 187 } 188 188 ··· 192 192 const struct fdt_reserve_entry *re; 193 193 194 194 for (i = 0; (re = fdt_mem_rsv(fdt, i)) != NULL; i++) { 195 - if (fdt64_ld(&re->size) == 0) 195 + if (fdt64_ld_(&re->size) == 0) 196 196 return i; 197 197 } 198 198 return -FDT_ERR_TRUNCATED; ··· 370 370 prop = fdt_offset_ptr_(fdt, offset); 371 371 372 372 if (lenp) 373 - *lenp = fdt32_ld(&prop->len); 373 + *lenp = fdt32_ld_(&prop->len); 374 374 375 375 return prop; 376 376 } ··· 408 408 offset = -FDT_ERR_INTERNAL; 409 409 break; 410 410 } 411 - if (fdt_string_eq_(fdt, fdt32_ld(&prop->nameoff), 411 + if (fdt_string_eq_(fdt, fdt32_ld_(&prop->nameoff), 412 412 name, namelen)) { 413 413 if (poffset) 414 414 *poffset = offset; ··· 461 461 462 462 /* Handle realignment */ 463 463 if (!can_assume(LATEST) && fdt_version(fdt) < 0x10 && 464 - (poffset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) 464 + (poffset + sizeof(*prop)) % 8 && fdt32_ld_(&prop->len) >= 8) 465 465 return prop->data + 4; 466 466 return prop->data; 467 467 } ··· 479 479 int namelen; 480 480 481 481 if (!can_assume(VALID_INPUT)) { 482 - name = fdt_get_string(fdt, fdt32_ld(&prop->nameoff), 482 + name = fdt_get_string(fdt, fdt32_ld_(&prop->nameoff), 483 483 &namelen); 484 484 if (!name) { 485 485 if (lenp) ··· 488 488 } 489 489 *namep = name; 490 490 } else { 491 - *namep = fdt_string(fdt, fdt32_ld(&prop->nameoff)); 491 + *namep = fdt_string(fdt, fdt32_ld_(&prop->nameoff)); 492 492 } 493 493 } 494 494 495 495 /* Handle realignment */ 496 496 if (!can_assume(LATEST) && fdt_version(fdt) < 0x10 && 497 - (offset + sizeof(*prop)) % 8 && fdt32_ld(&prop->len) >= 8) 497 + (offset + sizeof(*prop)) % 8 && fdt32_ld_(&prop->len) >= 8) 498 498 return prop->data + 4; 499 499 return prop->data; 500 500 } ··· 519 519 return 0; 520 520 } 521 521 522 - return fdt32_ld(php); 522 + return fdt32_ld_(php); 523 523 } 524 524 525 525 const char *fdt_get_alias_namelen(const void *fdt,
+3 -1
scripts/dtc/libfdt/fdt_rw.c
··· 428 428 429 429 if (can_assume(LATEST) || fdt_version(fdt) >= 17) { 430 430 struct_size = fdt_size_dt_struct(fdt); 431 - } else { 431 + } else if (fdt_version(fdt) == 16) { 432 432 struct_size = 0; 433 433 while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END) 434 434 ; 435 435 if (struct_size < 0) 436 436 return struct_size; 437 + } else { 438 + return -FDT_ERR_BADVERSION; 437 439 } 438 440 439 441 if (can_assume(LIBFDT_ORDER) ||
+1 -1
scripts/dtc/libfdt/fdt_sw.c
··· 377 377 fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt)); 378 378 379 379 /* And fix up fields that were keeping intermediate state. */ 380 - fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION); 380 + fdt_set_last_comp_version(fdt, FDT_LAST_COMPATIBLE_VERSION); 381 381 fdt_set_magic(fdt, FDT_MAGIC); 382 382 383 383 return 0;
+84 -42
scripts/dtc/libfdt/libfdt.h
··· 14 14 #endif 15 15 16 16 #define FDT_FIRST_SUPPORTED_VERSION 0x02 17 + #define FDT_LAST_COMPATIBLE_VERSION 0x10 17 18 #define FDT_LAST_SUPPORTED_VERSION 0x11 18 19 19 20 /* Error codes: informative error codes */ ··· 102 101 /* FDT_ERR_BADFLAGS: The function was passed a flags field that 103 102 * contains invalid flags or an invalid combination of flags. */ 104 103 105 - #define FDT_ERR_MAX 18 104 + #define FDT_ERR_ALIGNMENT 19 105 + /* FDT_ERR_ALIGNMENT: The device tree base address is not 8-byte 106 + * aligned. */ 107 + 108 + #define FDT_ERR_MAX 19 106 109 107 110 /* constants */ 108 111 #define FDT_MAX_PHANDLE 0xfffffffe ··· 127 122 uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset); 128 123 129 124 /* 130 - * Alignment helpers: 131 - * These helpers access words from a device tree blob. They're 132 - * built to work even with unaligned pointers on platforms (ike 133 - * ARM) that don't like unaligned loads and stores 125 + * External helpers to access words from a device tree blob. They're built 126 + * to work even with unaligned pointers on platforms (such as ARMv5) that don't 127 + * like unaligned loads and stores. 134 128 */ 135 - 136 129 static inline uint32_t fdt32_ld(const fdt32_t *p) 137 130 { 138 131 const uint8_t *bp = (const uint8_t *)p; ··· 187 184 188 185 /** 189 186 * fdt_first_subnode() - get offset of first direct subnode 190 - * 191 187 * @fdt: FDT blob 192 188 * @offset: Offset of node to check 193 - * @return offset of first subnode, or -FDT_ERR_NOTFOUND if there is none 189 + * 190 + * Return: offset of first subnode, or -FDT_ERR_NOTFOUND if there is none 194 191 */ 195 192 int fdt_first_subnode(const void *fdt, int offset); 196 193 197 194 /** 198 195 * fdt_next_subnode() - get offset of next direct subnode 196 + * @fdt: FDT blob 197 + * @offset: Offset of previous subnode 199 198 * 200 199 * After first calling fdt_first_subnode(), call this function repeatedly to 201 200 * get direct subnodes of a parent node. 202 201 * 203 - * @fdt: FDT blob 204 - * @offset: Offset of previous subnode 205 - * @return offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more 206 - * subnodes 202 + * Return: offset of next subnode, or -FDT_ERR_NOTFOUND if there are no more 203 + * subnodes 207 204 */ 208 205 int fdt_next_subnode(const void *fdt, int offset); 209 206 ··· 228 225 * Note that this is implemented as a macro and @node is used as 229 226 * iterator in the loop. The parent variable be constant or even a 230 227 * literal. 231 - * 232 228 */ 233 229 #define fdt_for_each_subnode(node, fdt, parent) \ 234 230 for (node = fdt_first_subnode(fdt, parent); \ ··· 271 269 /** 272 270 * fdt_header_size - return the size of the tree's header 273 271 * @fdt: pointer to a flattened device tree 272 + * 273 + * Return: size of DTB header in bytes 274 274 */ 275 275 size_t fdt_header_size(const void *fdt); 276 276 277 277 /** 278 - * fdt_header_size_ - internal function which takes a version number 278 + * fdt_header_size_ - internal function to get header size from a version number 279 + * @version: devicetree version number 280 + * 281 + * Return: size of DTB header in bytes 279 282 */ 280 283 size_t fdt_header_size_(uint32_t version); 281 284 282 285 /** 283 286 * fdt_check_header - sanity check a device tree header 284 - 285 287 * @fdt: pointer to data which might be a flattened device tree 286 288 * 287 289 * fdt_check_header() checks that the given buffer contains what ··· 410 404 * highest phandle value in the device tree blob) will be returned in the 411 405 * @phandle parameter. 412 406 * 413 - * Returns: 414 - * 0 on success or a negative error-code on failure 407 + * Return: 0 on success or a negative error-code on failure 415 408 */ 416 409 int fdt_generate_phandle(const void *fdt, uint32_t *phandle); 417 410 ··· 430 425 /** 431 426 * fdt_get_mem_rsv - retrieve one memory reserve map entry 432 427 * @fdt: pointer to the device tree blob 433 - * @address, @size: pointers to 64-bit variables 428 + * @n: index of reserve map entry 429 + * @address: pointer to 64-bit variable to hold the start address 430 + * @size: pointer to 64-bit variable to hold the size of the entry 434 431 * 435 - * On success, *address and *size will contain the address and size of 432 + * On success, @address and @size will contain the address and size of 436 433 * the n-th reserve map entry from the device tree blob, in 437 434 * native-endian format. 438 435 * ··· 457 450 * namelen characters of name for matching the subnode name. This is 458 451 * useful for finding subnodes based on a portion of a larger string, 459 452 * such as a full path. 453 + * 454 + * Return: offset of the subnode or -FDT_ERR_NOTFOUND if name not found. 460 455 */ 461 456 #ifndef SWIG /* Not available in Python */ 462 457 int fdt_subnode_offset_namelen(const void *fdt, int parentoffset, ··· 498 489 * 499 490 * Identical to fdt_path_offset(), but only consider the first namelen 500 491 * characters of path as the path name. 492 + * 493 + * Return: offset of the node or negative libfdt error value otherwise 501 494 */ 502 495 #ifndef SWIG /* Not available in Python */ 503 496 int fdt_path_offset_namelen(const void *fdt, const char *path, int namelen); ··· 599 588 /** 600 589 * fdt_for_each_property_offset - iterate over all properties of a node 601 590 * 602 - * @property_offset: property offset (int, lvalue) 603 - * @fdt: FDT blob (const void *) 604 - * @node: node offset (int) 591 + * @property: property offset (int, lvalue) 592 + * @fdt: FDT blob (const void *) 593 + * @node: node offset (int) 605 594 * 606 595 * This is actually a wrapper around a for loop and would be used like so: 607 596 * ··· 664 653 * 665 654 * Identical to fdt_get_property(), but only examine the first namelen 666 655 * characters of name for matching the property name. 656 + * 657 + * Return: pointer to the structure representing the property, or NULL 658 + * if not found 667 659 */ 668 660 #ifndef SWIG /* Not available in Python */ 669 661 const struct fdt_property *fdt_get_property_namelen(const void *fdt, ··· 759 745 * 760 746 * Identical to fdt_getprop(), but only examine the first namelen 761 747 * characters of name for matching the property name. 748 + * 749 + * Return: pointer to the property's value or NULL on error 762 750 */ 763 751 #ifndef SWIG /* Not available in Python */ 764 752 const void *fdt_getprop_namelen(const void *fdt, int nodeoffset, ··· 782 766 * @lenp: pointer to an integer variable (will be overwritten) or NULL 783 767 * 784 768 * fdt_getprop() retrieves a pointer to the value of the property 785 - * named 'name' of the node at offset nodeoffset (this will be a 769 + * named @name of the node at offset @nodeoffset (this will be a 786 770 * pointer to within the device blob itself, not a copy of the value). 787 - * If lenp is non-NULL, the length of the property value is also 788 - * returned, in the integer pointed to by lenp. 771 + * If @lenp is non-NULL, the length of the property value is also 772 + * returned, in the integer pointed to by @lenp. 789 773 * 790 774 * returns: 791 775 * pointer to the property's value ··· 830 814 * @name: name of the alias th look up 831 815 * @namelen: number of characters of name to consider 832 816 * 833 - * Identical to fdt_get_alias(), but only examine the first namelen 834 - * characters of name for matching the alias name. 817 + * Identical to fdt_get_alias(), but only examine the first @namelen 818 + * characters of @name for matching the alias name. 819 + * 820 + * Return: a pointer to the expansion of the alias named @name, if it exists, 821 + * NULL otherwise 835 822 */ 836 823 #ifndef SWIG /* Not available in Python */ 837 824 const char *fdt_get_alias_namelen(const void *fdt, ··· 847 828 * @name: name of the alias th look up 848 829 * 849 830 * fdt_get_alias() retrieves the value of a given alias. That is, the 850 - * value of the property named 'name' in the node /aliases. 831 + * value of the property named @name in the node /aliases. 851 832 * 852 833 * returns: 853 834 * a pointer to the expansion of the alias named 'name', if it exists ··· 1023 1004 int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle); 1024 1005 1025 1006 /** 1026 - * fdt_node_check_compatible: check a node's compatible property 1007 + * fdt_node_check_compatible - check a node's compatible property 1027 1008 * @fdt: pointer to the device tree blob 1028 1009 * @nodeoffset: offset of a tree node 1029 1010 * @compatible: string to match against 1030 1011 * 1031 - * 1032 1012 * fdt_node_check_compatible() returns 0 if the given node contains a 1033 - * 'compatible' property with the given string as one of its elements, 1013 + * @compatible property with the given string as one of its elements, 1034 1014 * it returns non-zero otherwise, or on error. 1035 1015 * 1036 1016 * returns: ··· 1093 1075 * one or more strings, each terminated by \0, as is found in a device tree 1094 1076 * "compatible" property. 1095 1077 * 1096 - * @return: 1 if the string is found in the list, 0 not found, or invalid list 1078 + * Return: 1 if the string is found in the list, 0 not found, or invalid list 1097 1079 */ 1098 1080 int fdt_stringlist_contains(const char *strlist, int listlen, const char *str); 1099 1081 ··· 1102 1084 * @fdt: pointer to the device tree blob 1103 1085 * @nodeoffset: offset of a tree node 1104 1086 * @property: name of the property containing the string list 1105 - * @return: 1087 + * 1088 + * Return: 1106 1089 * the number of strings in the given property 1107 1090 * -FDT_ERR_BADVALUE if the property value is not NUL-terminated 1108 1091 * -FDT_ERR_NOTFOUND if the property does not exist ··· 1123 1104 * small-valued cell properties, such as #address-cells, when searching for 1124 1105 * the empty string. 1125 1106 * 1126 - * @return: 1107 + * return: 1127 1108 * the index of the string in the list of strings 1128 1109 * -FDT_ERR_BADVALUE if the property value is not NUL-terminated 1129 1110 * -FDT_ERR_NOTFOUND if the property does not exist or does not contain ··· 1147 1128 * If non-NULL, the length of the string (on success) or a negative error-code 1148 1129 * (on failure) will be stored in the integer pointer to by lenp. 1149 1130 * 1150 - * @return: 1131 + * Return: 1151 1132 * A pointer to the string at the given index in the string list or NULL on 1152 1133 * failure. On success the length of the string will be stored in the memory 1153 1134 * location pointed to by the lenp parameter, if non-NULL. On failure one of ··· 1236 1217 * starting from the given index, and using only the first characters 1237 1218 * of the name. It is useful when you want to manipulate only one value of 1238 1219 * an array and you have a string that doesn't end with \0. 1220 + * 1221 + * Return: 0 on success, negative libfdt error value otherwise 1239 1222 */ 1240 1223 #ifndef SWIG /* Not available in Python */ 1241 1224 int fdt_setprop_inplace_namelen_partial(void *fdt, int nodeoffset, ··· 1351 1330 1352 1331 /** 1353 1332 * fdt_setprop_inplace_cell - change the value of a single-cell property 1333 + * @fdt: pointer to the device tree blob 1334 + * @nodeoffset: offset of the node containing the property 1335 + * @name: name of the property to change the value of 1336 + * @val: new value of the 32-bit cell 1354 1337 * 1355 1338 * This is an alternative name for fdt_setprop_inplace_u32() 1339 + * Return: 0 on success, negative libfdt error number otherwise. 1356 1340 */ 1357 1341 static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset, 1358 1342 const char *name, uint32_t val) ··· 1429 1403 1430 1404 /** 1431 1405 * fdt_create_with_flags - begin creation of a new fdt 1432 - * @fdt: pointer to memory allocated where fdt will be created 1406 + * @buf: pointer to memory allocated where fdt will be created 1433 1407 * @bufsize: size of the memory space at fdt 1434 1408 * @flags: a valid combination of FDT_CREATE_FLAG_ flags, or 0. 1435 1409 * ··· 1447 1421 1448 1422 /** 1449 1423 * fdt_create - begin creation of a new fdt 1450 - * @fdt: pointer to memory allocated where fdt will be created 1424 + * @buf: pointer to memory allocated where fdt will be created 1451 1425 * @bufsize: size of the memory space at fdt 1452 1426 * 1453 1427 * fdt_create() is equivalent to fdt_create_with_flags() with flags=0. ··· 1512 1486 /** 1513 1487 * fdt_add_mem_rsv - add one memory reserve map entry 1514 1488 * @fdt: pointer to the device tree blob 1515 - * @address, @size: 64-bit values (native endian) 1489 + * @address: 64-bit start address of the reserve map entry 1490 + * @size: 64-bit size of the reserved region 1516 1491 * 1517 1492 * Adds a reserve map entry to the given blob reserving a region at 1518 1493 * address address of length size. ··· 1718 1691 1719 1692 /** 1720 1693 * fdt_setprop_cell - set a property to a single cell value 1694 + * @fdt: pointer to the device tree blob 1695 + * @nodeoffset: offset of the node whose property to change 1696 + * @name: name of the property to change 1697 + * @val: 32-bit integer value for the property (native endian) 1721 1698 * 1722 1699 * This is an alternative name for fdt_setprop_u32() 1700 + * 1701 + * Return: 0 on success, negative libfdt error value otherwise. 1723 1702 */ 1724 1703 static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name, 1725 1704 uint32_t val) ··· 1896 1863 1897 1864 /** 1898 1865 * fdt_appendprop_cell - append a single cell value to a property 1866 + * @fdt: pointer to the device tree blob 1867 + * @nodeoffset: offset of the node whose property to change 1868 + * @name: name of the property to change 1869 + * @val: 32-bit integer value to append to the property (native endian) 1899 1870 * 1900 1871 * This is an alternative name for fdt_appendprop_u32() 1872 + * 1873 + * Return: 0 on success, negative libfdt error value otherwise. 1901 1874 */ 1902 1875 static inline int fdt_appendprop_cell(void *fdt, int nodeoffset, 1903 1876 const char *name, uint32_t val) ··· 2006 1967 * fdt_add_subnode_namelen - creates a new node based on substring 2007 1968 * @fdt: pointer to the device tree blob 2008 1969 * @parentoffset: structure block offset of a node 2009 - * @name: name of the subnode to locate 1970 + * @name: name of the subnode to create 2010 1971 * @namelen: number of characters of name to consider 2011 1972 * 2012 - * Identical to fdt_add_subnode(), but use only the first namelen 2013 - * characters of name as the name of the new node. This is useful for 1973 + * Identical to fdt_add_subnode(), but use only the first @namelen 1974 + * characters of @name as the name of the new node. This is useful for 2014 1975 * creating subnodes based on a portion of a larger string, such as a 2015 1976 * full path. 1977 + * 1978 + * Return: structure block offset of the created subnode (>=0), 1979 + * negative libfdt error value otherwise 2016 1980 */ 2017 1981 #ifndef SWIG /* Not available in Python */ 2018 1982 int fdt_add_subnode_namelen(void *fdt, int parentoffset, ··· 2034 1992 * 2035 1993 * This function will insert data into the blob, and will therefore 2036 1994 * change the offsets of some existing nodes. 2037 - 1995 + * 2038 1996 * returns: 2039 1997 * structure block offset of the created nodeequested subnode (>=0), on 2040 1998 * success
+19
scripts/dtc/libfdt/libfdt_internal.h
··· 46 46 return (void *)(uintptr_t)fdt_mem_rsv_(fdt, n); 47 47 } 48 48 49 + /* 50 + * Internal helpers to access tructural elements of the device tree 51 + * blob (rather than for exaple reading integers from within property 52 + * values). We assume that we are either given a naturally aligned 53 + * address for the platform or if we are not, we are on a platform 54 + * where unaligned memory reads will be handled in a graceful manner. 55 + * If not the external helpers fdtXX_ld() from libfdt.h can be used 56 + * instead. 57 + */ 58 + static inline uint32_t fdt32_ld_(const fdt32_t *p) 59 + { 60 + return fdt32_to_cpu(*p); 61 + } 62 + 63 + static inline uint64_t fdt64_ld_(const fdt64_t *p) 64 + { 65 + return fdt64_to_cpu(*p); 66 + } 67 + 49 68 #define FDT_SW_MAGIC (~FDT_MAGIC) 50 69 51 70 /**********************************************************************/
+1 -1
scripts/dtc/livetree.c
··· 438 438 return fdt32_to_cpu(*((fdt32_t *)prop->val.val)); 439 439 } 440 440 441 - cell_t propval_cell_n(struct property *prop, int n) 441 + cell_t propval_cell_n(struct property *prop, unsigned int n) 442 442 { 443 443 assert(prop->val.len / sizeof(cell_t) >= n); 444 444 return fdt32_to_cpu(*((fdt32_t *)prop->val.val + n));
+1 -1
scripts/dtc/srcpos.c
··· 20 20 static struct search_path *search_path_head, **search_path_tail; 21 21 22 22 /* Detect infinite include recursion. */ 23 - #define MAX_SRCFILE_DEPTH (100) 23 + #define MAX_SRCFILE_DEPTH (200) 24 24 static int srcfile_depth; /* = 0 */ 25 25 26 26 static char *get_dirname(const char *path)
+2 -1
scripts/dtc/update-dtc-source.sh
··· 37 37 LIBFDT_SOURCE="fdt.c fdt.h fdt_addresses.c fdt_empty_tree.c \ 38 38 fdt_overlay.c fdt_ro.c fdt_rw.c fdt_strerror.c fdt_sw.c \ 39 39 fdt_wip.c libfdt.h libfdt_env.h libfdt_internal.h" 40 + FDTOVERLAY_SOURCE=fdtoverlay.c 40 41 41 42 get_last_dtc_version() { 42 43 git log --oneline scripts/dtc/ | grep 'upstream' | head -1 | sed -e 's/^.* \(.*\)/\1/' ··· 55 54 56 55 # Copy the files into the Linux tree 57 56 cd $DTC_LINUX_PATH 58 - for f in $DTC_SOURCE; do 57 + for f in $DTC_SOURCE $FDTOVERLAY_SOURCE; do 59 58 cp ${DTC_UPSTREAM_PATH}/${f} ${f} 60 59 git add ${f} 61 60 done
+1 -1
scripts/dtc/version_gen.h
··· 1 - #define DTC_VERSION "DTC 1.6.0-gcbca977e" 1 + #define DTC_VERSION "DTC 1.6.0-g183df9e9"
+3 -3
scripts/dtc/yamltree.c
··· 29 29 (emitter)->problem, __func__, __LINE__); \ 30 30 }) 31 31 32 - static void yaml_propval_int(yaml_emitter_t *emitter, struct marker *markers, char *data, int len, int width) 32 + static void yaml_propval_int(yaml_emitter_t *emitter, struct marker *markers, char *data, unsigned int len, int width) 33 33 { 34 34 yaml_event_t event; 35 35 void *tag; 36 - int off, start_offset = markers->offset; 36 + unsigned int off, start_offset = markers->offset; 37 37 38 38 switch(width) { 39 39 case 1: tag = "!u8"; break; ··· 112 112 static void yaml_propval(yaml_emitter_t *emitter, struct property *prop) 113 113 { 114 114 yaml_event_t event; 115 - int len = prop->val.len; 115 + unsigned int len = prop->val.len; 116 116 struct marker *m = prop->val.markers; 117 117 118 118 /* Emit the property name */