Merge tag 'x86_urgent_for_v5.17_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Borislav Petkov:

- Add another Intel CPU model to the list of CPUs supporting the
processor inventory unique number

- Allow writing to MCE thresholding sysfs files again - a previous
change had accidentally disabled it and no one noticed. Goes to show
how much is this stuff used

* tag 'x86_urgent_for_v5.17_rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN
x86/MCE/AMD: Allow thresholding interface updates after init

Changed files
+2 -1
arch
x86
kernel
cpu
+1 -1
arch/x86/kernel/cpu/mce/amd.c
··· 423 423 u32 hi, lo; 424 424 425 425 /* sysfs write might race against an offline operation */ 426 - if (this_cpu_read(threshold_banks)) 426 + if (!this_cpu_read(threshold_banks) && !tr->set_lvt_off) 427 427 return; 428 428 429 429 rdmsr(tr->b->address, lo, hi);
+1
arch/x86/kernel/cpu/mce/intel.c
··· 486 486 case INTEL_FAM6_BROADWELL_X: 487 487 case INTEL_FAM6_SKYLAKE_X: 488 488 case INTEL_FAM6_ICELAKE_X: 489 + case INTEL_FAM6_ICELAKE_D: 489 490 case INTEL_FAM6_SAPPHIRERAPIDS_X: 490 491 case INTEL_FAM6_XEON_PHI_KNL: 491 492 case INTEL_FAM6_XEON_PHI_KNM: