Merge branch 'merge' of master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc

* 'merge' of master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc:
[POWERPC] 85xx: Enable CONFIG_SERIAL_8250_SHARE_IRQ
[POWERPC] Select u-image as default image for Linkstation
[POWERPC] 83xx: Minor fixes for 834x_mds USB setup code
[POWERPC] Fix warning in powermac pci.c
[POWERPC] Fix warning in powermac feature.c
[POWERPC] Fix warning in prom_parse.c of_irq_map_oldworld()
[POWERPC] Celleb: bug fix caused by not casting pointer types
[POWERPC] Add missing newline in xmon help output
[POWERPC] No DEEPNAP on 970MP 1.0

+94 -30
+16
arch/powerpc/kernel/cputable.c
··· 225 .oprofile_type = PPC_OPROFILE_POWER4, 226 .platform = "ppc970", 227 }, 228 { /* PPC970MP */ 229 .pvr_mask = 0xffff0000, 230 .pvr_value = 0x00440000,
··· 225 .oprofile_type = PPC_OPROFILE_POWER4, 226 .platform = "ppc970", 227 }, 228 + { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 229 + .pvr_mask = 0xffffffff, 230 + .pvr_value = 0x00440100, 231 + .cpu_name = "PPC970MP", 232 + .cpu_features = CPU_FTRS_PPC970, 233 + .cpu_user_features = COMMON_USER_POWER4 | 234 + PPC_FEATURE_HAS_ALTIVEC_COMP, 235 + .icache_bsize = 128, 236 + .dcache_bsize = 128, 237 + .num_pmcs = 8, 238 + .cpu_setup = __setup_cpu_ppc970, 239 + .cpu_restore = __restore_cpu_ppc970, 240 + .oprofile_cpu_type = "ppc64/970MP", 241 + .oprofile_type = PPC_OPROFILE_POWER4, 242 + .platform = "ppc970", 243 + }, 244 { /* PPC970MP */ 245 .pvr_mask = 0xffff0000, 246 .pvr_value = 0x00440000,
+1 -1
arch/powerpc/kernel/prom_parse.c
··· 916 static int of_irq_map_oldworld(struct device_node *device, int index, 917 struct of_irq *out_irq) 918 { 919 - const u32 *ints; 920 int intlen; 921 922 /*
··· 916 static int of_irq_map_oldworld(struct device_node *device, int index, 917 struct of_irq *out_irq) 918 { 919 + const u32 *ints = NULL; 920 int intlen; 921 922 /*
+4 -4
arch/powerpc/platforms/83xx/mpc834x_mds.c
··· 55 struct device_node *np = NULL; 56 int port0_is_dr = 0; 57 58 - if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL) 59 port0_is_dr = 1; 60 - if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL){ 61 if (port0_is_dr) { 62 printk(KERN_WARNING 63 "There is only one USB port on PB board! \n"); ··· 103 return -1; 104 105 /* 106 - * if MDS board is plug into PIB board, 107 - * force to use the PHY on MDS board 108 */ 109 bcsr5 = in_8(bcsr_regs + 5); 110 if (!(bcsr5 & BCSR5_INT_USB))
··· 55 struct device_node *np = NULL; 56 int port0_is_dr = 0; 57 58 + if ((np = of_find_compatible_node(NULL, "usb", "fsl-usb2-dr")) != NULL) 59 port0_is_dr = 1; 60 + if ((np = of_find_compatible_node(NULL, "usb", "fsl-usb2-mph")) != NULL){ 61 if (port0_is_dr) { 62 printk(KERN_WARNING 63 "There is only one USB port on PB board! \n"); ··· 103 return -1; 104 105 /* 106 + * if Processor Board is plugged into PIB board, 107 + * force to use the PHY on Processor Board 108 */ 109 bcsr5 = in_8(bcsr_regs + 5); 110 if (!(bcsr5 & BCSR5_INT_USB))
+1
arch/powerpc/platforms/85xx/Kconfig
··· 47 bool 48 select PPC_UDBG_16550 49 select PPC_INDIRECT_PCI 50 default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC85xx_MDS 51 52 config PPC_INDIRECT_PCI_BE
··· 47 bool 48 select PPC_UDBG_16550 49 select PPC_INDIRECT_PCI 50 + select SERIAL_8250_SHARE_IRQ if SERIAL_8250 51 default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC85xx_MDS 52 53 config PPC_INDIRECT_PCI_BE
+61 -21
arch/powerpc/platforms/celleb/scc_epci.c
··· 43 44 #define iob() __asm__ __volatile__("eieio; sync":::"memory") 45 46 47 #if 0 /* test code for epci dummy read */ 48 static void celleb_epci_dummy_read(struct pci_dev *dev) 49 { 50 - void __iomem *epci_base; 51 struct device_node *node; 52 struct pci_controller *hose; 53 u32 val; ··· 81 if (!hose) 82 return; 83 84 - epci_base = hose->cfg_addr; 85 86 val = in_be32(epci_base + SCC_EPCI_WATRP); 87 iosync(); ··· 93 static inline void clear_and_disable_master_abort_interrupt( 94 struct pci_controller *hose) 95 { 96 - void __iomem *addr; 97 - addr = hose->cfg_addr + PCI_COMMAND; 98 - out_be32(addr, in_be32(addr) | (PCI_STATUS_REC_MASTER_ABORT << 16)); 99 } 100 101 static int celleb_epci_check_abort(struct pci_controller *hose, 102 - void __iomem *addr) 103 { 104 - void __iomem *reg, *epci_base; 105 u32 val; 106 107 iob(); 108 - epci_base = hose->cfg_addr; 109 110 reg = epci_base + PCI_COMMAND; 111 val = in_be32(reg); ··· 132 return PCIBIOS_SUCCESSFUL; 133 } 134 135 - static void __iomem *celleb_epci_make_config_addr(struct pci_controller *hose, 136 unsigned int devfn, int where) 137 { 138 - void __iomem *addr; 139 struct pci_bus *bus = hose->bus; 140 141 if (bus->self) 142 - addr = hose->cfg_data + 143 (((bus->number & 0xff) << 16) 144 | ((devfn & 0xff) << 8) 145 | (where & 0xff) 146 | 0x01000000); 147 else 148 - addr = hose->cfg_data + 149 (((devfn & 0xff) << 8) | (where & 0xff)); 150 151 pr_debug("EPCI: config_addr = 0x%p\n", addr); ··· 157 static int celleb_epci_read_config(struct pci_bus *bus, 158 unsigned int devfn, int where, int size, u32 * val) 159 { 160 - void __iomem *addr; 161 struct device_node *node; 162 struct pci_controller *hose; 163 ··· 167 node = (struct device_node *)bus->sysdata; 168 hose = pci_find_hose_for_OF_device(node); 169 170 - if (!hose->cfg_data) 171 return PCIBIOS_DEVICE_NOT_FOUND; 172 173 if (bus->number == hose->first_busno && devfn == 0) { 174 /* EPCI controller self */ 175 176 - addr = hose->cfg_addr + where; 177 178 switch (size) { 179 case 1: ··· 211 } 212 213 pr_debug("EPCI: " 214 - "addr=0x%lx, devfn=0x%x, where=0x%x, size=0x%x, val=0x%x\n", 215 addr, devfn, where, size, *val); 216 217 return celleb_epci_check_abort(hose, NULL); ··· 220 static int celleb_epci_write_config(struct pci_bus *bus, 221 unsigned int devfn, int where, int size, u32 val) 222 { 223 - void __iomem *addr; 224 struct device_node *node; 225 struct pci_controller *hose; 226 ··· 230 node = (struct device_node *)bus->sysdata; 231 hose = pci_find_hose_for_OF_device(node); 232 233 - if (!hose->cfg_data) 234 return PCIBIOS_DEVICE_NOT_FOUND; 235 236 if (bus->number == hose->first_busno && devfn == 0) { 237 /* EPCI controller self */ 238 239 - addr = hose->cfg_addr + where; 240 241 switch (size) { 242 case 1: ··· 286 static int __devinit celleb_epci_init(struct pci_controller *hose) 287 { 288 u32 val; 289 - void __iomem *reg, *epci_base; 290 int hwres = 0; 291 292 - epci_base = hose->cfg_addr; 293 294 /* PCI core reset(Internal bus and PCI clock) */ 295 reg = epci_base + SCC_EPCI_CKCTRL; ··· 409 struct resource r; 410 411 pr_debug("PCI: celleb_setup_epci()\n"); 412 413 if (of_address_to_resource(node, 0, &r)) 414 goto error;
··· 43 44 #define iob() __asm__ __volatile__("eieio; sync":::"memory") 45 46 + static inline volatile void __iomem *celleb_epci_get_epci_base( 47 + struct pci_controller *hose) 48 + { 49 + /* 50 + * Note: 51 + * Celleb epci uses cfg_addr as a base address for 52 + * epci control registers. 53 + */ 54 + 55 + return hose->cfg_addr; 56 + } 57 + 58 + static inline volatile void __iomem *celleb_epci_get_epci_cfg( 59 + struct pci_controller *hose) 60 + { 61 + /* 62 + * Note: 63 + * Celleb epci uses cfg_data as a base address for 64 + * configuration area for epci devices. 65 + */ 66 + 67 + return hose->cfg_data; 68 + } 69 70 #if 0 /* test code for epci dummy read */ 71 static void celleb_epci_dummy_read(struct pci_dev *dev) 72 { 73 + volatile void __iomem *epci_base; 74 struct device_node *node; 75 struct pci_controller *hose; 76 u32 val; ··· 58 if (!hose) 59 return; 60 61 + epci_base = celleb_epci_get_epci_base(hose); 62 63 val = in_be32(epci_base + SCC_EPCI_WATRP); 64 iosync(); ··· 70 static inline void clear_and_disable_master_abort_interrupt( 71 struct pci_controller *hose) 72 { 73 + volatile void __iomem *epci_base, *reg; 74 + epci_base = celleb_epci_get_epci_base(hose); 75 + reg = epci_base + PCI_COMMAND; 76 + out_be32(reg, in_be32(reg) | (PCI_STATUS_REC_MASTER_ABORT << 16)); 77 } 78 79 static int celleb_epci_check_abort(struct pci_controller *hose, 80 + volatile void __iomem *addr) 81 { 82 + volatile void __iomem *reg, *epci_base; 83 u32 val; 84 85 iob(); 86 + epci_base = celleb_epci_get_epci_base(hose); 87 88 reg = epci_base + PCI_COMMAND; 89 val = in_be32(reg); ··· 108 return PCIBIOS_SUCCESSFUL; 109 } 110 111 + static volatile void __iomem *celleb_epci_make_config_addr( 112 + struct pci_controller *hose, 113 unsigned int devfn, int where) 114 { 115 + volatile void __iomem *addr; 116 struct pci_bus *bus = hose->bus; 117 118 if (bus->self) 119 + addr = celleb_epci_get_epci_cfg(hose) + 120 (((bus->number & 0xff) << 16) 121 | ((devfn & 0xff) << 8) 122 | (where & 0xff) 123 | 0x01000000); 124 else 125 + addr = celleb_epci_get_epci_cfg(hose) + 126 (((devfn & 0xff) << 8) | (where & 0xff)); 127 128 pr_debug("EPCI: config_addr = 0x%p\n", addr); ··· 132 static int celleb_epci_read_config(struct pci_bus *bus, 133 unsigned int devfn, int where, int size, u32 * val) 134 { 135 + volatile void __iomem *epci_base, *addr; 136 struct device_node *node; 137 struct pci_controller *hose; 138 ··· 142 node = (struct device_node *)bus->sysdata; 143 hose = pci_find_hose_for_OF_device(node); 144 145 + if (!celleb_epci_get_epci_cfg(hose)) 146 return PCIBIOS_DEVICE_NOT_FOUND; 147 148 if (bus->number == hose->first_busno && devfn == 0) { 149 /* EPCI controller self */ 150 151 + epci_base = celleb_epci_get_epci_base(hose); 152 + addr = epci_base + where; 153 154 switch (size) { 155 case 1: ··· 185 } 186 187 pr_debug("EPCI: " 188 + "addr=0x%p, devfn=0x%x, where=0x%x, size=0x%x, val=0x%x\n", 189 addr, devfn, where, size, *val); 190 191 return celleb_epci_check_abort(hose, NULL); ··· 194 static int celleb_epci_write_config(struct pci_bus *bus, 195 unsigned int devfn, int where, int size, u32 val) 196 { 197 + volatile void __iomem *epci_base, *addr; 198 struct device_node *node; 199 struct pci_controller *hose; 200 ··· 204 node = (struct device_node *)bus->sysdata; 205 hose = pci_find_hose_for_OF_device(node); 206 207 + 208 + if (!celleb_epci_get_epci_cfg(hose)) 209 return PCIBIOS_DEVICE_NOT_FOUND; 210 211 if (bus->number == hose->first_busno && devfn == 0) { 212 /* EPCI controller self */ 213 214 + epci_base = celleb_epci_get_epci_base(hose); 215 + addr = epci_base + where; 216 217 switch (size) { 218 case 1: ··· 258 static int __devinit celleb_epci_init(struct pci_controller *hose) 259 { 260 u32 val; 261 + volatile void __iomem *reg, *epci_base; 262 int hwres = 0; 263 264 + epci_base = celleb_epci_get_epci_base(hose); 265 266 /* PCI core reset(Internal bus and PCI clock) */ 267 reg = epci_base + SCC_EPCI_CKCTRL; ··· 381 struct resource r; 382 383 pr_debug("PCI: celleb_setup_epci()\n"); 384 + 385 + /* 386 + * Note: 387 + * Celleb epci uses cfg_addr and cfg_data member of 388 + * pci_controller structure in irregular way. 389 + * 390 + * cfg_addr is used to map for control registers of 391 + * celleb epci. 392 + * 393 + * cfg_data is used for configuration area of devices 394 + * on Celleb epci buses. 395 + */ 396 397 if (of_address_to_resource(node, 0, &r)) 398 goto error;
+1
arch/powerpc/platforms/embedded6xx/Kconfig
··· 79 select MPIC 80 select FSL_SOC 81 select PPC_UDBG_16550 if SERIAL_8250 82 help 83 Select LINKSTATION if configuring for one of PPC- (MPC8241) 84 based NAS systems from Buffalo Technology. So far only
··· 79 select MPIC 80 select FSL_SOC 81 select PPC_UDBG_16550 if SERIAL_8250 82 + select DEFAULT_UIMAGE 83 help 84 Select LINKSTATION if configuring for one of PPC- (MPC8241) 85 based NAS systems from Buffalo Technology. So far only
+4 -1
arch/powerpc/platforms/powermac/feature.c
··· 810 unsigned long flags; 811 struct pci_dev *pdev = NULL; 812 u8 pbus, pid; 813 814 if (uninorth_rev < 0x24) 815 return -ENODEV; ··· 829 pdev = pci_find_slot(pbus, pid); 830 if (pdev == NULL) 831 return 0; 832 - pci_enable_device(pdev); 833 pci_set_master(pdev); 834 } 835 return 0;
··· 810 unsigned long flags; 811 struct pci_dev *pdev = NULL; 812 u8 pbus, pid; 813 + int rc; 814 815 if (uninorth_rev < 0x24) 816 return -ENODEV; ··· 828 pdev = pci_find_slot(pbus, pid); 829 if (pdev == NULL) 830 return 0; 831 + rc = pci_enable_device(pdev); 832 + if (rc) 833 + return rc; 834 pci_set_master(pdev); 835 } 836 return 0;
+5 -2
arch/powerpc/platforms/powermac/pci.c
··· 1191 * -- BenH 1192 */ 1193 for_each_pci_dev(dev) { 1194 - if ((dev->class >> 16) == PCI_BASE_CLASS_STORAGE) 1195 - pci_enable_device(dev); 1196 } 1197 #endif /* CONFIG_BLK_DEV_IDE */ 1198
··· 1191 * -- BenH 1192 */ 1193 for_each_pci_dev(dev) { 1194 + if ((dev->class >> 16) != PCI_BASE_CLASS_STORAGE) 1195 + continue; 1196 + if (pci_enable_device(dev)) 1197 + printk(KERN_WARNING 1198 + "pci: Failed to enable %s\n", pci_name(dev)); 1199 } 1200 #endif /* CONFIG_BLK_DEV_IDE */ 1201
+1 -1
arch/powerpc/xmon/xmon.c
··· 218 " ss stop execution on all spus\n\ 219 sr restore execution on stopped spus\n\ 220 sf # dump spu fields for spu # (in hex)\n\ 221 - sd # dump spu local store for spu # (in hex)\ 222 sdi # disassemble spu local store for spu # (in hex)\n" 223 #endif 224 " S print special registers\n\
··· 218 " ss stop execution on all spus\n\ 219 sr restore execution on stopped spus\n\ 220 sf # dump spu fields for spu # (in hex)\n\ 221 + sd # dump spu local store for spu # (in hex)\n\ 222 sdi # disassemble spu local store for spu # (in hex)\n" 223 #endif 224 " S print special registers\n\