tjh.dev / kernel
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ntb: intel: add GNR support for Intel PCIe gen5 NTB

Add Intel Granite Rapids NTB PCI device ID and related enabling.
Expectation is same hardware interface as Saphire Rapids Xeon platforms.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>
Acked-by: Allen Hubbe <allenbh@gmail.com>
Signed-off-by: Jon Mason <jdmason@kudzu.us>

authored by

Dave Jiang and committed by
Jon Mason a914fc52 45e1058b

+16 -5
+8 -4
drivers/ntb/hw/intel/ntb_hw_gen1.c
··· 763 763 return ndev_ntb_debugfs_read(filp, ubuf, count, offp); 764 764 else if (pdev_is_gen3(ndev->ntb.pdev)) 765 765 return ndev_ntb3_debugfs_read(filp, ubuf, count, offp); 766 - else if (pdev_is_gen4(ndev->ntb.pdev)) 766 + else if (pdev_is_gen4(ndev->ntb.pdev) || pdev_is_gen5(ndev->ntb.pdev)) 767 767 return ndev_ntb4_debugfs_read(filp, ubuf, count, offp); 768 768 769 769 return -ENXIO; ··· 1874 1874 rc = gen3_init_dev(ndev); 1875 1875 if (rc) 1876 1876 goto err_init_dev; 1877 - } else if (pdev_is_gen4(pdev)) { 1877 + } else if (pdev_is_gen4(pdev) || pdev_is_gen5(pdev)) { 1878 1878 ndev->ntb.ops = &intel_ntb4_ops; 1879 1879 rc = intel_ntb_init_pci(ndev, pdev); 1880 1880 if (rc) ··· 1904 1904 1905 1905 err_register: 1906 1906 ndev_deinit_debugfs(ndev); 1907 - if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev) || pdev_is_gen4(pdev)) 1907 + if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev) || 1908 + pdev_is_gen4(pdev) || pdev_is_gen5(pdev)) 1908 1909 xeon_deinit_dev(ndev); 1909 1910 err_init_dev: 1910 1911 intel_ntb_deinit_pci(ndev); ··· 1921 1920 1922 1921 ntb_unregister_device(&ndev->ntb); 1923 1922 ndev_deinit_debugfs(ndev); 1924 - if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev) || pdev_is_gen4(pdev)) 1923 + if (pdev_is_gen1(pdev) || pdev_is_gen3(pdev) || 1924 + pdev_is_gen4(pdev) || pdev_is_gen5(pdev)) 1925 1925 xeon_deinit_dev(ndev); 1926 1926 intel_ntb_deinit_pci(ndev); 1927 1927 kfree(ndev); ··· 2049 2047 2050 2048 /* GEN4 */ 2051 2049 {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_ICX)}, 2050 + /* GEN5 PCIe */ 2051 + {PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_NTB_B2B_GNR)}, 2052 2052 {0} 2053 2053 }; 2054 2054 MODULE_DEVICE_TABLE(pci, intel_ntb_pci_tbl);
+1 -1
drivers/ntb/hw/intel/ntb_hw_gen4.c
··· 197 197 ppd1 = ioread32(ndev->self_mmio + GEN4_PPD1_OFFSET); 198 198 if (pdev_is_ICX(pdev)) 199 199 ndev->ntb.topo = gen4_ppd_topo(ndev, ppd1); 200 - else if (pdev_is_SPR(pdev)) 200 + else if (pdev_is_SPR(pdev) || pdev_is_gen5(pdev)) 201 201 ndev->ntb.topo = spr_ppd_topo(ndev, ppd1); 202 202 dev_dbg(&pdev->dev, "ppd %#x topo %s\n", ppd1, 203 203 ntb_topo_string(ndev->ntb.topo));
+7
drivers/ntb/hw/intel/ntb_hw_intel.h
··· 70 70 #define PCI_DEVICE_ID_INTEL_NTB_SS_BDX 0x6F0F 71 71 #define PCI_DEVICE_ID_INTEL_NTB_B2B_SKX 0x201C 72 72 #define PCI_DEVICE_ID_INTEL_NTB_B2B_ICX 0x347e 73 + #define PCI_DEVICE_ID_INTEL_NTB_B2B_GNR 0x0db4 73 74 74 75 /* Ntb control and link status */ 75 76 #define NTB_CTL_CFG_LOCK BIT(0) ··· 229 228 230 229 return 0; 231 230 } 231 + 232 + static inline int pdev_is_gen5(struct pci_dev *pdev) 233 + { 234 + return pdev->device == PCI_DEVICE_ID_INTEL_NTB_B2B_GNR; 235 + } 236 + 232 237 #endif