Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Device tree changes for omaps for v4.10 merge window:

- A series of patches to configure tps65217 PMIC interrupts for
power button, charger and usb and use them on am335x

- Configure EEPROM, LEDs and USR1 button for omap5 boards

- Add tscadc DMA properites for am33xx and am4372

- Configure baltos-ir5221 both musb channels to host mode

- Configure internal and external RTC clocks for am335x boards

- Don't reset gpio3 block on baltos

- Remove pinmux for dra72-evm for erratum i869, fix the regulators
and seprate out tps65917 support

- Add dra718-evm support

- Add minimal droid 4 xt894 support

* tag 'omap-for-v4.10/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (22 commits)
ARM: dts: Add minimal support for motorola droid 4 xt894
ARM: dts: Add support for dra718-evm
ARM: dts: dra72: Add separate dtsi for tps65917
ARM: dts: dra72-evm: Fix modelling of regulators
ARM: dts: dra72-evm: Remove pinmux configurations for erratum i869
ARM: dts: am335x-baltos: don't reset gpio3 block
ARM: dts: AM335X-evmsk: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-evm: Add the internal and external clock nodes for rtc
ARM: dts: AM335X-bone-common: Add the internal and external clock nodes for rtc
ARM: dts: am335x-baltos-ir5221: use both musb channels in host mode
ARM: dts: am4372: add DMA properties for tscadc
ARM: dts: am33xx: add DMA properties for tscadc
ARM: dts: omap5 uevm: add USR1 button
ARM: dts: omap5 uevm: add LEDs
ARM: dts: omap5 uevm: add EEPROM
ARM: dts: am335x: Add the power button interrupt
ARM: dts: am335x: Add the charger interrupt
dt-bindings: mfd: Provide human readable defines for TPS65217 interrupts
ARM: dts: am335x: Support the PMIC interrupt
ARM: dts: tps65217: Add the power button device
...

Signed-off-by: Olof Johansson <olof@lixom.net>

+787 -326
+3 -1
arch/arm/boot/dts/Makefile
··· 571 571 am335x-sl50.dtb \ 572 572 am335x-wega-rdk.dtb 573 573 dtb-$(CONFIG_ARCH_OMAP4) += \ 574 + omap4-droid4-xt894.dtb \ 574 575 omap4-duovero-parlor.dtb \ 575 576 omap4-kc1.dtb \ 576 577 omap4-panda.dtb \ ··· 601 600 am572x-idk.dtb \ 602 601 dra7-evm.dtb \ 603 602 dra72-evm.dtb \ 604 - dra72-evm-revc.dtb 603 + dra72-evm-revc.dtb \ 604 + dra71-evm.dtb 605 605 dtb-$(CONFIG_ARCH_ORION5X) += \ 606 606 orion5x-kuroboxpro.dtb \ 607 607 orion5x-lacie-d2-network.dtb \
+1 -1
arch/arm/boot/dts/am335x-baltos-ir5221.dts
··· 114 114 115 115 &usb1 { 116 116 status = "okay"; 117 - dr_mode = "otg"; 117 + dr_mode = "host"; 118 118 }; 119 119 120 120 &cpsw_emac0 {
+4
arch/arm/boot/dts/am335x-baltos.dtsi
··· 406 406 &gpio0 { 407 407 ti,no-reset-on-init; 408 408 }; 409 + 410 + &gpio3 { 411 + ti,no-reset-on-init; 412 + };
+22
arch/arm/boot/dts/am335x-bone-common.dtsi
··· 6 6 * published by the Free Software Foundation. 7 7 */ 8 8 9 + #include <dt-bindings/mfd/tps65217.h> 10 + 9 11 / { 10 12 cpus { 11 13 cpu@0 { ··· 312 310 * by the hardware problems. (Tip: double-check by performing a current 313 311 * measurement after shutdown: it should be less than 1 mA.) 314 312 */ 313 + 314 + interrupts = <7>; /* NMI */ 315 + interrupt-parent = <&intc>; 316 + 315 317 ti,pmic-shutdown-controller; 318 + 319 + charger { 320 + interrupts = <TPS65217_IRQ_AC>, <TPS65217_IRQ_USB>; 321 + interrupts-names = "AC", "USB"; 322 + status = "okay"; 323 + }; 324 + 325 + pwrbutton { 326 + interrupts = <TPS65217_IRQ_PB>; 327 + status = "okay"; 328 + }; 316 329 317 330 regulators { 318 331 dcdc1_reg: regulator@0 { ··· 409 392 410 393 &sham { 411 394 status = "okay"; 395 + }; 396 + 397 + &rtc { 398 + clocks = <&clk_32768_ck>, <&clkdiv32k_ick>; 399 + clock-names = "ext-clk", "int-clk"; 412 400 };
+5
arch/arm/boot/dts/am335x-evm.dts
··· 783 783 pinctrl-names = "default"; 784 784 pinctrl-0 = <&dcan1_pins_default>; 785 785 }; 786 + 787 + &rtc { 788 + clocks = <&clk_32768_ck>, <&clkdiv32k_ick>; 789 + clock-names = "ext-clk", "int-clk"; 790 + };
+5
arch/arm/boot/dts/am335x-evmsk.dts
··· 715 715 716 716 blue-and-red-wiring = "crossed"; 717 717 }; 718 + 719 + &rtc { 720 + clocks = <&clk_32768_ck>, <&clkdiv32k_ick>; 721 + clock-names = "ext-clk", "int-clk"; 722 + };
+4
arch/arm/boot/dts/am33xx.dtsi
··· 507 507 interrupts = <75 508 508 76>; 509 509 ti,hwmods = "rtc"; 510 + clocks = <&clkdiv32k_ick>; 511 + clock-names = "int-clk"; 510 512 }; 511 513 512 514 spi0: spi@48030000 { ··· 859 857 interrupts = <16>; 860 858 ti,hwmods = "adc_tsc"; 861 859 status = "disabled"; 860 + dmas = <&edma 53 0>, <&edma 57 0>; 861 + dma-names = "fifo0", "fifo1"; 862 862 863 863 tsc { 864 864 compatible = "ti,am3359-tsc";
+2
arch/arm/boot/dts/am4372.dtsi
··· 872 872 clocks = <&adc_tsc_fck>; 873 873 clock-names = "fck"; 874 874 status = "disabled"; 875 + dmas = <&edma 53 0>, <&edma 57 0>; 876 + dma-names = "fifo0", "fifo1"; 875 877 876 878 tsc { 877 879 compatible = "ti,am3359-tsc";
+230
arch/arm/boot/dts/dra71-evm.dts
··· 1 + /* 2 + * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License version 2 as 6 + * published by the Free Software Foundation. 7 + */ 8 + 9 + #include "dra72-evm-common.dtsi" 10 + #include <dt-bindings/net/ti-dp83867.h> 11 + 12 + / { 13 + compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7"; 14 + model = "TI DRA718 EVM"; 15 + 16 + memory { 17 + device_type = "memory"; 18 + reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */ 19 + }; 20 + 21 + vpo_sd_1v8_3v3: gpio-regulator-TPS74801 { 22 + compatible = "regulator-gpio"; 23 + 24 + regulator-name = "vddshv8"; 25 + regulator-min-microvolt = <1800000>; 26 + regulator-max-microvolt = <3000000>; 27 + regulator-boot-on; 28 + vin-supply = <&evm_5v0>; 29 + 30 + gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>; 31 + states = <1800000 0x0 32 + 3000000 0x1>; 33 + }; 34 + 35 + poweroff: gpio-poweroff { 36 + compatible = "gpio-poweroff"; 37 + gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>; 38 + input; 39 + }; 40 + }; 41 + 42 + &i2c1 { 43 + status = "okay"; 44 + clock-frequency = <400000>; 45 + 46 + lp8733: lp8733@60 { 47 + compatible = "ti,lp8733"; 48 + reg = <0x60>; 49 + 50 + buck0-in-supply =<&vsys_3v3>; 51 + buck1-in-supply =<&vsys_3v3>; 52 + ldo0-in-supply =<&evm_5v0>; 53 + ldo1-in-supply =<&evm_5v0>; 54 + 55 + lp8733_regulators: regulators { 56 + lp8733_buck0_reg: buck0 { 57 + /* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */ 58 + regulator-name = "lp8733-buck0"; 59 + regulator-min-microvolt = <850000>; 60 + regulator-max-microvolt = <1250000>; 61 + regulator-always-on; 62 + regulator-boot-on; 63 + }; 64 + 65 + lp8733_buck1_reg: buck1 { 66 + /* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */ 67 + regulator-name = "lp8733-buck1"; 68 + regulator-min-microvolt = <850000>; 69 + regulator-max-microvolt = <1250000>; 70 + regulator-boot-on; 71 + regulator-always-on; 72 + }; 73 + 74 + lp8733_ldo0_reg: ldo0 { 75 + /* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */ 76 + regulator-name = "lp8733-ldo0"; 77 + regulator-min-microvolt = <3300000>; 78 + regulator-max-microvolt = <3300000>; 79 + }; 80 + 81 + lp8733_ldo1_reg: ldo1 { 82 + /* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */ 83 + regulator-name = "lp8733-ldo1"; 84 + regulator-min-microvolt = <3300000>; 85 + regulator-max-microvolt = <3300000>; 86 + regulator-always-on; 87 + regulator-boot-on; 88 + }; 89 + }; 90 + }; 91 + 92 + lp8732: lp8732@61 { 93 + compatible = "ti,lp8732"; 94 + reg = <0x61>; 95 + 96 + buck0-in-supply =<&vsys_3v3>; 97 + buck1-in-supply =<&vsys_3v3>; 98 + ldo0-in-supply =<&vsys_3v3>; 99 + ldo1-in-supply =<&vsys_3v3>; 100 + 101 + lp8732_regulators: regulators { 102 + lp8732_buck0_reg: buck0 { 103 + /* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */ 104 + regulator-name = "lp8732-buck0"; 105 + regulator-min-microvolt = <1800000>; 106 + regulator-max-microvolt = <1800000>; 107 + regulator-always-on; 108 + regulator-boot-on; 109 + }; 110 + 111 + lp8732_buck1_reg: buck1 { 112 + /* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */ 113 + regulator-name = "lp8732-buck1"; 114 + regulator-min-microvolt = <1350000>; 115 + regulator-max-microvolt = <1350000>; 116 + regulator-boot-on; 117 + regulator-always-on; 118 + }; 119 + 120 + lp8732_ldo0_reg: ldo0 { 121 + /* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */ 122 + regulator-name = "lp8732-ldo0"; 123 + regulator-min-microvolt = <1800000>; 124 + regulator-max-microvolt = <1800000>; 125 + regulator-boot-on; 126 + regulator-always-on; 127 + }; 128 + 129 + lp8732_ldo1_reg: ldo1 { 130 + /* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */ 131 + regulator-name = "lp8732-ldo1"; 132 + regulator-min-microvolt = <1800000>; 133 + regulator-max-microvolt = <1800000>; 134 + regulator-always-on; 135 + regulator-boot-on; 136 + }; 137 + }; 138 + }; 139 + }; 140 + 141 + &pcf_gpio_21 { 142 + interrupt-parent = <&gpio7>; 143 + interrupts = <31 IRQ_TYPE_EDGE_FALLING>; 144 + }; 145 + 146 + &pcf_hdmi { 147 + p0 { 148 + /* 149 + * PM_OEn to High: Disable routing I2C3 to PM_I2C 150 + * With this PM_SEL(p3) should not matter 151 + */ 152 + gpio-hog; 153 + gpios = <0 GPIO_ACTIVE_LOW>; 154 + output-high; 155 + line-name = "pm_oe_n"; 156 + }; 157 + }; 158 + 159 + &mmc1 { 160 + vmmc_aux-supply = <&vpo_sd_1v8_3v3>; 161 + }; 162 + 163 + &mac { 164 + mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>, 165 + <&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */ 166 + <&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */ 167 + dual_emac; 168 + }; 169 + 170 + &cpsw_emac0 { 171 + phy_id = <&davinci_mdio>, <2>; 172 + phy-mode = "rgmii-id"; 173 + dual_emac_res_vlan = <1>; 174 + }; 175 + 176 + &cpsw_emac1 { 177 + phy_id = <&davinci_mdio>, <3>; 178 + phy-mode = "rgmii-id"; 179 + dual_emac_res_vlan = <2>; 180 + }; 181 + 182 + &davinci_mdio { 183 + dp83867_0: ethernet-phy@2 { 184 + reg = <2>; 185 + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 186 + ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 187 + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 188 + ti,impedance-control = <0x1f>; 189 + }; 190 + 191 + dp83867_1: ethernet-phy@3 { 192 + reg = <3>; 193 + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>; 194 + ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>; 195 + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>; 196 + ti,impedance-control = <0x1f>; 197 + }; 198 + }; 199 + 200 + /* No Sata on this device */ 201 + &sata_phy { 202 + status = "disabled"; 203 + }; 204 + 205 + &sata { 206 + status = "disabled"; 207 + }; 208 + 209 + /* No RTC on this device */ 210 + &rtc { 211 + status = "disabled"; 212 + }; 213 + 214 + &usb2_phy1 { 215 + phy-supply = <&lp8733_ldo1_reg>; 216 + }; 217 + 218 + &usb2_phy2 { 219 + phy-supply = <&lp8733_ldo1_reg>; 220 + }; 221 + 222 + &dss { 223 + /* Supplied by VDA_1V8_PLL */ 224 + vdda_video-supply = <&lp8732_ldo0_reg>; 225 + }; 226 + 227 + &hdmi { 228 + /* Supplied by VDA_1V8_PHY */ 229 + vdda_video-supply = <&lp8732_ldo1_reg>; 230 + };
+39 -309
arch/arm/boot/dts/dra72-evm-common.dtsi
··· 18 18 display0 = &hdmi0; 19 19 }; 20 20 21 + evm_12v0: fixedregulator-evm12v0 { 22 + /* main supply */ 23 + compatible = "regulator-fixed"; 24 + regulator-name = "evm_12v0"; 25 + regulator-min-microvolt = <12000000>; 26 + regulator-max-microvolt = <12000000>; 27 + regulator-always-on; 28 + regulator-boot-on; 29 + }; 30 + 31 + evm_5v0: fixedregulator-evm5v0 { 32 + /* Output 1 of TPS43351QDAPRQ1 on dra72-evm */ 33 + /* Output 1 of LM5140QRWGTQ1 on dra71-evm */ 34 + compatible = "regulator-fixed"; 35 + regulator-name = "evm_5v0"; 36 + regulator-min-microvolt = <5000000>; 37 + regulator-max-microvolt = <5000000>; 38 + vin-supply = <&evm_12v0>; 39 + regulator-always-on; 40 + regulator-boot-on; 41 + }; 42 + 43 + vsys_3v3: fixedregulator-vsys3v3 { 44 + /* Output 2 of TPS43351QDAPRQ1 on dra72-evm */ 45 + /* Output 2 of LM5140QRWGTQ1 on dra71-evm */ 46 + compatible = "regulator-fixed"; 47 + regulator-name = "vsys_3v3"; 48 + regulator-min-microvolt = <3300000>; 49 + regulator-max-microvolt = <3300000>; 50 + vin-supply = <&evm_12v0>; 51 + regulator-always-on; 52 + regulator-boot-on; 53 + }; 54 + 21 55 evm_3v3_sw: fixedregulator-evm_3v3 { 56 + /* TPS22965DSG */ 22 57 compatible = "regulator-fixed"; 23 58 regulator-name = "evm_3v3"; 24 59 regulator-min-microvolt = <3300000>; 25 60 regulator-max-microvolt = <3300000>; 61 + vin-supply = <&vsys_3v3>; 62 + regulator-always-on; 63 + regulator-boot-on; 26 64 }; 27 65 28 66 aic_dvdd: fixedregulator-aic_dvdd { ··· 77 39 regulator-name = "evm_3v3_sd"; 78 40 regulator-min-microvolt = <3300000>; 79 41 regulator-max-microvolt = <3300000>; 42 + vin-supply = <&evm_3v3_sw>; 80 43 enable-active-high; 81 44 gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>; 82 45 }; ··· 107 68 108 69 tpd12s015: encoder { 109 70 compatible = "ti,tpd12s015"; 110 - 111 - pinctrl-names = "default"; 112 - pinctrl-0 = <&tpd12s015_pins>; 113 71 114 72 gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */ 115 73 <&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */ ··· 170 134 }; 171 135 172 136 &dra7_pmx_core { 173 - i2c1_pins: pinmux_i2c1_pins { 174 - pinctrl-single,pins = < 175 - DRA7XX_CORE_IOPAD(0x3800, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ 176 - DRA7XX_CORE_IOPAD(0x3804, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ 177 - >; 178 - }; 179 - 180 - i2c5_pins: pinmux_i2c5_pins { 181 - pinctrl-single,pins = < 182 - DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */ 183 - DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */ 184 - >; 185 - }; 186 - 187 - i2c5_pins: pinmux_i2c5_pins { 188 - pinctrl-single,pins = < 189 - DRA7XX_CORE_IOPAD(0x36b4, PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */ 190 - DRA7XX_CORE_IOPAD(0x36b8, PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */ 191 - >; 192 - }; 193 - 194 - nand_default: nand_default { 195 - pinctrl-single,pins = < 196 - DRA7XX_CORE_IOPAD(0x3400, PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */ 197 - DRA7XX_CORE_IOPAD(0x3404, PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */ 198 - DRA7XX_CORE_IOPAD(0x3408, PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */ 199 - DRA7XX_CORE_IOPAD(0x340c, PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */ 200 - DRA7XX_CORE_IOPAD(0x3410, PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */ 201 - DRA7XX_CORE_IOPAD(0x3414, PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */ 202 - DRA7XX_CORE_IOPAD(0x3418, PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */ 203 - DRA7XX_CORE_IOPAD(0x341c, PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */ 204 - DRA7XX_CORE_IOPAD(0x3420, PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */ 205 - DRA7XX_CORE_IOPAD(0x3424, PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */ 206 - DRA7XX_CORE_IOPAD(0x3428, PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */ 207 - DRA7XX_CORE_IOPAD(0x342c, PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */ 208 - DRA7XX_CORE_IOPAD(0x3430, PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */ 209 - DRA7XX_CORE_IOPAD(0x3434, PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */ 210 - DRA7XX_CORE_IOPAD(0x3438, PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */ 211 - DRA7XX_CORE_IOPAD(0x343c, PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */ 212 - DRA7XX_CORE_IOPAD(0x34b4, PIN_OUTPUT | MUX_MODE0) /* gpmc_cs0 */ 213 - DRA7XX_CORE_IOPAD(0x34c4, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */ 214 - DRA7XX_CORE_IOPAD(0x34cc, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */ 215 - DRA7XX_CORE_IOPAD(0x34c8, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */ 216 - DRA7XX_CORE_IOPAD(0x34d0, PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0 */ 217 - DRA7XX_CORE_IOPAD(0x34d8, PIN_INPUT | MUX_MODE0) /* gpmc_wait0 */ 218 - >; 219 - }; 220 - 221 - usb1_pins: pinmux_usb1_pins { 222 - pinctrl-single,pins = < 223 - DRA7XX_CORE_IOPAD(0x3680, PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ 224 - >; 225 - }; 226 - 227 - usb2_pins: pinmux_usb2_pins { 228 - pinctrl-single,pins = < 229 - DRA7XX_CORE_IOPAD(0x3684, PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */ 230 - >; 231 - }; 232 - 233 - tps65917_pins_default: tps65917_pins_default { 234 - pinctrl-single,pins = < 235 - DRA7XX_CORE_IOPAD(0x3824, PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */ 236 - >; 237 - }; 238 - 239 137 mmc1_pins_default: mmc1_pins_default { 240 138 pinctrl-single,pins = < 241 139 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */ ··· 210 240 DRA7XX_CORE_IOPAD(0x3818, MUX_MODE15 | PULL_UP) /* wakeup0.off */ 211 241 >; 212 242 }; 213 - 214 - hdmi_pins: pinmux_hdmi_pins { 215 - pinctrl-single,pins = < 216 - DRA7XX_CORE_IOPAD(0x3808, PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */ 217 - DRA7XX_CORE_IOPAD(0x380c, PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */ 218 - >; 219 - }; 220 - 221 - tpd12s015_pins: pinmux_tpd12s015_pins { 222 - pinctrl-single,pins = < 223 - DRA7XX_CORE_IOPAD(0x37b8, PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */ 224 - >; 225 - }; 226 - 227 - atl_pins: pinmux_atl_pins { 228 - pinctrl-single,pins = < 229 - DRA7XX_CORE_IOPAD(0x3698, PIN_OUTPUT | MUX_MODE5) /* xref_clk1.atl_clk1 */ 230 - DRA7XX_CORE_IOPAD(0x369c, PIN_OUTPUT | MUX_MODE5) /* xref_clk2.atl_clk2 */ 231 - >; 232 - }; 233 - 234 - mcasp3_pins: pinmux_mcasp3_pins { 235 - pinctrl-single,pins = < 236 - DRA7XX_CORE_IOPAD(0x3724, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx */ 237 - DRA7XX_CORE_IOPAD(0x3728, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx */ 238 - DRA7XX_CORE_IOPAD(0x372c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0 */ 239 - DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1 */ 240 - >; 241 - }; 242 - 243 - mcasp3_sleep_pins: pinmux_mcasp3_sleep_pins { 244 - pinctrl-single,pins = < 245 - DRA7XX_CORE_IOPAD(0x3724, PIN_INPUT_PULLDOWN | MUX_MODE15) 246 - DRA7XX_CORE_IOPAD(0x3728, PIN_INPUT_PULLDOWN | MUX_MODE15) 247 - DRA7XX_CORE_IOPAD(0x372c, PIN_INPUT_PULLDOWN | MUX_MODE15) 248 - DRA7XX_CORE_IOPAD(0x3730, PIN_INPUT_PULLDOWN | MUX_MODE15) 249 - >; 250 - }; 251 243 }; 252 244 253 245 &i2c1 { 254 246 status = "okay"; 255 - pinctrl-names = "default"; 256 - pinctrl-0 = <&i2c1_pins>; 257 247 clock-frequency = <400000>; 258 - 259 - tps65917: tps65917@58 { 260 - compatible = "ti,tps65917"; 261 - reg = <0x58>; 262 - 263 - pinctrl-names = "default"; 264 - pinctrl-0 = <&tps65917_pins_default>; 265 - 266 - interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ 267 - interrupt-controller; 268 - #interrupt-cells = <2>; 269 - 270 - ti,system-power-controller; 271 - 272 - tps65917_pmic { 273 - compatible = "ti,tps65917-pmic"; 274 - 275 - tps65917_regulators: regulators { 276 - smps1_reg: smps1 { 277 - /* VDD_MPU */ 278 - regulator-name = "smps1"; 279 - regulator-min-microvolt = <850000>; 280 - regulator-max-microvolt = <1250000>; 281 - regulator-always-on; 282 - regulator-boot-on; 283 - }; 284 - 285 - smps2_reg: smps2 { 286 - /* VDD_CORE */ 287 - regulator-name = "smps2"; 288 - regulator-min-microvolt = <850000>; 289 - regulator-max-microvolt = <1150000>; 290 - regulator-boot-on; 291 - regulator-always-on; 292 - }; 293 - 294 - smps3_reg: smps3 { 295 - /* VDD_GPU IVA DSPEVE */ 296 - regulator-name = "smps3"; 297 - regulator-min-microvolt = <850000>; 298 - regulator-max-microvolt = <1250000>; 299 - regulator-boot-on; 300 - regulator-always-on; 301 - }; 302 - 303 - smps4_reg: smps4 { 304 - /* VDDS1V8 */ 305 - regulator-name = "smps4"; 306 - regulator-min-microvolt = <1800000>; 307 - regulator-max-microvolt = <1800000>; 308 - regulator-always-on; 309 - regulator-boot-on; 310 - }; 311 - 312 - smps5_reg: smps5 { 313 - /* VDD_DDR */ 314 - regulator-name = "smps5"; 315 - regulator-min-microvolt = <1350000>; 316 - regulator-max-microvolt = <1350000>; 317 - regulator-boot-on; 318 - regulator-always-on; 319 - }; 320 - 321 - ldo1_reg: ldo1 { 322 - /* LDO1_OUT --> SDIO */ 323 - regulator-name = "ldo1"; 324 - regulator-min-microvolt = <1800000>; 325 - regulator-max-microvolt = <3300000>; 326 - regulator-always-on; 327 - regulator-boot-on; 328 - regulator-allow-bypass; 329 - }; 330 - 331 - ldo3_reg: ldo3 { 332 - /* VDDA_1V8_PHY */ 333 - regulator-name = "ldo3"; 334 - regulator-min-microvolt = <1800000>; 335 - regulator-max-microvolt = <1800000>; 336 - regulator-boot-on; 337 - regulator-always-on; 338 - }; 339 - 340 - ldo5_reg: ldo5 { 341 - /* VDDA_1V8_PLL */ 342 - regulator-name = "ldo5"; 343 - regulator-min-microvolt = <1800000>; 344 - regulator-max-microvolt = <1800000>; 345 - regulator-always-on; 346 - regulator-boot-on; 347 - }; 348 - 349 - ldo4_reg: ldo4 { 350 - /* VDDA_3V_USB: VDDA_USBHS33 */ 351 - regulator-name = "ldo4"; 352 - regulator-min-microvolt = <3300000>; 353 - regulator-max-microvolt = <3300000>; 354 - regulator-boot-on; 355 - }; 356 - }; 357 - }; 358 - 359 - tps65917_power_button { 360 - compatible = "ti,palmas-pwrbutton"; 361 - interrupt-parent = <&tps65917>; 362 - interrupts = <1 IRQ_TYPE_NONE>; 363 - wakeup-source; 364 - ti,palmas-long-press-seconds = <6>; 365 - }; 366 - }; 367 248 368 249 pcf_gpio_21: gpio@21 { 369 250 compatible = "ti,pcf8575", "nxp,pcf8575"; ··· 244 423 245 424 &i2c5 { 246 425 status = "okay"; 247 - pinctrl-names = "default"; 248 - pinctrl-0 = <&i2c5_pins>; 249 426 clock-frequency = <400000>; 250 427 251 428 pcf_hdmi: pcf8575@26 { ··· 281 462 282 463 &gpmc { 283 464 status = "okay"; 284 - pinctrl-names = "default"; 285 - pinctrl-0 = <&nand_default>; 286 465 ranges = <0 0 0x08000000 0x01000000>; /* minimum GPMC partition = 16MB */ 287 466 nand@0,0 { 288 467 /* To use NAND, DIP switch SW5 must be set like so: ··· 365 548 }; 366 549 }; 367 550 368 - &usb2_phy1 { 369 - phy-supply = <&ldo4_reg>; 370 - }; 371 - 372 - &usb2_phy2 { 373 - phy-supply = <&ldo4_reg>; 374 - }; 375 - 376 551 &omap_dwc3_1 { 377 552 extcon = <&extcon_usb1>; 378 553 }; ··· 375 566 376 567 &usb1 { 377 568 dr_mode = "peripheral"; 378 - pinctrl-names = "default"; 379 - pinctrl-0 = <&usb1_pins>; 380 569 }; 381 570 382 571 &usb2 { 383 572 dr_mode = "host"; 384 - pinctrl-names = "default"; 385 - pinctrl-0 = <&usb2_pins>; 386 573 }; 387 574 388 575 &mmc1 { ··· 386 581 pinctrl-names = "default"; 387 582 pinctrl-0 = <&mmc1_pins_default>; 388 583 vmmc-supply = <&evm_3v3_sd>; 389 - vmmc_aux-supply = <&ldo1_reg>; 390 584 bus-width = <4>; 391 585 /* 392 586 * SDCD signal is not being used here - using the fact that GPIO mode ··· 407 603 max-frequency = <192000000>; 408 604 }; 409 605 410 - &dra7_pmx_core { 411 - cpsw_default: cpsw_default { 412 - pinctrl-single,pins = < 413 - /* Slave 2 */ 414 - DRA7XX_CORE_IOPAD(0x3598, PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */ 415 - DRA7XX_CORE_IOPAD(0x359c, PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */ 416 - DRA7XX_CORE_IOPAD(0x35a0, PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */ 417 - DRA7XX_CORE_IOPAD(0x35a4, PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */ 418 - DRA7XX_CORE_IOPAD(0x35a8, PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */ 419 - DRA7XX_CORE_IOPAD(0x35ac, PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */ 420 - DRA7XX_CORE_IOPAD(0x35b0, PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */ 421 - DRA7XX_CORE_IOPAD(0x35b4, PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */ 422 - DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ 423 - DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ 424 - DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ 425 - DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 426 - >; 427 - 428 - }; 429 - 430 - cpsw_sleep: cpsw_sleep { 431 - pinctrl-single,pins = < 432 - /* Slave 2 */ 433 - DRA7XX_CORE_IOPAD(0x3598, MUX_MODE15) 434 - DRA7XX_CORE_IOPAD(0x359c, MUX_MODE15) 435 - DRA7XX_CORE_IOPAD(0x35a0, MUX_MODE15) 436 - DRA7XX_CORE_IOPAD(0x35a4, MUX_MODE15) 437 - DRA7XX_CORE_IOPAD(0x35a8, MUX_MODE15) 438 - DRA7XX_CORE_IOPAD(0x35ac, MUX_MODE15) 439 - DRA7XX_CORE_IOPAD(0x35b0, MUX_MODE15) 440 - DRA7XX_CORE_IOPAD(0x35b4, MUX_MODE15) 441 - DRA7XX_CORE_IOPAD(0x35b8, MUX_MODE15) 442 - DRA7XX_CORE_IOPAD(0x35bc, MUX_MODE15) 443 - DRA7XX_CORE_IOPAD(0x35c0, MUX_MODE15) 444 - DRA7XX_CORE_IOPAD(0x35c4, MUX_MODE15) 445 - >; 446 - }; 447 - 448 - davinci_mdio_default: davinci_mdio_default { 449 - pinctrl-single,pins = < 450 - /* MDIO */ 451 - DRA7XX_CORE_IOPAD(0x363c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */ 452 - DRA7XX_CORE_IOPAD(0x3640, PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 453 - >; 454 - }; 455 - 456 - davinci_mdio_sleep: davinci_mdio_sleep { 457 - pinctrl-single,pins = < 458 - DRA7XX_CORE_IOPAD(0x363c, MUX_MODE15) 459 - DRA7XX_CORE_IOPAD(0x3640, MUX_MODE15) 460 - >; 461 - }; 462 - }; 463 - 464 606 &mac { 465 607 status = "okay"; 466 - pinctrl-names = "default", "sleep"; 467 - pinctrl-0 = <&cpsw_default>; 468 - pinctrl-1 = <&cpsw_sleep>; 469 - }; 470 - 471 - &davinci_mdio { 472 - pinctrl-names = "default", "sleep"; 473 - pinctrl-0 = <&davinci_mdio_default>; 474 - pinctrl-1 = <&davinci_mdio_sleep>; 475 608 }; 476 609 477 610 &dcan1 { ··· 482 741 483 742 &dss { 484 743 status = "ok"; 485 - 486 - vdda_video-supply = <&ldo5_reg>; 487 744 }; 488 745 489 746 &hdmi { 490 747 status = "ok"; 491 - 492 - pinctrl-names = "default"; 493 - pinctrl-0 = <&hdmi_pins>; 494 748 495 749 port { 496 750 hdmi_out: endpoint { ··· 495 759 }; 496 760 497 761 &atl { 498 - pinctrl-names = "default"; 499 - pinctrl-0 = <&atl_pins>; 500 - 501 762 assigned-clocks = <&abe_dpll_sys_clk_mux>, 502 763 <&atl_gfclk_mux>, 503 764 <&dpll_abe_ck>, ··· 513 780 514 781 &mcasp3 { 515 782 #sound-dai-cells = <0>; 516 - pinctrl-names = "default", "sleep"; 517 - pinctrl-0 = <&mcasp3_pins>; 518 - pinctrl-1 = <&mcasp3_sleep_pins>; 519 783 520 784 assigned-clocks = <&mcasp3_ahclkx_mux>; 521 785 assigned-clock-parents = <&atl_clkin2_ck>;
+13 -8
arch/arm/boot/dts/dra72-evm-revc.dts
··· 17 17 }; 18 18 }; 19 19 20 - &tps65917_regulators { 21 - ldo2_reg: ldo2 { 22 - /* LDO2_OUT --> VDDA_1V8_PHY2 */ 23 - regulator-name = "ldo2"; 24 - regulator-min-microvolt = <1800000>; 25 - regulator-max-microvolt = <1800000>; 26 - regulator-always-on; 27 - regulator-boot-on; 20 + &i2c1 { 21 + tps65917: tps65917@58 { 22 + reg = <0x58>; 23 + 24 + interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ 28 25 }; 26 + }; 27 + 28 + #include "dra72-evm-tps65917.dtsi" 29 + 30 + &ldo2_reg { 31 + /* LDO2_OUT --> VDDA_1V8_PHY2 */ 32 + regulator-always-on; 33 + regulator-boot-on; 29 34 }; 30 35 31 36 &hdmi {
+134
arch/arm/boot/dts/dra72-evm-tps65917.dtsi
··· 1 + /* 2 + * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ 3 + * 4 + * This program is free software; you can redistribute it and/or modify 5 + * it under the terms of the GNU General Public License version 2 as 6 + * published by the Free Software Foundation. 7 + */ 8 + 9 + /* 10 + * Integrated Power Management Chip 11 + * http://www.ti.com/lit/ds/symlink/tps65917-q1.pdf 12 + */ 13 + 14 + &tps65917 { 15 + compatible = "ti,tps65917"; 16 + 17 + interrupt-controller; 18 + #interrupt-cells = <2>; 19 + 20 + ti,system-power-controller; 21 + 22 + tps65917_pmic { 23 + compatible = "ti,tps65917-pmic"; 24 + 25 + smps1-in-supply = <&vsys_3v3>; 26 + smps2-in-supply = <&vsys_3v3>; 27 + smps3-in-supply = <&vsys_3v3>; 28 + smps4-in-supply = <&vsys_3v3>; 29 + smps5-in-supply = <&vsys_3v3>; 30 + ldo1-in-supply = <&vsys_3v3>; 31 + ldo2-in-supply = <&vsys_3v3>; 32 + ldo3-in-supply = <&vsys_3v3>; 33 + ldo4-in-supply = <&evm_5v0>; 34 + ldo5-in-supply = <&vsys_3v3>; 35 + 36 + tps65917_regulators: regulators { 37 + smps1_reg: smps1 { 38 + /* VDD_MPU */ 39 + regulator-name = "smps1"; 40 + regulator-min-microvolt = <850000>; 41 + regulator-max-microvolt = <1250000>; 42 + regulator-always-on; 43 + regulator-boot-on; 44 + }; 45 + 46 + smps2_reg: smps2 { 47 + /* VDD_CORE */ 48 + regulator-name = "smps2"; 49 + regulator-min-microvolt = <850000>; 50 + regulator-max-microvolt = <1150000>; 51 + regulator-boot-on; 52 + regulator-always-on; 53 + }; 54 + 55 + smps3_reg: smps3 { 56 + /* VDD_GPU IVA DSPEVE */ 57 + regulator-name = "smps3"; 58 + regulator-min-microvolt = <850000>; 59 + regulator-max-microvolt = <1250000>; 60 + regulator-boot-on; 61 + regulator-always-on; 62 + }; 63 + 64 + smps4_reg: smps4 { 65 + /* VDDS1V8 */ 66 + regulator-name = "smps4"; 67 + regulator-min-microvolt = <1800000>; 68 + regulator-max-microvolt = <1800000>; 69 + regulator-always-on; 70 + regulator-boot-on; 71 + }; 72 + 73 + smps5_reg: smps5 { 74 + /* VDD_DDR */ 75 + regulator-name = "smps5"; 76 + regulator-min-microvolt = <1350000>; 77 + regulator-max-microvolt = <1350000>; 78 + regulator-boot-on; 79 + regulator-always-on; 80 + }; 81 + 82 + ldo1_reg: ldo1 { 83 + /* LDO1_OUT --> SDIO */ 84 + regulator-name = "ldo1"; 85 + regulator-min-microvolt = <1800000>; 86 + regulator-max-microvolt = <3300000>; 87 + regulator-always-on; 88 + regulator-boot-on; 89 + regulator-allow-bypass; 90 + }; 91 + 92 + ldo2_reg: ldo2 { 93 + regulator-name = "ldo2"; 94 + regulator-min-microvolt = <1800000>; 95 + regulator-max-microvolt = <1800000>; 96 + regulator-allow-bypass; 97 + }; 98 + 99 + ldo3_reg: ldo3 { 100 + /* VDDA_1V8_PHY */ 101 + regulator-name = "ldo3"; 102 + regulator-min-microvolt = <1800000>; 103 + regulator-max-microvolt = <1800000>; 104 + regulator-boot-on; 105 + regulator-always-on; 106 + }; 107 + 108 + ldo5_reg: ldo5 { 109 + /* VDDA_1V8_PLL */ 110 + regulator-name = "ldo5"; 111 + regulator-min-microvolt = <1800000>; 112 + regulator-max-microvolt = <1800000>; 113 + regulator-always-on; 114 + regulator-boot-on; 115 + }; 116 + 117 + ldo4_reg: ldo4 { 118 + /* VDDA_3V_USB: VDDA_USBHS33 */ 119 + regulator-name = "ldo4"; 120 + regulator-min-microvolt = <3300000>; 121 + regulator-max-microvolt = <3300000>; 122 + regulator-boot-on; 123 + }; 124 + }; 125 + }; 126 + 127 + tps65917_power_button { 128 + compatible = "ti,palmas-pwrbutton"; 129 + interrupt-parent = <&tps65917>; 130 + interrupts = <1 IRQ_TYPE_NONE>; 131 + wakeup-source; 132 + ti,palmas-long-press-seconds = <6>; 133 + }; 134 + };
+7 -7
arch/arm/boot/dts/dra72-evm.dts
··· 15 15 }; 16 16 }; 17 17 18 - &tps65917_regulators { 19 - ldo2_reg: ldo2 { 20 - /* LDO2_OUT --> TP1017 (UNUSED) */ 21 - regulator-name = "ldo2"; 22 - regulator-min-microvolt = <1800000>; 23 - regulator-max-microvolt = <3300000>; 24 - regulator-allow-bypass; 18 + &i2c1 { 19 + tps65917: tps65917@58 { 20 + reg = <0x58>; 21 + 22 + interrupts = <GIC_SPI 2 IRQ_TYPE_NONE>; /* IRQ_SYS_1N */ 25 23 }; 26 24 }; 25 + 26 + #include "dra72-evm-tps65917.dtsi" 27 27 28 28 &hdmi { 29 29 vdda-supply = <&ldo3_reg>;
+188
arch/arm/boot/dts/omap4-droid4-xt894.dts
··· 1 + /* 2 + * This program is free software; you can redistribute it and/or modify 3 + * it under the terms of the GNU General Public License version 2 as 4 + * published by the Free Software Foundation. 5 + */ 6 + /dts-v1/; 7 + 8 + #include "omap443x.dtsi" 9 + 10 + / { 11 + model = "Motorola Droid 4 XT894"; 12 + compatible = "motorola,droid4", "ti,omap4430", "ti,omap4"; 13 + 14 + chosen { 15 + stdout-path = &uart3; 16 + }; 17 + 18 + /* 19 + * We seem to have only 1021 MB accessible, 1021 - 1022 is locked, 20 + * then 1023 - 1024 seems to contain mbm. For SRAM, see the notes 21 + * below about SRAM and L3_ICLK2 being unused by default, 22 + */ 23 + memory { 24 + device_type = "memory"; 25 + reg = <0x80000000 0x3fd00000>; /* 1021 MB */ 26 + }; 27 + 28 + /* CPCAP really supports 1650000 to 3400000 range */ 29 + vmmc: regulator-mmc { 30 + compatible = "regulator-fixed"; 31 + regulator-name = "vmmc"; 32 + regulator-min-microvolt = <3000000>; 33 + regulator-max-microvolt = <3000000>; 34 + regulator-always-on; 35 + }; 36 + 37 + /* CPCAP really supports 3000000 to 3100000 range */ 38 + vemmc: regulator-emmc { 39 + compatible = "regulator-fixed"; 40 + regulator-name = "vemmc"; 41 + regulator-min-microvolt = <3000000>; 42 + regulator-max-microvolt = <3000000>; 43 + regulator-always-on; 44 + }; 45 + 46 + /* CPCAP really supports 1650000 to 1950000 range */ 47 + wl12xx_vmmc: regulator-wl12xx { 48 + compatible = "regulator-fixed"; 49 + regulator-name = "vwl1271"; 50 + regulator-min-microvolt = <1650000>; 51 + regulator-max-microvolt = <1650000>; 52 + gpio = <&gpio3 30 GPIO_ACTIVE_HIGH>; /* gpio94 */ 53 + startup-delay-us = <70000>; 54 + enable-active-high; 55 + }; 56 + }; 57 + 58 + /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ 59 + &gpmc { 60 + status = "disabled"; 61 + }; 62 + 63 + &mmc1 { 64 + vmmc-supply = <&vmmc>; 65 + bus-width = <4>; 66 + cd-gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; /* gpio106 */ 67 + }; 68 + 69 + &mmc2 { 70 + vmmc-supply = <&vemmc>; 71 + bus-width = <8>; 72 + non-removable; 73 + }; 74 + 75 + &mmc3 { 76 + vmmc-supply = <&wl12xx_vmmc>; 77 + interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 78 + &omap4_pmx_core 0xde>; 79 + 80 + non-removable; 81 + bus-width = <4>; 82 + cap-power-off-card; 83 + 84 + #address-cells = <1>; 85 + #size-cells = <0>; 86 + wlcore: wlcore@2 { 87 + compatible = "ti,wl1283"; 88 + reg = <2>; 89 + interrupt-parent = <&gpio4>; 90 + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; /* gpio100 */ 91 + ref-clock-frequency = <26000000>; 92 + tcxo-clock-frequency = <26000000>; 93 + }; 94 + }; 95 + 96 + /* L3_2 interconnect is unused, SRAM, GPMC and L3_ICLK2 disabled */ 97 + &ocmcram { 98 + status = "disabled"; 99 + }; 100 + 101 + &omap4_pmx_core { 102 + usb_gpio_mux_sel1: pinmux_usb_gpio_mux_sel1_pins { 103 + /* gpio_60 */ 104 + pinctrl-single,pins = < 105 + OMAP4_IOPAD(0x088, PIN_OUTPUT | MUX_MODE3) 106 + >; 107 + }; 108 + 109 + usb_ulpi_pins: pinmux_usb_ulpi_pins { 110 + pinctrl-single,pins = < 111 + OMAP4_IOPAD(0x196, MUX_MODE7) 112 + OMAP4_IOPAD(0x198, MUX_MODE7) 113 + OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE0) 114 + OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE0) 115 + OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE0) 116 + OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE0) 117 + OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE0) 118 + OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE0) 119 + OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE0) 120 + OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE0) 121 + OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE0) 122 + OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE0) 123 + OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE0) 124 + OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE0) 125 + >; 126 + }; 127 + 128 + /* usb0_otg_dp and usb0_otg_dm */ 129 + usb_utmi_pins: pinmux_usb_utmi_pins { 130 + pinctrl-single,pins = < 131 + OMAP4_IOPAD(0x196, PIN_INPUT | MUX_MODE0) 132 + OMAP4_IOPAD(0x198, PIN_INPUT | MUX_MODE0) 133 + OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7) 134 + OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7) 135 + OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7) 136 + OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7) 137 + OMAP4_IOPAD(0x1ba, PIN_INPUT_PULLUP | MUX_MODE7) 138 + OMAP4_IOPAD(0x1bc, PIN_INPUT_PULLUP | MUX_MODE7) 139 + OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7) 140 + OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7) 141 + OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7) 142 + OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7) 143 + OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7) 144 + OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7) 145 + >; 146 + }; 147 + 148 + /* uart3_tx_irtx and uart3_rx_irrx */ 149 + uart3_pins: pinmux_uart3_pins { 150 + pinctrl-single,pins = < 151 + OMAP4_IOPAD(0x196, MUX_MODE7) 152 + OMAP4_IOPAD(0x198, MUX_MODE7) 153 + OMAP4_IOPAD(0x1b2, PIN_INPUT_PULLUP | MUX_MODE7) 154 + OMAP4_IOPAD(0x1b4, PIN_INPUT_PULLUP | MUX_MODE7) 155 + OMAP4_IOPAD(0x1b6, PIN_INPUT_PULLUP | MUX_MODE7) 156 + OMAP4_IOPAD(0x1b8, PIN_INPUT_PULLUP | MUX_MODE7) 157 + OMAP4_IOPAD(0x1ba, MUX_MODE2) 158 + OMAP4_IOPAD(0x1bc, PIN_INPUT | MUX_MODE2) 159 + OMAP4_IOPAD(0x1be, PIN_INPUT_PULLUP | MUX_MODE7) 160 + OMAP4_IOPAD(0x1c0, PIN_INPUT_PULLUP | MUX_MODE7) 161 + OMAP4_IOPAD(0x1c2, PIN_INPUT_PULLUP | MUX_MODE7) 162 + OMAP4_IOPAD(0x1c4, PIN_INPUT_PULLUP | MUX_MODE7) 163 + OMAP4_IOPAD(0x1c6, PIN_INPUT_PULLUP | MUX_MODE7) 164 + OMAP4_IOPAD(0x1c8, PIN_INPUT_PULLUP | MUX_MODE7) 165 + >; 166 + }; 167 + }; 168 + 169 + &omap4_pmx_wkup { 170 + usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins { 171 + /* gpio_wk0 */ 172 + pinctrl-single,pins = < 173 + OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3) 174 + >; 175 + }; 176 + }; 177 + 178 + &uart3 { 179 + interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH 180 + &omap4_pmx_core 0x17c>; 181 + }; 182 + 183 + /* Internal UTMI+ PHY used for OTG, CPCAP ULPI PHY for detection and charger */ 184 + &usb_otg_hs { 185 + interface-type = <1>; 186 + mode = <3>; 187 + power = <50>; 188 + };
+92
arch/arm/boot/dts/omap5-uevm.dts
··· 27 27 default-state = "off"; 28 28 }; 29 29 }; 30 + 31 + evm_keys { 32 + compatible = "gpio-keys"; 33 + 34 + pinctrl-names = "default"; 35 + pinctrl-0 = <&evm_keys_pins>; 36 + 37 + #address-cells = <7>; 38 + #size-cells = <0>; 39 + 40 + btn1 { 41 + label = "BTN1"; 42 + linux,code = <169>; 43 + gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; /* gpio3_83 */ 44 + gpio-key,wakeup; 45 + autorepeat; 46 + debounce_interval = <50>; 47 + }; 48 + }; 49 + 50 + evm_leds { 51 + compatible = "gpio-leds"; 52 + 53 + led1 { 54 + label = "omap5:red:led"; 55 + gpios = <&gpio9 17 GPIO_ACTIVE_HIGH>; 56 + linux,default-trigger = "mmc0"; 57 + default-state = "off"; 58 + }; 59 + 60 + led2 { 61 + label = "omap5:green:led"; 62 + gpios = <&gpio9 18 GPIO_ACTIVE_HIGH>; 63 + linux,default-trigger = "mmc1"; 64 + default-state = "off"; 65 + }; 66 + 67 + led3 { 68 + label = "omap5:blue:led"; 69 + gpios = <&gpio9 19 GPIO_ACTIVE_HIGH>; 70 + linux,default-trigger = "mmc2"; 71 + default-state = "off"; 72 + }; 73 + 74 + led4 { 75 + label = "omap5:green:led1"; 76 + gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>; 77 + linux,default-trigger = "heartbeat"; 78 + default-state = "off"; 79 + }; 80 + 81 + led5 { 82 + label = "omap5:green:led2"; 83 + gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>; 84 + linux,default-trigger = "default-on"; 85 + default-state = "off"; 86 + }; 87 + 88 + led6 { 89 + label = "omap5:green:led3"; 90 + gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>; 91 + linux,default-trigger = "heartbeat"; 92 + default-state = "off"; 93 + }; 94 + 95 + led7 { 96 + label = "omap5:green:led4"; 97 + gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>; 98 + linux,default-trigger = "default-on"; 99 + default-state = "off"; 100 + }; 101 + 102 + led8 { 103 + label = "omap5:green:led5"; 104 + gpios = <&gpio9 6 GPIO_ACTIVE_HIGH>; 105 + linux,default-trigger = "heartbeat"; 106 + default-state = "off"; 107 + }; 108 + }; 30 109 }; 31 110 32 111 &hdmi { 33 112 vdda-supply = <&ldo4_reg>; 113 + }; 114 + 115 + &i2c1 { 116 + eeprom@50 { 117 + compatible = "atmel,24c02"; 118 + reg = <0x50>; 119 + }; 34 120 }; 35 121 36 122 &i2c5 { ··· 134 48 }; 135 49 136 50 &omap5_pmx_core { 51 + evm_keys_pins: pinmux_evm_keys_gpio_pins { 52 + pinctrl-single,pins = < 53 + OMAP5_IOPAD(0x0b6, PIN_INPUT | MUX_MODE6) /* gpio3_83 */ 54 + >; 55 + }; 56 + 137 57 i2c5_pins: pinmux_i2c5_pins { 138 58 pinctrl-single,pins = < 139 59 OMAP5_IOPAD(0x1c6, PIN_INPUT | MUX_MODE0) /* i2c5_scl */
+12
arch/arm/boot/dts/tps65217.dtsi
··· 13 13 14 14 &tps { 15 15 compatible = "ti,tps65217"; 16 + interrupt-controller; 17 + #interrupt-cells = <1>; 18 + 19 + charger { 20 + compatible = "ti,tps65217-charger"; 21 + status = "disabled"; 22 + }; 23 + 24 + pwrbutton { 25 + compatible = "ti,tps65217-pwrbutton"; 26 + status = "disabled"; 27 + }; 16 28 17 29 regulators { 18 30 #address-cells = <1>;
+26
include/dt-bindings/mfd/tps65217.h
··· 1 + /* 2 + * This header provides macros for TI TPS65217 DT bindings. 3 + * 4 + * Copyright (C) 2016 Texas Instruments 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + * 10 + * This program is distributed in the hope that it will be useful, but 11 + * WITHOUT ANY WARRANTY; without even the implied warranty of 12 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 + * General Public License for more details. 14 + * 15 + * You should have received a copy of the GNU General Public License along with 16 + * this program. If not, see <http://www.gnu.org/licenses/>. 17 + */ 18 + 19 + #ifndef __DT_BINDINGS_TPS65217_H__ 20 + #define __DT_BINDINGS_TPS65217_H__ 21 + 22 + #define TPS65217_IRQ_USB 0 23 + #define TPS65217_IRQ_AC 1 24 + #define TPS65217_IRQ_PB 2 25 + 26 + #endif