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kernel os linux

dt-bindings: usb: add the Renesas RZ/N1 USBF controller

The Renesas RZ/N1 USBF controller is an USB2.0 device controller
(UDC) available in the Renesas r9a06g032 SoC (RZ/N1 family).

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230105152257.310642-2-herve.codina@bootlin.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Herve Codina and committed by
Greg Kroah-Hartman
a90498e5 8b9c6ab1

+68
+68
Documentation/devicetree/bindings/usb/renesas,rzn1-usbf.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/usb/renesas,rzn1-usbf.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Renesas RZ/N1 SoCs USBF (USB Function) controller 8 + 9 + description: | 10 + The Renesas USBF controller is an USB2.0 device 11 + controller (UDC). 12 + 13 + maintainers: 14 + - Herve Codina <herve.codina@bootlin.com> 15 + 16 + properties: 17 + compatible: 18 + items: 19 + - enum: 20 + - renesas,r9a06g032-usbf 21 + - const: renesas,rzn1-usbf 22 + 23 + reg: 24 + maxItems: 1 25 + 26 + clocks: 27 + items: 28 + - description: Internal bus clock (AHB) for Function 29 + - description: Internal bus clock (AHB) for Power Management 30 + 31 + clock-names: 32 + items: 33 + - const: hclkf 34 + - const: hclkpm 35 + 36 + power-domains: 37 + maxItems: 1 38 + 39 + interrupts: 40 + items: 41 + - description: The USBF EPC interrupt 42 + - description: The USBF AHB-EPC interrupt 43 + 44 + required: 45 + - compatible 46 + - reg 47 + - clocks 48 + - clock-names 49 + - power-domains 50 + - interrupts 51 + 52 + additionalProperties: false 53 + 54 + examples: 55 + - | 56 + #include <dt-bindings/interrupt-controller/arm-gic.h> 57 + #include <dt-bindings/clock/r9a06g032-sysctrl.h> 58 + 59 + usb@4001e000 { 60 + compatible = "renesas,r9a06g032-usbf", "renesas,rzn1-usbf"; 61 + reg = <0x4001e000 0x2000>; 62 + interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>, 63 + <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 64 + clocks = <&sysctrl R9A06G032_HCLK_USBF>, 65 + <&sysctrl R9A06G032_HCLK_USBPM>; 66 + clock-names = "hclkf", "hclkpm"; 67 + power-domains = <&sysctrl>; 68 + };