Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

hexagon: simplify asm/io.h for !HAS_IOPORT

Hexagon fails to build after the final patch that makes CONFIG_HAS_IOPORT
optional:

In file included from arch/hexagon/include/asm/io.h:328:
include/asm-generic/io.h:854:18: error: static declaration of 'ioread8' follows non-static declaration
854 | static inline u8 ioread8(const volatile void __iomem *addr)
| ^
include/asm-generic/io.h:853:17: note: expanded from macro 'ioread8'
853 | #define ioread8 ioread8
| ^
include/asm-generic/iomap.h:29:21: note: previous declaration is here
29 | extern unsigned int ioread8(const void __iomem *);
| ^

As it turns out, most of its asm/io.h and lib/io.c files is redundant now,
and just removing all that makes it build again.

As with the other architectures, defining the __raw_readl()/__raw_writel()
type functions instead of the non-__raw ones is better here for consistency.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+16 -295
+3 -1
arch/hexagon/Kconfig
··· 30 30 select HAVE_ARCH_KGDB 31 31 select HAVE_ARCH_TRACEHOOK 32 32 select NEED_SG_DMA_LENGTH 33 - select NO_IOPORT_MAP 34 33 select GENERIC_IOREMAP 35 34 select GENERIC_SMP_IDLE_THREAD 36 35 select STACKTRACE_SUPPORT ··· 55 56 def_bool y 56 57 57 58 config MMU 59 + def_bool y 60 + 61 + config NO_IOPORT_MAP 58 62 def_bool y 59 63 60 64 config GENERIC_CSUM
+12 -211
arch/hexagon/include/asm/io.h
··· 8 8 #ifndef _ASM_IO_H 9 9 #define _ASM_IO_H 10 10 11 - #ifdef __KERNEL__ 12 - 13 11 #include <linux/types.h> 14 - #include <asm/iomap.h> 15 12 #include <asm/page.h> 16 13 #include <asm/cacheflush.h> 17 14 18 - /* 19 - * We don't have PCI yet. 20 - * _IO_BASE is pointing at what should be unused virtual space. 21 - */ 22 - #define IO_SPACE_LIMIT 0xffff 23 - #define _IO_BASE ((void __iomem *)0xfe000000) 24 - 25 - #define IOMEM(x) ((void __force __iomem *)(x)) 26 - 27 15 extern int remap_area_pages(unsigned long start, unsigned long phys_addr, 28 16 unsigned long end, unsigned long flags); 29 - 30 - /* Defined in lib/io.c, needed for smc91x driver. */ 31 - extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen); 32 - extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen); 33 - 34 - extern void __raw_readsl(const void __iomem *addr, void *data, int wordlen); 35 - extern void __raw_writesl(void __iomem *addr, const void *data, int wordlen); 36 - 37 - #define readsw(p, d, l) __raw_readsw(p, d, l) 38 - #define writesw(p, d, l) __raw_writesw(p, d, l) 39 - 40 - #define readsl(p, d, l) __raw_readsl(p, d, l) 41 - #define writesl(p, d, l) __raw_writesl(p, d, l) 42 17 43 18 /* 44 19 * virt_to_phys - map virtual address to physical ··· 34 59 } 35 60 36 61 /* 37 - * IO port access primitives. Hexagon doesn't have special IO access 38 - * instructions; all I/O is memory mapped. 39 - * 40 - * in/out are used for "ports", but we don't have "port instructions", 41 - * so these are really just memory mapped too. 42 - */ 43 - 44 - /* 45 62 * readb - read byte from memory mapped device 46 63 * @addr: pointer to memory 47 64 * 48 - * Operates on "I/O bus memory space" 49 65 */ 50 - static inline u8 readb(const volatile void __iomem *addr) 66 + static inline u8 __raw_readb(const volatile void __iomem *addr) 51 67 { 52 68 u8 val; 53 69 asm volatile( ··· 48 82 ); 49 83 return val; 50 84 } 85 + #define __raw_readb __raw_readb 51 86 52 - static inline u16 readw(const volatile void __iomem *addr) 87 + static inline u16 __raw_readw(const volatile void __iomem *addr) 53 88 { 54 89 u16 val; 55 90 asm volatile( ··· 60 93 ); 61 94 return val; 62 95 } 96 + #define __raw_readw __raw_readw 63 97 64 - static inline u32 readl(const volatile void __iomem *addr) 98 + static inline u32 __raw_readl(const volatile void __iomem *addr) 65 99 { 66 100 u32 val; 67 101 asm volatile( ··· 72 104 ); 73 105 return val; 74 106 } 107 + #define __raw_readl __raw_readl 75 108 76 109 /* 77 110 * writeb - write a byte to a memory location ··· 80 111 * @addr: pointer to memory 81 112 * 82 113 */ 83 - static inline void writeb(u8 data, volatile void __iomem *addr) 114 + static inline void __raw_writeb(u8 data, volatile void __iomem *addr) 84 115 { 85 116 asm volatile( 86 117 "memb(%0) = %1;" ··· 89 120 : "memory" 90 121 ); 91 122 } 123 + #define __raw_writeb __raw_writeb 92 124 93 - static inline void writew(u16 data, volatile void __iomem *addr) 125 + static inline void __raw_writew(u16 data, volatile void __iomem *addr) 94 126 { 95 127 asm volatile( 96 128 "memh(%0) = %1;" ··· 101 131 ); 102 132 103 133 } 134 + #define __raw_writew __raw_writew 104 135 105 - static inline void writel(u32 data, volatile void __iomem *addr) 136 + static inline void __raw_writel(u32 data, volatile void __iomem *addr) 106 137 { 107 138 asm volatile( 108 139 "memw(%0) = %1;" ··· 112 141 : "memory" 113 142 ); 114 143 } 115 - 116 - #define __raw_writeb writeb 117 - #define __raw_writew writew 118 - #define __raw_writel writel 119 - 120 - #define __raw_readb readb 121 - #define __raw_readw readw 122 - #define __raw_readl readl 123 - 124 - /* 125 - * http://comments.gmane.org/gmane.linux.ports.arm.kernel/117626 126 - */ 127 - 128 - #define readb_relaxed __raw_readb 129 - #define readw_relaxed __raw_readw 130 - #define readl_relaxed __raw_readl 131 - 132 - #define writeb_relaxed __raw_writeb 133 - #define writew_relaxed __raw_writew 134 - #define writel_relaxed __raw_writel 144 + #define __raw_writel __raw_writel 135 145 136 146 /* 137 147 * I/O memory mapping functions. 138 148 */ 139 149 #define _PAGE_IOREMAP (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ 140 150 (__HEXAGON_C_DEV << 6)) 141 - 142 - #define __raw_writel writel 143 - 144 - static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, 145 - int count) 146 - { 147 - memcpy(dst, (void *) src, count); 148 - } 149 - 150 - static inline void memcpy_toio(volatile void __iomem *dst, const void *src, 151 - int count) 152 - { 153 - memcpy((void *) dst, src, count); 154 - } 155 - 156 - static inline void memset_io(volatile void __iomem *addr, int value, 157 - size_t size) 158 - { 159 - memset((void __force *)addr, value, size); 160 - } 161 - 162 - #define PCI_IO_ADDR (volatile void __iomem *) 163 - 164 - /* 165 - * inb - read byte from I/O port or something 166 - * @port: address in I/O space 167 - * 168 - * Operates on "I/O bus I/O space" 169 - */ 170 - static inline u8 inb(unsigned long port) 171 - { 172 - return readb(_IO_BASE + (port & IO_SPACE_LIMIT)); 173 - } 174 - 175 - static inline u16 inw(unsigned long port) 176 - { 177 - return readw(_IO_BASE + (port & IO_SPACE_LIMIT)); 178 - } 179 - 180 - static inline u32 inl(unsigned long port) 181 - { 182 - return readl(_IO_BASE + (port & IO_SPACE_LIMIT)); 183 - } 184 - 185 - /* 186 - * outb - write a byte to a memory location 187 - * @data: data to write to 188 - * @addr: address in I/O space 189 - */ 190 - static inline void outb(u8 data, unsigned long port) 191 - { 192 - writeb(data, _IO_BASE + (port & IO_SPACE_LIMIT)); 193 - } 194 - 195 - static inline void outw(u16 data, unsigned long port) 196 - { 197 - writew(data, _IO_BASE + (port & IO_SPACE_LIMIT)); 198 - } 199 - 200 - static inline void outl(u32 data, unsigned long port) 201 - { 202 - writel(data, _IO_BASE + (port & IO_SPACE_LIMIT)); 203 - } 204 - 205 - #define outb_p outb 206 - #define outw_p outw 207 - #define outl_p outl 208 - 209 - #define inb_p inb 210 - #define inw_p inw 211 - #define inl_p inl 212 - 213 - static inline void insb(unsigned long port, void *buffer, int count) 214 - { 215 - if (count) { 216 - u8 *buf = buffer; 217 - do { 218 - u8 x = inb(port); 219 - *buf++ = x; 220 - } while (--count); 221 - } 222 - } 223 - 224 - static inline void insw(unsigned long port, void *buffer, int count) 225 - { 226 - if (count) { 227 - u16 *buf = buffer; 228 - do { 229 - u16 x = inw(port); 230 - *buf++ = x; 231 - } while (--count); 232 - } 233 - } 234 - 235 - static inline void insl(unsigned long port, void *buffer, int count) 236 - { 237 - if (count) { 238 - u32 *buf = buffer; 239 - do { 240 - u32 x = inw(port); 241 - *buf++ = x; 242 - } while (--count); 243 - } 244 - } 245 - 246 - static inline void outsb(unsigned long port, const void *buffer, int count) 247 - { 248 - if (count) { 249 - const u8 *buf = buffer; 250 - do { 251 - outb(*buf++, port); 252 - } while (--count); 253 - } 254 - } 255 - 256 - static inline void outsw(unsigned long port, const void *buffer, int count) 257 - { 258 - if (count) { 259 - const u16 *buf = buffer; 260 - do { 261 - outw(*buf++, port); 262 - } while (--count); 263 - } 264 - } 265 - 266 - static inline void outsl(unsigned long port, const void *buffer, int count) 267 - { 268 - if (count) { 269 - const u32 *buf = buffer; 270 - do { 271 - outl(*buf++, port); 272 - } while (--count); 273 - } 274 - } 275 151 276 152 /* 277 153 * These defines are necessary to use the generic io.h for filling in ··· 128 310 */ 129 311 #define virt_to_phys virt_to_phys 130 312 #define phys_to_virt phys_to_virt 131 - #define memset_io memset_io 132 - #define memcpy_fromio memcpy_fromio 133 - #define memcpy_toio memcpy_toio 134 - #define readb readb 135 - #define readw readw 136 - #define readl readl 137 - #define writeb writeb 138 - #define writew writew 139 - #define writel writel 140 - #define insb insb 141 - #define insw insw 142 - #define insl insl 143 - #define outsb outsb 144 - #define outsw outsw 145 - #define outsl outsl 146 313 #include <asm-generic/io.h> 147 - 148 - #endif /* __KERNEL__ */ 149 314 150 315 #endif
+1 -1
arch/hexagon/lib/Makefile
··· 2 2 # 3 3 # Makefile for hexagon-specific library files. 4 4 # 5 - obj-y = checksum.o io.o memcpy.o memset.o memcpy_likely_aligned.o \ 5 + obj-y = checksum.o memcpy.o memset.o memcpy_likely_aligned.o \ 6 6 divsi3.o modsi3.o udivsi3.o umodsi3.o
-82
arch/hexagon/lib/io.c
··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * I/O access functions for Hexagon 4 - * 5 - * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved. 6 - */ 7 - 8 - #include <asm/io.h> 9 - 10 - /* These are all FIFO routines! */ 11 - 12 - /* 13 - * __raw_readsw - read words a short at a time 14 - * @addr: source address 15 - * @data: data address 16 - * @len: number of shorts to read 17 - */ 18 - void __raw_readsw(const void __iomem *addr, void *data, int len) 19 - { 20 - const volatile short int *src = (short int *) addr; 21 - short int *dst = (short int *) data; 22 - 23 - if ((u32)data & 0x1) 24 - panic("unaligned pointer to readsw"); 25 - 26 - while (len-- > 0) 27 - *dst++ = *src; 28 - 29 - } 30 - EXPORT_SYMBOL(__raw_readsw); 31 - 32 - /* 33 - * __raw_writesw - read words a short at a time 34 - * @addr: source address 35 - * @data: data address 36 - * @len: number of shorts to read 37 - */ 38 - void __raw_writesw(void __iomem *addr, const void *data, int len) 39 - { 40 - const short int *src = (short int *)data; 41 - volatile short int *dst = (short int *)addr; 42 - 43 - if ((u32)data & 0x1) 44 - panic("unaligned pointer to writesw"); 45 - 46 - while (len-- > 0) 47 - *dst = *src++; 48 - 49 - 50 - } 51 - EXPORT_SYMBOL(__raw_writesw); 52 - 53 - /* Pretty sure len is pre-adjusted for the length of the access already */ 54 - void __raw_readsl(const void __iomem *addr, void *data, int len) 55 - { 56 - const volatile long *src = (long *) addr; 57 - long *dst = (long *) data; 58 - 59 - if ((u32)data & 0x3) 60 - panic("unaligned pointer to readsl"); 61 - 62 - while (len-- > 0) 63 - *dst++ = *src; 64 - 65 - 66 - } 67 - EXPORT_SYMBOL(__raw_readsl); 68 - 69 - void __raw_writesl(void __iomem *addr, const void *data, int len) 70 - { 71 - const long *src = (long *)data; 72 - volatile long *dst = (long *)addr; 73 - 74 - if ((u32)data & 0x3) 75 - panic("unaligned pointer to writesl"); 76 - 77 - while (len-- > 0) 78 - *dst = *src++; 79 - 80 - 81 - } 82 - EXPORT_SYMBOL(__raw_writesl);