Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: actions: Add mux clock support

Add support for Actions Semi mux clock together with helper
functions to be used in composite clock.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Manivannan Sadhasivam and committed by
Stephen Boyd
a8338772 103c5e1b

+122
+1
drivers/clk/actions/Makefile
··· 2 2 3 3 clk-owl-y += owl-common.o 4 4 clk-owl-y += owl-gate.o 5 + clk-owl-y += owl-mux.o
+60
drivers/clk/actions/owl-mux.c
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // 3 + // OWL mux clock driver 4 + // 5 + // Copyright (c) 2014 Actions Semi Inc. 6 + // Author: David Liu <liuwei@actions-semi.com> 7 + // 8 + // Copyright (c) 2018 Linaro Ltd. 9 + // Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 10 + 11 + #include <linux/clk-provider.h> 12 + #include <linux/regmap.h> 13 + 14 + #include "owl-mux.h" 15 + 16 + u8 owl_mux_helper_get_parent(const struct owl_clk_common *common, 17 + const struct owl_mux_hw *mux_hw) 18 + { 19 + u32 reg; 20 + u8 parent; 21 + 22 + regmap_read(common->regmap, mux_hw->reg, &reg); 23 + parent = reg >> mux_hw->shift; 24 + parent &= BIT(mux_hw->width) - 1; 25 + 26 + return parent; 27 + } 28 + 29 + static u8 owl_mux_get_parent(struct clk_hw *hw) 30 + { 31 + struct owl_mux *mux = hw_to_owl_mux(hw); 32 + 33 + return owl_mux_helper_get_parent(&mux->common, &mux->mux_hw); 34 + } 35 + 36 + int owl_mux_helper_set_parent(const struct owl_clk_common *common, 37 + struct owl_mux_hw *mux_hw, u8 index) 38 + { 39 + u32 reg; 40 + 41 + regmap_read(common->regmap, mux_hw->reg, &reg); 42 + reg &= ~GENMASK(mux_hw->width + mux_hw->shift - 1, mux_hw->shift); 43 + regmap_write(common->regmap, mux_hw->reg, 44 + reg | (index << mux_hw->shift)); 45 + 46 + return 0; 47 + } 48 + 49 + static int owl_mux_set_parent(struct clk_hw *hw, u8 index) 50 + { 51 + struct owl_mux *mux = hw_to_owl_mux(hw); 52 + 53 + return owl_mux_helper_set_parent(&mux->common, &mux->mux_hw, index); 54 + } 55 + 56 + const struct clk_ops owl_mux_ops = { 57 + .get_parent = owl_mux_get_parent, 58 + .set_parent = owl_mux_set_parent, 59 + .determine_rate = __clk_mux_determine_rate, 60 + };
+61
drivers/clk/actions/owl-mux.h
··· 1 + // SPDX-License-Identifier: GPL-2.0+ 2 + // 3 + // OWL mux clock driver 4 + // 5 + // Copyright (c) 2014 Actions Semi Inc. 6 + // Author: David Liu <liuwei@actions-semi.com> 7 + // 8 + // Copyright (c) 2018 Linaro Ltd. 9 + // Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 10 + 11 + #ifndef _OWL_MUX_H_ 12 + #define _OWL_MUX_H_ 13 + 14 + #include "owl-common.h" 15 + 16 + struct owl_mux_hw { 17 + u32 reg; 18 + u8 shift; 19 + u8 width; 20 + }; 21 + 22 + struct owl_mux { 23 + struct owl_mux_hw mux_hw; 24 + struct owl_clk_common common; 25 + }; 26 + 27 + #define OWL_MUX_HW(_reg, _shift, _width) \ 28 + { \ 29 + .reg = _reg, \ 30 + .shift = _shift, \ 31 + .width = _width, \ 32 + } 33 + 34 + #define OWL_MUX(_struct, _name, _parents, _reg, \ 35 + _shift, _width, _flags) \ 36 + struct owl_mux _struct = { \ 37 + .mux_hw = OWL_MUX_HW(_reg, _shift, _width), \ 38 + .common = { \ 39 + .regmap = NULL, \ 40 + .hw.init = CLK_HW_INIT_PARENTS(_name, \ 41 + _parents, \ 42 + &owl_mux_ops, \ 43 + _flags), \ 44 + }, \ 45 + } 46 + 47 + static inline struct owl_mux *hw_to_owl_mux(const struct clk_hw *hw) 48 + { 49 + struct owl_clk_common *common = hw_to_owl_clk_common(hw); 50 + 51 + return container_of(common, struct owl_mux, common); 52 + } 53 + 54 + u8 owl_mux_helper_get_parent(const struct owl_clk_common *common, 55 + const struct owl_mux_hw *mux_hw); 56 + int owl_mux_helper_set_parent(const struct owl_clk_common *common, 57 + struct owl_mux_hw *mux_hw, u8 index); 58 + 59 + extern const struct clk_ops owl_mux_ops; 60 + 61 + #endif /* _OWL_MUX_H_ */