tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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staging: qlge: clean up debugging code in the QL_ALL_DUMP ifdef land

The debugging code in the following ifdef land
- QL_ALL_DUMP
- QL_REG_DUMP
- QL_DEV_DUMP
- QL_CB_DUMP
- QL_IB_DUMP
- QL_OB_DUMP

becomes unnecessary because,
- Device status and general registers can be obtained by ethtool.
- Coredump can be done via devlink health reporter.
- Structure related to the hardware (struct ql_adapter) can be obtained
by crash or drgn.

Link: https://lkml.org/lkml/2020/6/30/19
Suggested-by: Benjamin Poirier <benjamin.poirier@gmail.com>
Signed-off-by: Coiby Xu <coiby.xu@gmail.com>
Link: https://lore.kernel.org/r/20210123104613.38359-8-coiby.xu@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Coiby Xu and committed by
Greg Kroah-Hartman a7c3ddf2 02988c36

+1 -782
-4
drivers/staging/qlge/TODO
··· 14 14 queues" is confusing. 15 15 * struct rx_ring is used for rx and tx completions, with some members relevant 16 16 to one case only 17 - * there is an inordinate amount of disparate debugging code, most of which is 18 - of questionable value. In particular, qlge_dbg.c has hundreds of lines of 19 - code bitrotting away in ifdef land (doesn't compile since commit 20 - 18c49b91777c ("qlge: do vlan cleanup", v3.1-rc1), 8 years ago). 21 17 * the flow control implementation in firmware is buggy (sends a flood of pause 22 18 frames, resets the link, device and driver buffer queues become 23 19 desynchronized), disable it by default
-82
drivers/staging/qlge/qlge.h
··· 2289 2289 int qlge_own_firmware(struct qlge_adapter *qdev); 2290 2290 int qlge_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget); 2291 2291 2292 - /* #define QL_ALL_DUMP */ 2293 - /* #define QL_REG_DUMP */ 2294 - /* #define QL_DEV_DUMP */ 2295 - /* #define QL_CB_DUMP */ 2296 - /* #define QL_IB_DUMP */ 2297 - /* #define QL_OB_DUMP */ 2298 - 2299 - #ifdef QL_REG_DUMP 2300 - void qlge_dump_xgmac_control_regs(struct qlge_adapter *qdev); 2301 - void qlge_dump_routing_entries(struct qlge_adapter *qdev); 2302 - void qlge_dump_regs(struct qlge_adapter *qdev); 2303 - #define QL_DUMP_REGS(qdev) qlge_dump_regs(qdev) 2304 - #define QL_DUMP_ROUTE(qdev) qlge_dump_routing_entries(qdev) 2305 - #define QL_DUMP_XGMAC_CONTROL_REGS(qdev) qlge_dump_xgmac_control_regs(qdev) 2306 - #else 2307 - #define QL_DUMP_REGS(qdev) 2308 - #define QL_DUMP_ROUTE(qdev) 2309 - #define QL_DUMP_XGMAC_CONTROL_REGS(qdev) 2310 - #endif 2311 - 2312 - #ifdef QL_STAT_DUMP 2313 - void qlge_dump_stat(struct qlge_adapter *qdev); 2314 - #define QL_DUMP_STAT(qdev) qlge_dump_stat(qdev) 2315 - #else 2316 - #define QL_DUMP_STAT(qdev) 2317 - #endif 2318 - 2319 - #ifdef QL_DEV_DUMP 2320 - void qlge_dump_qdev(struct qlge_adapter *qdev); 2321 - #define QL_DUMP_QDEV(qdev) qlge_dump_qdev(qdev) 2322 - #else 2323 - #define QL_DUMP_QDEV(qdev) 2324 - #endif 2325 - 2326 - #ifdef QL_CB_DUMP 2327 - void qlge_dump_wqicb(struct wqicb *wqicb); 2328 - void qlge_dump_tx_ring(struct tx_ring *tx_ring); 2329 - void qlge_dump_ricb(struct ricb *ricb); 2330 - void qlge_dump_cqicb(struct cqicb *cqicb); 2331 - void qlge_dump_rx_ring(struct rx_ring *rx_ring); 2332 - void qlge_dump_hw_cb(struct qlge_adapter *qdev, int size, u32 bit, u16 q_id); 2333 - #define QL_DUMP_RICB(ricb) qlge_dump_ricb(ricb) 2334 - #define QL_DUMP_WQICB(wqicb) qlge_dump_wqicb(wqicb) 2335 - #define QL_DUMP_TX_RING(tx_ring) qlge_dump_tx_ring(tx_ring) 2336 - #define QL_DUMP_CQICB(cqicb) qlge_dump_cqicb(cqicb) 2337 - #define QL_DUMP_RX_RING(rx_ring) qlge_dump_rx_ring(rx_ring) 2338 - #define QL_DUMP_HW_CB(qdev, size, bit, q_id) \ 2339 - qlge_dump_hw_cb(qdev, size, bit, q_id) 2340 - #else 2341 - #define QL_DUMP_RICB(ricb) 2342 - #define QL_DUMP_WQICB(wqicb) 2343 - #define QL_DUMP_TX_RING(tx_ring) 2344 - #define QL_DUMP_CQICB(cqicb) 2345 - #define QL_DUMP_RX_RING(rx_ring) 2346 - #define QL_DUMP_HW_CB(qdev, size, bit, q_id) 2347 - #endif 2348 - 2349 - #ifdef QL_OB_DUMP 2350 - void qlge_dump_tx_desc(struct qlge_adapter *qdev, struct tx_buf_desc *tbd); 2351 - void qlge_dump_ob_mac_iocb(struct qlge_adapter *qdev, struct qlge_ob_mac_iocb_req *ob_mac_iocb); 2352 - void qlge_dump_ob_mac_rsp(struct qlge_adapter *qdev, struct qlge_ob_mac_iocb_rsp *ob_mac_rsp); 2353 - #define QL_DUMP_OB_MAC_IOCB(qdev, ob_mac_iocb) qlge_dump_ob_mac_iocb(qdev, ob_mac_iocb) 2354 - #define QL_DUMP_OB_MAC_RSP(qdev, ob_mac_rsp) qlge_dump_ob_mac_rsp(qdev, ob_mac_rsp) 2355 - #else 2356 - #define QL_DUMP_OB_MAC_IOCB(qdev, ob_mac_iocb) 2357 - #define QL_DUMP_OB_MAC_RSP(qdev, ob_mac_rsp) 2358 - #endif 2359 - 2360 - #ifdef QL_IB_DUMP 2361 - void qlge_dump_ib_mac_rsp(struct qlge_adapter *qdev, struct qlge_ib_mac_iocb_rsp *ib_mac_rsp); 2362 - #define QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp) qlge_dump_ib_mac_rsp(qdev, ib_mac_rsp) 2363 - #else 2364 - #define QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp) 2365 - #endif 2366 - 2367 - #ifdef QL_ALL_DUMP 2368 - void qlge_dump_all(struct qlge_adapter *qdev); 2369 - #define QL_DUMP_ALL(qdev) qlge_dump_all(qdev) 2370 - #else 2371 - #define QL_DUMP_ALL(qdev) 2372 - #endif 2373 - 2374 2292 #endif /* _QLGE_H_ */
-688
drivers/staging/qlge/qlge_dbg.c
··· 1312 1312 qlge_get_core_dump(qdev); 1313 1313 } 1314 1314 } 1315 - 1316 - #ifdef QL_REG_DUMP 1317 - static void qlge_dump_intr_states(struct qlge_adapter *qdev) 1318 - { 1319 - int i; 1320 - u32 value; 1321 - 1322 - for (i = 0; i < qdev->intr_count; i++) { 1323 - qlge_write32(qdev, INTR_EN, qdev->intr_context[i].intr_read_mask); 1324 - value = qlge_read32(qdev, INTR_EN); 1325 - netdev_err(qdev->ndev, "Interrupt %d is %s\n", i, 1326 - (value & INTR_EN_EN ? "enabled" : "disabled")); 1327 - } 1328 - } 1329 - 1330 - #define DUMP_XGMAC(qdev, reg) \ 1331 - do { \ 1332 - u32 data; \ 1333 - qlge_read_xgmac_reg(qdev, reg, &data); \ 1334 - netdev_err(qdev->ndev, "%s = 0x%.08x\n", #reg, data); \ 1335 - } while (0) 1336 - 1337 - void qlge_dump_xgmac_control_regs(struct qlge_adapter *qdev) 1338 - { 1339 - if (qlge_sem_spinlock(qdev, qdev->xg_sem_mask)) { 1340 - netdev_err(qdev->ndev, "%s: Couldn't get xgmac sem\n", 1341 - __func__); 1342 - return; 1343 - } 1344 - DUMP_XGMAC(qdev, PAUSE_SRC_LO); 1345 - DUMP_XGMAC(qdev, PAUSE_SRC_HI); 1346 - DUMP_XGMAC(qdev, GLOBAL_CFG); 1347 - DUMP_XGMAC(qdev, TX_CFG); 1348 - DUMP_XGMAC(qdev, RX_CFG); 1349 - DUMP_XGMAC(qdev, FLOW_CTL); 1350 - DUMP_XGMAC(qdev, PAUSE_OPCODE); 1351 - DUMP_XGMAC(qdev, PAUSE_TIMER); 1352 - DUMP_XGMAC(qdev, PAUSE_FRM_DEST_LO); 1353 - DUMP_XGMAC(qdev, PAUSE_FRM_DEST_HI); 1354 - DUMP_XGMAC(qdev, MAC_TX_PARAMS); 1355 - DUMP_XGMAC(qdev, MAC_RX_PARAMS); 1356 - DUMP_XGMAC(qdev, MAC_SYS_INT); 1357 - DUMP_XGMAC(qdev, MAC_SYS_INT_MASK); 1358 - DUMP_XGMAC(qdev, MAC_MGMT_INT); 1359 - DUMP_XGMAC(qdev, MAC_MGMT_IN_MASK); 1360 - DUMP_XGMAC(qdev, EXT_ARB_MODE); 1361 - qlge_sem_unlock(qdev, qdev->xg_sem_mask); 1362 - } 1363 - 1364 - static void qlge_dump_ets_regs(struct qlge_adapter *qdev) 1365 - { 1366 - } 1367 - 1368 - static void qlge_dump_cam_entries(struct qlge_adapter *qdev) 1369 - { 1370 - int i; 1371 - u32 value[3]; 1372 - 1373 - i = qlge_sem_spinlock(qdev, SEM_MAC_ADDR_MASK); 1374 - if (i) 1375 - return; 1376 - for (i = 0; i < 4; i++) { 1377 - if (qlge_get_mac_addr_reg(qdev, MAC_ADDR_TYPE_CAM_MAC, i, value)) { 1378 - netdev_err(qdev->ndev, 1379 - "%s: Failed read of mac index register\n", 1380 - __func__); 1381 - break; 1382 - } 1383 - if (value[0]) 1384 - netdev_err(qdev->ndev, 1385 - "CAM index %d CAM Lookup Lower = 0x%.08x:%.08x, Output = 0x%.08x\n", 1386 - i, value[1], value[0], value[2]); 1387 - } 1388 - for (i = 0; i < 32; i++) { 1389 - if (qlge_get_mac_addr_reg 1390 - (qdev, MAC_ADDR_TYPE_MULTI_MAC, i, value)) { 1391 - netdev_err(qdev->ndev, 1392 - "%s: Failed read of mac index register\n", 1393 - __func__); 1394 - break; 1395 - } 1396 - if (value[0]) 1397 - netdev_err(qdev->ndev, 1398 - "MCAST index %d CAM Lookup Lower = 0x%.08x:%.08x\n", 1399 - i, value[1], value[0]); 1400 - } 1401 - qlge_sem_unlock(qdev, SEM_MAC_ADDR_MASK); 1402 - } 1403 - 1404 - void qlge_dump_routing_entries(struct qlge_adapter *qdev) 1405 - { 1406 - int i; 1407 - u32 value; 1408 - 1409 - i = qlge_sem_spinlock(qdev, SEM_RT_IDX_MASK); 1410 - if (i) 1411 - return; 1412 - for (i = 0; i < 16; i++) { 1413 - value = 0; 1414 - if (qlge_get_routing_reg(qdev, i, &value)) { 1415 - netdev_err(qdev->ndev, 1416 - "%s: Failed read of routing index register\n", 1417 - __func__); 1418 - break; 1419 - } 1420 - if (value) 1421 - netdev_err(qdev->ndev, 1422 - "Routing Mask %d = 0x%.08x\n", 1423 - i, value); 1424 - } 1425 - qlge_sem_unlock(qdev, SEM_RT_IDX_MASK); 1426 - } 1427 - 1428 - #define DUMP_REG(qdev, reg) \ 1429 - netdev_err(qdev->ndev, "%-32s= 0x%x\n", #reg, qlge_read32(qdev, reg)) 1430 - 1431 - void qlge_dump_regs(struct qlge_adapter *qdev) 1432 - { 1433 - netdev_err(qdev->ndev, "reg dump for function #%d\n", qdev->func); 1434 - DUMP_REG(qdev, SYS); 1435 - DUMP_REG(qdev, RST_FO); 1436 - DUMP_REG(qdev, FSC); 1437 - DUMP_REG(qdev, CSR); 1438 - DUMP_REG(qdev, ICB_RID); 1439 - DUMP_REG(qdev, ICB_L); 1440 - DUMP_REG(qdev, ICB_H); 1441 - DUMP_REG(qdev, CFG); 1442 - DUMP_REG(qdev, BIOS_ADDR); 1443 - DUMP_REG(qdev, STS); 1444 - DUMP_REG(qdev, INTR_EN); 1445 - DUMP_REG(qdev, INTR_MASK); 1446 - DUMP_REG(qdev, ISR1); 1447 - DUMP_REG(qdev, ISR2); 1448 - DUMP_REG(qdev, ISR3); 1449 - DUMP_REG(qdev, ISR4); 1450 - DUMP_REG(qdev, REV_ID); 1451 - DUMP_REG(qdev, FRC_ECC_ERR); 1452 - DUMP_REG(qdev, ERR_STS); 1453 - DUMP_REG(qdev, RAM_DBG_ADDR); 1454 - DUMP_REG(qdev, RAM_DBG_DATA); 1455 - DUMP_REG(qdev, ECC_ERR_CNT); 1456 - DUMP_REG(qdev, SEM); 1457 - DUMP_REG(qdev, GPIO_1); 1458 - DUMP_REG(qdev, GPIO_2); 1459 - DUMP_REG(qdev, GPIO_3); 1460 - DUMP_REG(qdev, XGMAC_ADDR); 1461 - DUMP_REG(qdev, XGMAC_DATA); 1462 - DUMP_REG(qdev, NIC_ETS); 1463 - DUMP_REG(qdev, CNA_ETS); 1464 - DUMP_REG(qdev, FLASH_ADDR); 1465 - DUMP_REG(qdev, FLASH_DATA); 1466 - DUMP_REG(qdev, CQ_STOP); 1467 - DUMP_REG(qdev, PAGE_TBL_RID); 1468 - DUMP_REG(qdev, WQ_PAGE_TBL_LO); 1469 - DUMP_REG(qdev, WQ_PAGE_TBL_HI); 1470 - DUMP_REG(qdev, CQ_PAGE_TBL_LO); 1471 - DUMP_REG(qdev, CQ_PAGE_TBL_HI); 1472 - DUMP_REG(qdev, COS_DFLT_CQ1); 1473 - DUMP_REG(qdev, COS_DFLT_CQ2); 1474 - DUMP_REG(qdev, SPLT_HDR); 1475 - DUMP_REG(qdev, FC_PAUSE_THRES); 1476 - DUMP_REG(qdev, NIC_PAUSE_THRES); 1477 - DUMP_REG(qdev, FC_ETHERTYPE); 1478 - DUMP_REG(qdev, FC_RCV_CFG); 1479 - DUMP_REG(qdev, NIC_RCV_CFG); 1480 - DUMP_REG(qdev, FC_COS_TAGS); 1481 - DUMP_REG(qdev, NIC_COS_TAGS); 1482 - DUMP_REG(qdev, MGMT_RCV_CFG); 1483 - DUMP_REG(qdev, XG_SERDES_ADDR); 1484 - DUMP_REG(qdev, XG_SERDES_DATA); 1485 - DUMP_REG(qdev, PRB_MX_ADDR); 1486 - DUMP_REG(qdev, PRB_MX_DATA); 1487 - qlge_dump_intr_states(qdev); 1488 - qlge_dump_xgmac_control_regs(qdev); 1489 - qlge_dump_ets_regs(qdev); 1490 - qlge_dump_cam_entries(qdev); 1491 - qlge_dump_routing_entries(qdev); 1492 - } 1493 - #endif 1494 - 1495 - #ifdef QL_STAT_DUMP 1496 - 1497 - #define DUMP_STAT(qdev, stat) \ 1498 - netdev_err(qdev->ndev, "%s = %ld\n", #stat, \ 1499 - (unsigned long)(qdev)->nic_stats.stat) 1500 - 1501 - void qlge_dump_stat(struct qlge_adapter *qdev) 1502 - { 1503 - netdev_err(qdev->ndev, "%s: Enter\n", __func__); 1504 - DUMP_STAT(qdev, tx_pkts); 1505 - DUMP_STAT(qdev, tx_bytes); 1506 - DUMP_STAT(qdev, tx_mcast_pkts); 1507 - DUMP_STAT(qdev, tx_bcast_pkts); 1508 - DUMP_STAT(qdev, tx_ucast_pkts); 1509 - DUMP_STAT(qdev, tx_ctl_pkts); 1510 - DUMP_STAT(qdev, tx_pause_pkts); 1511 - DUMP_STAT(qdev, tx_64_pkt); 1512 - DUMP_STAT(qdev, tx_65_to_127_pkt); 1513 - DUMP_STAT(qdev, tx_128_to_255_pkt); 1514 - DUMP_STAT(qdev, tx_256_511_pkt); 1515 - DUMP_STAT(qdev, tx_512_to_1023_pkt); 1516 - DUMP_STAT(qdev, tx_1024_to_1518_pkt); 1517 - DUMP_STAT(qdev, tx_1519_to_max_pkt); 1518 - DUMP_STAT(qdev, tx_undersize_pkt); 1519 - DUMP_STAT(qdev, tx_oversize_pkt); 1520 - DUMP_STAT(qdev, rx_bytes); 1521 - DUMP_STAT(qdev, rx_bytes_ok); 1522 - DUMP_STAT(qdev, rx_pkts); 1523 - DUMP_STAT(qdev, rx_pkts_ok); 1524 - DUMP_STAT(qdev, rx_bcast_pkts); 1525 - DUMP_STAT(qdev, rx_mcast_pkts); 1526 - DUMP_STAT(qdev, rx_ucast_pkts); 1527 - DUMP_STAT(qdev, rx_undersize_pkts); 1528 - DUMP_STAT(qdev, rx_oversize_pkts); 1529 - DUMP_STAT(qdev, rx_jabber_pkts); 1530 - DUMP_STAT(qdev, rx_undersize_fcerr_pkts); 1531 - DUMP_STAT(qdev, rx_drop_events); 1532 - DUMP_STAT(qdev, rx_fcerr_pkts); 1533 - DUMP_STAT(qdev, rx_align_err); 1534 - DUMP_STAT(qdev, rx_symbol_err); 1535 - DUMP_STAT(qdev, rx_mac_err); 1536 - DUMP_STAT(qdev, rx_ctl_pkts); 1537 - DUMP_STAT(qdev, rx_pause_pkts); 1538 - DUMP_STAT(qdev, rx_64_pkts); 1539 - DUMP_STAT(qdev, rx_65_to_127_pkts); 1540 - DUMP_STAT(qdev, rx_128_255_pkts); 1541 - DUMP_STAT(qdev, rx_256_511_pkts); 1542 - DUMP_STAT(qdev, rx_512_to_1023_pkts); 1543 - DUMP_STAT(qdev, rx_1024_to_1518_pkts); 1544 - DUMP_STAT(qdev, rx_1519_to_max_pkts); 1545 - DUMP_STAT(qdev, rx_len_err_pkts); 1546 - }; 1547 - #endif 1548 - 1549 - #ifdef QL_DEV_DUMP 1550 - 1551 - #define DUMP_QDEV_FIELD(qdev, type, field) \ 1552 - netdev_err(qdev->ndev, "qdev->%-24s = " type "\n", #field, (qdev)->field) 1553 - #define DUMP_QDEV_DMA_FIELD(qdev, field) \ 1554 - netdev_err(qdev->ndev, "qdev->%-24s = %llx\n", #field, \ 1555 - (unsigned long long)qdev->field) 1556 - #define DUMP_QDEV_ARRAY(qdev, type, array, index, field) \ 1557 - netdev_err(qdev->ndev, "%s[%d].%s = " type "\n", \ 1558 - #array, index, #field, (qdev)->array[index].field) 1559 - void qlge_dump_qdev(struct qlge_adapter *qdev) 1560 - { 1561 - int i; 1562 - 1563 - DUMP_QDEV_FIELD(qdev, "%lx", flags); 1564 - DUMP_QDEV_FIELD(qdev, "%p", pdev); 1565 - DUMP_QDEV_FIELD(qdev, "%p", ndev); 1566 - DUMP_QDEV_FIELD(qdev, "%d", chip_rev_id); 1567 - DUMP_QDEV_FIELD(qdev, "%p", reg_base); 1568 - DUMP_QDEV_FIELD(qdev, "%p", doorbell_area); 1569 - DUMP_QDEV_FIELD(qdev, "%d", doorbell_area_size); 1570 - DUMP_QDEV_FIELD(qdev, "%x", msg_enable); 1571 - DUMP_QDEV_FIELD(qdev, "%p", rx_ring_shadow_reg_area); 1572 - DUMP_QDEV_DMA_FIELD(qdev, rx_ring_shadow_reg_dma); 1573 - DUMP_QDEV_FIELD(qdev, "%p", tx_ring_shadow_reg_area); 1574 - DUMP_QDEV_DMA_FIELD(qdev, tx_ring_shadow_reg_dma); 1575 - DUMP_QDEV_FIELD(qdev, "%d", intr_count); 1576 - if (qdev->msi_x_entry) 1577 - for (i = 0; i < qdev->intr_count; i++) { 1578 - DUMP_QDEV_ARRAY(qdev, "%d", msi_x_entry, i, vector); 1579 - DUMP_QDEV_ARRAY(qdev, "%d", msi_x_entry, i, entry); 1580 - } 1581 - for (i = 0; i < qdev->intr_count; i++) { 1582 - DUMP_QDEV_ARRAY(qdev, "%p", intr_context, i, qdev); 1583 - DUMP_QDEV_ARRAY(qdev, "%d", intr_context, i, intr); 1584 - DUMP_QDEV_ARRAY(qdev, "%d", intr_context, i, hooked); 1585 - DUMP_QDEV_ARRAY(qdev, "0x%08x", intr_context, i, intr_en_mask); 1586 - DUMP_QDEV_ARRAY(qdev, "0x%08x", intr_context, i, intr_dis_mask); 1587 - DUMP_QDEV_ARRAY(qdev, "0x%08x", intr_context, i, intr_read_mask); 1588 - } 1589 - DUMP_QDEV_FIELD(qdev, "%d", tx_ring_count); 1590 - DUMP_QDEV_FIELD(qdev, "%d", rx_ring_count); 1591 - DUMP_QDEV_FIELD(qdev, "%d", ring_mem_size); 1592 - DUMP_QDEV_FIELD(qdev, "%p", ring_mem); 1593 - DUMP_QDEV_FIELD(qdev, "%d", intr_count); 1594 - DUMP_QDEV_FIELD(qdev, "%p", tx_ring); 1595 - DUMP_QDEV_FIELD(qdev, "%d", rss_ring_count); 1596 - DUMP_QDEV_FIELD(qdev, "%p", rx_ring); 1597 - DUMP_QDEV_FIELD(qdev, "%d", default_rx_queue); 1598 - DUMP_QDEV_FIELD(qdev, "0x%08x", xg_sem_mask); 1599 - DUMP_QDEV_FIELD(qdev, "0x%08x", port_link_up); 1600 - DUMP_QDEV_FIELD(qdev, "0x%08x", port_init); 1601 - DUMP_QDEV_FIELD(qdev, "%u", lbq_buf_size); 1602 - } 1603 - #endif 1604 - 1605 - #ifdef QL_CB_DUMP 1606 - void qlge_dump_wqicb(struct wqicb *wqicb) 1607 - { 1608 - struct tx_ring *tx_ring = container_of(wqicb, struct tx_ring, wqicb); 1609 - struct qlge_adapter *qdev = tx_ring->qdev; 1610 - 1611 - netdev_err(qdev->ndev, "Dumping wqicb stuff...\n"); 1612 - netdev_err(qdev->ndev, "wqicb->len = 0x%x\n", le16_to_cpu(wqicb->len)); 1613 - netdev_err(qdev->ndev, "wqicb->flags = %x\n", 1614 - le16_to_cpu(wqicb->flags)); 1615 - netdev_err(qdev->ndev, "wqicb->cq_id_rss = %d\n", 1616 - le16_to_cpu(wqicb->cq_id_rss)); 1617 - netdev_err(qdev->ndev, "wqicb->rid = 0x%x\n", le16_to_cpu(wqicb->rid)); 1618 - netdev_err(qdev->ndev, "wqicb->wq_addr = 0x%llx\n", 1619 - (unsigned long long)le64_to_cpu(wqicb->addr)); 1620 - netdev_err(qdev->ndev, "wqicb->wq_cnsmr_idx_addr = 0x%llx\n", 1621 - (unsigned long long)le64_to_cpu(wqicb->cnsmr_idx_addr)); 1622 - } 1623 - 1624 - void qlge_dump_tx_ring(struct tx_ring *tx_ring) 1625 - { 1626 - struct qlge_adapter *qdev = tx_ring->qdev; 1627 - 1628 - netdev_err(qdev->ndev, "===================== Dumping tx_ring %d ===============\n", 1629 - tx_ring->wq_id); 1630 - netdev_err(qdev->ndev, "tx_ring->base = %p\n", tx_ring->wq_base); 1631 - netdev_err(qdev->ndev, "tx_ring->base_dma = 0x%llx\n", 1632 - (unsigned long long)tx_ring->wq_base_dma); 1633 - netdev_err(qdev->ndev, "tx_ring->cnsmr_idx_sh_reg, addr = 0x%p, value = %d\n", 1634 - tx_ring->cnsmr_idx_sh_reg, 1635 - tx_ring->cnsmr_idx_sh_reg 1636 - ? qlge_read_sh_reg(tx_ring->cnsmr_idx_sh_reg) : 0); 1637 - netdev_err(qdev->ndev, "tx_ring->size = %d\n", tx_ring->wq_size); 1638 - netdev_err(qdev->ndev, "tx_ring->len = %d\n", tx_ring->wq_len); 1639 - netdev_err(qdev->ndev, "tx_ring->prod_idx_db_reg = %p\n", tx_ring->prod_idx_db_reg); 1640 - netdev_err(qdev->ndev, "tx_ring->valid_db_reg = %p\n", tx_ring->valid_db_reg); 1641 - netdev_err(qdev->ndev, "tx_ring->prod_idx = %d\n", tx_ring->prod_idx); 1642 - netdev_err(qdev->ndev, "tx_ring->cq_id = %d\n", tx_ring->cq_id); 1643 - netdev_err(qdev->ndev, "tx_ring->wq_id = %d\n", tx_ring->wq_id); 1644 - netdev_err(qdev->ndev, "tx_ring->q = %p\n", tx_ring->q); 1645 - netdev_err(qdev->ndev, "tx_ring->tx_count = %d\n", atomic_read(&tx_ring->tx_count)); 1646 - } 1647 - 1648 - void qlge_dump_ricb(struct ricb *ricb) 1649 - { 1650 - int i; 1651 - struct qlge_adapter *qdev = 1652 - container_of(ricb, struct qlge_adapter, ricb); 1653 - 1654 - netdev_err(qdev->ndev, "===================== Dumping ricb ===============\n"); 1655 - netdev_err(qdev->ndev, "Dumping ricb stuff...\n"); 1656 - 1657 - netdev_err(qdev->ndev, "ricb->base_cq = %d\n", ricb->base_cq & 0x1f); 1658 - netdev_err(qdev->ndev, "ricb->flags = %s%s%s%s%s%s%s%s%s\n", 1659 - ricb->base_cq & RSS_L4K ? "RSS_L4K " : "", 1660 - ricb->flags & RSS_L6K ? "RSS_L6K " : "", 1661 - ricb->flags & RSS_LI ? "RSS_LI " : "", 1662 - ricb->flags & RSS_LB ? "RSS_LB " : "", 1663 - ricb->flags & RSS_LM ? "RSS_LM " : "", 1664 - ricb->flags & RSS_RI4 ? "RSS_RI4 " : "", 1665 - ricb->flags & RSS_RT4 ? "RSS_RT4 " : "", 1666 - ricb->flags & RSS_RI6 ? "RSS_RI6 " : "", 1667 - ricb->flags & RSS_RT6 ? "RSS_RT6 " : ""); 1668 - netdev_err(qdev->ndev, "ricb->mask = 0x%.04x\n", le16_to_cpu(ricb->mask)); 1669 - for (i = 0; i < 16; i++) 1670 - netdev_err(qdev->ndev, "ricb->hash_cq_id[%d] = 0x%.08x\n", i, 1671 - le32_to_cpu(ricb->hash_cq_id[i])); 1672 - for (i = 0; i < 10; i++) 1673 - netdev_err(qdev->ndev, "ricb->ipv6_hash_key[%d] = 0x%.08x\n", i, 1674 - le32_to_cpu(ricb->ipv6_hash_key[i])); 1675 - for (i = 0; i < 4; i++) 1676 - netdev_err(qdev->ndev, "ricb->ipv4_hash_key[%d] = 0x%.08x\n", i, 1677 - le32_to_cpu(ricb->ipv4_hash_key[i])); 1678 - } 1679 - 1680 - void qlge_dump_cqicb(struct cqicb *cqicb) 1681 - { 1682 - struct rx_ring *rx_ring = container_of(cqicb, struct rx_ring, cqicb); 1683 - struct qlge_adapter *qdev = rx_ring->qdev; 1684 - 1685 - netdev_err(qdev->ndev, "Dumping cqicb stuff...\n"); 1686 - 1687 - netdev_err(qdev->ndev, "cqicb->msix_vect = %d\n", cqicb->msix_vect); 1688 - netdev_err(qdev->ndev, "cqicb->flags = %x\n", cqicb->flags); 1689 - netdev_err(qdev->ndev, "cqicb->len = %d\n", le16_to_cpu(cqicb->len)); 1690 - netdev_err(qdev->ndev, "cqicb->addr = 0x%llx\n", 1691 - (unsigned long long)le64_to_cpu(cqicb->addr)); 1692 - netdev_err(qdev->ndev, "cqicb->prod_idx_addr = 0x%llx\n", 1693 - (unsigned long long)le64_to_cpu(cqicb->prod_idx_addr)); 1694 - netdev_err(qdev->ndev, "cqicb->pkt_delay = 0x%.04x\n", 1695 - le16_to_cpu(cqicb->pkt_delay)); 1696 - netdev_err(qdev->ndev, "cqicb->irq_delay = 0x%.04x\n", 1697 - le16_to_cpu(cqicb->irq_delay)); 1698 - netdev_err(qdev->ndev, "cqicb->lbq_addr = 0x%llx\n", 1699 - (unsigned long long)le64_to_cpu(cqicb->lbq_addr)); 1700 - netdev_err(qdev->ndev, "cqicb->lbq_buf_size = 0x%.04x\n", 1701 - le16_to_cpu(cqicb->lbq_buf_size)); 1702 - netdev_err(qdev->ndev, "cqicb->lbq_len = 0x%.04x\n", 1703 - le16_to_cpu(cqicb->lbq_len)); 1704 - netdev_err(qdev->ndev, "cqicb->sbq_addr = 0x%llx\n", 1705 - (unsigned long long)le64_to_cpu(cqicb->sbq_addr)); 1706 - netdev_err(qdev->ndev, "cqicb->sbq_buf_size = 0x%.04x\n", 1707 - le16_to_cpu(cqicb->sbq_buf_size)); 1708 - netdev_err(qdev->ndev, "cqicb->sbq_len = 0x%.04x\n", 1709 - le16_to_cpu(cqicb->sbq_len)); 1710 - } 1711 - 1712 - static const char *qlge_rx_ring_type_name(struct rx_ring *rx_ring) 1713 - { 1714 - struct qlge_adapter *qdev = rx_ring->qdev; 1715 - 1716 - if (rx_ring->cq_id < qdev->rss_ring_count) 1717 - return "RX COMPLETION"; 1718 - else 1719 - return "TX COMPLETION"; 1720 - }; 1721 - 1722 - void qlge_dump_rx_ring(struct rx_ring *rx_ring) 1723 - { 1724 - struct qlge_adapter *qdev = rx_ring->qdev; 1725 - 1726 - netdev_err(qdev->ndev, 1727 - "===================== Dumping rx_ring %d ===============\n", 1728 - rx_ring->cq_id); 1729 - netdev_err(qdev->ndev, 1730 - "Dumping rx_ring %d, type = %s\n", rx_ring->cq_id, 1731 - qlge_rx_ring_type_name(rx_ring)); 1732 - netdev_err(qdev->ndev, "rx_ring->cqicb = %p\n", &rx_ring->cqicb); 1733 - netdev_err(qdev->ndev, "rx_ring->cq_base = %p\n", rx_ring->cq_base); 1734 - netdev_err(qdev->ndev, "rx_ring->cq_base_dma = %llx\n", 1735 - (unsigned long long)rx_ring->cq_base_dma); 1736 - netdev_err(qdev->ndev, "rx_ring->cq_size = %d\n", rx_ring->cq_size); 1737 - netdev_err(qdev->ndev, "rx_ring->cq_len = %d\n", rx_ring->cq_len); 1738 - netdev_err(qdev->ndev, 1739 - "rx_ring->prod_idx_sh_reg, addr = 0x%p, value = %d\n", 1740 - rx_ring->prod_idx_sh_reg, 1741 - rx_ring->prod_idx_sh_reg ? qlge_read_sh_reg(rx_ring->prod_idx_sh_reg) : 0); 1742 - netdev_err(qdev->ndev, "rx_ring->prod_idx_sh_reg_dma = %llx\n", 1743 - (unsigned long long)rx_ring->prod_idx_sh_reg_dma); 1744 - netdev_err(qdev->ndev, "rx_ring->cnsmr_idx_db_reg = %p\n", 1745 - rx_ring->cnsmr_idx_db_reg); 1746 - netdev_err(qdev->ndev, "rx_ring->cnsmr_idx = %d\n", rx_ring->cnsmr_idx); 1747 - netdev_err(qdev->ndev, "rx_ring->curr_entry = %p\n", rx_ring->curr_entry); 1748 - netdev_err(qdev->ndev, "rx_ring->valid_db_reg = %p\n", rx_ring->valid_db_reg); 1749 - 1750 - netdev_err(qdev->ndev, "rx_ring->lbq.base = %p\n", rx_ring->lbq.base); 1751 - netdev_err(qdev->ndev, "rx_ring->lbq.base_dma = %llx\n", 1752 - (unsigned long long)rx_ring->lbq.base_dma); 1753 - netdev_err(qdev->ndev, "rx_ring->lbq.base_indirect = %p\n", 1754 - rx_ring->lbq.base_indirect); 1755 - netdev_err(qdev->ndev, "rx_ring->lbq.base_indirect_dma = %llx\n", 1756 - (unsigned long long)rx_ring->lbq.base_indirect_dma); 1757 - netdev_err(qdev->ndev, "rx_ring->lbq = %p\n", rx_ring->lbq.queue); 1758 - netdev_err(qdev->ndev, "rx_ring->lbq.prod_idx_db_reg = %p\n", 1759 - rx_ring->lbq.prod_idx_db_reg); 1760 - netdev_err(qdev->ndev, "rx_ring->lbq.next_to_use = %d\n", rx_ring->lbq.next_to_use); 1761 - netdev_err(qdev->ndev, "rx_ring->lbq.next_to_clean = %d\n", rx_ring->lbq.next_to_clean); 1762 - 1763 - netdev_err(qdev->ndev, "rx_ring->sbq.base = %p\n", rx_ring->sbq.base); 1764 - netdev_err(qdev->ndev, "rx_ring->sbq.base_dma = %llx\n", 1765 - (unsigned long long)rx_ring->sbq.base_dma); 1766 - netdev_err(qdev->ndev, "rx_ring->sbq.base_indirect = %p\n", 1767 - rx_ring->sbq.base_indirect); 1768 - netdev_err(qdev->ndev, "rx_ring->sbq.base_indirect_dma = %llx\n", 1769 - (unsigned long long)rx_ring->sbq.base_indirect_dma); 1770 - netdev_err(qdev->ndev, "rx_ring->sbq = %p\n", rx_ring->sbq.queue); 1771 - netdev_err(qdev->ndev, "rx_ring->sbq.prod_idx_db_reg addr = %p\n", 1772 - rx_ring->sbq.prod_idx_db_reg); 1773 - netdev_err(qdev->ndev, "rx_ring->sbq.next_to_use = %d\n", rx_ring->sbq.next_to_use); 1774 - netdev_err(qdev->ndev, "rx_ring->sbq.next_to_clean = %d\n", rx_ring->sbq.next_to_clean); 1775 - netdev_err(qdev->ndev, "rx_ring->cq_id = %d\n", rx_ring->cq_id); 1776 - netdev_err(qdev->ndev, "rx_ring->irq = %d\n", rx_ring->irq); 1777 - netdev_err(qdev->ndev, "rx_ring->cpu = %d\n", rx_ring->cpu); 1778 - netdev_err(qdev->ndev, "rx_ring->qdev = %p\n", rx_ring->qdev); 1779 - } 1780 - 1781 - void qlge_dump_hw_cb(struct qlge_adapter *qdev, int size, u32 bit, u16 q_id) 1782 - { 1783 - void *ptr; 1784 - 1785 - netdev_err(qdev->ndev, "%s: Enter\n", __func__); 1786 - 1787 - ptr = kmalloc(size, GFP_ATOMIC); 1788 - if (!ptr) 1789 - return; 1790 - 1791 - if (qlge_write_cfg(qdev, ptr, size, bit, q_id)) { 1792 - netdev_err(qdev->ndev, "%s: Failed to upload control block!\n", __func__); 1793 - goto fail_it; 1794 - } 1795 - switch (bit) { 1796 - case CFG_DRQ: 1797 - qlge_dump_wqicb((struct wqicb *)ptr); 1798 - break; 1799 - case CFG_DCQ: 1800 - qlge_dump_cqicb((struct cqicb *)ptr); 1801 - break; 1802 - case CFG_DR: 1803 - qlge_dump_ricb((struct ricb *)ptr); 1804 - break; 1805 - default: 1806 - netdev_err(qdev->ndev, "%s: Invalid bit value = %x\n", __func__, bit); 1807 - break; 1808 - } 1809 - fail_it: 1810 - kfree(ptr); 1811 - } 1812 - #endif 1813 - 1814 - #ifdef QL_OB_DUMP 1815 - void qlge_dump_tx_desc(struct qlge_adapter *qdev, struct tx_buf_desc *tbd) 1816 - { 1817 - netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n", 1818 - le64_to_cpu((u64)tbd->addr)); 1819 - netdev_err(qdev->ndev, "tbd->len = %d\n", 1820 - le32_to_cpu(tbd->len & TX_DESC_LEN_MASK)); 1821 - netdev_err(qdev->ndev, "tbd->flags = %s %s\n", 1822 - tbd->len & TX_DESC_C ? "C" : ".", 1823 - tbd->len & TX_DESC_E ? "E" : "."); 1824 - tbd++; 1825 - netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n", 1826 - le64_to_cpu((u64)tbd->addr)); 1827 - netdev_err(qdev->ndev, "tbd->len = %d\n", 1828 - le32_to_cpu(tbd->len & TX_DESC_LEN_MASK)); 1829 - netdev_err(qdev->ndev, "tbd->flags = %s %s\n", 1830 - tbd->len & TX_DESC_C ? "C" : ".", 1831 - tbd->len & TX_DESC_E ? "E" : "."); 1832 - tbd++; 1833 - netdev_err(qdev->ndev, "tbd->addr = 0x%llx\n", 1834 - le64_to_cpu((u64)tbd->addr)); 1835 - netdev_err(qdev->ndev, "tbd->len = %d\n", 1836 - le32_to_cpu(tbd->len & TX_DESC_LEN_MASK)); 1837 - netdev_err(qdev->ndev, "tbd->flags = %s %s\n", 1838 - tbd->len & TX_DESC_C ? "C" : ".", 1839 - tbd->len & TX_DESC_E ? "E" : "."); 1840 - } 1841 - 1842 - void qlge_dump_ob_mac_iocb(struct qlge_adapter *qdev, struct qlge_ob_mac_iocb_req *ob_mac_iocb) 1843 - { 1844 - struct qlge_ob_mac_tso_iocb_req *ob_mac_tso_iocb = 1845 - (struct qlge_ob_mac_tso_iocb_req *)ob_mac_iocb; 1846 - struct tx_buf_desc *tbd; 1847 - u16 frame_len; 1848 - 1849 - netdev_err(qdev->ndev, "%s\n", __func__); 1850 - netdev_err(qdev->ndev, "opcode = %s\n", 1851 - (ob_mac_iocb->opcode == OPCODE_OB_MAC_IOCB) ? "MAC" : "TSO"); 1852 - netdev_err(qdev->ndev, "flags1 = %s %s %s %s %s\n", 1853 - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_OI ? "OI" : "", 1854 - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_I ? "I" : "", 1855 - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_D ? "D" : "", 1856 - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_IP4 ? "IP4" : "", 1857 - ob_mac_tso_iocb->flags1 & OB_MAC_TSO_IOCB_IP6 ? "IP6" : ""); 1858 - netdev_err(qdev->ndev, "flags2 = %s %s %s\n", 1859 - ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_LSO ? "LSO" : "", 1860 - ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_UC ? "UC" : "", 1861 - ob_mac_tso_iocb->flags2 & OB_MAC_TSO_IOCB_TC ? "TC" : ""); 1862 - netdev_err(qdev->ndev, "flags3 = %s %s %s\n", 1863 - ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_IC ? "IC" : "", 1864 - ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_DFP ? "DFP" : "", 1865 - ob_mac_tso_iocb->flags3 & OB_MAC_TSO_IOCB_V ? "V" : ""); 1866 - netdev_err(qdev->ndev, "tid = %x\n", ob_mac_iocb->tid); 1867 - netdev_err(qdev->ndev, "txq_idx = %d\n", ob_mac_iocb->txq_idx); 1868 - netdev_err(qdev->ndev, "vlan_tci = %x\n", ob_mac_tso_iocb->vlan_tci); 1869 - if (ob_mac_iocb->opcode == OPCODE_OB_MAC_TSO_IOCB) { 1870 - netdev_err(qdev->ndev, "frame_len = %d\n", 1871 - le32_to_cpu(ob_mac_tso_iocb->frame_len)); 1872 - netdev_err(qdev->ndev, "mss = %d\n", 1873 - le16_to_cpu(ob_mac_tso_iocb->mss)); 1874 - netdev_err(qdev->ndev, "prot_hdr_len = %d\n", 1875 - le16_to_cpu(ob_mac_tso_iocb->total_hdrs_len)); 1876 - netdev_err(qdev->ndev, "hdr_offset = 0x%.04x\n", 1877 - le16_to_cpu(ob_mac_tso_iocb->net_trans_offset)); 1878 - frame_len = le32_to_cpu(ob_mac_tso_iocb->frame_len); 1879 - } else { 1880 - netdev_err(qdev->ndev, "frame_len = %d\n", 1881 - le16_to_cpu(ob_mac_iocb->frame_len)); 1882 - frame_len = le16_to_cpu(ob_mac_iocb->frame_len); 1883 - } 1884 - tbd = &ob_mac_iocb->tbd[0]; 1885 - qlge_dump_tx_desc(qdev, tbd); 1886 - } 1887 - 1888 - void qlge_dump_ob_mac_rsp(struct qlge_adapter *qdev, struct qlge_ob_mac_iocb_rsp *ob_mac_rsp) 1889 - { 1890 - netdev_err(qdev->ndev, "%s\n", __func__); 1891 - netdev_err(qdev->ndev, "opcode = %d\n", ob_mac_rsp->opcode); 1892 - netdev_err(qdev->ndev, "flags = %s %s %s %s %s %s %s\n", 1893 - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_OI ? 1894 - "OI" : ".", ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_I ? "I" : ".", 1895 - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_E ? "E" : ".", 1896 - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_S ? "S" : ".", 1897 - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_L ? "L" : ".", 1898 - ob_mac_rsp->flags1 & OB_MAC_IOCB_RSP_P ? "P" : ".", 1899 - ob_mac_rsp->flags2 & OB_MAC_IOCB_RSP_B ? "B" : "."); 1900 - netdev_err(qdev->ndev, "tid = %x\n", ob_mac_rsp->tid); 1901 - } 1902 - #endif 1903 - 1904 - #ifdef QL_IB_DUMP 1905 - void qlge_dump_ib_mac_rsp(struct qlge_adapter *qdev, struct qlge_ib_mac_iocb_rsp *ib_mac_rsp) 1906 - { 1907 - netdev_err(qdev->ndev, "%s\n", __func__); 1908 - netdev_err(qdev->ndev, "opcode = 0x%x\n", ib_mac_rsp->opcode); 1909 - netdev_err(qdev->ndev, "flags1 = %s%s%s%s%s%s\n", 1910 - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_OI ? "OI " : "", 1911 - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_I ? "I " : "", 1912 - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_TE ? "TE " : "", 1913 - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_NU ? "NU " : "", 1914 - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_IE ? "IE " : "", 1915 - ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_B ? "B " : ""); 1916 - 1917 - if (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) 1918 - netdev_err(qdev->ndev, "%s%s%s Multicast\n", 1919 - (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) == 1920 - IB_MAC_IOCB_RSP_M_HASH ? "Hash" : "", 1921 - (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) == 1922 - IB_MAC_IOCB_RSP_M_REG ? "Registered" : "", 1923 - (ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_M_MASK) == 1924 - IB_MAC_IOCB_RSP_M_PROM ? "Promiscuous" : ""); 1925 - 1926 - netdev_err(qdev->ndev, "flags2 = %s%s%s%s%s\n", 1927 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_P) ? "P " : "", 1928 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V) ? "V " : "", 1929 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) ? "U " : "", 1930 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) ? "T " : "", 1931 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_FO) ? "FO " : ""); 1932 - 1933 - if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) 1934 - netdev_err(qdev->ndev, "%s%s%s%s%s error\n", 1935 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == 1936 - IB_MAC_IOCB_RSP_ERR_OVERSIZE ? "oversize" : "", 1937 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == 1938 - IB_MAC_IOCB_RSP_ERR_UNDERSIZE ? "undersize" : "", 1939 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == 1940 - IB_MAC_IOCB_RSP_ERR_PREAMBLE ? "preamble" : "", 1941 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == 1942 - IB_MAC_IOCB_RSP_ERR_FRAME_LEN ? "frame length" : "", 1943 - (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) == 1944 - IB_MAC_IOCB_RSP_ERR_CRC ? "CRC" : ""); 1945 - 1946 - netdev_err(qdev->ndev, "flags3 = %s%s\n", 1947 - ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DS ? "DS " : "", 1948 - ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_DL ? "DL " : ""); 1949 - 1950 - if (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) 1951 - netdev_err(qdev->ndev, "RSS flags = %s%s%s%s\n", 1952 - ((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) == 1953 - IB_MAC_IOCB_RSP_M_IPV4) ? "IPv4 RSS" : "", 1954 - ((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) == 1955 - IB_MAC_IOCB_RSP_M_IPV6) ? "IPv6 RSS " : "", 1956 - ((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) == 1957 - IB_MAC_IOCB_RSP_M_TCP_V4) ? "TCP/IPv4 RSS" : "", 1958 - ((ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) == 1959 - IB_MAC_IOCB_RSP_M_TCP_V6) ? "TCP/IPv6 RSS" : ""); 1960 - 1961 - netdev_err(qdev->ndev, "data_len = %d\n", 1962 - le32_to_cpu(ib_mac_rsp->data_len)); 1963 - netdev_err(qdev->ndev, "data_addr = 0x%llx\n", 1964 - (unsigned long long)le64_to_cpu(ib_mac_rsp->data_addr)); 1965 - if (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_RSS_MASK) 1966 - netdev_err(qdev->ndev, "rss = %x\n", 1967 - le32_to_cpu(ib_mac_rsp->rss)); 1968 - if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V) 1969 - netdev_err(qdev->ndev, "vlan_id = %x\n", 1970 - le16_to_cpu(ib_mac_rsp->vlan_id)); 1971 - 1972 - netdev_err(qdev->ndev, "flags4 = %s%s%s\n", 1973 - ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV ? "HV " : "", 1974 - ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HS ? "HS " : "", 1975 - ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HL ? "HL " : ""); 1976 - 1977 - if (ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV) { 1978 - netdev_err(qdev->ndev, "hdr length = %d\n", 1979 - le32_to_cpu(ib_mac_rsp->hdr_len)); 1980 - netdev_err(qdev->ndev, "hdr addr = 0x%llx\n", 1981 - (unsigned long long)le64_to_cpu(ib_mac_rsp->hdr_addr)); 1982 - } 1983 - } 1984 - #endif 1985 - 1986 - #ifdef QL_ALL_DUMP 1987 - void qlge_dump_all(struct qlge_adapter *qdev) 1988 - { 1989 - int i; 1990 - 1991 - QL_DUMP_REGS(qdev); 1992 - QL_DUMP_QDEV(qdev); 1993 - for (i = 0; i < qdev->tx_ring_count; i++) { 1994 - QL_DUMP_TX_RING(&qdev->tx_ring[i]); 1995 - QL_DUMP_WQICB((struct wqicb *)&qdev->tx_ring[i]); 1996 - } 1997 - for (i = 0; i < qdev->rx_ring_count; i++) { 1998 - QL_DUMP_RX_RING(&qdev->rx_ring[i]); 1999 - QL_DUMP_CQICB((struct cqicb *)&qdev->rx_ring[i]); 2000 - } 2001 - } 2002 - #endif
-2
drivers/staging/qlge/qlge_ethtool.c
··· 328 328 qlge_sem_unlock(qdev, qdev->xg_sem_mask); 329 329 quit: 330 330 spin_unlock(&qdev->stats_lock); 331 - 332 - QL_DUMP_STAT(qdev); 333 331 } 334 332 335 333 static void qlge_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
+1 -6
drivers/staging/qlge/qlge_main.c
··· 1855 1855 struct net_device *ndev = qdev->ndev; 1856 1856 struct sk_buff *skb = NULL; 1857 1857 1858 - QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp); 1859 - 1860 1858 skb = qlge_build_rx_skb(qdev, rx_ring, ib_mac_rsp); 1861 1859 if (unlikely(!skb)) { 1862 1860 netif_printk(qdev, rx_status, KERN_DEBUG, qdev->ndev, ··· 1951 1953 ((le16_to_cpu(ib_mac_rsp->vlan_id) & 1952 1954 IB_MAC_IOCB_RSP_VLAN_MASK)) : 0xffff; 1953 1955 1954 - QL_DUMP_IB_MAC_RSP(qdev, ib_mac_rsp); 1955 - 1956 1956 if (ib_mac_rsp->flags4 & IB_MAC_IOCB_RSP_HV) { 1957 1957 /* The data and headers are split into 1958 1958 * separate buffers. ··· 1996 2000 struct tx_ring *tx_ring; 1997 2001 struct tx_ring_desc *tx_ring_desc; 1998 2002 1999 - QL_DUMP_OB_MAC_RSP(qdev, mac_rsp); 2000 2003 tx_ring = &qdev->tx_ring[mac_rsp->txq_idx]; 2001 2004 tx_ring_desc = &tx_ring->q[mac_rsp->tid]; 2002 2005 qlge_unmap_send(qdev, tx_ring_desc, tx_ring_desc->map_cnt); ··· 2582 2587 tx_ring->tx_errors++; 2583 2588 return NETDEV_TX_BUSY; 2584 2589 } 2585 - QL_DUMP_OB_MAC_IOCB(qdev, mac_iocb_ptr); 2590 + 2586 2591 tx_ring->prod_idx++; 2587 2592 if (tx_ring->prod_idx == tx_ring->wq_len) 2588 2593 tx_ring->prod_idx = 0;