Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

staging: rtl8723bs: remove ODM_RT_TRACE logs

remove all ODM_RT_TRACE logs.

ODM_RT_TRACE macro default behaviour
is _trace nothing_. To enable it a hand code
edit is needed in hal/odm_debug.c.
So just remove it.

Applied the semantic patch:

@@
@@

- ODM_RT_TRACE(...);

Reviewed-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Fabio Aiuto <fabioaiuto83@gmail.com>
Link: https://lore.kernel.org/r/23e21c100ba4f0753c6f03a1bb28d9bd7729b64b.1619794331.git.fabioaiuto83@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Fabio Aiuto and committed by
Greg Kroah-Hartman
a7645558 b3cd518c

+7 -1235
-62
drivers/staging/rtl8723bs/hal/HalHWImg8723B_BB.c
··· 33 33 pDM_Odm->TypeALNA << 16 | 34 34 pDM_Odm->TypeAPA << 24; 35 35 36 - ODM_RT_TRACE( 37 - pDM_Odm, 38 - ODM_COMP_INIT, 39 - ODM_DBG_TRACE, 40 - ( 41 - "===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", 42 - cond1, 43 - cond2 44 - ) 45 - ); 46 - ODM_RT_TRACE( 47 - pDM_Odm, 48 - ODM_COMP_INIT, 49 - ODM_DBG_TRACE, 50 - ( 51 - "===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", 52 - driver1, 53 - driver2 54 - ) 55 - ); 56 - 57 - ODM_RT_TRACE( 58 - pDM_Odm, 59 - ODM_COMP_INIT, 60 - ODM_DBG_TRACE, 61 - (" (Platform, Interface) = (0x%X, 0x%X)\n", 62 - pDM_Odm->SupportPlatform, 63 - pDM_Odm->SupportInterface 64 - ) 65 - ); 66 - ODM_RT_TRACE( 67 - pDM_Odm, 68 - ODM_COMP_INIT, 69 - ODM_DBG_TRACE, 70 - ( 71 - " (Board, Package) = (0x%X, 0x%X)\n", 72 - pDM_Odm->BoardType, 73 - pDM_Odm->PackageType 74 - ) 75 - ); 76 - 77 36 78 37 /* Value Defined Check =============== */ 79 38 /* QFN Type [15:12] and Cut Version [27:24] need to do value check */ ··· 221 262 u32 i = 0; 222 263 u32 ArrayLen = ARRAY_SIZE(Array_MP_8723B_AGC_TAB); 223 264 u32 *Array = Array_MP_8723B_AGC_TAB; 224 - 225 - ODM_RT_TRACE( 226 - pDM_Odm, 227 - ODM_COMP_INIT, 228 - ODM_DBG_LOUD, 229 - ("===> ODM_ReadAndConfig_MP_8723B_AGC_TAB\n") 230 - ); 231 265 232 266 for (i = 0; i < ArrayLen; i += 2) { 233 267 u32 v1 = Array[i]; ··· 484 532 u32 ArrayLen = ARRAY_SIZE(Array_MP_8723B_PHY_REG); 485 533 u32 *Array = Array_MP_8723B_PHY_REG; 486 534 487 - ODM_RT_TRACE( 488 - pDM_Odm, 489 - ODM_COMP_INIT, 490 - ODM_DBG_LOUD, 491 - ("===> ODM_ReadAndConfig_MP_8723B_PHY_REG\n") 492 - ); 493 - 494 535 for (i = 0; i < ArrayLen; i += 2) { 495 536 u32 v1 = Array[i]; 496 537 u32 v2 = Array[i+1]; ··· 555 610 { 556 611 u32 i = 0; 557 612 u32 *Array = Array_MP_8723B_PHY_REG_PG; 558 - 559 - ODM_RT_TRACE( 560 - pDM_Odm, 561 - ODM_COMP_INIT, 562 - ODM_DBG_LOUD, 563 - ("===> ODM_ReadAndConfig_MP_8723B_PHY_REG_PG\n") 564 - ); 565 613 566 614 pDM_Odm->PhyRegPgVersion = 1; 567 615 pDM_Odm->PhyRegPgValueType = PHY_REG_PG_EXACT_VALUE;
-49
drivers/staging/rtl8723bs/hal/HalHWImg8723B_MAC.c
··· 33 33 pDM_Odm->TypeALNA << 16 | 34 34 pDM_Odm->TypeAPA << 24; 35 35 36 - ODM_RT_TRACE( 37 - pDM_Odm, 38 - ODM_COMP_INIT, 39 - ODM_DBG_TRACE, 40 - ( 41 - "===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", 42 - cond1, 43 - cond2 44 - ) 45 - ); 46 - ODM_RT_TRACE( 47 - pDM_Odm, 48 - ODM_COMP_INIT, 49 - ODM_DBG_TRACE, 50 - ( 51 - "===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", 52 - driver1, 53 - driver2 54 - ) 55 - ); 56 - 57 - ODM_RT_TRACE( 58 - pDM_Odm, 59 - ODM_COMP_INIT, 60 - ODM_DBG_TRACE, 61 - ( 62 - " (Platform, Interface) = (0x%X, 0x%X)\n", 63 - pDM_Odm->SupportPlatform, 64 - pDM_Odm->SupportInterface 65 - ) 66 - ); 67 - ODM_RT_TRACE( 68 - pDM_Odm, 69 - ODM_COMP_INIT, 70 - ODM_DBG_TRACE, 71 - ( 72 - " (Board, Package) = (0x%X, 0x%X)\n", 73 - pDM_Odm->BoardType, 74 - pDM_Odm->PackageType 75 - ) 76 - ); 77 - 78 36 79 37 /* Value Defined Check =============== */ 80 38 /* QFN Type [15:12] and Cut Version [27:24] need to do value check */ ··· 191 233 u32 i = 0; 192 234 u32 ArrayLen = ARRAY_SIZE(Array_MP_8723B_MAC_REG); 193 235 u32 *Array = Array_MP_8723B_MAC_REG; 194 - 195 - ODM_RT_TRACE( 196 - pDM_Odm, 197 - ODM_COMP_INIT, 198 - ODM_DBG_LOUD, 199 - ("===> ODM_ReadAndConfig_MP_8723B_MAC_REG\n") 200 - ); 201 236 202 237 for (i = 0; i < ArrayLen; i += 2) { 203 238 u32 v1 = Array[i];
-63
drivers/staging/rtl8723bs/hal/HalHWImg8723B_RF.c
··· 33 33 pDM_Odm->TypeALNA << 16 | 34 34 pDM_Odm->TypeAPA << 24; 35 35 36 - ODM_RT_TRACE( 37 - pDM_Odm, 38 - ODM_COMP_INIT, 39 - ODM_DBG_TRACE, 40 - ( 41 - "===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n", 42 - cond1, 43 - cond2 44 - ) 45 - ); 46 - ODM_RT_TRACE( 47 - pDM_Odm, 48 - ODM_COMP_INIT, 49 - ODM_DBG_TRACE, 50 - ( 51 - "===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n", 52 - driver1, 53 - driver2 54 - ) 55 - ); 56 - 57 - ODM_RT_TRACE( 58 - pDM_Odm, 59 - ODM_COMP_INIT, 60 - ODM_DBG_TRACE, 61 - ( 62 - " (Platform, Interface) = (0x%X, 0x%X)\n", 63 - pDM_Odm->SupportPlatform, 64 - pDM_Odm->SupportInterface 65 - ) 66 - ); 67 - ODM_RT_TRACE( 68 - pDM_Odm, 69 - ODM_COMP_INIT, 70 - ODM_DBG_TRACE, 71 - ( 72 - " (Board, Package) = (0x%X, 0x%X)\n", 73 - pDM_Odm->BoardType, 74 - pDM_Odm->PackageType 75 - ) 76 - ); 77 - 78 36 /* Value Defined Check =============== */ 79 37 /* QFN Type [15:12] and Cut Version [27:24] need to do value check */ 80 38 ··· 223 265 u32 ArrayLen = ARRAY_SIZE(Array_MP_8723B_RadioA); 224 266 u32 *Array = Array_MP_8723B_RadioA; 225 267 226 - ODM_RT_TRACE( 227 - pDM_Odm, 228 - ODM_COMP_INIT, 229 - ODM_DBG_LOUD, 230 - ("===> ODM_ReadAndConfig_MP_8723B_RadioA\n") 231 - ); 232 - 233 268 for (i = 0; i < ArrayLen; i += 2) { 234 269 u32 v1 = Array[i]; 235 270 u32 v2 = Array[i+1]; ··· 374 423 void ODM_ReadAndConfig_MP_8723B_TxPowerTrack_SDIO(struct dm_odm_t *pDM_Odm) 375 424 { 376 425 struct odm_rf_cal_t *pRFCalibrateInfo = &pDM_Odm->RFCalibrateInfo; 377 - 378 - ODM_RT_TRACE( 379 - pDM_Odm, 380 - ODM_COMP_INIT, 381 - ODM_DBG_LOUD, 382 - ("===> ODM_ReadAndConfig_MP_MP_8723B\n") 383 - ); 384 426 385 427 386 428 memcpy( ··· 703 759 { 704 760 u32 i = 0; 705 761 u8 **Array = Array_MP_8723B_TXPWR_LMT; 706 - 707 - ODM_RT_TRACE( 708 - pDM_Odm, 709 - ODM_COMP_INIT, 710 - ODM_DBG_LOUD, 711 - ("===> ODM_ReadAndConfig_MP_8723B_TXPWR_LMT\n") 712 - ); 713 762 714 763 for (i = 0; i < ARRAY_SIZE(Array_MP_8723B_TXPWR_LMT); i += 7) { 715 764 u8 *regulation = Array[i];
+3 -322
drivers/staging/rtl8723bs/hal/HalPhyRf.c
··· 108 108 pDM_Odm->RFCalibrateInfo.TXPowerTrackingCallbackCnt++; 109 109 pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = true; 110 110 111 - ODM_RT_TRACE( 112 - pDM_Odm, 113 - ODM_COMP_TX_PWR_TRACK, 114 - ODM_DBG_LOUD, 115 - ( 116 - "===>ODM_TXPowerTrackingCallback_ThermalMeter,\npDM_Odm->BbSwingIdxCckBase: %d, pDM_Odm->BbSwingIdxOfdmBase[A]: %d, pDM_Odm->DefaultOfdmIndex: %d\n", 117 - pDM_Odm->BbSwingIdxCckBase, 118 - pDM_Odm->BbSwingIdxOfdmBase[ODM_RF_PATH_A], 119 - pDM_Odm->DefaultOfdmIndex 120 - ) 121 - ); 122 - 123 111 ThermalValue = (u8)PHY_QueryRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, c.ThermalRegAddr, 0xfc00); /* 0x42: RF Reg[15:10] 88E */ 124 112 if ( 125 113 !pDM_Odm->RFCalibrateInfo.TxPowerTrackControl || ··· 119 131 /* 4 3. Initialize ThermalValues of RFCalibrateInfo */ 120 132 121 133 if (pDM_Odm->RFCalibrateInfo.bReloadtxpowerindex) 122 - ODM_RT_TRACE( 123 - pDM_Odm, 124 - ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 125 - ("reload ofdm index for band switch\n") 126 - ); 134 + {} 127 135 128 136 /* 4 4. Calculate average thermal meter */ 129 137 ··· 138 154 /* Calculate Average ThermalValue after average enough times */ 139 155 if (ThermalValue_AVG_count) { 140 156 ThermalValue = (u8)(ThermalValue_AVG / ThermalValue_AVG_count); 141 - ODM_RT_TRACE( 142 - pDM_Odm, 143 - ODM_COMP_TX_PWR_TRACK, 144 - ODM_DBG_LOUD, 145 - ( 146 - "AVG Thermal Meter = 0x%X, EFUSE Thermal Base = 0x%X\n", 147 - ThermalValue, 148 - pHalData->EEPROMThermalMeter 149 - ) 150 - ); 151 157 } 152 158 153 159 /* 4 5. Calculate delta, delta_LCK, delta_IQK. */ ··· 155 181 (ThermalValue - pDM_Odm->RFCalibrateInfo.ThermalValue_IQK) : 156 182 (pDM_Odm->RFCalibrateInfo.ThermalValue_IQK - ThermalValue); 157 183 158 - ODM_RT_TRACE( 159 - pDM_Odm, 160 - ODM_COMP_TX_PWR_TRACK, 161 - ODM_DBG_LOUD, 162 - ( 163 - "(delta, delta_LCK, delta_IQK) = (%d, %d, %d)\n", 164 - delta, 165 - delta_LCK, 166 - delta_IQK 167 - ) 168 - ); 169 - 170 184 /* 4 6. If necessary, do LCK. */ 171 185 /* Delta temperature is equal to or larger than 20 centigrade. */ 172 186 if (delta_LCK >= c.Threshold_IQK) { 173 - ODM_RT_TRACE( 174 - pDM_Odm, 175 - ODM_COMP_TX_PWR_TRACK, 176 - ODM_DBG_LOUD, 177 - ( 178 - "delta_LCK(%d) >= Threshold_IQK(%d)\n", 179 - delta_LCK, 180 - c.Threshold_IQK 181 - ) 182 - ); 183 187 pDM_Odm->RFCalibrateInfo.ThermalValue_LCK = ThermalValue; 184 188 if (c.PHY_LCCalibrate) 185 189 (*c.PHY_LCCalibrate)(pDM_Odm); ··· 176 224 177 225 /* 4 7.1 The Final Power Index = BaseIndex + PowerIndexOffset */ 178 226 if (ThermalValue > pHalData->EEPROMThermalMeter) { 179 - ODM_RT_TRACE( 180 - pDM_Odm, 181 - ODM_COMP_TX_PWR_TRACK, 182 - ODM_DBG_LOUD, 183 - ( 184 - "deltaSwingTableIdx_TUP_A[%d] = %d\n", 185 - delta, 186 - deltaSwingTableIdx_TUP_A[delta] 187 - ) 188 - ); 189 227 pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_A] = 190 228 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A]; 191 229 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A] = ··· 185 243 pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = 186 244 deltaSwingTableIdx_TUP_A[delta]; 187 245 188 - ODM_RT_TRACE( 189 - pDM_Odm, 190 - ODM_COMP_TX_PWR_TRACK, 191 - ODM_DBG_LOUD, 192 - ( 193 - "******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", 194 - pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] 195 - ) 196 - ); 197 - 198 246 if (c.RfPathCount > 1) { 199 - ODM_RT_TRACE( 200 - pDM_Odm, 201 - ODM_COMP_TX_PWR_TRACK, 202 - ODM_DBG_LOUD, 203 - ( 204 - "deltaSwingTableIdx_TUP_B[%d] = %d\n", 205 - delta, 206 - deltaSwingTableIdx_TUP_B[delta] 207 - ) 208 - ); 209 247 pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_B] = 210 248 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B]; 211 249 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B] = ··· 194 272 /* Record delta swing for mix mode power tracking */ 195 273 pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = 196 274 deltaSwingTableIdx_TUP_B[delta]; 197 - ODM_RT_TRACE( 198 - pDM_Odm, 199 - ODM_COMP_TX_PWR_TRACK, 200 - ODM_DBG_LOUD, 201 - ( 202 - "******Temp is higher and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", 203 - pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] 204 - ) 205 - ); 206 275 } 207 276 208 277 } else { 209 - ODM_RT_TRACE( 210 - pDM_Odm, 211 - ODM_COMP_TX_PWR_TRACK, 212 - ODM_DBG_LOUD, 213 - ( 214 - "deltaSwingTableIdx_TDOWN_A[%d] = %d\n", 215 - delta, 216 - deltaSwingTableIdx_TDOWN_A[delta] 217 - ) 218 - ); 219 - 220 278 pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_A] = 221 279 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A]; 222 280 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_A] = ··· 206 304 pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = 207 305 -1 * deltaSwingTableIdx_TDOWN_A[delta]; 208 306 209 - ODM_RT_TRACE( 210 - pDM_Odm, 211 - ODM_COMP_TX_PWR_TRACK, 212 - ODM_DBG_LOUD, 213 - ( 214 - "******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] = %d\n", 215 - pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_A] 216 - ) 217 - ); 218 - 219 307 if (c.RfPathCount > 1) { 220 - ODM_RT_TRACE( 221 - pDM_Odm, 222 - ODM_COMP_TX_PWR_TRACK, 223 - ODM_DBG_LOUD, 224 - ( 225 - "deltaSwingTableIdx_TDOWN_B[%d] = %d\n", 226 - delta, 227 - deltaSwingTableIdx_TDOWN_B[delta] 228 - ) 229 - ); 230 - 231 308 pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[ODM_RF_PATH_B] = 232 309 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B]; 233 310 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[ODM_RF_PATH_B] = ··· 215 334 /* Record delta swing for mix mode power tracking */ 216 335 pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = 217 336 -1 * deltaSwingTableIdx_TDOWN_B[delta]; 218 - 219 - ODM_RT_TRACE( 220 - pDM_Odm, 221 - ODM_COMP_TX_PWR_TRACK, 222 - ODM_DBG_LOUD, 223 - ( 224 - "******Temp is lower and pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] = %d\n", 225 - pDM_Odm->Absolute_OFDMSwingIdx[ODM_RF_PATH_B] 226 - ) 227 - ); 228 337 } 229 338 } 230 339 231 340 for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { 232 - ODM_RT_TRACE( 233 - pDM_Odm, 234 - ODM_COMP_TX_PWR_TRACK, 235 - ODM_DBG_LOUD, 236 - ( 237 - "\n\n ================================ [Path-%c] Calculating PowerIndexOffset ================================\n", 238 - (p == ODM_RF_PATH_A ? 'A' : 'B') 239 - ) 240 - ); 241 - 242 341 if ( 243 342 pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] == 244 343 pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] ··· 226 365 pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; 227 366 else 228 367 pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p] - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p]; /* Power Index Diff between 2 times Power Tracking */ 229 - 230 - ODM_RT_TRACE( 231 - pDM_Odm, 232 - ODM_COMP_TX_PWR_TRACK, 233 - ODM_DBG_LOUD, 234 - ( 235 - "[Path-%c] PowerIndexOffset(%d) = DeltaPowerIndex(%d) - DeltaPowerIndexLast(%d)\n", 236 - ( 237 - p == ODM_RF_PATH_A ? 'A' : 'B'), 238 - pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p], 239 - pDM_Odm->RFCalibrateInfo.DeltaPowerIndex[p], 240 - pDM_Odm->RFCalibrateInfo.DeltaPowerIndexLast[p] 241 - ) 242 - ); 243 368 244 369 pDM_Odm->RFCalibrateInfo.OFDM_index[p] = 245 370 pDM_Odm->BbSwingIdxOfdmBase[p] + ··· 241 394 pDM_Odm->BbSwingIdxOfdm[p] = 242 395 pDM_Odm->RFCalibrateInfo.OFDM_index[p]; 243 396 244 - /* *************Print BB Swing Base and Index Offset************* */ 245 - ODM_RT_TRACE( 246 - pDM_Odm, 247 - ODM_COMP_TX_PWR_TRACK, 248 - ODM_DBG_LOUD, 249 - ( 250 - "The 'CCK' final index(%d) = BaseIndex(%d) + PowerIndexOffset(%d)\n", 251 - pDM_Odm->BbSwingIdxCck, 252 - pDM_Odm->BbSwingIdxCckBase, 253 - pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] 254 - ) 255 - ); 256 - ODM_RT_TRACE( 257 - pDM_Odm, 258 - ODM_COMP_TX_PWR_TRACK, 259 - ODM_DBG_LOUD, 260 - ( 261 - "The 'OFDM' final index(%d) = BaseIndex[%c](%d) + PowerIndexOffset(%d)\n", 262 - pDM_Odm->BbSwingIdxOfdm[p], 263 - (p == ODM_RF_PATH_A ? 'A' : 'B'), 264 - pDM_Odm->BbSwingIdxOfdmBase[p], 265 - pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] 266 - ) 267 - ); 268 - 269 397 /* 4 7.1 Handle boundary conditions of index. */ 270 398 if (pDM_Odm->RFCalibrateInfo.OFDM_index[p] > c.SwingTableSize_OFDM-1) 271 399 pDM_Odm->RFCalibrateInfo.OFDM_index[p] = c.SwingTableSize_OFDM-1; 272 400 else if (pDM_Odm->RFCalibrateInfo.OFDM_index[p] < OFDM_min_index) 273 401 pDM_Odm->RFCalibrateInfo.OFDM_index[p] = OFDM_min_index; 274 402 } 275 - ODM_RT_TRACE( 276 - pDM_Odm, 277 - ODM_COMP_TX_PWR_TRACK, 278 - ODM_DBG_LOUD, 279 - ("\n\n ========================================================================================================\n") 280 - ); 281 403 if (pDM_Odm->RFCalibrateInfo.CCK_index > c.SwingTableSize_CCK-1) 282 404 pDM_Odm->RFCalibrateInfo.CCK_index = c.SwingTableSize_CCK-1; 283 405 /* else if (pDM_Odm->RFCalibrateInfo.CCK_index < 0) */ 284 406 /* pDM_Odm->RFCalibrateInfo.CCK_index = 0; */ 285 407 } else { 286 - ODM_RT_TRACE( 287 - pDM_Odm, 288 - ODM_COMP_TX_PWR_TRACK, 289 - ODM_DBG_LOUD, 290 - ( 291 - "The thermal meter is unchanged or TxPowerTracking OFF(%d): ThermalValue: %d , pDM_Odm->RFCalibrateInfo.ThermalValue: %d\n", 292 - pDM_Odm->RFCalibrateInfo.TxPowerTrackControl, 293 - ThermalValue, 294 - pDM_Odm->RFCalibrateInfo.ThermalValue 295 - ) 296 - ); 297 - 298 408 for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) 299 409 pDM_Odm->RFCalibrateInfo.PowerIndexOffset[p] = 0; 300 410 } 301 - ODM_RT_TRACE( 302 - pDM_Odm, 303 - ODM_COMP_TX_PWR_TRACK, 304 - ODM_DBG_LOUD, 305 - ( 306 - "TxPowerTracking: [CCK] Swing Current Index: %d, Swing Base Index: %d\n", 307 - pDM_Odm->RFCalibrateInfo.CCK_index, 308 - pDM_Odm->BbSwingIdxCckBase 309 - ) 310 - ); 311 411 312 412 /* Print Swing base & current */ 313 413 for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) { 314 - ODM_RT_TRACE( 315 - pDM_Odm, 316 - ODM_COMP_TX_PWR_TRACK, 317 - ODM_DBG_LOUD, 318 - ( 319 - "TxPowerTracking: [OFDM] Swing Current Index: %d, Swing Base Index[%c]: %d\n", 320 - pDM_Odm->RFCalibrateInfo.OFDM_index[p], 321 - (p == ODM_RF_PATH_A ? 'A' : 'B'), 322 - pDM_Odm->BbSwingIdxOfdmBase[p] 323 - ) 324 - ); 325 414 } 326 415 327 416 if ( ··· 274 491 /* */ 275 492 /* 2012/04/25 MH Add for tx power tracking to set tx power in tx agc for 88E. */ 276 493 if (ThermalValue > pDM_Odm->RFCalibrateInfo.ThermalValue) { 277 - ODM_RT_TRACE( 278 - pDM_Odm, 279 - ODM_COMP_TX_PWR_TRACK, 280 - ODM_DBG_LOUD, 281 - ( 282 - "Temperature Increasing(A): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", 283 - pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A], 284 - delta, 285 - ThermalValue, 286 - pHalData->EEPROMThermalMeter, 287 - pDM_Odm->RFCalibrateInfo.ThermalValue 288 - ) 289 - ); 290 - 291 494 if (c.RfPathCount > 1) 292 - ODM_RT_TRACE( 293 - pDM_Odm, 294 - ODM_COMP_TX_PWR_TRACK, 295 - ODM_DBG_LOUD, 296 - ( 297 - "Temperature Increasing(B): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", 298 - pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_B], 299 - delta, 300 - ThermalValue, 301 - pHalData->EEPROMThermalMeter, 302 - pDM_Odm->RFCalibrateInfo.ThermalValue 303 - ) 304 - ); 495 + {} 305 496 306 497 } else if (ThermalValue < pDM_Odm->RFCalibrateInfo.ThermalValue) { /* Low temperature */ 307 - ODM_RT_TRACE( 308 - pDM_Odm, 309 - ODM_COMP_TX_PWR_TRACK, 310 - ODM_DBG_LOUD, 311 - ( 312 - "Temperature Decreasing(A): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", 313 - pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_A], 314 - delta, 315 - ThermalValue, 316 - pHalData->EEPROMThermalMeter, 317 - pDM_Odm->RFCalibrateInfo.ThermalValue 318 - ) 319 - ); 320 498 321 499 if (c.RfPathCount > 1) 322 - ODM_RT_TRACE( 323 - pDM_Odm, 324 - ODM_COMP_TX_PWR_TRACK, 325 - ODM_DBG_LOUD, 326 - ( 327 - "Temperature Decreasing(B): delta_pi: %d , delta_t: %d, Now_t: %d, EFUSE_t: %d, Last_t: %d\n", 328 - pDM_Odm->RFCalibrateInfo.PowerIndexOffset[ODM_RF_PATH_B], 329 - delta, 330 - ThermalValue, 331 - pHalData->EEPROMThermalMeter, 332 - pDM_Odm->RFCalibrateInfo.ThermalValue 333 - ) 334 - ); 500 + {} 335 501 336 502 } 337 503 338 504 if (ThermalValue > pHalData->EEPROMThermalMeter) { 339 - ODM_RT_TRACE( 340 - pDM_Odm, 341 - ODM_COMP_TX_PWR_TRACK, 342 - ODM_DBG_LOUD, 343 - ( 344 - "Temperature(%d) higher than PG value(%d)\n", 345 - ThermalValue, 346 - pHalData->EEPROMThermalMeter 347 - ) 348 - ); 349 - 350 - ODM_RT_TRACE( 351 - pDM_Odm, 352 - ODM_COMP_TX_PWR_TRACK, 353 - ODM_DBG_LOUD, 354 - ("**********Enter POWER Tracking MIX_MODE**********\n") 355 - ); 356 505 for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) 357 506 (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, 0); 358 507 } else { 359 - ODM_RT_TRACE( 360 - pDM_Odm, 361 - ODM_COMP_TX_PWR_TRACK, 362 - ODM_DBG_LOUD, 363 - ( 364 - "Temperature(%d) lower than PG value(%d)\n", 365 - ThermalValue, 366 - pHalData->EEPROMThermalMeter 367 - ) 368 - ); 369 - 370 - ODM_RT_TRACE( 371 - pDM_Odm, 372 - ODM_COMP_TX_PWR_TRACK, 373 - ODM_DBG_LOUD, 374 - ("**********Enter POWER Tracking MIX_MODE**********\n") 375 - ); 376 508 for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) 377 509 (*c.ODM_TxPwrTrackSetPwr)(pDM_Odm, MIX_MODE, p, Indexforchannel); 378 510 } ··· 297 599 for (p = ODM_RF_PATH_A; p < c.RfPathCount; p++) 298 600 pDM_Odm->BbSwingIdxOfdmBase[p] = pDM_Odm->BbSwingIdxOfdm[p]; 299 601 300 - ODM_RT_TRACE( 301 - pDM_Odm, 302 - ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 303 - ( 304 - "pDM_Odm->RFCalibrateInfo.ThermalValue = %d ThermalValue = %d\n", 305 - pDM_Odm->RFCalibrateInfo.ThermalValue, 306 - ThermalValue 307 - ) 308 - ); 309 - 310 602 /* Record last Power Tracking Thermal Value */ 311 603 pDM_Odm->RFCalibrateInfo.ThermalValue = ThermalValue; 312 604 } 313 - 314 - ODM_RT_TRACE( 315 - pDM_Odm, 316 - ODM_COMP_TX_PWR_TRACK, 317 - ODM_DBG_LOUD, 318 - ("<===ODM_TXPowerTrackingCallback_ThermalMeter\n") 319 - ); 320 605 321 606 pDM_Odm->RFCalibrateInfo.TXPowercount = 0; 322 607 }
+2 -138
drivers/staging/rtl8723bs/hal/HalPhyRf_8723B.c
··· 129 129 break; 130 130 } 131 131 } 132 - 133 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxPwrTracking path B: X = 0x%x, Y = 0x%x ele_A = 0x%x ele_C = 0x%x ele_D = 0x%x 0xeb4 = 0x%x 0xebc = 0x%x\n", 134 - (u32)IqkResult_X, (u32)IqkResult_Y, (u32)ele_A, (u32)ele_C, (u32)ele_D, (u32)IqkResult_X, (u32)IqkResult_Y)); 135 132 } 136 133 137 134 ··· 207 210 208 211 } 209 212 210 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("===>ODM_TxPwrTrackSetPwr8723B\n")); 211 - 212 213 if (TxRate != 0xFF) { 213 214 /* 2 CCK */ 214 215 if ((TxRate >= MGN_1M) && (TxRate <= MGN_11M)) ··· 228 233 else 229 234 PwrTrackingLimit_OFDM = pDM_Odm->DefaultOfdmIndex; /* Default OFDM index = 30 */ 230 235 } 231 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("TxRate = 0x%x, PwrTrackingLimit =%d\n", TxRate, PwrTrackingLimit_OFDM)); 232 236 233 237 if (Method == TXAGC) { 234 238 struct adapter *Adapter = pDM_Odm->Adapter; 235 - 236 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, ("odm_TxPwrTrackSetPwr8723B CH =%d\n", *(pDM_Odm->pChannel))); 237 239 238 240 pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = pDM_Odm->Absolute_OFDMSwingIdx[RFPath]; 239 241 ··· 262 270 setCCKFilterCoefficient(pDM_Odm, Final_CCK_Swing_Index); 263 271 264 272 } else if (Method == MIX_MODE) { 265 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 266 - ("pDM_Odm->DefaultOfdmIndex =%d, pDM_Odm->DefaultCCKIndex =%d, pDM_Odm->Absolute_OFDMSwingIdx[RFPath]=%d, RF_Path = %d\n", 267 - pDM_Odm->DefaultOfdmIndex, pDM_Odm->DefaultCckIndex, pDM_Odm->Absolute_OFDMSwingIdx[RFPath], RFPath)); 268 - 269 273 Final_OFDM_Swing_Index = pDM_Odm->DefaultOfdmIndex + pDM_Odm->Absolute_OFDMSwingIdx[RFPath]; 270 274 Final_CCK_Swing_Index = pDM_Odm->DefaultCckIndex + pDM_Odm->Absolute_OFDMSwingIdx[RFPath]; 271 275 ··· 275 287 pDM_Odm->Modify_TxAGC_Flag_PathA = true; 276 288 PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM); 277 289 PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7); 278 - 279 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 280 - ("******Path_A Over BBSwing Limit , PwrTrackingLimit = %d , Remnant TxAGC Value = %d\n", 281 - PwrTrackingLimit_OFDM, pDM_Odm->Remnant_OFDMSwingIdx[RFPath])); 282 290 } else if (Final_OFDM_Swing_Index <= 0) { 283 291 pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = Final_OFDM_Swing_Index; 284 292 ··· 285 301 pDM_Odm->Modify_TxAGC_Flag_PathA = true; 286 302 PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM); 287 303 PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7); 288 - 289 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 290 - ("******Path_A Lower then BBSwing lower bound 0 , Remnant TxAGC Value = %d\n", 291 - pDM_Odm->Remnant_OFDMSwingIdx[RFPath])); 292 304 } else { 293 305 setIqkMatrix_8723B(pDM_Odm, Final_OFDM_Swing_Index, RFPath, 294 306 pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][0], 295 307 pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[ChannelMappedIndex].Value[0][1]); 296 - 297 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 298 - ("******Path_A Compensate with BBSwing , Final_OFDM_Swing_Index = %d\n", Final_OFDM_Swing_Index)); 299 308 300 309 if (pDM_Odm->Modify_TxAGC_Flag_PathA) { /* If TxAGC has changed, reset TxAGC again */ 301 310 pDM_Odm->Remnant_OFDMSwingIdx[RFPath] = 0; 302 311 PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, OFDM); 303 312 PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, HT_MCS0_MCS7); 304 313 pDM_Odm->Modify_TxAGC_Flag_PathA = false; 305 - 306 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 307 - ("******Path_A pDM_Odm->Modify_TxAGC_Flag = false\n")); 308 314 } 309 315 } 310 316 ··· 303 329 setCCKFilterCoefficient(pDM_Odm, PwrTrackingLimit_CCK); 304 330 pDM_Odm->Modify_TxAGC_Flag_PathA_CCK = true; 305 331 PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK); 306 - 307 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 308 - ("******Path_A CCK Over Limit , PwrTrackingLimit_CCK = %d , pDM_Odm->Remnant_CCKSwingIdx = %d\n", PwrTrackingLimit_CCK, pDM_Odm->Remnant_CCKSwingIdx)); 309 332 } else if (Final_CCK_Swing_Index <= 0) { /* Lowest CCK Index = 0 */ 310 333 pDM_Odm->Remnant_CCKSwingIdx = Final_CCK_Swing_Index; 311 334 setCCKFilterCoefficient(pDM_Odm, 0); 312 335 pDM_Odm->Modify_TxAGC_Flag_PathA_CCK = true; 313 336 PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK); 314 - 315 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 316 - ("******Path_A CCK Under Limit , PwrTrackingLimit_CCK = %d , pDM_Odm->Remnant_CCKSwingIdx = %d\n", 0, pDM_Odm->Remnant_CCKSwingIdx)); 317 337 } else { 318 338 setCCKFilterCoefficient(pDM_Odm, Final_CCK_Swing_Index); 319 - 320 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 321 - ("******Path_A CCK Compensate with BBSwing , Final_CCK_Swing_Index = %d\n", Final_CCK_Swing_Index)); 322 339 323 340 if (pDM_Odm->Modify_TxAGC_Flag_PathA_CCK) { /* If TxAGC has changed, reset TxAGC again */ 324 341 pDM_Odm->Remnant_CCKSwingIdx = 0; 325 342 PHY_SetTxPowerIndexByRateSection(Adapter, RFPath, pHalData->CurrentChannel, CCK); 326 343 pDM_Odm->Modify_TxAGC_Flag_PathA_CCK = false; 327 - 328 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_TX_PWR_TRACK, ODM_DBG_LOUD, 329 - ("******Path_A pDM_Odm->Modify_TxAGC_Flag_CCK = false\n")); 330 344 } 331 345 } 332 346 } else ··· 404 442 /* Save RF Path */ 405 443 Path_SEL_BB = PHY_QueryBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord); 406 444 407 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK!\n")); 408 - 409 445 /* leave IQK mode */ 410 446 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); 411 447 ··· 473 513 regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord); 474 514 regE94 = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord); 475 515 regE9C = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord); 476 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); 477 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); 478 - /* monitor image power before & after IQK */ 479 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK) = 0x%x, 0xe98(afer IQK) = 0x%x\n", 480 - PHY_QueryBBReg(pDM_Odm->Adapter, 0xe90, bMaskDWord), PHY_QueryBBReg(pDM_Odm->Adapter, 0xe98, bMaskDWord))); 481 516 482 517 483 518 /* Allen 20131125 */ ··· 512 557 513 558 /* leave IQK mode */ 514 559 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); 515 - 516 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A RX IQK:Get TXIMR setting\n")); 517 560 /* 1 Get TXIMR setting */ 518 561 /* modify RXIQK mode table */ 519 562 /* ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); */ ··· 579 626 regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord); 580 627 regE94 = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord); 581 628 regE9C = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord); 582 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); 583 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); 584 - /* monitor image power before & after IQK */ 585 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK) = 0x%x, 0xe98(afer IQK) = 0x%x\n", 586 - PHY_QueryBBReg(pDM_Odm->Adapter, 0xe90, bMaskDWord), PHY_QueryBBReg(pDM_Odm->Adapter, 0xe98, bMaskDWord))); 587 629 588 630 /* Allen 20131125 */ 589 631 tmp = (regE9C & 0x03FF0000)>>16; ··· 599 651 600 652 u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); 601 653 PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, u4tmp); 602 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x\n", PHY_QueryBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord), u4tmp)); 603 - 604 - 605 - /* 1 RX IQK */ 606 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A RX IQK\n")); 607 654 608 655 /* modify RXIQK mode table */ 609 656 /* ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table 2!\n")); */ ··· 669 726 /* Check failed */ 670 727 regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord); 671 728 regEA4 = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQK_A_2, bMaskDWord); 672 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); 673 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x, 0xeac = 0x%x\n", regEA4, regEAC)); 674 - /* monitor image power before & after IQK */ 675 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea0(before IQK) = 0x%x, 0xea8(afer IQK) = 0x%x\n", 676 - PHY_QueryBBReg(pDM_Odm->Adapter, 0xea0, bMaskDWord), PHY_QueryBBReg(pDM_Odm->Adapter, 0xea8, bMaskDWord))); 677 729 678 730 /* PA/PAD controlled by 0x0 */ 679 731 /* leave IQK mode */ ··· 690 752 ) 691 753 result |= 0x02; 692 754 else /* if Tx not OK, ignore Rx */ 693 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK fail!!\n")); 755 + {} 694 756 return result; 695 757 } 696 758 ··· 701 763 u8 result = 0x00; 702 764 struct hal_com_data *pHalData = GET_HAL_DATA(padapter); 703 765 struct dm_odm_t *pDM_Odm = &pHalData->odmpriv; 704 - 705 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK!\n")); 706 766 707 767 /* Save RF Path */ 708 768 Path_SEL_BB = PHY_QueryBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord); ··· 775 839 regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord); 776 840 regE94 = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord); 777 841 regE9C = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord); 778 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); 779 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); 780 - /* monitor image power before & after IQK */ 781 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK) = 0x%x, 0xe98(afer IQK) = 0x%x\n", 782 - PHY_QueryBBReg(pDM_Odm->Adapter, 0xe90, bMaskDWord), PHY_QueryBBReg(pDM_Odm->Adapter, 0xe98, bMaskDWord))); 783 842 784 843 /* Allen 20131125 */ 785 844 tmp = (regE9C & 0x03FF0000)>>16; ··· 811 880 812 881 /* switch to path B */ 813 882 PHY_SetBBReg(pDM_Odm->Adapter, 0x948, bMaskDWord, 0x00000280); 814 - 815 - /* 1 Get TXIMR setting */ 816 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B RX IQK:Get TXIMR setting!\n")); 817 883 /* modify RXIQK mode table */ 818 884 /* ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path-A Rx IQK modify RXIQK mode table!\n")); */ 819 885 PHY_SetRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, RF_WE_LUT, 0x80000, 0x1); ··· 876 948 regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord); 877 949 regE94 = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord); 878 950 regE9C = PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord); 879 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); 880 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe94 = 0x%x, 0xe9c = 0x%x\n", regE94, regE9C)); 881 - /* monitor image power before & after IQK */ 882 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe90(before IQK) = 0x%x, 0xe98(afer IQK) = 0x%x\n", 883 - PHY_QueryBBReg(pDM_Odm->Adapter, 0xe90, bMaskDWord), PHY_QueryBBReg(pDM_Odm->Adapter, 0xe98, bMaskDWord))); 884 951 885 952 /* Allen 20131125 */ 886 953 tmp = (regE9C & 0x03FF0000)>>16; ··· 898 975 899 976 u4tmp = 0x80007C00 | (regE94&0x3FF0000) | ((regE9C&0x3FF0000) >> 16); 900 977 PHY_SetBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord, u4tmp); 901 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xe40 = 0x%x u4tmp = 0x%x\n", PHY_QueryBBReg(pDM_Odm->Adapter, rTx_IQK, bMaskDWord), u4tmp)); 902 - 903 - /* 1 RX IQK */ 904 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B RX IQK\n")); 905 978 906 979 /* modify RXIQK mode table */ 907 980 /* 20121009, Kordan> RF Mode = 3 */ ··· 967 1048 regEAC = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord); 968 1049 regEA4 = PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQK_A_2, bMaskDWord); 969 1050 970 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xeac = 0x%x\n", regEAC)); 971 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea4 = 0x%x, 0xeac = 0x%x\n", regEA4, regEAC)); 972 - /* monitor image power before & after IQK */ 973 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("0xea0(before IQK) = 0x%x, 0xea8(afer IQK) = 0x%x\n", 974 - PHY_QueryBBReg(pDM_Odm->Adapter, 0xea0, bMaskDWord), PHY_QueryBBReg(pDM_Odm->Adapter, 0xea8, bMaskDWord))); 975 - 976 1051 /* PA/PAD controlled by 0x0 */ 977 1052 /* leave IQK mode */ 978 1053 /* PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, 0xffffff00, 0x00000000); */ ··· 989 1076 ) 990 1077 result |= 0x02; 991 1078 else 992 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK fail!!\n")); 1079 + {} 993 1080 994 1081 return result; 995 1082 } ··· 1009 1096 1010 1097 struct odm_rf_cal_t *pRFCalibrateInfo = &pDM_Odm->RFCalibrateInfo; 1011 1098 1012 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQ Calibration %s !\n", (bIQKOK)?"Success":"Failed")); 1013 - 1014 1099 if (final_candidate == 0xFF) 1015 1100 return; 1016 1101 ··· 1019 1108 if ((X & 0x00000200) != 0) 1020 1109 X = X | 0xFFFFFC00; 1021 1110 TX0_A = (X * Oldval_0) >> 8; 1022 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX0_A = 0x%x, Oldval_0 0x%x\n", X, TX0_A, Oldval_0)); 1023 1111 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XATxIQImbalance, 0x3FF, TX0_A); 1024 1112 1025 1113 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, BIT(31), ((X*Oldval_0>>7) & 0x1)); ··· 1029 1119 1030 1120 /* 2 Tx IQC */ 1031 1121 TX0_C = (Y * Oldval_0) >> 8; 1032 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX = 0x%x\n", Y, TX0_C)); 1033 1122 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, 0xF0000000, ((TX0_C&0x3C0)>>6)); 1034 1123 pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][KEY] = rOFDM0_XCTxAFE; 1035 1124 pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC94][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XCTxAFE, bMaskDWord); ··· 1042 1133 pRFCalibrateInfo->TxIQC_8723B[PATH_S1][IDX_0xC4C][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskDWord); 1043 1134 1044 1135 if (bTxOnly) { 1045 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_PHY_PathAFillIQKMatrix8723B only Tx OK\n")); 1046 - 1047 1136 /* <20130226, Kordan> Saving RxIQC, otherwise not initialized. */ 1048 1137 pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][KEY] = rOFDM0_RxIQExtAnta; 1049 1138 pRFCalibrateInfo->RxIQC_8723B[PATH_S1][IDX_0xCA0][VAL] = 0xfffffff & PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_RxIQExtAnta, bMaskDWord); ··· 1083 1176 1084 1177 struct odm_rf_cal_t *pRFCalibrateInfo = &pDM_Odm->RFCalibrateInfo; 1085 1178 1086 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQ Calibration %s !\n", (bIQKOK)?"Success":"Failed")); 1087 - 1088 1179 if (final_candidate == 0xFF) 1089 1180 return; 1090 1181 ··· 1093 1188 if ((X & 0x00000200) != 0) 1094 1189 X = X | 0xFFFFFC00; 1095 1190 TX1_A = (X * Oldval_1) >> 8; 1096 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("X = 0x%x, TX1_A = 0x%x\n", X, TX1_A)); 1097 1191 1098 1192 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XBTxIQImbalance, 0x3FF, TX1_A); 1099 1193 ··· 1103 1199 Y = Y | 0xFFFFFC00; 1104 1200 1105 1201 TX1_C = (Y * Oldval_1) >> 8; 1106 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Y = 0x%x, TX1_C = 0x%x\n", Y, TX1_C)); 1107 1202 1108 1203 /* 2 Tx IQC */ 1109 1204 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XDTxAFE, 0xF0000000, ((TX1_C&0x3C0)>>6)); ··· 1120 1217 pRFCalibrateInfo->TxIQC_8723B[PATH_S0][IDX_0xC4C][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskDWord); 1121 1218 1122 1219 if (bTxOnly) { 1123 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("_PHY_PathBFillIQKMatrix8723B only Tx OK\n")); 1124 - 1125 1220 pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][KEY] = rOFDM0_XARxIQImbalance; 1126 1221 /* pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] = PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XARxIQImbalance, bMaskDWord); */ 1127 1222 pRFCalibrateInfo->RxIQC_8723B[PATH_S0][IDX_0xC14][VAL] = 0x40000100; ··· 1198 1297 if (!ODM_CheckPowerStatus(padapter)) 1199 1298 return; 1200 1299 1201 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save ADDA parameters.\n")); 1202 1300 for (i = 0 ; i < RegisterNum ; i++) { 1203 1301 ADDABackup[i] = PHY_QueryBBReg(pDM_Odm->Adapter, ADDAReg[i], bMaskDWord); 1204 1302 } ··· 1212 1312 struct hal_com_data *pHalData = GET_HAL_DATA(padapter); 1213 1313 struct dm_odm_t *pDM_Odm = &pHalData->odmpriv; 1214 1314 1215 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Save MAC parameters.\n")); 1216 1315 for (i = 0 ; i < (IQK_MAC_REG_NUM - 1); i++) { 1217 1316 MACBackup[i] = rtw_read8(pDM_Odm->Adapter, MACReg[i]); 1218 1317 } ··· 1231 1332 struct hal_com_data *pHalData = GET_HAL_DATA(padapter); 1232 1333 struct dm_odm_t *pDM_Odm = &pHalData->odmpriv; 1233 1334 1234 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Reload ADDA power saving parameters !\n")); 1235 1335 for (i = 0 ; i < RegiesterNum; i++) { 1236 1336 PHY_SetBBReg(pDM_Odm->Adapter, ADDAReg[i], bMaskDWord, ADDABackup[i]); 1237 1337 } ··· 1260 1362 struct hal_com_data *pHalData = GET_HAL_DATA(padapter); 1261 1363 struct dm_odm_t *pDM_Odm = &pHalData->odmpriv; 1262 1364 1263 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("ADDA ON.\n")); 1264 - 1265 1365 pathOn = 0x01c00014; 1266 1366 if (!is2T) { 1267 1367 pathOn = 0x01c00014; ··· 1281 1385 u32 i = 0; 1282 1386 struct hal_com_data *pHalData = GET_HAL_DATA(padapter); 1283 1387 struct dm_odm_t *pDM_Odm = &pHalData->odmpriv; 1284 - 1285 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("MAC settings for Calibration.\n")); 1286 1388 1287 1389 rtw_write8(pDM_Odm->Adapter, MACReg[i], 0x3F); 1288 1390 ··· 1434 1540 /* u32 bbvalue; */ 1435 1541 1436 1542 if (t == 0) { 1437 - /* bbvalue = PHY_QueryBBReg(pDM_Odm->Adapter, rFPGA0_RFMOD, bMaskDWord); */ 1438 - /* RT_DISP(FINIT, INIT_IQK, ("phy_IQCalibrate_8188E() ==>0x%08x\n", bbvalue)); */ 1439 - 1440 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); 1441 1543 1442 1544 /* Save ADDA parameters, turn Path A ADDA on */ 1443 1545 _PHY_SaveADDARegisters8723B(padapter, ADDA_REG, pDM_Odm->RFCalibrateInfo.ADDA_backup, IQK_ADDA_REG_NUM); 1444 1546 _PHY_SaveMACRegisters8723B(padapter, IQK_MAC_REG, pDM_Odm->RFCalibrateInfo.IQK_MAC_backup); 1445 1547 _PHY_SaveADDARegisters8723B(padapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup, IQK_BB_REG_NUM); 1446 1548 } 1447 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQ Calibration for %s for %d times\n", (is2T ? "2T2R" : "1T1R"), t)); 1448 1549 1449 1550 _PHY_PathADDAOn8723B(padapter, ADDA_REG, is2T); 1450 1551 ··· 1485 1596 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); 1486 1597 pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_A] = PHY_QueryRFReg(pDM_Odm->Adapter, ODM_RF_PATH_A, 0x8, bRFRegOffsetMask); 1487 1598 1488 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Tx IQK Success!!\n")); 1489 1599 result[t][0] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; 1490 1600 result[t][1] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; 1491 1601 break; ··· 1495 1607 for (i = 0 ; i < retryCount ; i++) { 1496 1608 PathAOK = phy_PathA_RxIQK8723B(padapter, is2T, RF_Path); 1497 1609 if (PathAOK == 0x03) { 1498 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Success!!\n")); 1499 1610 /* result[t][0] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; */ 1500 1611 /* result[t][1] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; */ 1501 1612 result[t][2] = (PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; 1502 1613 result[t][3] = (PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; 1503 1614 break; 1504 1615 } else { 1505 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A Rx IQK Fail!!\n")); 1506 1616 } 1507 1617 } 1508 1618 1509 1619 if (0x00 == PathAOK) { 1510 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path A IQK failed!!\n")); 1511 1620 } 1512 1621 1513 1622 /* path B IQK */ ··· 1518 1633 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0x000000); 1519 1634 pDM_Odm->RFCalibrateInfo.TxLOK[ODM_RF_PATH_B] = PHY_QueryRFReg(pDM_Odm->Adapter, ODM_RF_PATH_B, 0x8, bRFRegOffsetMask); 1520 1635 1521 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Tx IQK Success!!\n")); 1522 1636 result[t][4] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; 1523 1637 result[t][5] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; 1524 1638 break; ··· 1528 1644 for (i = 0 ; i < retryCount ; i++) { 1529 1645 PathBOK = phy_PathB_RxIQK8723B(padapter, is2T); 1530 1646 if (PathBOK == 0x03) { 1531 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK Success!!\n")); 1532 1647 /* result[t][0] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_Before_IQK_A, bMaskDWord)&0x3FF0000)>>16; */ 1533 1648 /* result[t][1] = (PHY_QueryBBReg(pDM_Odm->Adapter, rTx_Power_After_IQK_A, bMaskDWord)&0x3FF0000)>>16; */ 1534 1649 result[t][6] = (PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_Before_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; 1535 1650 result[t][7] = (PHY_QueryBBReg(pDM_Odm->Adapter, rRx_Power_After_IQK_A_2, bMaskDWord)&0x3FF0000)>>16; 1536 1651 break; 1537 1652 } else { 1538 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B Rx IQK Fail!!\n")); 1539 1653 } 1540 1654 } 1541 1655 1542 1656 /* Allen end */ 1543 1657 if (0x00 == PathBOK) { 1544 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("Path B IQK failed!!\n")); 1545 1658 } 1546 1659 } 1547 1660 1548 1661 /* Back to BB mode, load original value */ 1549 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Back to BB mode, load original value!\n")); 1550 1662 PHY_SetBBReg(pDM_Odm->Adapter, rFPGA0_IQK, bMaskH3Bytes, 0); 1551 1663 1552 1664 if (t != 0) { ··· 1572 1692 PHY_SetBBReg(pDM_Odm->Adapter, rRx_IQK_Tone_A, bMaskDWord, 0x01008c00); 1573 1693 1574 1694 } 1575 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("phy_IQCalibrate_8723B() <==\n")); 1576 1695 1577 1696 } 1578 1697 ··· 1747 1868 } 1748 1869 1749 1870 if (bReCovery) { 1750 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, ("PHY_IQCalibrate_8723B: Return due to bReCovery!\n")); 1751 1871 _PHY_ReloadADDARegisters8723B(padapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); 1752 1872 return; 1753 1873 } 1754 1874 StartTime = jiffies; 1755 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK:Start!!!\n")); 1756 1875 1757 1876 /* save default GNT_BT */ 1758 1877 GNT_BT_default = PHY_QueryBBReg(pDM_Odm->Adapter, 0x764, bMaskDWord); ··· 1785 1908 is12simular = phy_SimularityCompare_8723B(padapter, result, 0, 1); 1786 1909 if (is12simular) { 1787 1910 final_candidate = 0; 1788 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is12simular final_candidate is %x\n", final_candidate)); 1789 1911 break; 1790 1912 } 1791 1913 } ··· 1793 1917 is13simular = phy_SimularityCompare_8723B(padapter, result, 0, 2); 1794 1918 if (is13simular) { 1795 1919 final_candidate = 0; 1796 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is13simular final_candidate is %x\n", final_candidate)); 1797 1920 1798 1921 break; 1799 1922 } ··· 1800 1925 is23simular = phy_SimularityCompare_8723B(padapter, result, 1, 2); 1801 1926 if (is23simular) { 1802 1927 final_candidate = 1; 1803 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: is23simular final_candidate is %x\n", final_candidate)); 1804 1928 } else { 1805 1929 for (i = 0; i < 8; i++) 1806 1930 RegTmp += result[3][i]; ··· 1821 1947 RegEBC = result[i][5]; 1822 1948 RegEC4 = result[i][6]; 1823 1949 RegECC = result[i][7]; 1824 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94 =%x RegE9C =%x RegEA4 =%x RegEAC =%x RegEB4 =%x RegEBC =%x RegEC4 =%x RegECC =%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); 1825 1950 } 1826 1951 1827 1952 if (final_candidate != 0xff) { ··· 1832 1959 pDM_Odm->RFCalibrateInfo.RegEBC = RegEBC = result[final_candidate][5]; 1833 1960 RegEC4 = result[final_candidate][6]; 1834 1961 RegECC = result[final_candidate][7]; 1835 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: final_candidate is %x\n", final_candidate)); 1836 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: RegE94 =%x RegE9C =%x RegEA4 =%x RegEAC =%x RegEB4 =%x RegEBC =%x RegEC4 =%x RegECC =%x\n ", RegE94, RegE9C, RegEA4, RegEAC, RegEB4, RegEBC, RegEC4, RegECC)); 1837 1962 bPathAOK = bPathBOK = true; 1838 1963 } else { 1839 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK: FAIL use default value\n")); 1840 - 1841 1964 pDM_Odm->RFCalibrateInfo.RegE94 = pDM_Odm->RFCalibrateInfo.RegEB4 = 0x100; /* X default value */ 1842 1965 pDM_Odm->RFCalibrateInfo.RegE9C = pDM_Odm->RFCalibrateInfo.RegEBC = 0x0; /* Y default value */ 1843 1966 } ··· 1854 1985 pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[0].Value[0][i] = result[final_candidate][i]; 1855 1986 pDM_Odm->RFCalibrateInfo.IQKMatrixRegSetting[0].bIQKDone = true; 1856 1987 } 1857 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("\nIQK OK Indexforchannel %d.\n", 0)); 1858 1988 1859 1989 _PHY_SaveADDARegisters8723B(padapter, IQK_BB_REG_92C, pDM_Odm->RFCalibrateInfo.IQK_BB_backup_recover, 9); 1860 1990 ··· 1884 2016 1885 2017 pDM_Odm->RFCalibrateInfo.bIQKInProgress = false; 1886 2018 1887 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK finished\n")); 1888 2019 ProgressingTime = jiffies_to_msecs(jiffies - StartTime); 1889 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("IQK ProgressingTime = %d\n", ProgressingTime)); 1890 2020 1891 2021 1892 2022 } ··· 1922 2056 1923 2057 pDM_Odm->RFCalibrateInfo.bLCKInProgress = false; 1924 2058 1925 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK:Finish!!!interface %d\n", pDM_Odm->InterfaceIndex)); 1926 2059 ProgressingTime = jiffies_to_msecs(jiffies - StartTime); 1927 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CALIBRATION, ODM_DBG_LOUD, ("LCK ProgressingTime = %d\n", ProgressingTime)); 1928 2060 }
-34
drivers/staging/rtl8723bs/hal/odm.c
··· 323 323 324 324 static void odm_CmnInfoInit_Debug(struct dm_odm_t *pDM_Odm) 325 325 { 326 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug ==>\n")); 327 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform =%d\n", pDM_Odm->SupportPlatform)); 328 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility = 0x%x\n", pDM_Odm->SupportAbility)); 329 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface =%d\n", pDM_Odm->SupportInterface)); 330 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType = 0x%x\n", pDM_Odm->SupportICType)); 331 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion =%d\n", pDM_Odm->CutVersion)); 332 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion =%d\n", pDM_Odm->FabVersion)); 333 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType =%d\n", pDM_Odm->RFType)); 334 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType =%d\n", pDM_Odm->BoardType)); 335 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA =%d\n", pDM_Odm->ExtLNA)); 336 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA =%d\n", pDM_Odm->ExtPA)); 337 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW =%d\n", pDM_Odm->ExtTRSW)); 338 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID =%d\n", pDM_Odm->PatchID)); 339 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest =%d\n", pDM_Odm->bInHctTest)); 340 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest =%d\n", pDM_Odm->bWIFITest)); 341 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent =%d\n", pDM_Odm->bDualMacSmartConcurrent)); 342 - 343 326 } 344 327 345 328 static void odm_BasicDbgMessage(struct dm_odm_t *pDM_Odm) 346 329 { 347 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_BasicDbgMsg ==>\n")); 348 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked = %d, RSSI_Min = %d,\n", 349 - pDM_Odm->bLinked, pDM_Odm->RSSI_Min)); 350 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RxRate = 0x%x, RSSI_A = %d, RSSI_B = %d\n", 351 - pDM_Odm->RxRate, pDM_Odm->RSSI_A, pDM_Odm->RSSI_B)); 352 330 } 353 331 354 332 /* 3 ============================================================ */ ··· 460 482 break; 461 483 } 462 484 463 - /* printk("%s ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", __func__, rssi_level, WirelessMode, rate_bitmap); */ 464 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", rssi_level, WirelessMode, rate_bitmap)); 465 - 466 485 return ra_mask & rate_bitmap; 467 486 468 487 } ··· 470 495 struct adapter *padapter = pDM_Odm->Adapter; 471 496 472 497 if (padapter->bDriverStopped) { 473 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); 474 498 return; 475 499 } 476 500 477 501 if (!pDM_Odm->bUseRAMask) { 478 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); 479 502 return; 480 503 } 481 504 ··· 485 512 continue; 486 513 487 514 if (true == ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false, &pstat->rssi_level)) { 488 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); 489 515 /* printk("RSSI:%d, RSSI_LEVEL:%d\n", pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level); */ 490 516 rtw_hal_update_ra_mask(pstat, pstat->rssi_level); 491 517 } ··· 513 541 static void odm_RefreshRateAdaptiveMask(struct dm_odm_t *pDM_Odm) 514 542 { 515 543 516 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask()---------->\n")); 517 544 if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) { 518 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("odm_RefreshRateAdaptiveMask(): Return cos not supported\n")); 519 545 return; 520 546 } 521 547 odm_RefreshRateAdaptiveMaskCE(pDM_Odm); ··· 566 596 /* printk("==>%s, RATRState:0x%02x , RSSI:%d\n", __func__, RATRState, RSSI); */ 567 597 568 598 if (*pRATRState != RATRState || bForceUpdate) { 569 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState)); 570 599 *pRATRState = RATRState; 571 600 return true; 572 601 } ··· 827 858 odm_BasicDbgMessage(pDM_Odm); 828 859 odm_FalseAlarmCounterStatistics(pDM_Odm); 829 860 odm_NHMCounterStatistics(pDM_Odm); 830 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): RSSI = 0x%x\n", pDM_Odm->RSSI_Min)); 831 861 832 862 odm_RSSIMonitorCheck(pDM_Odm); 833 863 ··· 840 872 /* (pDM_Odm->SupportICType & (ODM_RTL8188E) &&(&&(((pDM_Odm->SupportInterface == ODM_ITRF_SDIO))) */ 841 873 /* */ 842 874 ) { 843 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("----Step1: odm_DIG is in LPS mode\n")); 844 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("---Step2: 8723AS is in LPS mode\n")); 845 875 odm_DIGbyRSSI_LPS(pDM_Odm); 846 876 } else 847 877 odm_DIG(pDM_Odm);
-107
drivers/staging/rtl8723bs/hal/odm_CfoTracking.c
··· 25 25 0x00FFF000, 26 26 (CrystalCap | (CrystalCap << 6)) 27 27 ); 28 - 29 - ODM_RT_TRACE( 30 - pDM_Odm, 31 - ODM_COMP_CFO_TRACKING, 32 - ODM_DBG_LOUD, 33 - ( 34 - "odm_SetCrystalCap(): CrystalCap = 0x%x\n", 35 - CrystalCap 36 - ) 37 - ); 38 28 } 39 29 40 30 static u8 odm_GetDefaultCrytaltalCap(void *pDM_VOID) ··· 88 98 pCfoTrack->CrystalCap = odm_GetDefaultCrytaltalCap(pDM_Odm); 89 99 pCfoTrack->bATCStatus = odm_GetATCStatus(pDM_Odm); 90 100 pCfoTrack->bAdjust = true; 91 - ODM_RT_TRACE( 92 - pDM_Odm, 93 - ODM_COMP_CFO_TRACKING, 94 - ODM_DBG_LOUD, 95 - ("ODM_CfoTracking_init() =========>\n") 96 - ); 97 - ODM_RT_TRACE( 98 - pDM_Odm, 99 - ODM_COMP_CFO_TRACKING, 100 - ODM_DBG_LOUD, 101 - ( 102 - "ODM_CfoTracking_init(): bATCStatus = %d, CrystalCap = 0x%x\n", 103 - pCfoTrack->bATCStatus, 104 - pCfoTrack->DefXCap 105 - ) 106 - ); 107 101 } 108 102 109 103 void ODM_CfoTracking(void *pDM_VOID) ··· 101 127 102 128 /* 4 Support ability */ 103 129 if (!(pDM_Odm->SupportAbility & ODM_BB_CFO_TRACKING)) { 104 - ODM_RT_TRACE( 105 - pDM_Odm, 106 - ODM_COMP_CFO_TRACKING, 107 - ODM_DBG_LOUD, 108 - ("ODM_CfoTracking(): Return: SupportAbility ODM_BB_CFO_TRACKING is disabled\n") 109 - ); 110 130 return; 111 131 } 112 - 113 - ODM_RT_TRACE( 114 - pDM_Odm, 115 - ODM_COMP_CFO_TRACKING, 116 - ODM_DBG_LOUD, 117 - ("ODM_CfoTracking() =========>\n") 118 - ); 119 132 120 133 if (!pDM_Odm->bLinked || !pDM_Odm->bOneEntryOnly) { 121 134 /* 4 No link or more than one entry */ 122 135 ODM_CfoTrackingReset(pDM_Odm); 123 - ODM_RT_TRACE( 124 - pDM_Odm, 125 - ODM_COMP_CFO_TRACKING, 126 - ODM_DBG_LOUD, 127 - ( 128 - "ODM_CfoTracking(): Reset: bLinked = %d, bOneEntryOnly = %d\n", 129 - pDM_Odm->bLinked, 130 - pDM_Odm->bOneEntryOnly 131 - ) 132 - ); 133 136 } else { 134 137 /* 3 1. CFO Tracking */ 135 138 /* 4 1.1 No new packet */ 136 139 if (pCfoTrack->packetCount == pCfoTrack->packetCount_pre) { 137 - ODM_RT_TRACE( 138 - pDM_Odm, 139 - ODM_COMP_CFO_TRACKING, 140 - ODM_DBG_LOUD, 141 - ( 142 - "ODM_CfoTracking(): packet counter doesn't change\n" 143 - ) 144 - ); 145 140 return; 146 141 } 147 142 pCfoTrack->packetCount_pre = pCfoTrack->packetCount; ··· 123 180 CFO_ave = CFO_kHz_A; 124 181 else 125 182 CFO_ave = (int)(CFO_kHz_A + CFO_kHz_B) >> 1; 126 - ODM_RT_TRACE( 127 - pDM_Odm, 128 - ODM_COMP_CFO_TRACKING, 129 - ODM_DBG_LOUD, 130 - ( 131 - "ODM_CfoTracking(): CFO_kHz_A = %dkHz, CFO_kHz_B = %dkHz, CFO_ave = %dkHz\n", 132 - CFO_kHz_A, 133 - CFO_kHz_B, 134 - CFO_ave 135 - ) 136 - ); 137 183 138 184 /* 4 1.3 Avoid abnormal large CFO */ 139 185 CFO_ave_diff = ··· 135 203 pCfoTrack->largeCFOHit == 0 && 136 204 !pCfoTrack->bAdjust 137 205 ) { 138 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_CFO_TRACKING, ODM_DBG_LOUD, ("ODM_CfoTracking(): first large CFO hit\n")); 139 206 pCfoTrack->largeCFOHit = 1; 140 207 return; 141 208 } else ··· 154 223 if (pDM_Odm->bBtEnabled) { 155 224 pCfoTrack->bAdjust = false; 156 225 odm_SetCrystalCap(pDM_Odm, pCfoTrack->DefXCap); 157 - ODM_RT_TRACE( 158 - pDM_Odm, 159 - ODM_COMP_CFO_TRACKING, 160 - ODM_DBG_LOUD, 161 - ("ODM_CfoTracking(): Disable CFO tracking for BT!!\n") 162 - ); 163 226 } 164 227 165 228 /* 4 1.6 Big jump */ ··· 162 237 Adjust_Xtal = Adjust_Xtal+((CFO_ave-CFO_TH_XTAL_LOW)>>2); 163 238 else if (CFO_ave < (-CFO_TH_XTAL_LOW)) 164 239 Adjust_Xtal = Adjust_Xtal+((CFO_TH_XTAL_LOW-CFO_ave)>>2); 165 - 166 - ODM_RT_TRACE( 167 - pDM_Odm, 168 - ODM_COMP_CFO_TRACKING, 169 - ODM_DBG_LOUD, 170 - ( 171 - "ODM_CfoTracking(): Crystal cap offset = %d\n", 172 - Adjust_Xtal 173 - ) 174 - ); 175 240 } 176 241 177 242 /* 4 1.7 Adjust Crystal Cap. */ ··· 178 263 179 264 odm_SetCrystalCap(pDM_Odm, (u8)CrystalCap); 180 265 } 181 - ODM_RT_TRACE( 182 - pDM_Odm, 183 - ODM_COMP_CFO_TRACKING, 184 - ODM_DBG_LOUD, 185 - ( 186 - "ODM_CfoTracking(): Crystal cap = 0x%x, Default Crystal cap = 0x%x\n", 187 - pCfoTrack->CrystalCap, 188 - pCfoTrack->DefXCap 189 - ) 190 - ); 191 266 192 267 /* 3 2. Dynamic ATC switch */ 193 268 if (CFO_ave < CFO_TH_ATC && CFO_ave > -CFO_TH_ATC) { 194 269 odm_SetATCStatus(pDM_Odm, false); 195 - ODM_RT_TRACE( 196 - pDM_Odm, 197 - ODM_COMP_CFO_TRACKING, 198 - ODM_DBG_LOUD, 199 - ("ODM_CfoTracking(): Disable ATC!!\n") 200 - ); 201 270 } else { 202 271 odm_SetATCStatus(pDM_Odm, true); 203 - ODM_RT_TRACE( 204 - pDM_Odm, 205 - ODM_COMP_CFO_TRACKING, 206 - ODM_DBG_LOUD, 207 - ("ODM_CfoTracking(): Enable ATC!!\n") 208 - ); 209 272 } 210 273 } 211 274 }
-319
drivers/staging/rtl8723bs/hal/odm_DIG.c
··· 81 81 *(pDM_Odm->pNumTxBytesUnicast); 82 82 pDM_Odm->NHMLastRxOkcnt = 83 83 *(pDM_Odm->pNumRxBytesUnicast); 84 - ODM_RT_TRACE( 85 - pDM_Odm, 86 - ODM_COMP_DIG, 87 - ODM_DBG_LOUD, 88 - ( 89 - "NHM_cnt_0 =%d, NHMCurTxOkcnt = %llu, NHMCurRxOkcnt = %llu\n", 90 - pDM_Odm->NHM_cnt_0, 91 - pDM_Odm->NHMCurTxOkcnt, 92 - pDM_Odm->NHMCurRxOkcnt 93 - ) 94 - ); 95 84 96 85 97 86 if ((pDM_Odm->NHMCurTxOkcnt) + 1 > (u64)(pDM_Odm->NHMCurRxOkcnt<<2) + 1) { /* Tx > 4*Rx possible for adaptivity test */ ··· 116 127 } 117 128 } 118 129 } 119 - 120 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("adaptivity_flag = %d\n ", pDM_Odm->adaptivity_flag)); 121 130 } 122 131 123 132 void odm_SearchPwdBLowerBound(void *pDM_VOID, u8 IGI_target) ··· 186 199 pDM_Odm->Adaptivity_IGI_upper = IGI; 187 200 } 188 201 } 189 - 190 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("IGI = 0x%x, H2L_lb = 0x%x, L2H_lb = 0x%x\n", IGI, pDM_Odm->H2L_lb, pDM_Odm->L2H_lb)); 191 202 } 192 203 193 204 void odm_AdaptivityInit(void *pDM_VOID) ··· 224 239 bool EDCCA_State = false; 225 240 226 241 if (!(pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY)) { 227 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Go to odm_DynamicEDCCA()\n")); 228 242 return; 229 243 } 230 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_Adaptivity() =====>\n")); 231 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ForceEDCCA =%d, IGI_Base = 0x%x, TH_L2H_ini = %d, TH_EDCCA_HL_diff = %d, AdapEn_RSSI = %d\n", 232 - pDM_Odm->ForceEDCCA, pDM_Odm->IGI_Base, pDM_Odm->TH_L2H_ini, pDM_Odm->TH_EDCCA_HL_diff, pDM_Odm->AdapEn_RSSI)); 233 244 234 245 if (*pDM_Odm->pBandWidth == ODM_BW20M) /* CHANNEL_WIDTH_20 */ 235 246 IGI_target = pDM_Odm->IGI_Base; ··· 265 284 ) 266 285 odm_NHMBB(pDM_Odm); 267 286 268 - ODM_RT_TRACE( 269 - pDM_Odm, 270 - ODM_COMP_DIG, 271 - ODM_DBG_LOUD, 272 - ( 273 - "BandWidth =%s, IGI_target = 0x%x, EDCCA_State =%d\n", 274 - (*pDM_Odm->pBandWidth == ODM_BW80M) ? "80M" : 275 - ((*pDM_Odm->pBandWidth == ODM_BW40M) ? "40M" : "20M"), 276 - IGI_target, 277 - EDCCA_State 278 - ) 279 - ); 280 - 281 287 if (EDCCA_State) { 282 288 Diff = IGI_target-(s8)IGI; 283 289 TH_L2H_dmc = pDM_Odm->TH_L2H_ini + Diff; ··· 282 314 TH_L2H_dmc = 0x7f; 283 315 TH_H2L_dmc = 0x7f; 284 316 } 285 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("IGI = 0x%x, TH_L2H_dmc = %d, TH_H2L_dmc = %d\n", 286 - IGI, TH_L2H_dmc, TH_H2L_dmc)); 287 317 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc); 288 318 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte2, (u8)TH_H2L_dmc); 289 319 } ··· 292 326 struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable; 293 327 294 328 if (pDM_DigTable->bStopDIG) { 295 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("Stop Writing IGI\n")); 296 329 return; 297 330 } 298 - 299 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("ODM_REG(IGI_A, pDM_Odm) = 0x%x, ODM_BIT(IGI, pDM_Odm) = 0x%x\n", 300 - ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm))); 301 331 302 332 if (pDM_DigTable->CurIGValue != CurrentIGI) { 303 333 /* 1 Check initial gain by upper bound */ 304 334 if (!pDM_DigTable->bPSDInProgress) { 305 335 if (CurrentIGI > pDM_DigTable->rx_gain_range_max) { 306 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("CurrentIGI(0x%02x) is larger than upper bound !!\n", pDM_DigTable->rx_gain_range_max)); 307 336 CurrentIGI = pDM_DigTable->rx_gain_range_max; 308 337 } 309 338 ··· 313 352 pDM_DigTable->CurIGValue = CurrentIGI; 314 353 } 315 354 316 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_TRACE, ("CurrentIGI(0x%02x).\n", CurrentIGI)); 317 - 318 355 } 319 356 320 357 void odm_PauseDIG( ··· 325 366 struct dig_t *pDM_DigTable = &pDM_Odm->DM_DigTable; 326 367 static bool bPaused; 327 368 328 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG() =========>\n")); 329 - 330 369 if ( 331 370 (pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY) && 332 371 pDM_Odm->TxHangFlg == true 333 372 ) { 334 - ODM_RT_TRACE( 335 - pDM_Odm, 336 - ODM_COMP_DIG, 337 - ODM_DBG_LOUD, 338 - ("odm_PauseDIG(): Dynamic adjust threshold in progress !!\n") 339 - ); 340 373 return; 341 374 } 342 375 ··· 336 385 !bPaused && (!(pDM_Odm->SupportAbility & ODM_BB_DIG) || 337 386 !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) 338 387 ){ 339 - ODM_RT_TRACE( 340 - pDM_Odm, 341 - ODM_COMP_DIG, 342 - ODM_DBG_LOUD, 343 - ("odm_PauseDIG(): Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n") 344 - ); 345 388 return; 346 389 } 347 390 ··· 344 399 case ODM_PAUSE_DIG: 345 400 /* 2 Disable DIG */ 346 401 ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility & (~ODM_BB_DIG)); 347 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Pause DIG !!\n")); 348 402 349 403 /* 2 Backup IGI value */ 350 404 if (!bPaused) { 351 405 pDM_DigTable->IGIBackup = pDM_DigTable->CurIGValue; 352 406 bPaused = true; 353 407 } 354 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Backup IGI = 0x%x\n", pDM_DigTable->IGIBackup)); 355 408 356 409 /* 2 Write new IGI value */ 357 410 ODM_Write_DIG(pDM_Odm, IGIValue); 358 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write new IGI = 0x%x\n", IGIValue)); 359 411 break; 360 412 361 413 /* 1 Resume DIG */ ··· 361 419 /* 2 Write backup IGI value */ 362 420 ODM_Write_DIG(pDM_Odm, pDM_DigTable->IGIBackup); 363 421 bPaused = false; 364 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Write original IGI = 0x%x\n", pDM_DigTable->IGIBackup)); 365 422 366 423 /* 2 Enable DIG */ 367 424 ODM_CmnInfoUpdate(pDM_Odm, ODM_CMNINFO_ABILITY, pDM_Odm->SupportAbility | ODM_BB_DIG); 368 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Resume DIG !!\n")); 369 425 } 370 426 break; 371 427 372 428 default: 373 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_PauseDIG(): Wrong type !!\n")); 374 429 break; 375 430 } 376 431 } ··· 378 439 379 440 /* SupportAbility */ 380 441 if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) { 381 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_FA_CNT is disabled\n")); 382 442 return true; 383 443 } 384 444 385 445 /* SupportAbility */ 386 446 if (!(pDM_Odm->SupportAbility & ODM_BB_DIG)) { 387 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: SupportAbility ODM_BB_DIG is disabled\n")); 388 447 return true; 389 448 } 390 449 391 450 /* ScanInProcess */ 392 451 if (*(pDM_Odm->pbScanInProcess)) { 393 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: In Scan Progress\n")); 394 452 return true; 395 453 } 396 454 397 455 /* add by Neil Chen to avoid PSD is processing */ 398 456 if (pDM_Odm->bDMInitialGainEnable == false) { 399 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Return: PSD is Processing\n")); 400 457 return true; 401 458 } 402 459 ··· 458 523 if (odm_DigAbort(pDM_Odm)) 459 524 return; 460 525 461 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() ===========================>\n\n")); 462 - 463 526 if (pDM_Odm->adaptivity_flag == true) 464 527 Adap_IGI_Upper = pDM_Odm->Adaptivity_IGI_upper; 465 528 ··· 473 540 dm_dig_min = DM_DIG_MIN_NIC; 474 541 DIG_MaxOfMin = DM_DIG_MAX_AP; 475 542 476 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Absolutely upper bound = 0x%x, lower bound = 0x%x\n", dm_dig_max, dm_dig_min)); 477 - 478 543 /* 1 Adjust boundary by RSSI */ 479 544 if (pDM_Odm->bLinked && bPerformance) { 480 545 /* 2 Modify DIG upper bound */ 481 546 /* 4 Modify DIG upper bound for 92E, 8723A\B, 8821 & 8812 BT */ 482 547 if (pDM_Odm->bBtLimitedDig == 1) { 483 548 offset = 10; 484 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Coex. case: Force upper bound to RSSI + %d !!!!!!\n", offset)); 485 549 } else 486 550 offset = 15; 487 551 ··· 516 586 DIG_Dynamic_MIN = DIG_MaxOfMin; 517 587 else 518 588 DIG_Dynamic_MIN = (u8) pDM_DigTable->AntDiv_RSSI_max; 519 - ODM_RT_TRACE( 520 - pDM_Odm, 521 - ODM_COMP_ANT_DIV, 522 - ODM_DBG_LOUD, 523 - ( 524 - "odm_DIG(): Antenna diversity case: Force lower bound to 0x%x !!!!!!\n", 525 - DIG_Dynamic_MIN 526 - ) 527 - ); 528 - ODM_RT_TRACE( 529 - pDM_Odm, 530 - ODM_COMP_ANT_DIV, 531 - ODM_DBG_LOUD, 532 - ( 533 - "odm_DIG(): Antenna diversity case: RSSI_max = 0x%x !!!!!!\n", 534 - pDM_DigTable->AntDiv_RSSI_max 535 - ) 536 - ); 537 589 } 538 590 } 539 591 } 540 - ODM_RT_TRACE( 541 - pDM_Odm, 542 - ODM_COMP_DIG, 543 - ODM_DBG_LOUD, 544 - ( 545 - "odm_DIG(): Adjust boundary by RSSI Upper bound = 0x%x, Lower bound = 0x%x\n", 546 - pDM_DigTable->rx_gain_range_max, 547 - DIG_Dynamic_MIN 548 - ) 549 - ); 550 - ODM_RT_TRACE( 551 - pDM_Odm, 552 - ODM_COMP_DIG, 553 - ODM_DBG_LOUD, 554 - ( 555 - "odm_DIG(): Link status: bLinked = %d, RSSI = %d, bFirstConnect = %d, bFirsrDisConnect = %d\n\n", 556 - pDM_Odm->bLinked, 557 - pDM_Odm->RSSI_Min, 558 - FirstConnect, 559 - FirstDisConnect 560 - ) 561 - ); 562 592 563 593 /* 1 Modify DIG lower bound, deal with abnormal case */ 564 594 /* 2 Abnormal false alarm case */ ··· 535 645 pDM_Odm->bsta_state 536 646 ) { 537 647 pDM_DigTable->rx_gain_range_min = dm_dig_min; 538 - ODM_RT_TRACE( 539 - pDM_Odm, 540 - ODM_COMP_DIG, 541 - ODM_DBG_LOUD, 542 - ( 543 - "odm_DIG(): Abnormal #beacon (%d) case in STA mode: Force lower bound to 0x%x !!!!!!\n\n", 544 - pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, 545 - pDM_DigTable->rx_gain_range_min 546 - ) 547 - ); 548 648 } 549 649 } 550 650 551 651 /* 2 Abnormal lower bound case */ 552 652 if (pDM_DigTable->rx_gain_range_min > pDM_DigTable->rx_gain_range_max) { 553 653 pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; 554 - ODM_RT_TRACE( 555 - pDM_Odm, 556 - ODM_COMP_DIG, 557 - ODM_DBG_LOUD, 558 - ( 559 - "odm_DIG(): Abnormal lower bound case: Force lower bound to 0x%x !!!!!!\n\n", 560 - pDM_DigTable->rx_gain_range_min 561 - ) 562 - ); 563 654 } 564 655 565 656 566 657 /* 1 False alarm threshold decision */ 567 658 odm_FAThresholdCheck(pDM_Odm, bDFSBand, bPerformance, RxTp, TxTp, dm_FA_thres); 568 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): False alarm threshold = %d, %d, %d\n\n", dm_FA_thres[0], dm_FA_thres[1], dm_FA_thres[2])); 569 659 570 660 /* 1 Adjust initial gain by false alarm */ 571 661 if (pDM_Odm->bLinked && bPerformance) { 572 - /* 2 After link */ 573 - ODM_RT_TRACE( 574 - pDM_Odm, 575 - ODM_COMP_DIG, 576 - ODM_DBG_LOUD, 577 - ("odm_DIG(): Adjust IGI after link\n") 578 - ); 579 662 580 663 if (bFirstTpTarget || (FirstConnect && bPerformance)) { 581 664 pDM_DigTable->LargeFAHit = 0; ··· 560 697 if (CurrentIGI < DIG_MaxOfMin) 561 698 CurrentIGI = DIG_MaxOfMin; 562 699 } 563 - 564 - ODM_RT_TRACE( 565 - pDM_Odm, 566 - ODM_COMP_DIG, 567 - ODM_DBG_LOUD, 568 - ( 569 - "odm_DIG(): First connect case: IGI does on-shot to 0x%x\n", 570 - CurrentIGI 571 - ) 572 - ); 573 700 574 701 } else { 575 702 if (pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) ··· 575 722 (pDM_Odm->bsta_state) 576 723 ) { 577 724 CurrentIGI = pDM_DigTable->rx_gain_range_min; 578 - ODM_RT_TRACE( 579 - pDM_Odm, 580 - ODM_COMP_DIG, 581 - ODM_DBG_LOUD, 582 - ( 583 - "odm_DIG(): Abnormal #beacon (%d) case: IGI does one-shot to 0x%x\n", 584 - pDM_Odm->PhyDbgInfo.NumQryBeaconPkt, 585 - CurrentIGI 586 - ) 587 - ); 588 725 } 589 726 } 590 727 } else { 591 - /* 2 Before link */ 592 - ODM_RT_TRACE( 593 - pDM_Odm, 594 - ODM_COMP_DIG, 595 - ODM_DBG_LOUD, 596 - ("odm_DIG(): Adjust IGI before link\n") 597 - ); 598 728 599 729 if (FirstDisConnect || bFirstCoverage) { 600 730 CurrentIGI = dm_dig_min; 601 - ODM_RT_TRACE( 602 - pDM_Odm, 603 - ODM_COMP_DIG, 604 - ODM_DBG_LOUD, 605 - ("odm_DIG(): First disconnect case: IGI does on-shot to lower bound\n") 606 - ); 607 731 } else { 608 732 if (pFalseAlmCnt->Cnt_all > dm_FA_thres[2]) 609 733 CurrentIGI = CurrentIGI + 4; ··· 598 768 if (CurrentIGI > pDM_DigTable->rx_gain_range_max) 599 769 CurrentIGI = pDM_DigTable->rx_gain_range_max; 600 770 601 - ODM_RT_TRACE( 602 - pDM_Odm, 603 - ODM_COMP_DIG, 604 - ODM_DBG_LOUD, 605 - ( 606 - "odm_DIG(): CurIGValue = 0x%x, TotalFA = %d\n\n", 607 - CurrentIGI, 608 - pFalseAlmCnt->Cnt_all 609 - ) 610 - ); 611 - 612 771 /* 1 Force upper bound and lower bound for adaptivity */ 613 772 if ( 614 773 pDM_Odm->SupportAbility & ODM_BB_ADAPTIVITY && ··· 610 791 if (CurrentIGI < pDM_Odm->IGI_LowerBound) 611 792 CurrentIGI = pDM_Odm->IGI_LowerBound; 612 793 } 613 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adaptivity case: Force upper bound to 0x%x !!!!!!\n", Adap_IGI_Upper)); 614 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Adaptivity case: Force lower bound to 0x%x !!!!!!\n\n", pDM_Odm->IGI_LowerBound)); 615 794 } 616 795 617 796 ··· 648 831 649 832 CurrentIGI = CurrentIGI+RSSI_OFFSET_DIG; 650 833 651 - ODM_RT_TRACE( 652 - pDM_Odm, 653 - ODM_COMP_DIG, 654 - ODM_DBG_LOUD, 655 - ("odm_DIGbyRSSI_LPS() ==>\n") 656 - ); 657 - 658 834 /* Using FW PS mode to make IGI */ 659 835 /* Adjust by FA in LPS MODE */ 660 836 if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2_LPS) ··· 671 861 CurrentIGI = DM_DIG_MAX_NIC; 672 862 else if (CurrentIGI < RSSI_Lower) 673 863 CurrentIGI = RSSI_Lower; 674 - 675 - 676 - ODM_RT_TRACE( 677 - pDM_Odm, 678 - ODM_COMP_DIG, 679 - ODM_DBG_LOUD, 680 - ("odm_DIGbyRSSI_LPS(): pFalseAlmCnt->Cnt_all = %d\n", pFalseAlmCnt->Cnt_all) 681 - ); 682 - ODM_RT_TRACE( 683 - pDM_Odm, 684 - ODM_COMP_DIG, 685 - ODM_DBG_LOUD, 686 - ("odm_DIGbyRSSI_LPS(): pDM_Odm->RSSI_Min = %d\n", pDM_Odm->RSSI_Min) 687 - ); 688 - ODM_RT_TRACE( 689 - pDM_Odm, 690 - ODM_COMP_DIG, 691 - ODM_DBG_LOUD, 692 - ("odm_DIGbyRSSI_LPS(): CurrentIGI = 0x%x\n", CurrentIGI) 693 - ); 694 864 695 865 ODM_Write_DIG(pDM_Odm, CurrentIGI); 696 866 /* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */ ··· 760 970 761 971 FalseAlmCnt->Cnt_CCA_all = 762 972 FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; 763 - 764 - ODM_RT_TRACE( 765 - pDM_Odm, 766 - ODM_COMP_FA_CNT, 767 - ODM_DBG_LOUD, 768 - ("Enter odm_FalseAlarmCounterStatistics\n") 769 - ); 770 - ODM_RT_TRACE( 771 - pDM_Odm, 772 - ODM_COMP_FA_CNT, 773 - ODM_DBG_LOUD, 774 - ( 775 - "Cnt_Fast_Fsync =%d, Cnt_SB_Search_fail =%d\n", 776 - FalseAlmCnt->Cnt_Fast_Fsync, 777 - FalseAlmCnt->Cnt_SB_Search_fail 778 - ) 779 - ); 780 - ODM_RT_TRACE( 781 - pDM_Odm, 782 - ODM_COMP_FA_CNT, 783 - ODM_DBG_LOUD, 784 - ( 785 - "Cnt_Parity_Fail =%d, Cnt_Rate_Illegal =%d\n", 786 - FalseAlmCnt->Cnt_Parity_Fail, 787 - FalseAlmCnt->Cnt_Rate_Illegal 788 - ) 789 - ); 790 - ODM_RT_TRACE( 791 - pDM_Odm, 792 - ODM_COMP_FA_CNT, 793 - ODM_DBG_LOUD, 794 - ( 795 - "Cnt_Crc8_fail =%d, Cnt_Mcs_fail =%d\n", 796 - FalseAlmCnt->Cnt_Crc8_fail, 797 - FalseAlmCnt->Cnt_Mcs_fail 798 - ) 799 - ); 800 - 801 - ODM_RT_TRACE( 802 - pDM_Odm, 803 - ODM_COMP_FA_CNT, 804 - ODM_DBG_LOUD, 805 - ("Cnt_OFDM_CCA =%d\n", FalseAlmCnt->Cnt_OFDM_CCA) 806 - ); 807 - ODM_RT_TRACE( 808 - pDM_Odm, 809 - ODM_COMP_FA_CNT, 810 - ODM_DBG_LOUD, 811 - ("Cnt_CCK_CCA =%d\n", FalseAlmCnt->Cnt_CCK_CCA) 812 - ); 813 - ODM_RT_TRACE( 814 - pDM_Odm, 815 - ODM_COMP_FA_CNT, 816 - ODM_DBG_LOUD, 817 - ("Cnt_CCA_all =%d\n", FalseAlmCnt->Cnt_CCA_all) 818 - ); 819 - ODM_RT_TRACE( 820 - pDM_Odm, 821 - ODM_COMP_FA_CNT, 822 - ODM_DBG_LOUD, 823 - ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail) 824 - ); 825 - ODM_RT_TRACE( 826 - pDM_Odm, 827 - ODM_COMP_FA_CNT, 828 - ODM_DBG_LOUD, 829 - ("Cnt_Cck_fail =%d\n", FalseAlmCnt->Cnt_Cck_fail) 830 - ); 831 - ODM_RT_TRACE( 832 - pDM_Odm, 833 - ODM_COMP_FA_CNT, 834 - ODM_DBG_LOUD, 835 - ("Cnt_Ofdm_fail =%d\n", FalseAlmCnt->Cnt_Ofdm_fail) 836 - ); 837 - ODM_RT_TRACE( 838 - pDM_Odm, 839 - ODM_COMP_FA_CNT, 840 - ODM_DBG_LOUD, 841 - ("Total False Alarm =%d\n", FalseAlmCnt->Cnt_all) 842 - ); 843 973 } 844 974 845 975 ··· 794 1084 u8 rx_gain_range_min = pDM_DigTable->rx_gain_range_min; 795 1085 796 1086 if (pFalseAlmCnt->Cnt_all > 10000) { 797 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case.\n")); 798 - 799 1087 if (pDM_DigTable->LargeFAHit != 3) 800 1088 pDM_DigTable->LargeFAHit++; 801 1089 ··· 810 1102 else 811 1103 rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); 812 1104 pDM_DigTable->Recover_cnt = 1800; 813 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Abnormally false alarm case: Recover_cnt = %d\n", pDM_DigTable->Recover_cnt)); 814 1105 } 815 1106 } else { 816 1107 if (pDM_DigTable->Recover_cnt != 0) { 817 1108 pDM_DigTable->Recover_cnt--; 818 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Recover_cnt = %d\n", pDM_DigTable->Recover_cnt)); 819 1109 } else { 820 1110 if (pDM_DigTable->LargeFAHit < 3) { 821 1111 if ((pDM_DigTable->ForbiddenIGI - 2) < DIG_Dynamic_MIN) { /* DM_DIG_MIN) */ 822 1112 pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ 823 1113 rx_gain_range_min = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ 824 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); 825 1114 } else { 826 1115 pDM_DigTable->ForbiddenIGI -= 2; 827 1116 rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 2); 828 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); 829 1117 } 830 1118 } else 831 1119 pDM_DigTable->LargeFAHit = 0; ··· 847 1143 !(pDM_Odm->SupportAbility & ODM_BB_CCK_PD) || 848 1144 !(pDM_Odm->SupportAbility & ODM_BB_FA_CNT) 849 1145 ) { 850 - ODM_RT_TRACE( 851 - pDM_Odm, 852 - ODM_COMP_CCK_PD, 853 - ODM_DBG_LOUD, 854 - ("odm_CCKPacketDetectionThresh() return ==========\n") 855 - ); 856 1146 return; 857 1147 } 858 1148 859 1149 if (pDM_Odm->ExtLNA) 860 1150 return; 861 - 862 - ODM_RT_TRACE( 863 - pDM_Odm, 864 - ODM_COMP_CCK_PD, 865 - ODM_DBG_LOUD, 866 - ("odm_CCKPacketDetectionThresh() ==========>\n") 867 - ); 868 1151 869 1152 if (pDM_Odm->bLinked) { 870 1153 if (pDM_Odm->RSSI_Min > 25) ··· 872 1181 } 873 1182 874 1183 ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); 875 - 876 - ODM_RT_TRACE( 877 - pDM_Odm, 878 - ODM_COMP_CCK_PD, 879 - ODM_DBG_LOUD, 880 - ( 881 - "odm_CCKPacketDetectionThresh() CurCCK_CCAThres = 0x%x\n", 882 - CurCCK_CCAThres 883 - ) 884 - ); 885 1184 } 886 1185 887 1186 void ODM_Write_CCK_CCA_Thres(void *pDM_VOID, u8 CurCCK_CCAThres)
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drivers/staging/rtl8723bs/hal/odm_EdcaTurboCheck.c
··· 37 37 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; 38 38 pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false; 39 39 Adapter->recvpriv.bIsAnyNonBEPkts = false; 40 - 41 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, 42 - ("Original VO PARAM: 0x%x\n", 43 - rtw_read32(pDM_Odm->Adapter, ODM_EDCA_VO_PARAM))); 44 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, 45 - ("Original VI PARAM: 0x%x\n", 46 - rtw_read32(pDM_Odm->Adapter, ODM_EDCA_VI_PARAM))); 47 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, 48 - ("Original BE PARAM: 0x%x\n", 49 - rtw_read32(pDM_Odm->Adapter, ODM_EDCA_BE_PARAM))); 50 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, 51 - ("Original BK PARAM: 0x%x\n", 52 - rtw_read32(pDM_Odm->Adapter, ODM_EDCA_BK_PARAM))); 53 40 } /* ODM_InitEdcaTurbo */ 54 41 55 42 void odm_EdcaTurboCheck(void *pDM_VOID) ··· 47 60 */ 48 61 struct dm_odm_t *pDM_Odm = (struct dm_odm_t *)pDM_VOID; 49 62 50 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, 51 - ("odm_EdcaTurboCheck ========================>\n")); 52 - 53 63 if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) 54 64 return; 55 65 56 66 odm_EdcaTurboCheckCE(pDM_Odm); 57 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, 58 - ("<========================odm_EdcaTurboCheck\n")); 59 67 } /* odm_CheckEdcaTurbo */ 60 68 61 69 void odm_EdcaTurboCheckCE(void *pDM_VOID)
-18
drivers/staging/rtl8723bs/hal/odm_HWConfig.c
··· 427 427 enum odm_rf_radio_path_e eRFPath 428 428 ) 429 429 { 430 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, 431 - ("===>ODM_ConfigRFWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); 432 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, 433 - ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", 434 - pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); 435 - 436 430 if (ConfigType == CONFIG_RF_RADIO) 437 431 READ_AND_CONFIG(8723B, _RadioA); 438 432 else if (ConfigType == CONFIG_RF_TXPWR_LMT) ··· 437 443 438 444 enum hal_status ODM_ConfigRFWithTxPwrTrackHeaderFile(struct dm_odm_t *pDM_Odm) 439 445 { 440 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, 441 - ("===>ODM_ConfigRFWithTxPwrTrackHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); 442 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, 443 - ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", 444 - pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); 445 - 446 446 if (pDM_Odm->SupportInterface == ODM_ITRF_SDIO) 447 447 READ_AND_CONFIG(8723B, _TxPowerTrack_SDIO); 448 448 ··· 447 459 struct dm_odm_t *pDM_Odm, enum ODM_BB_Config_Type ConfigType 448 460 ) 449 461 { 450 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, 451 - ("===>ODM_ConfigBBWithHeaderFile (%s)\n", (pDM_Odm->bIsMPChip) ? "MPChip" : "TestChip")); 452 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_LOUD, 453 - ("pDM_Odm->SupportPlatform: 0x%X, pDM_Odm->SupportInterface: 0x%X, pDM_Odm->BoardType: 0x%X\n", 454 - pDM_Odm->SupportPlatform, pDM_Odm->SupportInterface, pDM_Odm->BoardType)); 455 - 456 462 if (ConfigType == CONFIG_BB_PHY_REG) 457 463 READ_AND_CONFIG(8723B, _PHY_REG); 458 464 else if (ConfigType == CONFIG_BB_AGC_TAB)
-27
drivers/staging/rtl8723bs/hal/odm_NoiseMonitor.c
··· 38 38 else 39 39 max_rf_path = 1; 40 40 41 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_DebugControlInbandNoise_Nseries() ==>\n")); 42 - 43 41 memset(&noise_data, 0, sizeof(struct noise_level)); 44 42 45 43 /* */ ··· 62 64 63 65 /* Read Noise Floor Report */ 64 66 tmp4b = PHY_QueryBBReg(pDM_Odm->Adapter, 0x8f8, bMaskDWord); 65 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Noise Floor Report (0x8f8) = 0x%08x\n", tmp4b)); 66 67 67 68 /* PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_XAAGCCore1, bMaskByte0, TestInitialGain); */ 68 69 /* if (max_rf_path == 2) */ ··· 73 76 noise_data.value[ODM_RF_PATH_A] = (u8)(tmp4b&0xff); 74 77 noise_data.value[ODM_RF_PATH_B] = (u8)((tmp4b&0xff00)>>8); 75 78 76 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("value_a = 0x%x(%d), value_b = 0x%x(%d)\n", 77 - noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_A], noise_data.value[ODM_RF_PATH_B], noise_data.value[ODM_RF_PATH_B])); 78 - 79 79 for (rf_path = ODM_RF_PATH_A; rf_path < max_rf_path; rf_path++) { 80 80 noise_data.sval[rf_path] = (s8)noise_data.value[rf_path]; 81 81 noise_data.sval[rf_path] /= 2; 82 82 } 83 - 84 - 85 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("sval_a = %d, sval_b = %d\n", 86 - noise_data.sval[ODM_RF_PATH_A], noise_data.sval[ODM_RF_PATH_B])); 87 83 /* mdelay(10); */ 88 84 /* msleep(10); */ 89 85 ··· 84 94 if ((noise_data.valid_cnt[rf_path] < ValidCnt) && (noise_data.sval[rf_path] < Valid_Max && noise_data.sval[rf_path] >= Valid_Min)) { 85 95 noise_data.valid_cnt[rf_path]++; 86 96 noise_data.sum[rf_path] += noise_data.sval[rf_path]; 87 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RF_Path:%d Valid sval = %d\n", rf_path, noise_data.sval[rf_path])); 88 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("Sum of sval = %d,\n", noise_data.sum[rf_path])); 89 97 if (noise_data.valid_cnt[rf_path] == ValidCnt) { 90 98 valid_done++; 91 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("After divided, RF_Path:%d , sum = %d\n", rf_path, noise_data.sum[rf_path])); 92 99 } 93 100 94 101 } ··· 106 119 } 107 120 reg_c50 = (s32)PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XAAGCCore1, bMaskByte0); 108 121 reg_c50 &= ~BIT7; 109 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("0x%x = 0x%02x(%d)\n", rOFDM0_XAAGCCore1, reg_c50, reg_c50)); 110 122 pDM_Odm->noise_level.noise[ODM_RF_PATH_A] = -110 + reg_c50 + noise_data.sum[ODM_RF_PATH_A]; 111 123 pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_A]; 112 124 113 125 if (max_rf_path == 2) { 114 126 reg_c58 = (s32)PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XBAGCCore1, bMaskByte0); 115 127 reg_c58 &= ~BIT7; 116 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("0x%x = 0x%02x(%d)\n", rOFDM0_XBAGCCore1, reg_c58, reg_c58)); 117 128 pDM_Odm->noise_level.noise[ODM_RF_PATH_B] = -110 + reg_c58 + noise_data.sum[ODM_RF_PATH_B]; 118 129 pDM_Odm->noise_level.noise_all += pDM_Odm->noise_level.noise[ODM_RF_PATH_B]; 119 130 } 120 131 pDM_Odm->noise_level.noise_all /= max_rf_path; 121 - 122 - ODM_RT_TRACE( 123 - pDM_Odm, 124 - ODM_COMP_COMMON, 125 - ODM_DBG_LOUD, 126 - ( 127 - "noise_a = %d, noise_b = %d\n", 128 - pDM_Odm->noise_level.noise[ODM_RF_PATH_A], 129 - pDM_Odm->noise_level.noise[ODM_RF_PATH_B] 130 - ) 131 - ); 132 132 133 133 /* */ 134 134 /* Step 4. Recover the Dig */ ··· 123 149 if (bPauseDIG) 124 150 odm_PauseDIG(pDM_Odm, ODM_RESUME_DIG, IGIValue); 125 151 126 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_DebugControlInbandNoise_Nseries() <==\n")); 127 152 return pDM_Odm->noise_level.noise_all; 128 153 129 154 }
+2 -12
drivers/staging/rtl8723bs/hal/odm_PathDiv.c
··· 12 12 struct dm_odm_t *pDM_Odm = (struct dm_odm_t *)pDM_VOID; 13 13 14 14 if (!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) 15 - ODM_RT_TRACE( 16 - pDM_Odm, 17 - ODM_COMP_PATH_DIV, 18 - ODM_DBG_LOUD, 19 - ("Return: Not Support PathDiv\n") 20 - ); 15 + {} 21 16 } 22 17 23 18 void odm_PathDiversity(void *pDM_VOID) ··· 20 25 struct dm_odm_t *pDM_Odm = (struct dm_odm_t *)pDM_VOID; 21 26 22 27 if (!(pDM_Odm->SupportAbility & ODM_BB_PATH_DIV)) 23 - ODM_RT_TRACE( 24 - pDM_Odm, 25 - ODM_COMP_PATH_DIV, 26 - ODM_DBG_LOUD, 27 - ("Return: Not Support PathDiv\n") 28 - ); 28 + {} 29 29 }
-66
drivers/staging/rtl8723bs/hal/odm_RegConfig8723B.c
··· 38 38 PHY_SetRFReg(pDM_Odm->Adapter, RF_PATH, RegAddr, bRFRegOffsetMask, Data); 39 39 udelay(1); 40 40 getvalue = PHY_QueryRFReg(pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord); 41 - ODM_RT_TRACE( 42 - pDM_Odm, 43 - ODM_COMP_INIT, 44 - ODM_DBG_TRACE, 45 - ( 46 - "===> ODM_ConfigRFWithHeaderFile: [B6] getvalue 0x%x, Data 0x%x, count %d\n", 47 - getvalue, 48 - Data, 49 - count 50 - ) 51 - ); 52 41 if (count > 5) 53 42 break; 54 43 } ··· 75 86 getvalue = PHY_QueryRFReg( 76 87 pDM_Odm->Adapter, RF_PATH, Addr, bMaskDWord 77 88 ); 78 - ODM_RT_TRACE( 79 - pDM_Odm, 80 - ODM_COMP_INIT, 81 - ODM_DBG_TRACE, 82 - ( 83 - "===> ODM_ConfigRFWithHeaderFile: [B2] getvalue 0x%x, Data 0x%x, count %d\n", 84 - getvalue, 85 - Data, 86 - count 87 - ) 88 - ); 89 89 90 90 if (count > 5) 91 91 break; ··· 96 118 ODM_RF_PATH_A, 97 119 Addr|maskforPhySet 98 120 ); 99 - 100 - ODM_RT_TRACE( 101 - pDM_Odm, 102 - ODM_COMP_INIT, 103 - ODM_DBG_TRACE, 104 - ( 105 - "===> ODM_ConfigRFWithHeaderFile: [RadioA] %08X %08X\n", 106 - Addr, 107 - Data 108 - ) 109 - ); 110 121 } 111 122 112 123 void odm_ConfigMAC_8723B(struct dm_odm_t *pDM_Odm, u32 Addr, u8 Data) 113 124 { 114 125 rtw_write8(pDM_Odm->Adapter, Addr, Data); 115 - ODM_RT_TRACE( 116 - pDM_Odm, 117 - ODM_COMP_INIT, 118 - ODM_DBG_TRACE, 119 - ( 120 - "===> ODM_ConfigMACWithHeaderFile: [MAC_REG] %08X %08X\n", 121 - Addr, 122 - Data 123 - ) 124 - ); 125 126 } 126 127 127 128 void odm_ConfigBB_AGC_8723B( ··· 113 156 PHY_SetBBReg(pDM_Odm->Adapter, Addr, Bitmask, Data); 114 157 /* Add 1us delay between BB/RF register setting. */ 115 158 udelay(1); 116 - 117 - ODM_RT_TRACE( 118 - pDM_Odm, 119 - ODM_COMP_INIT, 120 - ODM_DBG_TRACE, 121 - ( 122 - "===> ODM_ConfigBBWithHeaderFile: [AGC_TAB] %08X %08X\n", 123 - Addr, 124 - Data 125 - ) 126 - ); 127 159 } 128 160 129 161 void odm_ConfigBB_PHY_REG_PG_8723B( ··· 130 184 else { 131 185 PHY_StoreTxPowerByRate(pDM_Odm->Adapter, Band, RfPath, TxNum, Addr, Bitmask, Data); 132 186 } 133 - ODM_RT_TRACE( 134 - pDM_Odm, 135 - ODM_COMP_INIT, 136 - ODM_DBG_LOUD, 137 - ( 138 - "===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X %08X\n", 139 - Addr, 140 - Bitmask, 141 - Data 142 - ) 143 - ); 144 187 } 145 188 146 189 void odm_ConfigBB_PHY_8723B( ··· 157 222 158 223 /* Add 1us delay between BB/RF register setting. */ 159 224 udelay(1); 160 - ODM_RT_TRACE(pDM_Odm, ODM_COMP_INIT, ODM_DBG_TRACE, ("===> ODM_ConfigBBWithHeaderFile: [PHY_REG] %08X %08X\n", Addr, Data)); 161 225 } 162 226 163 227 void odm_ConfigBB_TXPWR_LMT_8723B(