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kernel
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linux
gpio: hlwd: Implement edge trigger emulation
Like the Spreadtrum EIC driver[1], this driver needs to emulate edge
triggered interrupts to support the generic gpio-keys driver.
[1]: https://www.spinics.net/lists/kernel/msg2764576.html
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
authored by
Jonathan Neuschäfer
and committed by
Linus Walleij
a7241c1b
588de43c
+56
+56
drivers/gpio/gpio-hlwd.c
+56
drivers/gpio/gpio-hlwd.c
···
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struct irq_chip irqc;
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void __iomem *regs;
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int irq;
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u32 edge_emulation;
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u32 rising_edge, falling_edge;
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};
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static void hlwd_gpio_irqhandler(struct irq_desc *desc)
···
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unsigned long flags;
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unsigned long pending;
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int hwirq;
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u32 emulated_pending;
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spin_lock_irqsave(&hlwd->gpioc.bgpio_lock, flags);
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pending = ioread32be(hlwd->regs + HW_GPIOB_INTFLAG);
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pending &= ioread32be(hlwd->regs + HW_GPIOB_INTMASK);
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/* Treat interrupts due to edge trigger emulation separately */
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emulated_pending = hlwd->edge_emulation & pending;
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pending &= ~emulated_pending;
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if (emulated_pending) {
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u32 level, rising, falling;
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level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL);
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rising = level & emulated_pending;
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falling = ~level & emulated_pending;
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/* Invert the levels */
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iowrite32be(level ^ emulated_pending,
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hlwd->regs + HW_GPIOB_INTLVL);
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/* Ack all emulated-edge interrupts */
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iowrite32be(emulated_pending, hlwd->regs + HW_GPIOB_INTFLAG);
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/* Signal interrupts only on the correct edge */
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rising &= hlwd->rising_edge;
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falling &= hlwd->falling_edge;
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/* Mark emulated interrupts as pending */
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pending |= rising | falling;
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}
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spin_unlock_irqrestore(&hlwd->gpioc.bgpio_lock, flags);
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chained_irq_enter(chip, desc);
···
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hlwd_gpio_irq_unmask(data);
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}
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static void hlwd_gpio_irq_setup_emulation(struct hlwd_gpio *hlwd, int hwirq,
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unsigned int flow_type)
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{
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u32 level, state;
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/* Set the trigger level to the inactive level */
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level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL);
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state = ioread32be(hlwd->regs + HW_GPIOB_IN) & BIT(hwirq);
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level &= ~BIT(hwirq);
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level |= state ^ BIT(hwirq);
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iowrite32be(level, hlwd->regs + HW_GPIOB_INTLVL);
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hlwd->edge_emulation |= BIT(hwirq);
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hlwd->rising_edge &= ~BIT(hwirq);
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hlwd->falling_edge &= ~BIT(hwirq);
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if (flow_type & IRQ_TYPE_EDGE_RISING)
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hlwd->rising_edge |= BIT(hwirq);
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if (flow_type & IRQ_TYPE_EDGE_FALLING)
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hlwd->falling_edge |= BIT(hwirq);
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}
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static int hlwd_gpio_irq_set_type(struct irq_data *data, unsigned int flow_type)
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{
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struct hlwd_gpio *hlwd =
···
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u32 level;
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spin_lock_irqsave(&hlwd->gpioc.bgpio_lock, flags);
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hlwd->edge_emulation &= ~BIT(data->hwirq);
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switch (flow_type) {
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case IRQ_TYPE_LEVEL_HIGH:
···
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level = ioread32be(hlwd->regs + HW_GPIOB_INTLVL);
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level &= ~BIT(data->hwirq);
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iowrite32be(level, hlwd->regs + HW_GPIOB_INTLVL);
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break;
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case IRQ_TYPE_EDGE_RISING:
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case IRQ_TYPE_EDGE_FALLING:
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case IRQ_TYPE_EDGE_BOTH:
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hlwd_gpio_irq_setup_emulation(hlwd, data->hwirq, flow_type);
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break;
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default:
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spin_unlock_irqrestore(&hlwd->gpioc.bgpio_lock, flags);