Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

perf annotate mips: Add perf arch instructions annotate handlers

Support the MIPS architecture using the ins_ops association method. With
this patch, perf-annotate can work well on MIPS.

Testing it with a perf.data file collected on a mips machine:

$./perf annotate -i perf.data

: Disassembly of section .text:
:
: 00000000000be6a0 <get_next_seq>:
: get_next_seq():
0.00 : be6a0: lw v0,0(a0)
0.00 : be6a4: daddiu sp,sp,-128
0.00 : be6a8: ld a7,72(a0)
0.00 : be6ac: gssq s5,s4,80(sp)
0.00 : be6b0: gssq s1,s0,48(sp)
0.00 : be6b4: gssq s8,gp,112(sp)
0.00 : be6b8: gssq s7,s6,96(sp)
0.00 : be6bc: gssq s3,s2,64(sp)
0.00 : be6c0: sd a3,0(sp)
0.00 : be6c4: move s0,a0
0.00 : be6c8: sd v0,32(sp)
0.00 : be6cc: sd a5,8(sp)
0.00 : be6d0: sd zero,8(a0)
0.00 : be6d4: sd a6,16(sp)
0.00 : be6d8: ld s2,48(a0)
8.53 : be6dc: ld s1,40(a0)
9.42 : be6e0: ld v1,32(a0)
0.00 : be6e4: nop
0.00 : be6e8: ld s4,24(a0)
0.00 : be6ec: ld s5,16(a0)
0.00 : be6f0: sd a7,40(sp)
10.11 : be6f4: ld s6,64(a0)

...

The original patch link:
https://lore.kernel.org/patchwork/patch/1180480/

Signed-off-by: Dengcheng Zhu <dzhu@wavecomp.com>
Cc: Dengcheng Zhu <dzhu@wavecomp.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Xuefeng Li <lixuefeng@loongson.cn>
Cc: linux-mips@vger.kernel.org
[ fanpeng@loongson.cn: Add missing "bgtzl", "bltzl", "bgezl", "blezl", "beql" and "bnel" for pre-R6processors ]
Signed-off-by: Peng Fan <fanpeng@loongson.cn>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

authored by

Dengcheng Zhu and committed by
Arnaldo Carvalho de Melo
a701d28e 1dd88c19

+55 -1
+1 -1
tools/perf/arch/mips/Build
··· 1 - # empty 1 + perf-y += util/
+46
tools/perf/arch/mips/annotate/instructions.c
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + 3 + static 4 + struct ins_ops *mips__associate_ins_ops(struct arch *arch, const char *name) 5 + { 6 + struct ins_ops *ops = NULL; 7 + 8 + if (!strncmp(name, "bal", 3) || 9 + !strncmp(name, "bgezal", 6) || 10 + !strncmp(name, "bltzal", 6) || 11 + !strncmp(name, "bgtzal", 6) || 12 + !strncmp(name, "blezal", 6) || 13 + !strncmp(name, "beqzal", 6) || 14 + !strncmp(name, "bnezal", 6) || 15 + !strncmp(name, "bgtzl", 5) || 16 + !strncmp(name, "bltzl", 5) || 17 + !strncmp(name, "bgezl", 5) || 18 + !strncmp(name, "blezl", 5) || 19 + !strncmp(name, "jialc", 5) || 20 + !strncmp(name, "beql", 4) || 21 + !strncmp(name, "bnel", 4) || 22 + !strncmp(name, "jal", 3)) 23 + ops = &call_ops; 24 + else if (!strncmp(name, "jr", 2)) 25 + ops = &ret_ops; 26 + else if (name[0] == 'j' || name[0] == 'b') 27 + ops = &jump_ops; 28 + else 29 + return NULL; 30 + 31 + arch__associate_ins_ops(arch, name, ops); 32 + 33 + return ops; 34 + } 35 + 36 + static 37 + int mips__annotate_init(struct arch *arch, char *cpuid __maybe_unused) 38 + { 39 + if (!arch->initialized) { 40 + arch->associate_instruction_ops = mips__associate_ins_ops; 41 + arch->initialized = true; 42 + arch->objdump.comment_char = '#'; 43 + } 44 + 45 + return 0; 46 + }
+8
tools/perf/util/annotate.c
··· 152 152 #include "arch/arm/annotate/instructions.c" 153 153 #include "arch/arm64/annotate/instructions.c" 154 154 #include "arch/csky/annotate/instructions.c" 155 + #include "arch/mips/annotate/instructions.c" 155 156 #include "arch/x86/annotate/instructions.c" 156 157 #include "arch/powerpc/annotate/instructions.c" 157 158 #include "arch/s390/annotate/instructions.c" ··· 174 173 { 175 174 .name = "csky", 176 175 .init = csky__annotate_init, 176 + }, 177 + { 178 + .name = "mips", 179 + .init = mips__annotate_init, 180 + .objdump = { 181 + .comment_char = '#', 182 + }, 177 183 }, 178 184 { 179 185 .name = "x86",