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ARM: dts: imx: Change usdhc node name on i.MX6/i.MX7 SoCs

Change i.MX6/i.MX7 SoCs usdhc node name from usdhc to mmc to be
compliant with yaml schema, it requires the nodename to be "mmc".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Anson Huang and committed by
Shawn Guo a6d09440 7e4cd9d8

+17 -17
+4 -4
arch/arm/boot/dts/imx6qdl.dtsi
··· 1056 1056 <0 126 IRQ_TYPE_LEVEL_HIGH>; 1057 1057 }; 1058 1058 1059 - usdhc1: usdhc@2190000 { 1059 + usdhc1: mmc@2190000 { 1060 1060 compatible = "fsl,imx6q-usdhc"; 1061 1061 reg = <0x02190000 0x4000>; 1062 1062 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; ··· 1068 1068 status = "disabled"; 1069 1069 }; 1070 1070 1071 - usdhc2: usdhc@2194000 { 1071 + usdhc2: mmc@2194000 { 1072 1072 compatible = "fsl,imx6q-usdhc"; 1073 1073 reg = <0x02194000 0x4000>; 1074 1074 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; ··· 1080 1080 status = "disabled"; 1081 1081 }; 1082 1082 1083 - usdhc3: usdhc@2198000 { 1083 + usdhc3: mmc@2198000 { 1084 1084 compatible = "fsl,imx6q-usdhc"; 1085 1085 reg = <0x02198000 0x4000>; 1086 1086 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; ··· 1092 1092 status = "disabled"; 1093 1093 }; 1094 1094 1095 - usdhc4: usdhc@219c000 { 1095 + usdhc4: mmc@219c000 { 1096 1096 compatible = "fsl,imx6q-usdhc"; 1097 1097 reg = <0x0219c000 0x4000>; 1098 1098 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
+4 -4
arch/arm/boot/dts/imx6sl.dtsi
··· 854 854 status = "disabled"; 855 855 }; 856 856 857 - usdhc1: usdhc@2190000 { 857 + usdhc1: mmc@2190000 { 858 858 compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 859 859 reg = <0x02190000 0x4000>; 860 860 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; ··· 866 866 status = "disabled"; 867 867 }; 868 868 869 - usdhc2: usdhc@2194000 { 869 + usdhc2: mmc@2194000 { 870 870 compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 871 871 reg = <0x02194000 0x4000>; 872 872 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; ··· 878 878 status = "disabled"; 879 879 }; 880 880 881 - usdhc3: usdhc@2198000 { 881 + usdhc3: mmc@2198000 { 882 882 compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 883 883 reg = <0x02198000 0x4000>; 884 884 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; ··· 890 890 status = "disabled"; 891 891 }; 892 892 893 - usdhc4: usdhc@219c000 { 893 + usdhc4: mmc@219c000 { 894 894 compatible = "fsl,imx6sl-usdhc", "fsl,imx6q-usdhc"; 895 895 reg = <0x0219c000 0x4000>; 896 896 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
+4 -4
arch/arm/boot/dts/imx6sx.dtsi
··· 943 943 status = "disabled"; 944 944 }; 945 945 946 - usdhc1: usdhc@2190000 { 946 + usdhc1: mmc@2190000 { 947 947 compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc"; 948 948 reg = <0x02190000 0x4000>; 949 949 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; ··· 955 955 status = "disabled"; 956 956 }; 957 957 958 - usdhc2: usdhc@2194000 { 958 + usdhc2: mmc@2194000 { 959 959 compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc"; 960 960 reg = <0x02194000 0x4000>; 961 961 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; ··· 967 967 status = "disabled"; 968 968 }; 969 969 970 - usdhc3: usdhc@2198000 { 970 + usdhc3: mmc@2198000 { 971 971 compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc"; 972 972 reg = <0x02198000 0x4000>; 973 973 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; ··· 979 979 status = "disabled"; 980 980 }; 981 981 982 - usdhc4: usdhc@219c000 { 982 + usdhc4: mmc@219c000 { 983 983 compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc"; 984 984 reg = <0x0219c000 0x4000>; 985 985 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+2 -2
arch/arm/boot/dts/imx6ul.dtsi
··· 861 861 status = "disabled"; 862 862 }; 863 863 864 - usdhc1: usdhc@2190000 { 864 + usdhc1: mmc@2190000 { 865 865 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; 866 866 reg = <0x02190000 0x4000>; 867 867 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; ··· 875 875 status = "disabled"; 876 876 }; 877 877 878 - usdhc2: usdhc@2194000 { 878 + usdhc2: mmc@2194000 { 879 879 compatible = "fsl,imx6ul-usdhc", "fsl,imx6sx-usdhc"; 880 880 reg = <0x02194000 0x4000>; 881 881 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+3 -3
arch/arm/boot/dts/imx7s.dtsi
··· 1126 1126 reg = <0x30b30200 0x200>; 1127 1127 }; 1128 1128 1129 - usdhc1: usdhc@30b40000 { 1129 + usdhc1: mmc@30b40000 { 1130 1130 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; 1131 1131 reg = <0x30b40000 0x10000>; 1132 1132 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; ··· 1138 1138 status = "disabled"; 1139 1139 }; 1140 1140 1141 - usdhc2: usdhc@30b50000 { 1141 + usdhc2: mmc@30b50000 { 1142 1142 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; 1143 1143 reg = <0x30b50000 0x10000>; 1144 1144 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; ··· 1150 1150 status = "disabled"; 1151 1151 }; 1152 1152 1153 - usdhc3: usdhc@30b60000 { 1153 + usdhc3: mmc@30b60000 { 1154 1154 compatible = "fsl,imx7d-usdhc", "fsl,imx6sl-usdhc"; 1155 1155 reg = <0x30b60000 0x10000>; 1156 1156 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;