Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'mmc-merge-for-3.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc

Pull MMC updates from Chris Ball:
"MMC highlights for 3.6:

Core:
- Rename cd-gpio to slot-gpio and extend it to support more slot GPIO
functions, such as write-protect.
- Add a function to get regulators (Vdd and Vccq) for a host.

Drivers:
- sdhci-pxav2, sdhci-pxav3: Add device tree support.
- sdhi: Add device tree support.
- sh_mmcif: Add support for regulators, device tree, slot-gpio.
- tmio: Add regulator support, use slot-gpio."

* tag 'mmc-merge-for-3.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (62 commits)
mmc: sdhci-dove: Prepare for common clock framework
mmc: sdhci-dove: Add SDHCI_QUIRK_NO_HISPD_BIT
mmc: omap_hsmmc: ensure probe returns error upon resource failure
mmc: mxs-mmc: Add wp-inverted property
mmc: esdhc: Fix DMA_MASK to not break mx25 DMA access
mmc: core: reset signal voltage on power up
mmc: sd: Fix sd current limit setting
mmc: omap_hsmmc: add clk_prepare and clk_unprepare
mmc: sdhci: When a UHS switch fails, cycle power if regulator is used
mmc: atmel-mci: modify CLKDIV displaying in debugfs
mmc: atmel-mci: fix incorrect setting of host->data to NULL
mmc: sdhci: poll for card even when card is logically unremovable
mmc: sdhci: Introduce new flag SDHCI_USING_RETUNING_TIMER
mmc: sdio: Change pr_warning to pr_warn_ratelimited
mmc: core: Simplify and fix for SD switch processing
mmc: sdhci: restore host settings when card is removed
mmc: sdhci: fix incorrect command used in tuning
mmc: sdhci-pci: CaFe has broken card detection
mmc: sdhci: Report failure reasons for all cases in sdhci_add_host()
mmc: s3cmci: Convert s3cmci driver to gpiolib API
...

+1057 -519
+13 -12
Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
··· 3 3 The Enhanced Secure Digital Host Controller provides an interface 4 4 for MMC, SD, and SDIO types of memory cards. 5 5 6 + This file documents differences between the core properties described 7 + by mmc.txt and the properties used by the sdhci-esdhc driver. 8 + 6 9 Required properties: 7 - - compatible : should be 8 - "fsl,<chip>-esdhc", "fsl,esdhc" 9 - - reg : should contain eSDHC registers location and length. 10 - - interrupts : should contain eSDHC interrupt. 11 10 - interrupt-parent : interrupt source phandle. 12 11 - clock-frequency : specifies eSDHC base clock frequency. 13 - - sdhci,wp-inverted : (optional) specifies that eSDHC controller 14 - reports inverted write-protect state; New devices should use 15 - the generic "wp-inverted" property. 16 - - sdhci,1-bit-only : (optional) specifies that a controller can 17 - only handle 1-bit data transfers. New devices should use the 18 - generic "bus-width = <1>" property. 19 - - sdhci,auto-cmd12: (optional) specifies that a controller can 20 - only handle auto CMD12. 12 + 13 + Optional properties: 14 + - sdhci,wp-inverted : specifies that eSDHC controller reports 15 + inverted write-protect state; New devices should use the generic 16 + "wp-inverted" property. 17 + - sdhci,1-bit-only : specifies that a controller can only handle 18 + 1-bit data transfers. New devices should use the generic 19 + "bus-width = <1>" property. 20 + - sdhci,auto-cmd12: specifies that a controller can only handle auto 21 + CMD12. 21 22 22 23 Example: 23 24
+3 -5
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
··· 3 3 The Enhanced Secure Digital Host Controller on Freescale i.MX family 4 4 provides an interface for MMC, SD, and SDIO types of memory cards. 5 5 6 + This file documents differences between the core properties described 7 + by mmc.txt and the properties used by the sdhci-esdhc-imx driver. 8 + 6 9 Required properties: 7 10 - compatible : Should be "fsl,<chip>-esdhc" 8 - - reg : Should contain eSDHC registers location and length 9 - - interrupts : Should contain eSDHC interrupt 10 11 11 12 Optional properties: 12 - - non-removable : Indicate the card is wired to host permanently 13 13 - fsl,cd-internal : Indicate to use controller internal card detection 14 14 - fsl,wp-internal : Indicate to use controller internal write protection 15 - - cd-gpios : Specify GPIOs for card detection 16 - - wp-gpios : Specify GPIOs for write protection 17 15 18 16 Examples: 19 17
+4 -4
Documentation/devicetree/bindings/mmc/mmc-spi-slot.txt
··· 1 1 MMC/SD/SDIO slot directly connected to a SPI bus 2 2 3 + This file documents differences between the core properties described 4 + by mmc.txt and the properties used by the mmc_spi driver. 5 + 3 6 Required properties: 4 - - compatible : should be "mmc-spi-slot". 5 - - reg : should specify SPI address (chip-select number). 6 7 - spi-max-frequency : maximum frequency for this device (Hz). 7 8 - voltage-ranges : two cells are required, first cell specifies minimum 8 9 slot voltage (mV), second cell specifies maximum slot voltage (mV). ··· 12 11 Optional properties: 13 12 - gpios : may specify GPIOs in this order: Card-Detect GPIO, 14 13 Write-Protect GPIO. Note that this does not follow the 15 - binding from mmc.txt, for historic reasons. 16 - - interrupts : the interrupt of a card detect interrupt. 14 + binding from mmc.txt, for historical reasons. 17 15 - interrupt-parent : the phandle for the interrupt controller that 18 16 services interrupts for this device. 19 17
+7 -3
Documentation/devicetree/bindings/mmc/mmc.txt
··· 2 2 that requires the respective functionality should implement them using 3 3 these definitions. 4 4 5 + Interpreted by the OF core: 6 + - reg: Registers location and length. 7 + - interrupts: Interrupts used by the MMC controller. 8 + 5 9 Required properties: 6 10 - bus-width: Number of data lines, can be <1>, <4>, or <8> 7 11 8 12 Optional properties: 9 - - cd-gpios : Specify GPIOs for card detection, see gpio binding 10 - - wp-gpios : Specify GPIOs for write protection, see gpio binding 11 - - cd-inverted: when present, polarity on the wp gpio line is inverted 13 + - cd-gpios: Specify GPIOs for card detection, see gpio binding 14 + - wp-gpios: Specify GPIOs for write protection, see gpio binding 15 + - cd-inverted: when present, polarity on the cd gpio line is inverted 12 16 - wp-inverted: when present, polarity on the wp gpio line is inverted 13 17 - non-removable: non-removable slot (like eMMC) 14 18 - max-frequency: maximum operating clock frequency
+4 -8
Documentation/devicetree/bindings/mmc/mmci.txt
··· 1 1 * ARM PrimeCell MultiMedia Card Interface (MMCI) PL180/1 2 2 3 - The ARM PrimeCell MMCI PL180 and PL181 provides and interface for 3 + The ARM PrimeCell MMCI PL180 and PL181 provides an interface for 4 4 reading and writing to MultiMedia and SD cards alike. 5 + 6 + This file documents differences between the core properties described 7 + by mmc.txt and the properties used by the mmci driver. 5 8 6 9 Required properties: 7 10 - compatible : contains "arm,pl18x", "arm,primecell". 8 - - reg : contains pl18x registers and length. 9 - - interrupts : contains the device IRQ(s). 10 11 - arm,primecell-periphid : contains the PrimeCell Peripheral ID. 11 12 12 13 Optional properties: 13 - - wp-gpios : contains any write protect (ro) gpios 14 - - cd-gpios : contains any card detection gpios 15 - - cd-inverted : indicates whether the cd gpio is inverted 16 - - max-frequency : contains the maximum operating frequency 17 - - bus-width : number of data lines, can be <1>, <4>, or <8> 18 14 - mmc-cap-mmc-highspeed : indicates whether MMC is high speed capable 19 15 - mmc-cap-sd-highspeed : indicates whether SD is high speed capable
+3 -5
Documentation/devicetree/bindings/mmc/mxs-mmc.txt
··· 3 3 The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller 4 4 to support MMC, SD, and SDIO types of memory cards. 5 5 6 + This file documents differences between the core properties in mmc.txt 7 + and the properties used by the mxsmmc driver. 8 + 6 9 Required properties: 7 10 - compatible: Should be "fsl,<chip>-mmc". The supported chips include 8 11 imx23 and imx28. 9 - - reg: Should contain registers location and length 10 12 - interrupts: Should contain ERROR and DMA interrupts 11 13 - fsl,ssp-dma-channel: APBH DMA channel for the SSP 12 - - bus-width: Number of data lines, can be <1>, <4>, or <8> 13 - 14 - Optional properties: 15 - - wp-gpios: Specify GPIOs for write protection 16 14 17 15 Examples: 18 16
+3 -5
Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt
··· 3 3 This controller on Tegra family SoCs provides an interface for MMC, SD, 4 4 and SDIO types of memory cards. 5 5 6 + This file documents differences between the core properties described 7 + by mmc.txt and the properties used by the sdhci-tegra driver. 8 + 6 9 Required properties: 7 10 - compatible : Should be "nvidia,<chip>-sdhci" 8 - - reg : Should contain SD/MMC registers location and length 9 - - interrupts : Should contain SD/MMC interrupt 10 - - bus-width : Number of data lines, can be <1>, <4>, or <8> 11 11 12 12 Optional properties: 13 - - cd-gpios : Specify GPIOs for card detection 14 - - wp-gpios : Specify GPIOs for write protection 15 13 - power-gpios : Specify GPIOs for power control 16 14 17 15 Example:
+21
Documentation/devicetree/bindings/mmc/sdhci-pxa.txt
··· 1 + * Marvell sdhci-pxa v2/v3 controller 2 + 3 + This file documents differences between the core properties in mmc.txt 4 + and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers. 5 + 6 + Required properties: 7 + - compatible: Should be "mrvl,pxav2-mmc" or "mrvl,pxav3-mmc". 8 + 9 + Optional properties: 10 + - mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning. 11 + 12 + Example: 13 + 14 + sdhci@d4280800 { 15 + compatible = "mrvl,pxav3-mmc"; 16 + reg = <0xd4280800 0x800>; 17 + bus-width = <8>; 18 + interrupts = <27>; 19 + non-removable; 20 + mrvl,clk-delay-cycles = <31>; 21 + };
+3 -4
Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
··· 3 3 The Highspeed MMC Host Controller on TI OMAP family 4 4 provides an interface for MMC, SD, and SDIO types of memory cards. 5 5 6 + This file documents differences between the core properties described 7 + by mmc.txt and the properties used by the omap_hsmmc driver. 8 + 6 9 Required properties: 7 10 - compatible: 8 11 Should be "ti,omap2-hsmmc", for OMAP2 controllers 9 12 Should be "ti,omap3-hsmmc", for OMAP3 controllers 10 13 Should be "ti,omap4-hsmmc", for OMAP4 controllers 11 14 - ti,hwmods: Must be "mmc<n>", n is controller instance starting 1 12 - - reg : should contain hsmmc registers location and length 13 15 14 16 Optional properties: 15 17 ti,dual-volt: boolean, supports dual voltage cards 16 18 <supply-name>-supply: phandle to the regulator device tree node 17 19 "supply-name" examples are "vmmc", "vmmc_aux" etc 18 - bus-width: Number of data lines, default assumed is 1 if the property is missing. 19 - cd-gpios: GPIOs for card detection 20 - wp-gpios: GPIOs for write protection 21 20 ti,non-removable: non-removable slot (like eMMC) 22 21 ti,needs-special-reset: Requires a special softreset sequence 23 22
+9 -27
drivers/mmc/card/block.c
··· 850 850 goto retry; 851 851 if (!err) 852 852 mmc_blk_reset_success(md, type); 853 - spin_lock_irq(&md->lock); 854 - __blk_end_request(req, err, blk_rq_bytes(req)); 855 - spin_unlock_irq(&md->lock); 853 + blk_end_request(req, err, blk_rq_bytes(req)); 856 854 857 855 return err ? 0 : 1; 858 856 } ··· 932 934 if (!err) 933 935 mmc_blk_reset_success(md, type); 934 936 out: 935 - spin_lock_irq(&md->lock); 936 - __blk_end_request(req, err, blk_rq_bytes(req)); 937 - spin_unlock_irq(&md->lock); 937 + blk_end_request(req, err, blk_rq_bytes(req)); 938 938 939 939 return err ? 0 : 1; 940 940 } ··· 947 951 if (ret) 948 952 ret = -EIO; 949 953 950 - spin_lock_irq(&md->lock); 951 - __blk_end_request_all(req, ret); 952 - spin_unlock_irq(&md->lock); 954 + blk_end_request_all(req, ret); 953 955 954 956 return ret ? 0 : 1; 955 957 } ··· 1246 1252 1247 1253 blocks = mmc_sd_num_wr_blocks(card); 1248 1254 if (blocks != (u32)-1) { 1249 - spin_lock_irq(&md->lock); 1250 - ret = __blk_end_request(req, 0, blocks << 9); 1251 - spin_unlock_irq(&md->lock); 1255 + ret = blk_end_request(req, 0, blocks << 9); 1252 1256 } 1253 1257 } else { 1254 - spin_lock_irq(&md->lock); 1255 - ret = __blk_end_request(req, 0, brq->data.bytes_xfered); 1256 - spin_unlock_irq(&md->lock); 1258 + ret = blk_end_request(req, 0, brq->data.bytes_xfered); 1257 1259 } 1258 1260 return ret; 1259 1261 } ··· 1301 1311 * A block was successfully transferred. 1302 1312 */ 1303 1313 mmc_blk_reset_success(md, type); 1304 - spin_lock_irq(&md->lock); 1305 - ret = __blk_end_request(req, 0, 1314 + ret = blk_end_request(req, 0, 1306 1315 brq->data.bytes_xfered); 1307 - spin_unlock_irq(&md->lock); 1308 1316 /* 1309 1317 * If the blk_end_request function returns non-zero even 1310 1318 * though all data has been transferred and no errors ··· 1352 1364 * time, so we only reach here after trying to 1353 1365 * read a single sector. 1354 1366 */ 1355 - spin_lock_irq(&md->lock); 1356 - ret = __blk_end_request(req, -EIO, 1367 + ret = blk_end_request(req, -EIO, 1357 1368 brq->data.blksz); 1358 - spin_unlock_irq(&md->lock); 1359 1369 if (!ret) 1360 1370 goto start_new_req; 1361 1371 break; ··· 1374 1388 return 1; 1375 1389 1376 1390 cmd_abort: 1377 - spin_lock_irq(&md->lock); 1378 1391 if (mmc_card_removed(card)) 1379 1392 req->cmd_flags |= REQ_QUIET; 1380 1393 while (ret) 1381 - ret = __blk_end_request(req, -EIO, blk_rq_cur_bytes(req)); 1382 - spin_unlock_irq(&md->lock); 1394 + ret = blk_end_request(req, -EIO, blk_rq_cur_bytes(req)); 1383 1395 1384 1396 start_new_req: 1385 1397 if (rqc) { ··· 1401 1417 ret = mmc_blk_part_switch(card, md); 1402 1418 if (ret) { 1403 1419 if (req) { 1404 - spin_lock_irq(&md->lock); 1405 - __blk_end_request_all(req, -EIO); 1406 - spin_unlock_irq(&md->lock); 1420 + blk_end_request_all(req, -EIO); 1407 1421 } 1408 1422 ret = 0; 1409 1423 goto out;
+1 -1
drivers/mmc/core/Makefile
··· 7 7 mmc.o mmc_ops.o sd.o sd_ops.o \ 8 8 sdio.o sdio_ops.o sdio_bus.o \ 9 9 sdio_cis.o sdio_io.o sdio_irq.o \ 10 - quirks.o cd-gpio.o 10 + quirks.o slot-gpio.o 11 11 12 12 mmc_core-$(CONFIG_DEBUG_FS) += debugfs.o
-83
drivers/mmc/core/cd-gpio.c
··· 1 - /* 2 - * Generic GPIO card-detect helper 3 - * 4 - * Copyright (C) 2011, Guennadi Liakhovetski <g.liakhovetski@gmx.de> 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License version 2 as 8 - * published by the Free Software Foundation. 9 - */ 10 - 11 - #include <linux/err.h> 12 - #include <linux/gpio.h> 13 - #include <linux/interrupt.h> 14 - #include <linux/jiffies.h> 15 - #include <linux/mmc/cd-gpio.h> 16 - #include <linux/mmc/host.h> 17 - #include <linux/module.h> 18 - #include <linux/slab.h> 19 - 20 - struct mmc_cd_gpio { 21 - unsigned int gpio; 22 - char label[0]; 23 - }; 24 - 25 - static irqreturn_t mmc_cd_gpio_irqt(int irq, void *dev_id) 26 - { 27 - /* Schedule a card detection after a debounce timeout */ 28 - mmc_detect_change(dev_id, msecs_to_jiffies(100)); 29 - return IRQ_HANDLED; 30 - } 31 - 32 - int mmc_cd_gpio_request(struct mmc_host *host, unsigned int gpio) 33 - { 34 - size_t len = strlen(dev_name(host->parent)) + 4; 35 - struct mmc_cd_gpio *cd; 36 - int irq = gpio_to_irq(gpio); 37 - int ret; 38 - 39 - if (irq < 0) 40 - return irq; 41 - 42 - cd = kmalloc(sizeof(*cd) + len, GFP_KERNEL); 43 - if (!cd) 44 - return -ENOMEM; 45 - 46 - snprintf(cd->label, len, "%s cd", dev_name(host->parent)); 47 - 48 - ret = gpio_request_one(gpio, GPIOF_DIR_IN, cd->label); 49 - if (ret < 0) 50 - goto egpioreq; 51 - 52 - ret = request_threaded_irq(irq, NULL, mmc_cd_gpio_irqt, 53 - IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | 54 - IRQF_ONESHOT, cd->label, host); 55 - if (ret < 0) 56 - goto eirqreq; 57 - 58 - cd->gpio = gpio; 59 - host->hotplug.irq = irq; 60 - host->hotplug.handler_priv = cd; 61 - 62 - return 0; 63 - 64 - eirqreq: 65 - gpio_free(gpio); 66 - egpioreq: 67 - kfree(cd); 68 - return ret; 69 - } 70 - EXPORT_SYMBOL(mmc_cd_gpio_request); 71 - 72 - void mmc_cd_gpio_free(struct mmc_host *host) 73 - { 74 - struct mmc_cd_gpio *cd = host->hotplug.handler_priv; 75 - 76 - if (!cd) 77 - return; 78 - 79 - free_irq(host->hotplug.irq, host); 80 - gpio_free(cd->gpio); 81 - kfree(cd); 82 - } 83 - EXPORT_SYMBOL(mmc_cd_gpio_free);
+62 -28
drivers/mmc/core/core.c
··· 404 404 { 405 405 int err; 406 406 u32 status; 407 + unsigned long prg_wait; 407 408 408 409 BUG_ON(!card); 409 410 ··· 420 419 goto out; 421 420 } 422 421 423 - /* 424 - * If the card status is in PRG-state, we can send the HPI command. 425 - */ 426 - if (R1_CURRENT_STATE(status) == R1_STATE_PRG) { 427 - do { 428 - /* 429 - * We don't know when the HPI command will finish 430 - * processing, so we need to resend HPI until out 431 - * of prg-state, and keep checking the card status 432 - * with SEND_STATUS. If a timeout error occurs when 433 - * sending the HPI command, we are already out of 434 - * prg-state. 435 - */ 436 - err = mmc_send_hpi_cmd(card, &status); 437 - if (err) 438 - pr_debug("%s: abort HPI (%d error)\n", 439 - mmc_hostname(card->host), err); 422 + switch (R1_CURRENT_STATE(status)) { 423 + case R1_STATE_IDLE: 424 + case R1_STATE_READY: 425 + case R1_STATE_STBY: 426 + /* 427 + * In idle states, HPI is not needed and the caller 428 + * can issue the next intended command immediately 429 + */ 430 + goto out; 431 + case R1_STATE_PRG: 432 + break; 433 + default: 434 + /* In all other states, it's illegal to issue HPI */ 435 + pr_debug("%s: HPI cannot be sent. Card state=%d\n", 436 + mmc_hostname(card->host), R1_CURRENT_STATE(status)); 437 + err = -EINVAL; 438 + goto out; 439 + } 440 440 441 - err = mmc_send_status(card, &status); 442 - if (err) 443 - break; 444 - } while (R1_CURRENT_STATE(status) == R1_STATE_PRG); 445 - } else 446 - pr_debug("%s: Left prg-state\n", mmc_hostname(card->host)); 441 + err = mmc_send_hpi_cmd(card, &status); 442 + if (err) 443 + goto out; 444 + 445 + prg_wait = jiffies + msecs_to_jiffies(card->ext_csd.out_of_int_time); 446 + do { 447 + err = mmc_send_status(card, &status); 448 + 449 + if (!err && R1_CURRENT_STATE(status) == R1_STATE_TRAN) 450 + break; 451 + if (time_after(jiffies, prg_wait)) 452 + err = -ETIMEDOUT; 453 + } while (!err); 447 454 448 455 out: 449 456 mmc_release_host(card->host); ··· 950 941 951 942 return result; 952 943 } 953 - EXPORT_SYMBOL(mmc_regulator_get_ocrmask); 944 + EXPORT_SYMBOL_GPL(mmc_regulator_get_ocrmask); 954 945 955 946 /** 956 947 * mmc_regulator_set_ocr - set regulator to match host->ios voltage ··· 1020 1011 "could not set regulator OCR (%d)\n", result); 1021 1012 return result; 1022 1013 } 1023 - EXPORT_SYMBOL(mmc_regulator_set_ocr); 1014 + EXPORT_SYMBOL_GPL(mmc_regulator_set_ocr); 1015 + 1016 + int mmc_regulator_get_supply(struct mmc_host *mmc) 1017 + { 1018 + struct device *dev = mmc_dev(mmc); 1019 + struct regulator *supply; 1020 + int ret; 1021 + 1022 + supply = devm_regulator_get(dev, "vmmc"); 1023 + mmc->supply.vmmc = supply; 1024 + mmc->supply.vqmmc = devm_regulator_get(dev, "vqmmc"); 1025 + 1026 + if (IS_ERR(supply)) 1027 + return PTR_ERR(supply); 1028 + 1029 + ret = mmc_regulator_get_ocrmask(supply); 1030 + if (ret > 0) 1031 + mmc->ocr_avail = ret; 1032 + else 1033 + dev_warn(mmc_dev(mmc), "Failed getting OCR mask: %d\n", ret); 1034 + 1035 + return 0; 1036 + } 1037 + EXPORT_SYMBOL_GPL(mmc_regulator_get_supply); 1024 1038 1025 1039 #endif /* CONFIG_REGULATOR */ 1026 1040 ··· 1211 1179 host->ios.bus_width = MMC_BUS_WIDTH_1; 1212 1180 host->ios.timing = MMC_TIMING_LEGACY; 1213 1181 mmc_set_ios(host); 1182 + 1183 + /* Set signal voltage to 3.3V */ 1184 + mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330, false); 1214 1185 1215 1186 /* 1216 1187 * This delay should be sufficient to allow the power supply ··· 1966 1931 */ 1967 1932 mmc_hw_reset_for_init(host); 1968 1933 1969 - /* Initialization should be done at 3.3 V I/O voltage. */ 1970 - mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330, 0); 1971 - 1972 1934 /* 1973 1935 * sdio_reset sends CMD52 to reset card. Since we do not know 1974 1936 * if the card is being re-initialized, just send it. CMD52 ··· 2107 2075 void mmc_start_host(struct mmc_host *host) 2108 2076 { 2109 2077 host->f_init = max(freqs[0], host->f_min); 2078 + host->rescan_disable = 0; 2110 2079 mmc_power_up(host); 2111 2080 mmc_detect_change(host, 0); 2112 2081 } ··· 2121 2088 spin_unlock_irqrestore(&host->lock, flags); 2122 2089 #endif 2123 2090 2091 + host->rescan_disable = 1; 2124 2092 cancel_delayed_work_sync(&host->detect); 2125 2093 mmc_flush_scheduled_work(); 2126 2094
+6
drivers/mmc/core/host.c
··· 32 32 static void mmc_host_classdev_release(struct device *dev) 33 33 { 34 34 struct mmc_host *host = cls_dev_to_mmc_host(dev); 35 + mutex_destroy(&host->slot.lock); 35 36 kfree(host); 36 37 } 37 38 ··· 313 312 if (!host) 314 313 return NULL; 315 314 315 + /* scanning will be enabled when we're ready */ 316 + host->rescan_disable = 1; 316 317 spin_lock(&mmc_host_lock); 317 318 err = idr_get_new(&mmc_host_idr, host, &host->index); 318 319 spin_unlock(&mmc_host_lock); ··· 329 326 device_initialize(&host->class_dev); 330 327 331 328 mmc_host_clk_init(host); 329 + 330 + mutex_init(&host->slot.lock); 331 + host->slot.cd_irq = -EINVAL; 332 332 333 333 spin_lock_init(&host->lock); 334 334 init_waitqueue_head(&host->wq);
-3
drivers/mmc/core/mmc.c
··· 818 818 if (!mmc_host_is_spi(host)) 819 819 mmc_set_bus_mode(host, MMC_BUSMODE_OPENDRAIN); 820 820 821 - /* Initialization should be done at 3.3 V I/O voltage. */ 822 - mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330, 0); 823 - 824 821 /* 825 822 * Since we're changing the OCR value, we seem to 826 823 * need to tell some cards to go back to the idle
-1
drivers/mmc/core/mmc_ops.c
··· 569 569 570 570 cmd.opcode = opcode; 571 571 cmd.arg = card->rca << 16 | 1; 572 - cmd.cmd_timeout_ms = card->ext_csd.out_of_int_time; 573 572 574 573 err = mmc_wait_for_cmd(card->host, &cmd, 0); 575 574 if (err) {
+79 -92
drivers/mmc/core/sd.c
··· 244 244 * bitfield positions accordingly. 245 245 */ 246 246 au = UNSTUFF_BITS(ssr, 428 - 384, 4); 247 - if (au > 0 || au <= 9) { 247 + if (au > 0 && au <= 9) { 248 248 card->ssr.au = 1 << (au + 4); 249 249 es = UNSTUFF_BITS(ssr, 408 - 384, 16); 250 250 et = UNSTUFF_BITS(ssr, 402 - 384, 6); ··· 290 290 return -ENOMEM; 291 291 } 292 292 293 - /* Find out the supported Bus Speed Modes. */ 294 - err = mmc_sd_switch(card, 0, 0, 1, status); 293 + /* 294 + * Find out the card's support bits with a mode 0 operation. 295 + * The argument does not matter, as the support bits do not 296 + * change with the arguments. 297 + */ 298 + err = mmc_sd_switch(card, 0, 0, 0, status); 295 299 if (err) { 296 300 /* 297 301 * If the host or the card can't do the switch, ··· 316 312 317 313 if (card->scr.sda_spec3) { 318 314 card->sw_caps.sd3_bus_mode = status[13]; 319 - 320 - /* Find out Driver Strengths supported by the card */ 321 - err = mmc_sd_switch(card, 0, 2, 1, status); 322 - if (err) { 323 - /* 324 - * If the host or the card can't do the switch, 325 - * fail more gracefully. 326 - */ 327 - if (err != -EINVAL && err != -ENOSYS && err != -EFAULT) 328 - goto out; 329 - 330 - pr_warning("%s: problem reading " 331 - "Driver Strength.\n", 332 - mmc_hostname(card->host)); 333 - err = 0; 334 - 335 - goto out; 336 - } 337 - 315 + /* Driver Strengths supported by the card */ 338 316 card->sw_caps.sd3_drv_type = status[9]; 339 - 340 - /* Find out Current Limits supported by the card */ 341 - err = mmc_sd_switch(card, 0, 3, 1, status); 342 - if (err) { 343 - /* 344 - * If the host or the card can't do the switch, 345 - * fail more gracefully. 346 - */ 347 - if (err != -EINVAL && err != -ENOSYS && err != -EFAULT) 348 - goto out; 349 - 350 - pr_warning("%s: problem reading " 351 - "Current Limit.\n", 352 - mmc_hostname(card->host)); 353 - err = 0; 354 - 355 - goto out; 356 - } 357 - 358 - card->sw_caps.sd3_curr_limit = status[7]; 359 317 } 360 318 361 319 out: ··· 517 551 return 0; 518 552 } 519 553 554 + /* Get host's max current setting at its current voltage */ 555 + static u32 sd_get_host_max_current(struct mmc_host *host) 556 + { 557 + u32 voltage, max_current; 558 + 559 + voltage = 1 << host->ios.vdd; 560 + switch (voltage) { 561 + case MMC_VDD_165_195: 562 + max_current = host->max_current_180; 563 + break; 564 + case MMC_VDD_29_30: 565 + case MMC_VDD_30_31: 566 + max_current = host->max_current_300; 567 + break; 568 + case MMC_VDD_32_33: 569 + case MMC_VDD_33_34: 570 + max_current = host->max_current_330; 571 + break; 572 + default: 573 + max_current = 0; 574 + } 575 + 576 + return max_current; 577 + } 578 + 520 579 static int sd_set_current_limit(struct mmc_card *card, u8 *status) 521 580 { 522 - int current_limit = 0; 581 + int current_limit = SD_SET_CURRENT_NO_CHANGE; 523 582 int err; 583 + u32 max_current; 524 584 525 585 /* 526 586 * Current limit switch is only defined for SDR50, SDR104, and DDR50 527 - * bus speed modes. For other bus speed modes, we set the default 528 - * current limit of 200mA. 587 + * bus speed modes. For other bus speed modes, we do not change the 588 + * current limit. 529 589 */ 530 - if ((card->sd_bus_speed == UHS_SDR50_BUS_SPEED) || 531 - (card->sd_bus_speed == UHS_SDR104_BUS_SPEED) || 532 - (card->sd_bus_speed == UHS_DDR50_BUS_SPEED)) { 533 - if (card->host->caps & MMC_CAP_MAX_CURRENT_800) { 534 - if (card->sw_caps.sd3_curr_limit & SD_MAX_CURRENT_800) 535 - current_limit = SD_SET_CURRENT_LIMIT_800; 536 - else if (card->sw_caps.sd3_curr_limit & 537 - SD_MAX_CURRENT_600) 538 - current_limit = SD_SET_CURRENT_LIMIT_600; 539 - else if (card->sw_caps.sd3_curr_limit & 540 - SD_MAX_CURRENT_400) 541 - current_limit = SD_SET_CURRENT_LIMIT_400; 542 - else if (card->sw_caps.sd3_curr_limit & 543 - SD_MAX_CURRENT_200) 544 - current_limit = SD_SET_CURRENT_LIMIT_200; 545 - } else if (card->host->caps & MMC_CAP_MAX_CURRENT_600) { 546 - if (card->sw_caps.sd3_curr_limit & SD_MAX_CURRENT_600) 547 - current_limit = SD_SET_CURRENT_LIMIT_600; 548 - else if (card->sw_caps.sd3_curr_limit & 549 - SD_MAX_CURRENT_400) 550 - current_limit = SD_SET_CURRENT_LIMIT_400; 551 - else if (card->sw_caps.sd3_curr_limit & 552 - SD_MAX_CURRENT_200) 553 - current_limit = SD_SET_CURRENT_LIMIT_200; 554 - } else if (card->host->caps & MMC_CAP_MAX_CURRENT_400) { 555 - if (card->sw_caps.sd3_curr_limit & SD_MAX_CURRENT_400) 556 - current_limit = SD_SET_CURRENT_LIMIT_400; 557 - else if (card->sw_caps.sd3_curr_limit & 558 - SD_MAX_CURRENT_200) 559 - current_limit = SD_SET_CURRENT_LIMIT_200; 560 - } else if (card->host->caps & MMC_CAP_MAX_CURRENT_200) { 561 - if (card->sw_caps.sd3_curr_limit & SD_MAX_CURRENT_200) 562 - current_limit = SD_SET_CURRENT_LIMIT_200; 563 - } 564 - } else 590 + if ((card->sd_bus_speed != UHS_SDR50_BUS_SPEED) && 591 + (card->sd_bus_speed != UHS_SDR104_BUS_SPEED) && 592 + (card->sd_bus_speed != UHS_DDR50_BUS_SPEED)) 593 + return 0; 594 + 595 + /* 596 + * Host has different current capabilities when operating at 597 + * different voltages, so find out its max current first. 598 + */ 599 + max_current = sd_get_host_max_current(card->host); 600 + 601 + /* 602 + * We only check host's capability here, if we set a limit that is 603 + * higher than the card's maximum current, the card will be using its 604 + * maximum current, e.g. if the card's maximum current is 300ma, and 605 + * when we set current limit to 200ma, the card will draw 200ma, and 606 + * when we set current limit to 400/600/800ma, the card will draw its 607 + * maximum 300ma from the host. 608 + */ 609 + if (max_current >= 800) 610 + current_limit = SD_SET_CURRENT_LIMIT_800; 611 + else if (max_current >= 600) 612 + current_limit = SD_SET_CURRENT_LIMIT_600; 613 + else if (max_current >= 400) 614 + current_limit = SD_SET_CURRENT_LIMIT_400; 615 + else if (max_current >= 200) 565 616 current_limit = SD_SET_CURRENT_LIMIT_200; 566 617 567 - err = mmc_sd_switch(card, 1, 3, current_limit, status); 568 - if (err) 569 - return err; 618 + if (current_limit != SD_SET_CURRENT_NO_CHANGE) { 619 + err = mmc_sd_switch(card, 1, 3, current_limit, status); 620 + if (err) 621 + return err; 570 622 571 - if (((status[15] >> 4) & 0x0F) != current_limit) 572 - pr_warning("%s: Problem setting current limit!\n", 573 - mmc_hostname(card->host)); 623 + if (((status[15] >> 4) & 0x0F) != current_limit) 624 + pr_warning("%s: Problem setting current limit!\n", 625 + mmc_hostname(card->host)); 626 + 627 + } 574 628 575 629 return 0; 576 630 } ··· 712 726 int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) 713 727 { 714 728 int err; 729 + u32 max_current; 715 730 716 731 /* 717 732 * Since we're changing the OCR value, we seem to ··· 740 753 MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_SDR104 | MMC_CAP_UHS_DDR50)) 741 754 ocr |= SD_OCR_S18R; 742 755 743 - /* If the host can supply more than 150mA, XPC should be set to 1. */ 744 - if (host->caps & (MMC_CAP_SET_XPC_330 | MMC_CAP_SET_XPC_300 | 745 - MMC_CAP_SET_XPC_180)) 756 + /* 757 + * If the host can supply more than 150mA at current voltage, 758 + * XPC should be set to 1. 759 + */ 760 + max_current = sd_get_host_max_current(host); 761 + if (max_current > 150) 746 762 ocr |= SD_OCR_XPC; 747 763 748 764 try_again: ··· 900 910 901 911 BUG_ON(!host); 902 912 WARN_ON(!host->claimed); 903 - 904 - /* The initialization should be done at 3.3 V I/O voltage. */ 905 - mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330, 0); 906 913 907 914 err = mmc_sd_get_cid(host, ocr, cid, &rocr); 908 915 if (err)
-7
drivers/mmc/core/sdio.c
··· 591 591 * Inform the card of the voltage 592 592 */ 593 593 if (!powered_resume) { 594 - /* The initialization should be done at 3.3 V I/O voltage. */ 595 - mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330, 0); 596 - 597 594 err = mmc_send_io_op_cond(host, host->ocr, &ocr); 598 595 if (err) 599 596 goto err; ··· 1002 1005 * With these steps taken, mmc_select_voltage() is also required to 1003 1006 * restore the correct voltage setting of the card. 1004 1007 */ 1005 - 1006 - /* The initialization should be done at 3.3 V I/O voltage. */ 1007 - if (!mmc_card_keep_power(host)) 1008 - mmc_set_signal_voltage(host, MMC_SIGNAL_VOLTAGE_330, 0); 1009 1008 1010 1009 sdio_reset(host); 1011 1010 mmc_go_idle(host);
+1 -1
drivers/mmc/core/sdio_cis.c
··· 313 313 314 314 if (ret == -ENOENT) { 315 315 /* warn about unknown tuples */ 316 - pr_warning("%s: queuing unknown" 316 + pr_warn_ratelimited("%s: queuing unknown" 317 317 " CIS tuple 0x%02x (%u bytes)\n", 318 318 mmc_hostname(card->host), 319 319 tpl_code, tpl_link);
+188
drivers/mmc/core/slot-gpio.c
··· 1 + /* 2 + * Generic GPIO card-detect helper 3 + * 4 + * Copyright (C) 2011, Guennadi Liakhovetski <g.liakhovetski@gmx.de> 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + */ 10 + 11 + #include <linux/err.h> 12 + #include <linux/gpio.h> 13 + #include <linux/interrupt.h> 14 + #include <linux/jiffies.h> 15 + #include <linux/mmc/host.h> 16 + #include <linux/mmc/slot-gpio.h> 17 + #include <linux/module.h> 18 + #include <linux/slab.h> 19 + 20 + struct mmc_gpio { 21 + int ro_gpio; 22 + int cd_gpio; 23 + char *ro_label; 24 + char cd_label[0]; 25 + }; 26 + 27 + static irqreturn_t mmc_gpio_cd_irqt(int irq, void *dev_id) 28 + { 29 + /* Schedule a card detection after a debounce timeout */ 30 + mmc_detect_change(dev_id, msecs_to_jiffies(100)); 31 + return IRQ_HANDLED; 32 + } 33 + 34 + static int mmc_gpio_alloc(struct mmc_host *host) 35 + { 36 + size_t len = strlen(dev_name(host->parent)) + 4; 37 + struct mmc_gpio *ctx; 38 + 39 + mutex_lock(&host->slot.lock); 40 + 41 + ctx = host->slot.handler_priv; 42 + if (!ctx) { 43 + /* 44 + * devm_kzalloc() can be called after device_initialize(), even 45 + * before device_add(), i.e., between mmc_alloc_host() and 46 + * mmc_add_host() 47 + */ 48 + ctx = devm_kzalloc(&host->class_dev, sizeof(*ctx) + 2 * len, 49 + GFP_KERNEL); 50 + if (ctx) { 51 + ctx->ro_label = ctx->cd_label + len; 52 + snprintf(ctx->cd_label, len, "%s cd", dev_name(host->parent)); 53 + snprintf(ctx->ro_label, len, "%s ro", dev_name(host->parent)); 54 + ctx->cd_gpio = -EINVAL; 55 + ctx->ro_gpio = -EINVAL; 56 + host->slot.handler_priv = ctx; 57 + } 58 + } 59 + 60 + mutex_unlock(&host->slot.lock); 61 + 62 + return ctx ? 0 : -ENOMEM; 63 + } 64 + 65 + int mmc_gpio_get_ro(struct mmc_host *host) 66 + { 67 + struct mmc_gpio *ctx = host->slot.handler_priv; 68 + 69 + if (!ctx || !gpio_is_valid(ctx->ro_gpio)) 70 + return -ENOSYS; 71 + 72 + return !gpio_get_value_cansleep(ctx->ro_gpio) ^ 73 + !!(host->caps2 & MMC_CAP2_RO_ACTIVE_HIGH); 74 + } 75 + EXPORT_SYMBOL(mmc_gpio_get_ro); 76 + 77 + int mmc_gpio_get_cd(struct mmc_host *host) 78 + { 79 + struct mmc_gpio *ctx = host->slot.handler_priv; 80 + 81 + if (!ctx || !gpio_is_valid(ctx->cd_gpio)) 82 + return -ENOSYS; 83 + 84 + return !gpio_get_value_cansleep(ctx->cd_gpio) ^ 85 + !!(host->caps2 & MMC_CAP2_CD_ACTIVE_HIGH); 86 + } 87 + EXPORT_SYMBOL(mmc_gpio_get_cd); 88 + 89 + int mmc_gpio_request_ro(struct mmc_host *host, unsigned int gpio) 90 + { 91 + struct mmc_gpio *ctx; 92 + int ret; 93 + 94 + if (!gpio_is_valid(gpio)) 95 + return -EINVAL; 96 + 97 + ret = mmc_gpio_alloc(host); 98 + if (ret < 0) 99 + return ret; 100 + 101 + ctx = host->slot.handler_priv; 102 + 103 + return gpio_request_one(gpio, GPIOF_DIR_IN, ctx->ro_label); 104 + } 105 + EXPORT_SYMBOL(mmc_gpio_request_ro); 106 + 107 + int mmc_gpio_request_cd(struct mmc_host *host, unsigned int gpio) 108 + { 109 + struct mmc_gpio *ctx; 110 + int irq = gpio_to_irq(gpio); 111 + int ret; 112 + 113 + ret = mmc_gpio_alloc(host); 114 + if (ret < 0) 115 + return ret; 116 + 117 + ctx = host->slot.handler_priv; 118 + 119 + ret = gpio_request_one(gpio, GPIOF_DIR_IN, ctx->cd_label); 120 + if (ret < 0) 121 + /* 122 + * don't bother freeing memory. It might still get used by other 123 + * slot functions, in any case it will be freed, when the device 124 + * is destroyed. 125 + */ 126 + return ret; 127 + 128 + /* 129 + * Even if gpio_to_irq() returns a valid IRQ number, the platform might 130 + * still prefer to poll, e.g., because that IRQ number is already used 131 + * by another unit and cannot be shared. 132 + */ 133 + if (irq >= 0 && host->caps & MMC_CAP_NEEDS_POLL) 134 + irq = -EINVAL; 135 + 136 + if (irq >= 0) { 137 + ret = request_threaded_irq(irq, NULL, mmc_gpio_cd_irqt, 138 + IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 139 + ctx->cd_label, host); 140 + if (ret < 0) 141 + irq = ret; 142 + } 143 + 144 + host->slot.cd_irq = irq; 145 + 146 + if (irq < 0) 147 + host->caps |= MMC_CAP_NEEDS_POLL; 148 + 149 + ctx->cd_gpio = gpio; 150 + 151 + return 0; 152 + } 153 + EXPORT_SYMBOL(mmc_gpio_request_cd); 154 + 155 + void mmc_gpio_free_ro(struct mmc_host *host) 156 + { 157 + struct mmc_gpio *ctx = host->slot.handler_priv; 158 + int gpio; 159 + 160 + if (!ctx || !gpio_is_valid(ctx->ro_gpio)) 161 + return; 162 + 163 + gpio = ctx->ro_gpio; 164 + ctx->ro_gpio = -EINVAL; 165 + 166 + gpio_free(gpio); 167 + } 168 + EXPORT_SYMBOL(mmc_gpio_free_ro); 169 + 170 + void mmc_gpio_free_cd(struct mmc_host *host) 171 + { 172 + struct mmc_gpio *ctx = host->slot.handler_priv; 173 + int gpio; 174 + 175 + if (!ctx || !gpio_is_valid(ctx->cd_gpio)) 176 + return; 177 + 178 + if (host->slot.cd_irq >= 0) { 179 + free_irq(host->slot.cd_irq, host); 180 + host->slot.cd_irq = -EINVAL; 181 + } 182 + 183 + gpio = ctx->cd_gpio; 184 + ctx->cd_gpio = -EINVAL; 185 + 186 + gpio_free(gpio); 187 + } 188 + EXPORT_SYMBOL(mmc_gpio_free_cd);
+10 -4
drivers/mmc/host/atmel-mci.c
··· 391 391 clk_disable(host->mck); 392 392 spin_unlock_bh(&host->lock); 393 393 394 - seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n", 394 + seq_printf(s, "MR:\t0x%08x%s%s ", 395 395 buf[ATMCI_MR / 4], 396 396 buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "", 397 - buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : "", 398 - buf[ATMCI_MR / 4] & 0xff); 397 + buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : ""); 398 + if (host->caps.has_odd_clk_div) 399 + seq_printf(s, "{CLKDIV,CLKODD}=%u\n", 400 + ((buf[ATMCI_MR / 4] & 0xff) << 1) 401 + | ((buf[ATMCI_MR / 4] >> 16) & 1)); 402 + else 403 + seq_printf(s, "CLKDIV=%u\n", 404 + (buf[ATMCI_MR / 4] & 0xff)); 399 405 seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]); 400 406 seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]); 401 407 seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]); ··· 1691 1685 1692 1686 dev_dbg(&host->pdev->dev, "FSM: cmd ready\n"); 1693 1687 host->cmd = NULL; 1694 - host->data = NULL; 1695 1688 data->bytes_xfered = data->blocks * data->blksz; 1696 1689 data->error = 0; 1697 1690 atmci_command_complete(host, mrq->stop); ··· 1704 1699 atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1705 1700 state = STATE_WAITING_NOTBUSY; 1706 1701 } 1702 + host->data = NULL; 1707 1703 break; 1708 1704 1709 1705 case STATE_END_REQUEST:
+14 -3
drivers/mmc/host/dw_mmc.c
··· 405 405 static int dw_mci_idmac_init(struct dw_mci *host) 406 406 { 407 407 struct idmac_desc *p; 408 - int i; 408 + int i, dma_support; 409 409 410 410 /* Number of descriptors in the ring buffer */ 411 411 host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 412 + 413 + /* Check if Hardware Configuration Register has support for DMA */ 414 + dma_support = (mci_readl(host, HCON) >> 16) & 0x3; 415 + 416 + if (!dma_support || dma_support > 2) { 417 + dev_err(&host->dev, 418 + "Host Controller does not support IDMA Tx.\n"); 419 + host->dma_ops = NULL; 420 + return -ENODEV; 421 + } 422 + 423 + dev_info(&host->dev, "Using internal DMA controller.\n"); 412 424 413 425 /* Forward link the descriptor list */ 414 426 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) ··· 1888 1876 /* Determine which DMA interface to use */ 1889 1877 #ifdef CONFIG_MMC_DW_IDMAC 1890 1878 host->dma_ops = &dw_mci_idmac_ops; 1891 - dev_info(&host->dev, "Using internal DMA controller.\n"); 1892 1879 #endif 1893 1880 1894 1881 if (!host->dma_ops) ··· 2186 2175 return ret; 2187 2176 } 2188 2177 2189 - if (host->dma_ops->init) 2178 + if (host->use_dma && host->dma_ops->init) 2190 2179 host->dma_ops->init(host); 2191 2180 2192 2181 /* Restore the old value at FIFOTH register */
+24 -2
drivers/mmc/host/mxs-mmc.c
··· 164 164 spinlock_t lock; 165 165 int sdio_irq_en; 166 166 int wp_gpio; 167 + bool wp_inverted; 167 168 }; 168 169 169 170 static int mxs_mmc_get_ro(struct mmc_host *mmc) 170 171 { 171 172 struct mxs_mmc_host *host = mmc_priv(mmc); 173 + int ret; 172 174 173 175 if (!gpio_is_valid(host->wp_gpio)) 174 176 return -EINVAL; 175 177 176 - return gpio_get_value(host->wp_gpio); 178 + ret = gpio_get_value(host->wp_gpio); 179 + 180 + if (host->wp_inverted) 181 + ret = !ret; 182 + 183 + return ret; 177 184 } 178 185 179 186 static int mxs_mmc_get_cd(struct mmc_host *mmc) ··· 714 707 struct pinctrl *pinctrl; 715 708 int ret = 0, irq_err, irq_dma; 716 709 dma_cap_mask_t mask; 710 + struct regulator *reg_vmmc; 711 + enum of_gpio_flags flags; 717 712 718 713 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 719 714 dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0); ··· 756 747 host->mmc = mmc; 757 748 host->sdio_irq_en = 0; 758 749 750 + reg_vmmc = devm_regulator_get(&pdev->dev, "vmmc"); 751 + if (!IS_ERR(reg_vmmc)) { 752 + ret = regulator_enable(reg_vmmc); 753 + if (ret) { 754 + dev_err(&pdev->dev, 755 + "Failed to enable vmmc regulator: %d\n", ret); 756 + goto out_mmc_free; 757 + } 758 + } 759 + 759 760 pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 760 761 if (IS_ERR(pinctrl)) { 761 762 ret = PTR_ERR(pinctrl); ··· 804 785 mmc->caps |= MMC_CAP_4_BIT_DATA; 805 786 else if (bus_width == 8) 806 787 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; 807 - host->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0); 788 + host->wp_gpio = of_get_named_gpio_flags(np, "wp-gpios", 0, 789 + &flags); 790 + if (flags & OF_GPIO_ACTIVE_LOW) 791 + host->wp_inverted = 1; 808 792 } else { 809 793 if (pdata->flags & SLOTF_8_BIT_CAPABLE) 810 794 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
+9 -7
drivers/mmc/host/omap_hsmmc.c
··· 1089 1089 /* Disable the clocks */ 1090 1090 pm_runtime_put_sync(host->dev); 1091 1091 if (host->dbclk) 1092 - clk_disable(host->dbclk); 1092 + clk_disable_unprepare(host->dbclk); 1093 1093 1094 1094 /* Turn the power off */ 1095 1095 ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); ··· 1100 1100 vdd); 1101 1101 pm_runtime_get_sync(host->dev); 1102 1102 if (host->dbclk) 1103 - clk_enable(host->dbclk); 1103 + clk_prepare_enable(host->dbclk); 1104 1104 1105 1105 if (ret != 0) 1106 1106 goto err; ··· 1899 1899 if (IS_ERR(host->dbclk)) { 1900 1900 dev_warn(mmc_dev(host->mmc), "Failed to get debounce clk\n"); 1901 1901 host->dbclk = NULL; 1902 - } else if (clk_enable(host->dbclk) != 0) { 1902 + } else if (clk_prepare_enable(host->dbclk) != 0) { 1903 1903 dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n"); 1904 1904 clk_put(host->dbclk); 1905 1905 host->dbclk = NULL; ··· 1931 1931 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); 1932 1932 if (!res) { 1933 1933 dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n"); 1934 + ret = -ENXIO; 1934 1935 goto err_irq; 1935 1936 } 1936 1937 host->dma_line_tx = res->start; ··· 1939 1938 res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); 1940 1939 if (!res) { 1941 1940 dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n"); 1941 + ret = -ENXIO; 1942 1942 goto err_irq; 1943 1943 } 1944 1944 host->dma_line_rx = res->start; ··· 2025 2023 pm_runtime_disable(host->dev); 2026 2024 clk_put(host->fclk); 2027 2025 if (host->dbclk) { 2028 - clk_disable(host->dbclk); 2026 + clk_disable_unprepare(host->dbclk); 2029 2027 clk_put(host->dbclk); 2030 2028 } 2031 2029 err1: ··· 2060 2058 pm_runtime_disable(host->dev); 2061 2059 clk_put(host->fclk); 2062 2060 if (host->dbclk) { 2063 - clk_disable(host->dbclk); 2061 + clk_disable_unprepare(host->dbclk); 2064 2062 clk_put(host->dbclk); 2065 2063 } 2066 2064 ··· 2118 2116 } 2119 2117 2120 2118 if (host->dbclk) 2121 - clk_disable(host->dbclk); 2119 + clk_disable_unprepare(host->dbclk); 2122 2120 err: 2123 2121 pm_runtime_put_sync(host->dev); 2124 2122 return ret; ··· 2139 2137 pm_runtime_get_sync(host->dev); 2140 2138 2141 2139 if (host->dbclk) 2142 - clk_enable(host->dbclk); 2140 + clk_prepare_enable(host->dbclk); 2143 2141 2144 2142 if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) 2145 2143 omap_hsmmc_conf_bus_power(host);
+3 -7
drivers/mmc/host/s3cmci.c
··· 26 26 #include <mach/dma.h> 27 27 28 28 #include <mach/regs-sdi.h> 29 - #include <mach/regs-gpio.h> 30 29 31 30 #include <plat/mci.h> 32 31 ··· 1236 1237 switch (ios->power_mode) { 1237 1238 case MMC_POWER_ON: 1238 1239 case MMC_POWER_UP: 1239 - s3c2410_gpio_cfgpin(S3C2410_GPE(5), S3C2410_GPE5_SDCLK); 1240 - s3c2410_gpio_cfgpin(S3C2410_GPE(6), S3C2410_GPE6_SDCMD); 1241 - s3c2410_gpio_cfgpin(S3C2410_GPE(7), S3C2410_GPE7_SDDAT0); 1242 - s3c2410_gpio_cfgpin(S3C2410_GPE(8), S3C2410_GPE8_SDDAT1); 1243 - s3c2410_gpio_cfgpin(S3C2410_GPE(9), S3C2410_GPE9_SDDAT2); 1244 - s3c2410_gpio_cfgpin(S3C2410_GPE(10), S3C2410_GPE10_SDDAT3); 1240 + /* Configure GPE5...GPE10 pins in SD mode */ 1241 + s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2), 1242 + S3C_GPIO_PULL_NONE); 1245 1243 1246 1244 if (host->pdata->set_power) 1247 1245 host->pdata->set_power(ios->power_mode, ios->vdd);
+49 -2
drivers/mmc/host/sdhci-dove.c
··· 20 20 */ 21 21 22 22 #include <linux/io.h> 23 + #include <linux/clk.h> 24 + #include <linux/err.h> 23 25 #include <linux/module.h> 24 26 #include <linux/mmc/host.h> 25 27 26 28 #include "sdhci-pltfm.h" 29 + 30 + struct sdhci_dove_priv { 31 + struct clk *clk; 32 + }; 27 33 28 34 static u16 sdhci_dove_readw(struct sdhci_host *host, int reg) 29 35 { ··· 72 66 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | 73 67 SDHCI_QUIRK_NO_BUSY_IRQ | 74 68 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL | 75 - SDHCI_QUIRK_FORCE_DMA, 69 + SDHCI_QUIRK_FORCE_DMA | 70 + SDHCI_QUIRK_NO_HISPD_BIT, 76 71 }; 77 72 78 73 static int __devinit sdhci_dove_probe(struct platform_device *pdev) 79 74 { 80 - return sdhci_pltfm_register(pdev, &sdhci_dove_pdata); 75 + struct sdhci_host *host; 76 + struct sdhci_pltfm_host *pltfm_host; 77 + struct sdhci_dove_priv *priv; 78 + int ret; 79 + 80 + ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); 81 + if (ret) 82 + goto sdhci_dove_register_fail; 83 + 84 + priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), 85 + GFP_KERNEL); 86 + if (!priv) { 87 + dev_err(&pdev->dev, "unable to allocate private data"); 88 + ret = -ENOMEM; 89 + goto sdhci_dove_allocate_fail; 90 + } 91 + 92 + host = platform_get_drvdata(pdev); 93 + pltfm_host = sdhci_priv(host); 94 + pltfm_host->priv = priv; 95 + 96 + priv->clk = clk_get(&pdev->dev, NULL); 97 + if (!IS_ERR(priv->clk)) 98 + clk_prepare_enable(priv->clk); 99 + return 0; 100 + 101 + sdhci_dove_allocate_fail: 102 + sdhci_pltfm_unregister(pdev); 103 + sdhci_dove_register_fail: 104 + return ret; 81 105 } 82 106 83 107 static int __devexit sdhci_dove_remove(struct platform_device *pdev) 84 108 { 109 + struct sdhci_host *host = platform_get_drvdata(pdev); 110 + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 111 + struct sdhci_dove_priv *priv = pltfm_host->priv; 112 + 113 + if (priv->clk) { 114 + if (!IS_ERR(priv->clk)) { 115 + clk_disable_unprepare(priv->clk); 116 + clk_put(priv->clk); 117 + } 118 + devm_kfree(&pdev->dev, priv->clk); 119 + } 85 120 return sdhci_pltfm_unregister(pdev); 86 121 } 87 122
+7 -2
drivers/mmc/host/sdhci-esdhc-imx.c
··· 299 299 300 300 static void esdhc_writeb_le(struct sdhci_host *host, u8 val, int reg) 301 301 { 302 + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 303 + struct pltfm_imx_data *imx_data = pltfm_host->priv; 302 304 u32 new_val; 303 305 304 306 switch (reg) { ··· 317 315 SDHCI_CTRL_D3CD); 318 316 /* ensure the endianess */ 319 317 new_val |= ESDHC_HOST_CONTROL_LE; 320 - /* DMA mode bits are shifted */ 321 - new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5; 318 + /* bits 8&9 are reserved on mx25 */ 319 + if (!is_imx25_esdhc(imx_data)) { 320 + /* DMA mode bits are shifted */ 321 + new_val |= (val & SDHCI_CTRL_DMA_MASK) << 5; 322 + } 322 323 323 324 esdhc_clrset_le(host, 0xffff, new_val, reg); 324 325 return;
+1
drivers/mmc/host/sdhci-pci.c
··· 157 157 static const struct sdhci_pci_fixes sdhci_cafe = { 158 158 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | 159 159 SDHCI_QUIRK_NO_BUSY_IRQ | 160 + SDHCI_QUIRK_BROKEN_CARD_DETECTION | 160 161 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL, 161 162 }; 162 163
+54
drivers/mmc/host/sdhci-pxav2.c
··· 28 28 #include <linux/mmc/host.h> 29 29 #include <linux/platform_data/pxa_sdhci.h> 30 30 #include <linux/slab.h> 31 + #include <linux/of.h> 32 + #include <linux/of_device.h> 33 + 31 34 #include "sdhci.h" 32 35 #include "sdhci-pltfm.h" 33 36 ··· 124 121 .platform_8bit_width = pxav2_mmc_set_width, 125 122 }; 126 123 124 + #ifdef CONFIG_OF 125 + static const struct of_device_id sdhci_pxav2_of_match[] = { 126 + { 127 + .compatible = "mrvl,pxav2-mmc", 128 + }, 129 + {}, 130 + }; 131 + MODULE_DEVICE_TABLE(of, sdhci_pxav2_of_match); 132 + 133 + static struct sdhci_pxa_platdata *pxav2_get_mmc_pdata(struct device *dev) 134 + { 135 + struct sdhci_pxa_platdata *pdata; 136 + struct device_node *np = dev->of_node; 137 + u32 bus_width; 138 + u32 clk_delay_cycles; 139 + 140 + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 141 + if (!pdata) 142 + return NULL; 143 + 144 + if (of_find_property(np, "non-removable", NULL)) 145 + pdata->flags |= PXA_FLAG_CARD_PERMANENT; 146 + 147 + of_property_read_u32(np, "bus-width", &bus_width); 148 + if (bus_width == 8) 149 + pdata->flags |= PXA_FLAG_SD_8_BIT_CAPABLE_SLOT; 150 + 151 + of_property_read_u32(np, "mrvl,clk-delay-cycles", &clk_delay_cycles); 152 + if (clk_delay_cycles > 0) { 153 + pdata->clk_delay_sel = 1; 154 + pdata->clk_delay_cycles = clk_delay_cycles; 155 + } 156 + 157 + return pdata; 158 + } 159 + #else 160 + static inline struct sdhci_pxa_platdata *pxav2_get_mmc_pdata(struct device *dev) 161 + { 162 + return NULL; 163 + } 164 + #endif 165 + 127 166 static int __devinit sdhci_pxav2_probe(struct platform_device *pdev) 128 167 { 129 168 struct sdhci_pltfm_host *pltfm_host; ··· 173 128 struct device *dev = &pdev->dev; 174 129 struct sdhci_host *host = NULL; 175 130 struct sdhci_pxa *pxa = NULL; 131 + const struct of_device_id *match; 132 + 176 133 int ret; 177 134 struct clk *clk; 178 135 ··· 203 156 | SDHCI_QUIRK_BROKEN_TIMEOUT_VAL 204 157 | SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN; 205 158 159 + match = of_match_device(of_match_ptr(sdhci_pxav2_of_match), &pdev->dev); 160 + if (match) { 161 + pdata = pxav2_get_mmc_pdata(dev); 162 + } 206 163 if (pdata) { 207 164 if (pdata->flags & PXA_FLAG_CARD_PERMANENT) { 208 165 /* on-chip device */ ··· 269 218 .driver = { 270 219 .name = "sdhci-pxav2", 271 220 .owner = THIS_MODULE, 221 + #ifdef CONFIG_OF 222 + .of_match_table = sdhci_pxav2_of_match, 223 + #endif 272 224 .pm = SDHCI_PLTFM_PMOPS, 273 225 }, 274 226 .probe = sdhci_pxav2_probe,
+52
drivers/mmc/host/sdhci-pxav3.c
··· 28 28 #include <linux/slab.h> 29 29 #include <linux/delay.h> 30 30 #include <linux/module.h> 31 + #include <linux/of.h> 32 + #include <linux/of_device.h> 33 + 31 34 #include "sdhci.h" 32 35 #include "sdhci-pltfm.h" 33 36 ··· 167 164 .platform_send_init_74_clocks = pxav3_gen_init_74_clocks, 168 165 }; 169 166 167 + #ifdef CONFIG_OF 168 + static const struct of_device_id sdhci_pxav3_of_match[] = { 169 + { 170 + .compatible = "mrvl,pxav3-mmc", 171 + }, 172 + {}, 173 + }; 174 + MODULE_DEVICE_TABLE(of, sdhci_pxav3_of_match); 175 + 176 + static struct sdhci_pxa_platdata *pxav3_get_mmc_pdata(struct device *dev) 177 + { 178 + struct sdhci_pxa_platdata *pdata; 179 + struct device_node *np = dev->of_node; 180 + u32 bus_width; 181 + u32 clk_delay_cycles; 182 + 183 + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 184 + if (!pdata) 185 + return NULL; 186 + 187 + if (of_find_property(np, "non-removable", NULL)) 188 + pdata->flags |= PXA_FLAG_CARD_PERMANENT; 189 + 190 + of_property_read_u32(np, "bus-width", &bus_width); 191 + if (bus_width == 8) 192 + pdata->flags |= PXA_FLAG_SD_8_BIT_CAPABLE_SLOT; 193 + 194 + of_property_read_u32(np, "mrvl,clk-delay-cycles", &clk_delay_cycles); 195 + if (clk_delay_cycles > 0) 196 + pdata->clk_delay_cycles = clk_delay_cycles; 197 + 198 + return pdata; 199 + } 200 + #else 201 + static inline struct sdhci_pxa_platdata *pxav3_get_mmc_pdata(struct device *dev) 202 + { 203 + return NULL; 204 + } 205 + #endif 206 + 170 207 static int __devinit sdhci_pxav3_probe(struct platform_device *pdev) 171 208 { 172 209 struct sdhci_pltfm_host *pltfm_host; ··· 214 171 struct device *dev = &pdev->dev; 215 172 struct sdhci_host *host = NULL; 216 173 struct sdhci_pxa *pxa = NULL; 174 + const struct of_device_id *match; 175 + 217 176 int ret; 218 177 struct clk *clk; 219 178 ··· 246 201 247 202 /* enable 1/8V DDR capable */ 248 203 host->mmc->caps |= MMC_CAP_1_8V_DDR; 204 + 205 + match = of_match_device(of_match_ptr(sdhci_pxav3_of_match), &pdev->dev); 206 + if (match) 207 + pdata = pxav3_get_mmc_pdata(dev); 249 208 250 209 if (pdata) { 251 210 if (pdata->flags & PXA_FLAG_CARD_PERMANENT) { ··· 312 263 static struct platform_driver sdhci_pxav3_driver = { 313 264 .driver = { 314 265 .name = "sdhci-pxav3", 266 + #ifdef CONFIG_OF 267 + .of_match_table = sdhci_pxav3_of_match, 268 + #endif 315 269 .owner = THIS_MODULE, 316 270 .pm = SDHCI_PLTFM_PMOPS, 317 271 },
+88 -56
drivers/mmc/host/sdhci.c
··· 27 27 28 28 #include <linux/mmc/mmc.h> 29 29 #include <linux/mmc/host.h> 30 + #include <linux/mmc/card.h> 30 31 31 32 #include "sdhci.h" 32 33 ··· 245 244 static void sdhci_reinit(struct sdhci_host *host) 246 245 { 247 246 sdhci_init(host, 0); 247 + /* 248 + * Retuning stuffs are affected by different cards inserted and only 249 + * applicable to UHS-I cards. So reset these fields to their initial 250 + * value when card is removed. 251 + */ 252 + if (host->flags & SDHCI_USING_RETUNING_TIMER) { 253 + host->flags &= ~SDHCI_USING_RETUNING_TIMER; 254 + 255 + del_timer_sync(&host->tuning_timer); 256 + host->flags &= ~SDHCI_NEEDS_RETUNING; 257 + host->mmc->max_blk_count = 258 + (host->quirks & SDHCI_QUIRK_NO_MULTIBLOCK) ? 1 : 65535; 259 + } 248 260 sdhci_enable_card_detection(host); 249 261 } 250 262 ··· 1259 1245 struct sdhci_host *host; 1260 1246 bool present; 1261 1247 unsigned long flags; 1248 + u32 tuning_opcode; 1262 1249 1263 1250 host = mmc_priv(mmc); 1264 1251 ··· 1307 1292 */ 1308 1293 if ((host->flags & SDHCI_NEEDS_RETUNING) && 1309 1294 !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { 1295 + /* eMMC uses cmd21 while sd and sdio use cmd19 */ 1296 + tuning_opcode = mmc->card->type == MMC_TYPE_MMC ? 1297 + MMC_SEND_TUNING_BLOCK_HS200 : 1298 + MMC_SEND_TUNING_BLOCK; 1310 1299 spin_unlock_irqrestore(&host->lock, flags); 1311 - sdhci_execute_tuning(mmc, mrq->cmd->opcode); 1300 + sdhci_execute_tuning(mmc, tuning_opcode); 1312 1301 spin_lock_irqsave(&host->lock, flags); 1313 1302 1314 1303 /* Restore original mmc_request structure */ ··· 1682 1663 pwr = sdhci_readb(host, SDHCI_POWER_CONTROL); 1683 1664 pwr &= ~SDHCI_POWER_ON; 1684 1665 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 1666 + if (host->vmmc) 1667 + regulator_disable(host->vmmc); 1685 1668 1686 1669 /* Wait for 1ms as per the spec */ 1687 1670 usleep_range(1000, 1500); 1688 1671 pwr |= SDHCI_POWER_ON; 1689 1672 sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL); 1673 + if (host->vmmc) 1674 + regulator_enable(host->vmmc); 1690 1675 1691 1676 pr_info(DRIVER_NAME ": Switching to 1.8V signalling " 1692 1677 "voltage failed, retrying with S18R set to 0\n"); ··· 1878 1855 */ 1879 1856 if (!(host->flags & SDHCI_NEEDS_RETUNING) && host->tuning_count && 1880 1857 (host->tuning_mode == SDHCI_TUNING_MODE_1)) { 1858 + host->flags |= SDHCI_USING_RETUNING_TIMER; 1881 1859 mod_timer(&host->tuning_timer, jiffies + 1882 1860 host->tuning_count * HZ); 1883 1861 /* Tuning mode 1 limits the maximum data length to 4MB */ ··· 1896 1872 * try tuning again at a later time, when the re-tuning timer expires. 1897 1873 * So for these controllers, we return 0. Since there might be other 1898 1874 * controllers who do not have this capability, we return error for 1899 - * them. 1875 + * them. SDHCI_USING_RETUNING_TIMER means the host is currently using 1876 + * a retuning timer to do the retuning for the card. 1900 1877 */ 1901 - if (err && host->tuning_count && 1902 - host->tuning_mode == SDHCI_TUNING_MODE_1) 1878 + if (err && (host->flags & SDHCI_USING_RETUNING_TIMER)) 1903 1879 err = 0; 1904 1880 1905 1881 sdhci_clear_set_irqs(host, SDHCI_INT_DATA_AVAIL, ier); ··· 2406 2382 int sdhci_suspend_host(struct sdhci_host *host) 2407 2383 { 2408 2384 int ret; 2409 - bool has_tuning_timer; 2410 2385 2411 2386 if (host->ops->platform_suspend) 2412 2387 host->ops->platform_suspend(host); ··· 2413 2390 sdhci_disable_card_detection(host); 2414 2391 2415 2392 /* Disable tuning since we are suspending */ 2416 - has_tuning_timer = host->version >= SDHCI_SPEC_300 && 2417 - host->tuning_count && host->tuning_mode == SDHCI_TUNING_MODE_1; 2418 - if (has_tuning_timer) { 2393 + if (host->flags & SDHCI_USING_RETUNING_TIMER) { 2419 2394 del_timer_sync(&host->tuning_timer); 2420 2395 host->flags &= ~SDHCI_NEEDS_RETUNING; 2421 2396 } 2422 2397 2423 2398 ret = mmc_suspend_host(host->mmc); 2424 2399 if (ret) { 2425 - if (has_tuning_timer) { 2400 + if (host->flags & SDHCI_USING_RETUNING_TIMER) { 2426 2401 host->flags |= SDHCI_NEEDS_RETUNING; 2427 2402 mod_timer(&host->tuning_timer, jiffies + 2428 2403 host->tuning_count * HZ); ··· 2471 2450 host->ops->platform_resume(host); 2472 2451 2473 2452 /* Set the re-tuning expiration flag */ 2474 - if ((host->version >= SDHCI_SPEC_300) && host->tuning_count && 2475 - (host->tuning_mode == SDHCI_TUNING_MODE_1)) 2453 + if (host->flags & SDHCI_USING_RETUNING_TIMER) 2476 2454 host->flags |= SDHCI_NEEDS_RETUNING; 2477 2455 2478 2456 return ret; ··· 2510 2490 int ret = 0; 2511 2491 2512 2492 /* Disable tuning since we are suspending */ 2513 - if (host->version >= SDHCI_SPEC_300 && 2514 - host->tuning_mode == SDHCI_TUNING_MODE_1) { 2493 + if (host->flags & SDHCI_USING_RETUNING_TIMER) { 2515 2494 del_timer_sync(&host->tuning_timer); 2516 2495 host->flags &= ~SDHCI_NEEDS_RETUNING; 2517 2496 } ··· 2551 2532 sdhci_do_enable_preset_value(host, true); 2552 2533 2553 2534 /* Set the re-tuning expiration flag */ 2554 - if ((host->version >= SDHCI_SPEC_300) && host->tuning_count && 2555 - (host->tuning_mode == SDHCI_TUNING_MODE_1)) 2535 + if (host->flags & SDHCI_USING_RETUNING_TIMER) 2556 2536 host->flags |= SDHCI_NEEDS_RETUNING; 2557 2537 2558 2538 spin_lock_irqsave(&host->lock, flags); ··· 2602 2584 int sdhci_add_host(struct sdhci_host *host) 2603 2585 { 2604 2586 struct mmc_host *mmc; 2605 - u32 caps[2]; 2587 + u32 caps[2] = {0, 0}; 2606 2588 u32 max_current_caps; 2607 2589 unsigned int ocr_avail; 2608 2590 int ret; ··· 2632 2614 caps[0] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? host->caps : 2633 2615 sdhci_readl(host, SDHCI_CAPABILITIES); 2634 2616 2635 - caps[1] = (host->version >= SDHCI_SPEC_300) ? 2636 - sdhci_readl(host, SDHCI_CAPABILITIES_1) : 0; 2617 + if (host->version >= SDHCI_SPEC_300) 2618 + caps[1] = (host->quirks & SDHCI_QUIRK_MISSING_CAPS) ? 2619 + host->caps1 : 2620 + sdhci_readl(host, SDHCI_CAPABILITIES_1); 2637 2621 2638 2622 if (host->quirks & SDHCI_QUIRK_FORCE_DMA) 2639 2623 host->flags |= SDHCI_USE_SDMA; ··· 2799 2779 mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 2800 2780 2801 2781 if ((host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION) && 2802 - mmc_card_is_removable(mmc)) 2782 + !(host->mmc->caps & MMC_CAP_NONREMOVABLE)) 2803 2783 mmc->caps |= MMC_CAP_NEEDS_POLL; 2804 2784 2805 2785 /* Any UHS-I mode in caps implies SDR12 and SDR25 support. */ ··· 2857 2837 SDHCI_RETUNING_MODE_SHIFT; 2858 2838 2859 2839 ocr_avail = 0; 2840 + 2841 + host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 2842 + if (IS_ERR(host->vmmc)) { 2843 + pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 2844 + host->vmmc = NULL; 2845 + } 2846 + 2847 + #ifdef CONFIG_REGULATOR 2848 + if (host->vmmc) { 2849 + ret = regulator_is_supported_voltage(host->vmmc, 3300000, 2850 + 3300000); 2851 + if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_330))) 2852 + caps[0] &= ~SDHCI_CAN_VDD_330; 2853 + ret = regulator_is_supported_voltage(host->vmmc, 3000000, 2854 + 3000000); 2855 + if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_300))) 2856 + caps[0] &= ~SDHCI_CAN_VDD_300; 2857 + ret = regulator_is_supported_voltage(host->vmmc, 1800000, 2858 + 1800000); 2859 + if ((ret <= 0) || (!(caps[0] & SDHCI_CAN_VDD_180))) 2860 + caps[0] &= ~SDHCI_CAN_VDD_180; 2861 + } 2862 + #endif /* CONFIG_REGULATOR */ 2863 + 2860 2864 /* 2861 2865 * According to SD Host Controller spec v3.00, if the Host System 2862 2866 * can afford more than 150mA, Host Driver should set XPC to 1. Also ··· 2889 2845 * value. 2890 2846 */ 2891 2847 max_current_caps = sdhci_readl(host, SDHCI_MAX_CURRENT); 2848 + if (!max_current_caps && host->vmmc) { 2849 + u32 curr = regulator_get_current_limit(host->vmmc); 2850 + if (curr > 0) { 2851 + 2852 + /* convert to SDHCI_MAX_CURRENT format */ 2853 + curr = curr/1000; /* convert to mA */ 2854 + curr = curr/SDHCI_MAX_CURRENT_MULTIPLIER; 2855 + 2856 + curr = min_t(u32, curr, SDHCI_MAX_CURRENT_LIMIT); 2857 + max_current_caps = 2858 + (curr << SDHCI_MAX_CURRENT_330_SHIFT) | 2859 + (curr << SDHCI_MAX_CURRENT_300_SHIFT) | 2860 + (curr << SDHCI_MAX_CURRENT_180_SHIFT); 2861 + } 2862 + } 2892 2863 2893 2864 if (caps[0] & SDHCI_CAN_VDD_330) { 2894 - int max_current_330; 2895 - 2896 2865 ocr_avail |= MMC_VDD_32_33 | MMC_VDD_33_34; 2897 2866 2898 - max_current_330 = ((max_current_caps & 2867 + mmc->max_current_330 = ((max_current_caps & 2899 2868 SDHCI_MAX_CURRENT_330_MASK) >> 2900 2869 SDHCI_MAX_CURRENT_330_SHIFT) * 2901 2870 SDHCI_MAX_CURRENT_MULTIPLIER; 2902 - 2903 - if (max_current_330 > 150) 2904 - mmc->caps |= MMC_CAP_SET_XPC_330; 2905 2871 } 2906 2872 if (caps[0] & SDHCI_CAN_VDD_300) { 2907 - int max_current_300; 2908 - 2909 2873 ocr_avail |= MMC_VDD_29_30 | MMC_VDD_30_31; 2910 2874 2911 - max_current_300 = ((max_current_caps & 2875 + mmc->max_current_300 = ((max_current_caps & 2912 2876 SDHCI_MAX_CURRENT_300_MASK) >> 2913 2877 SDHCI_MAX_CURRENT_300_SHIFT) * 2914 2878 SDHCI_MAX_CURRENT_MULTIPLIER; 2915 - 2916 - if (max_current_300 > 150) 2917 - mmc->caps |= MMC_CAP_SET_XPC_300; 2918 2879 } 2919 2880 if (caps[0] & SDHCI_CAN_VDD_180) { 2920 - int max_current_180; 2921 - 2922 2881 ocr_avail |= MMC_VDD_165_195; 2923 2882 2924 - max_current_180 = ((max_current_caps & 2883 + mmc->max_current_180 = ((max_current_caps & 2925 2884 SDHCI_MAX_CURRENT_180_MASK) >> 2926 2885 SDHCI_MAX_CURRENT_180_SHIFT) * 2927 2886 SDHCI_MAX_CURRENT_MULTIPLIER; 2928 - 2929 - if (max_current_180 > 150) 2930 - mmc->caps |= MMC_CAP_SET_XPC_180; 2931 - 2932 - /* Maximum current capabilities of the host at 1.8V */ 2933 - if (max_current_180 >= 800) 2934 - mmc->caps |= MMC_CAP_MAX_CURRENT_800; 2935 - else if (max_current_180 >= 600) 2936 - mmc->caps |= MMC_CAP_MAX_CURRENT_600; 2937 - else if (max_current_180 >= 400) 2938 - mmc->caps |= MMC_CAP_MAX_CURRENT_400; 2939 - else 2940 - mmc->caps |= MMC_CAP_MAX_CURRENT_200; 2941 2887 } 2942 2888 2943 2889 mmc->ocr_avail = ocr_avail; ··· 3026 2992 3027 2993 ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED, 3028 2994 mmc_hostname(mmc), host); 3029 - if (ret) 2995 + if (ret) { 2996 + pr_err("%s: Failed to request IRQ %d: %d\n", 2997 + mmc_hostname(mmc), host->irq, ret); 3030 2998 goto untasklet; 3031 - 3032 - host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 3033 - if (IS_ERR(host->vmmc)) { 3034 - pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 3035 - host->vmmc = NULL; 3036 2999 } 3037 3000 3038 3001 sdhci_init(host, 0); ··· 3047 3016 host->led.brightness_set = sdhci_led_control; 3048 3017 3049 3018 ret = led_classdev_register(mmc_dev(mmc), &host->led); 3050 - if (ret) 3019 + if (ret) { 3020 + pr_err("%s: Failed to register LED device: %d\n", 3021 + mmc_hostname(mmc), ret); 3051 3022 goto reset; 3023 + } 3052 3024 #endif 3053 3025 3054 3026 mmiowb(); ··· 3115 3081 free_irq(host->irq, host); 3116 3082 3117 3083 del_timer_sync(&host->timer); 3118 - if (host->version >= SDHCI_SPEC_300) 3119 - del_timer_sync(&host->tuning_timer); 3120 3084 3121 3085 tasklet_kill(&host->card_tasklet); 3122 3086 tasklet_kill(&host->finish_tasklet);
+1
drivers/mmc/host/sdhci.h
··· 205 205 #define SDHCI_CAPABILITIES_1 0x44 206 206 207 207 #define SDHCI_MAX_CURRENT 0x48 208 + #define SDHCI_MAX_CURRENT_LIMIT 0xFF 208 209 #define SDHCI_MAX_CURRENT_330_MASK 0x0000FF 209 210 #define SDHCI_MAX_CURRENT_330_SHIFT 0 210 211 #define SDHCI_MAX_CURRENT_300_MASK 0x00FF00
+122 -63
drivers/mmc/host/sh_mmcif.c
··· 54 54 #include <linux/mmc/mmc.h> 55 55 #include <linux/mmc/sdio.h> 56 56 #include <linux/mmc/sh_mmcif.h> 57 + #include <linux/mmc/slot-gpio.h> 58 + #include <linux/mod_devicetable.h> 57 59 #include <linux/pagemap.h> 58 60 #include <linux/platform_device.h> 59 61 #include <linux/pm_qos.h> ··· 386 384 struct sh_dmae_slave *tx, *rx; 387 385 host->dma_active = false; 388 386 387 + if (!pdata) 388 + return; 389 + 389 390 /* We can only either use DMA for both Tx and Rx or not use it at all */ 390 391 if (pdata->dma) { 391 392 dev_warn(&host->pd->dev, ··· 449 444 static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk) 450 445 { 451 446 struct sh_mmcif_plat_data *p = host->pd->dev.platform_data; 447 + bool sup_pclk = p ? p->sup_pclk : false; 452 448 453 449 sh_mmcif_bitclr(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); 454 450 sh_mmcif_bitclr(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR); 455 451 456 452 if (!clk) 457 453 return; 458 - if (p->sup_pclk && clk == host->clk) 454 + if (sup_pclk && clk == host->clk) 459 455 sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_SUP_PCLK); 460 456 else 461 457 sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_CLEAR & ··· 898 892 899 893 switch (mrq->cmd->opcode) { 900 894 /* MMCIF does not support SD/SDIO command */ 901 - case SD_IO_SEND_OP_COND: 895 + case MMC_SLEEP_AWAKE: /* = SD_IO_SEND_OP_COND (5) */ 896 + case MMC_SEND_EXT_CSD: /* = SD_SEND_IF_COND (8) */ 897 + if ((mrq->cmd->flags & MMC_CMD_MASK) != MMC_CMD_BCR) 898 + break; 902 899 case MMC_APP_CMD: 903 900 host->state = STATE_IDLE; 904 901 mrq->cmd->error = -ETIMEDOUT; 905 902 mmc_request_done(mmc, mrq); 906 903 return; 907 - case MMC_SEND_EXT_CSD: /* = SD_SEND_IF_COND (8) */ 908 - if (!mrq->data) { 909 - /* send_if_cond cmd (not support) */ 910 - host->state = STATE_IDLE; 911 - mrq->cmd->error = -ETIMEDOUT; 912 - mmc_request_done(mmc, mrq); 913 - return; 914 - } 915 - break; 916 904 default: 917 905 break; 918 906 } ··· 916 916 sh_mmcif_start_cmd(host, mrq); 917 917 } 918 918 919 + static int sh_mmcif_clk_update(struct sh_mmcif_host *host) 920 + { 921 + int ret = clk_enable(host->hclk); 922 + 923 + if (!ret) { 924 + host->clk = clk_get_rate(host->hclk); 925 + host->mmc->f_max = host->clk / 2; 926 + host->mmc->f_min = host->clk / 512; 927 + } 928 + 929 + return ret; 930 + } 931 + 932 + static void sh_mmcif_set_power(struct sh_mmcif_host *host, struct mmc_ios *ios) 933 + { 934 + struct sh_mmcif_plat_data *pd = host->pd->dev.platform_data; 935 + struct mmc_host *mmc = host->mmc; 936 + 937 + if (pd && pd->set_pwr) 938 + pd->set_pwr(host->pd, ios->power_mode != MMC_POWER_OFF); 939 + if (!IS_ERR(mmc->supply.vmmc)) 940 + /* Errors ignored... */ 941 + mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 942 + ios->power_mode ? ios->vdd : 0); 943 + } 944 + 919 945 static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 920 946 { 921 947 struct sh_mmcif_host *host = mmc_priv(mmc); 922 - struct sh_mmcif_plat_data *p = host->pd->dev.platform_data; 923 948 unsigned long flags; 924 949 925 950 spin_lock_irqsave(&host->lock, flags); ··· 962 937 sh_mmcif_request_dma(host, host->pd->dev.platform_data); 963 938 host->card_present = true; 964 939 } 940 + sh_mmcif_set_power(host, ios); 965 941 } else if (ios->power_mode == MMC_POWER_OFF || !ios->clock) { 966 942 /* clock stop */ 967 943 sh_mmcif_clock_control(host, 0); ··· 974 948 } 975 949 if (host->power) { 976 950 pm_runtime_put(&host->pd->dev); 951 + clk_disable(host->hclk); 977 952 host->power = false; 978 - if (p->down_pwr && ios->power_mode == MMC_POWER_OFF) 979 - p->down_pwr(host->pd); 953 + if (ios->power_mode == MMC_POWER_OFF) 954 + sh_mmcif_set_power(host, ios); 980 955 } 981 956 host->state = STATE_IDLE; 982 957 return; ··· 985 958 986 959 if (ios->clock) { 987 960 if (!host->power) { 988 - if (p->set_pwr) 989 - p->set_pwr(host->pd, ios->power_mode); 961 + sh_mmcif_clk_update(host); 990 962 pm_runtime_get_sync(&host->pd->dev); 991 963 host->power = true; 992 964 sh_mmcif_sync_reset(host); ··· 1001 975 { 1002 976 struct sh_mmcif_host *host = mmc_priv(mmc); 1003 977 struct sh_mmcif_plat_data *p = host->pd->dev.platform_data; 978 + int ret = mmc_gpio_get_cd(mmc); 1004 979 1005 - if (!p->get_cd) 980 + if (ret >= 0) 981 + return ret; 982 + 983 + if (!p || !p->get_cd) 1006 984 return -ENOSYS; 1007 985 else 1008 986 return p->get_cd(host->pd); ··· 1272 1242 mmc_request_done(host->mmc, mrq); 1273 1243 } 1274 1244 1245 + static void sh_mmcif_init_ocr(struct sh_mmcif_host *host) 1246 + { 1247 + struct sh_mmcif_plat_data *pd = host->pd->dev.platform_data; 1248 + struct mmc_host *mmc = host->mmc; 1249 + 1250 + mmc_regulator_get_supply(mmc); 1251 + 1252 + if (!pd) 1253 + return; 1254 + 1255 + if (!mmc->ocr_avail) 1256 + mmc->ocr_avail = pd->ocr; 1257 + else if (pd->ocr) 1258 + dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n"); 1259 + } 1260 + 1275 1261 static int __devinit sh_mmcif_probe(struct platform_device *pdev) 1276 1262 { 1277 1263 int ret = 0, irq[2]; 1278 1264 struct mmc_host *mmc; 1279 1265 struct sh_mmcif_host *host; 1280 - struct sh_mmcif_plat_data *pd; 1266 + struct sh_mmcif_plat_data *pd = pdev->dev.platform_data; 1281 1267 struct resource *res; 1282 1268 void __iomem *reg; 1283 1269 char clk_name[8]; ··· 1314 1268 dev_err(&pdev->dev, "ioremap error.\n"); 1315 1269 return -ENOMEM; 1316 1270 } 1317 - pd = pdev->dev.platform_data; 1318 - if (!pd) { 1319 - dev_err(&pdev->dev, "sh_mmcif plat data error.\n"); 1320 - ret = -ENXIO; 1321 - goto clean_up; 1322 - } 1271 + 1323 1272 mmc = mmc_alloc_host(sizeof(struct sh_mmcif_host), &pdev->dev); 1324 1273 if (!mmc) { 1325 1274 ret = -ENOMEM; 1326 - goto clean_up; 1275 + goto ealloch; 1327 1276 } 1328 1277 host = mmc_priv(mmc); 1329 1278 host->mmc = mmc; 1330 1279 host->addr = reg; 1331 1280 host->timeout = 1000; 1332 1281 1333 - snprintf(clk_name, sizeof(clk_name), "mmc%d", pdev->id); 1334 - host->hclk = clk_get(&pdev->dev, clk_name); 1335 - if (IS_ERR(host->hclk)) { 1336 - dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); 1337 - ret = PTR_ERR(host->hclk); 1338 - goto clean_up1; 1339 - } 1340 - clk_enable(host->hclk); 1341 - host->clk = clk_get_rate(host->hclk); 1342 1282 host->pd = pdev; 1343 1283 1344 1284 spin_lock_init(&host->lock); 1345 1285 1346 1286 mmc->ops = &sh_mmcif_ops; 1347 - mmc->f_max = host->clk / 2; 1348 - mmc->f_min = host->clk / 512; 1349 - if (pd->ocr) 1350 - mmc->ocr_avail = pd->ocr; 1287 + sh_mmcif_init_ocr(host); 1288 + 1351 1289 mmc->caps = MMC_CAP_MMC_HIGHSPEED; 1352 - if (pd->caps) 1290 + if (pd && pd->caps) 1353 1291 mmc->caps |= pd->caps; 1354 1292 mmc->max_segs = 32; 1355 1293 mmc->max_blk_size = 512; ··· 1341 1311 mmc->max_blk_count = mmc->max_req_size / mmc->max_blk_size; 1342 1312 mmc->max_seg_size = mmc->max_req_size; 1343 1313 1344 - sh_mmcif_sync_reset(host); 1345 1314 platform_set_drvdata(pdev, host); 1346 1315 1347 1316 pm_runtime_enable(&pdev->dev); 1348 1317 host->power = false; 1349 1318 1319 + snprintf(clk_name, sizeof(clk_name), "mmc%d", pdev->id); 1320 + host->hclk = clk_get(&pdev->dev, clk_name); 1321 + if (IS_ERR(host->hclk)) { 1322 + ret = PTR_ERR(host->hclk); 1323 + dev_err(&pdev->dev, "cannot get clock \"%s\": %d\n", clk_name, ret); 1324 + goto eclkget; 1325 + } 1326 + ret = sh_mmcif_clk_update(host); 1327 + if (ret < 0) 1328 + goto eclkupdate; 1329 + 1350 1330 ret = pm_runtime_resume(&pdev->dev); 1351 1331 if (ret < 0) 1352 - goto clean_up2; 1332 + goto eresume; 1353 1333 1354 1334 INIT_DELAYED_WORK(&host->timeout_work, mmcif_timeout_work); 1355 1335 1336 + sh_mmcif_sync_reset(host); 1356 1337 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); 1357 1338 1358 1339 ret = request_threaded_irq(irq[0], sh_mmcif_intr, sh_mmcif_irqt, 0, "sh_mmc:error", host); 1359 1340 if (ret) { 1360 1341 dev_err(&pdev->dev, "request_irq error (sh_mmc:error)\n"); 1361 - goto clean_up3; 1342 + goto ereqirq0; 1362 1343 } 1363 1344 ret = request_threaded_irq(irq[1], sh_mmcif_intr, sh_mmcif_irqt, 0, "sh_mmc:int", host); 1364 1345 if (ret) { 1365 1346 dev_err(&pdev->dev, "request_irq error (sh_mmc:int)\n"); 1366 - goto clean_up4; 1347 + goto ereqirq1; 1367 1348 } 1368 1349 1350 + if (pd && pd->use_cd_gpio) { 1351 + ret = mmc_gpio_request_cd(mmc, pd->cd_gpio); 1352 + if (ret < 0) 1353 + goto erqcd; 1354 + } 1355 + 1356 + clk_disable(host->hclk); 1369 1357 ret = mmc_add_host(mmc); 1370 1358 if (ret < 0) 1371 - goto clean_up5; 1359 + goto emmcaddh; 1372 1360 1373 1361 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1374 1362 ··· 1395 1347 sh_mmcif_readl(host->addr, MMCIF_CE_VERSION) & 0x0000ffff); 1396 1348 return ret; 1397 1349 1398 - clean_up5: 1350 + emmcaddh: 1351 + if (pd && pd->use_cd_gpio) 1352 + mmc_gpio_free_cd(mmc); 1353 + erqcd: 1399 1354 free_irq(irq[1], host); 1400 - clean_up4: 1355 + ereqirq1: 1401 1356 free_irq(irq[0], host); 1402 - clean_up3: 1357 + ereqirq0: 1403 1358 pm_runtime_suspend(&pdev->dev); 1404 - clean_up2: 1405 - pm_runtime_disable(&pdev->dev); 1359 + eresume: 1406 1360 clk_disable(host->hclk); 1407 - clean_up1: 1361 + eclkupdate: 1362 + clk_put(host->hclk); 1363 + eclkget: 1364 + pm_runtime_disable(&pdev->dev); 1408 1365 mmc_free_host(mmc); 1409 - clean_up: 1410 - if (reg) 1411 - iounmap(reg); 1366 + ealloch: 1367 + iounmap(reg); 1412 1368 return ret; 1413 1369 } 1414 1370 1415 1371 static int __devexit sh_mmcif_remove(struct platform_device *pdev) 1416 1372 { 1417 1373 struct sh_mmcif_host *host = platform_get_drvdata(pdev); 1374 + struct sh_mmcif_plat_data *pd = pdev->dev.platform_data; 1418 1375 int irq[2]; 1419 1376 1420 1377 host->dying = true; 1378 + clk_enable(host->hclk); 1421 1379 pm_runtime_get_sync(&pdev->dev); 1422 1380 1423 1381 dev_pm_qos_hide_latency_limit(&pdev->dev); 1382 + 1383 + if (pd && pd->use_cd_gpio) 1384 + mmc_gpio_free_cd(host->mmc); 1424 1385 1425 1386 mmc_remove_host(host->mmc); 1426 1387 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); ··· 1452 1395 1453 1396 platform_set_drvdata(pdev, NULL); 1454 1397 1455 - clk_disable(host->hclk); 1456 1398 mmc_free_host(host->mmc); 1457 1399 pm_runtime_put_sync(&pdev->dev); 1400 + clk_disable(host->hclk); 1458 1401 pm_runtime_disable(&pdev->dev); 1459 1402 1460 1403 return 0; ··· 1463 1406 #ifdef CONFIG_PM 1464 1407 static int sh_mmcif_suspend(struct device *dev) 1465 1408 { 1466 - struct platform_device *pdev = to_platform_device(dev); 1467 - struct sh_mmcif_host *host = platform_get_drvdata(pdev); 1409 + struct sh_mmcif_host *host = dev_get_drvdata(dev); 1468 1410 int ret = mmc_suspend_host(host->mmc); 1469 1411 1470 - if (!ret) { 1412 + if (!ret) 1471 1413 sh_mmcif_writel(host->addr, MMCIF_CE_INT_MASK, MASK_ALL); 1472 - clk_disable(host->hclk); 1473 - } 1474 1414 1475 1415 return ret; 1476 1416 } 1477 1417 1478 1418 static int sh_mmcif_resume(struct device *dev) 1479 1419 { 1480 - struct platform_device *pdev = to_platform_device(dev); 1481 - struct sh_mmcif_host *host = platform_get_drvdata(pdev); 1482 - 1483 - clk_enable(host->hclk); 1420 + struct sh_mmcif_host *host = dev_get_drvdata(dev); 1484 1421 1485 1422 return mmc_resume_host(host->mmc); 1486 1423 } ··· 1482 1431 #define sh_mmcif_suspend NULL 1483 1432 #define sh_mmcif_resume NULL 1484 1433 #endif /* CONFIG_PM */ 1434 + 1435 + static const struct of_device_id mmcif_of_match[] = { 1436 + { .compatible = "renesas,sh-mmcif" }, 1437 + { } 1438 + }; 1439 + MODULE_DEVICE_TABLE(of, mmcif_of_match); 1485 1440 1486 1441 static const struct dev_pm_ops sh_mmcif_dev_pm_ops = { 1487 1442 .suspend = sh_mmcif_suspend, ··· 1500 1443 .driver = { 1501 1444 .name = DRIVER_NAME, 1502 1445 .pm = &sh_mmcif_dev_pm_ops, 1446 + .owner = THIS_MODULE, 1447 + .of_match_table = mmcif_of_match, 1503 1448 }, 1504 1449 }; 1505 1450
+49 -17
drivers/mmc/host/sh_mobile_sdhi.c
··· 21 21 #include <linux/kernel.h> 22 22 #include <linux/clk.h> 23 23 #include <linux/slab.h> 24 + #include <linux/mod_devicetable.h> 24 25 #include <linux/module.h> 25 26 #include <linux/platform_device.h> 26 27 #include <linux/mmc/host.h> ··· 40 39 struct tmio_mmc_dma dma_priv; 41 40 }; 42 41 42 + static int sh_mobile_sdhi_clk_enable(struct platform_device *pdev, unsigned int *f) 43 + { 44 + struct mmc_host *mmc = dev_get_drvdata(&pdev->dev); 45 + struct tmio_mmc_host *host = mmc_priv(mmc); 46 + struct sh_mobile_sdhi *priv = container_of(host->pdata, struct sh_mobile_sdhi, mmc_data); 47 + int ret = clk_enable(priv->clk); 48 + if (ret < 0) 49 + return ret; 50 + 51 + *f = clk_get_rate(priv->clk); 52 + return 0; 53 + } 54 + 55 + static void sh_mobile_sdhi_clk_disable(struct platform_device *pdev) 56 + { 57 + struct mmc_host *mmc = dev_get_drvdata(&pdev->dev); 58 + struct tmio_mmc_host *host = mmc_priv(mmc); 59 + struct sh_mobile_sdhi *priv = container_of(host->pdata, struct sh_mobile_sdhi, mmc_data); 60 + clk_disable(priv->clk); 61 + } 62 + 43 63 static void sh_mobile_sdhi_set_pwr(struct platform_device *pdev, int state) 44 64 { 45 65 struct sh_mobile_sdhi_info *p = pdev->dev.platform_data; 46 66 47 - if (p && p->set_pwr) 48 - p->set_pwr(pdev, state); 67 + p->set_pwr(pdev, state); 49 68 } 50 69 51 70 static int sh_mobile_sdhi_get_cd(struct platform_device *pdev) 52 71 { 53 72 struct sh_mobile_sdhi_info *p = pdev->dev.platform_data; 54 73 55 - if (p && p->get_cd) 56 - return p->get_cd(pdev); 57 - else 58 - return -ENOSYS; 74 + return p->get_cd(pdev); 59 75 } 60 76 61 77 static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host) ··· 134 116 } 135 117 136 118 mmc_data = &priv->mmc_data; 137 - p->pdata = mmc_data; 138 119 139 - if (p->init) { 140 - ret = p->init(pdev, &sdhi_ops); 141 - if (ret) 142 - goto einit; 120 + if (p) { 121 + p->pdata = mmc_data; 122 + if (p->init) { 123 + ret = p->init(pdev, &sdhi_ops); 124 + if (ret) 125 + goto einit; 126 + } 143 127 } 144 128 145 129 snprintf(clk_name, sizeof(clk_name), "sdhi%d", pdev->id); ··· 152 132 goto eclkget; 153 133 } 154 134 155 - mmc_data->hclk = clk_get_rate(priv->clk); 156 - mmc_data->set_pwr = sh_mobile_sdhi_set_pwr; 157 - mmc_data->get_cd = sh_mobile_sdhi_get_cd; 135 + mmc_data->clk_enable = sh_mobile_sdhi_clk_enable; 136 + mmc_data->clk_disable = sh_mobile_sdhi_clk_disable; 158 137 mmc_data->capabilities = MMC_CAP_MMC_HIGHSPEED; 159 138 if (p) { 160 139 mmc_data->flags = p->tmio_flags; ··· 161 142 mmc_data->write16_hook = sh_mobile_sdhi_write16_hook; 162 143 mmc_data->ocr_mask = p->tmio_ocr_mask; 163 144 mmc_data->capabilities |= p->tmio_caps; 145 + mmc_data->capabilities2 |= p->tmio_caps2; 164 146 mmc_data->cd_gpio = p->cd_gpio; 147 + if (p->set_pwr) 148 + mmc_data->set_pwr = sh_mobile_sdhi_set_pwr; 149 + if (p->get_cd) 150 + mmc_data->get_cd = sh_mobile_sdhi_get_cd; 165 151 166 152 if (p->dma_slave_tx > 0 && p->dma_slave_rx > 0) { 167 153 priv->param_tx.slave_id = p->dma_slave_tx; ··· 272 248 eprobe: 273 249 clk_put(priv->clk); 274 250 eclkget: 275 - if (p->cleanup) 251 + if (p && p->cleanup) 276 252 p->cleanup(pdev); 277 253 einit: 278 254 kfree(priv); ··· 287 263 struct sh_mobile_sdhi_info *p = pdev->dev.platform_data; 288 264 int i = 0, irq; 289 265 290 - p->pdata = NULL; 266 + if (p) 267 + p->pdata = NULL; 291 268 292 269 tmio_mmc_host_remove(host); 293 270 ··· 301 276 302 277 clk_put(priv->clk); 303 278 304 - if (p->cleanup) 279 + if (p && p->cleanup) 305 280 p->cleanup(pdev); 306 281 307 282 kfree(priv); ··· 316 291 .runtime_resume = tmio_mmc_host_runtime_resume, 317 292 }; 318 293 294 + static const struct of_device_id sh_mobile_sdhi_of_match[] = { 295 + { .compatible = "renesas,shmobile-sdhi" }, 296 + { } 297 + }; 298 + MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match); 299 + 319 300 static struct platform_driver sh_mobile_sdhi_driver = { 320 301 .driver = { 321 302 .name = "sh_mobile_sdhi", 322 303 .owner = THIS_MODULE, 323 304 .pm = &tmio_mmc_dev_pm_ops, 305 + .of_match_table = sh_mobile_sdhi_of_match, 324 306 }, 325 307 .probe = sh_mobile_sdhi_probe, 326 308 .remove = __devexit_p(sh_mobile_sdhi_remove),
+96 -36
drivers/mmc/host/tmio_mmc_pio.c
··· 34 34 #include <linux/io.h> 35 35 #include <linux/irq.h> 36 36 #include <linux/mfd/tmio.h> 37 - #include <linux/mmc/cd-gpio.h> 38 37 #include <linux/mmc/host.h> 38 + #include <linux/mmc/mmc.h> 39 + #include <linux/mmc/slot-gpio.h> 39 40 #include <linux/mmc/tmio.h> 40 41 #include <linux/module.h> 41 42 #include <linux/pagemap.h> ··· 306 305 int c = cmd->opcode; 307 306 u32 irq_mask = TMIO_MASK_CMD; 308 307 309 - /* Command 12 is handled by hardware */ 310 - if (cmd->opcode == 12 && !cmd->arg) { 308 + /* CMD12 is handled by hardware */ 309 + if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) { 311 310 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001); 312 311 return 0; 313 312 } ··· 450 449 } 451 450 452 451 if (stop) { 453 - if (stop->opcode == 12 && !stop->arg) 452 + if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg) 454 453 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000); 455 454 else 456 455 BUG(); ··· 752 751 mmc_request_done(mmc, mrq); 753 752 } 754 753 754 + static int tmio_mmc_clk_update(struct mmc_host *mmc) 755 + { 756 + struct tmio_mmc_host *host = mmc_priv(mmc); 757 + struct tmio_mmc_data *pdata = host->pdata; 758 + int ret; 759 + 760 + if (!pdata->clk_enable) 761 + return -ENOTSUPP; 762 + 763 + ret = pdata->clk_enable(host->pdev, &mmc->f_max); 764 + if (!ret) 765 + mmc->f_min = mmc->f_max / 512; 766 + 767 + return ret; 768 + } 769 + 770 + static void tmio_mmc_set_power(struct tmio_mmc_host *host, struct mmc_ios *ios) 771 + { 772 + struct mmc_host *mmc = host->mmc; 773 + 774 + if (host->set_pwr) 775 + host->set_pwr(host->pdev, ios->power_mode != MMC_POWER_OFF); 776 + if (!IS_ERR(mmc->supply.vmmc)) 777 + /* Errors ignored... */ 778 + mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 779 + ios->power_mode ? ios->vdd : 0); 780 + } 781 + 755 782 /* Set MMC clock / power. 756 783 * Note: This controller uses a simple divider scheme therefore it cannot 757 784 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as ··· 826 797 */ 827 798 if (ios->power_mode == MMC_POWER_ON && ios->clock) { 828 799 if (!host->power) { 800 + tmio_mmc_clk_update(mmc); 829 801 pm_runtime_get_sync(dev); 830 802 host->power = true; 831 803 } 832 804 tmio_mmc_set_clock(host, ios->clock); 833 805 /* power up SD bus */ 834 - if (host->set_pwr) 835 - host->set_pwr(host->pdev, 1); 806 + tmio_mmc_set_power(host, ios); 836 807 /* start bus clock */ 837 808 tmio_mmc_clk_start(host); 838 809 } else if (ios->power_mode != MMC_POWER_UP) { 839 - if (host->set_pwr && ios->power_mode == MMC_POWER_OFF) 840 - host->set_pwr(host->pdev, 0); 810 + if (ios->power_mode == MMC_POWER_OFF) 811 + tmio_mmc_set_power(host, ios); 841 812 if (host->power) { 813 + struct tmio_mmc_data *pdata = host->pdata; 814 + tmio_mmc_clk_stop(host); 842 815 host->power = false; 843 816 pm_runtime_put(dev); 817 + if (pdata->clk_disable) 818 + pdata->clk_disable(host->pdev); 844 819 } 845 - tmio_mmc_clk_stop(host); 846 820 } 847 821 848 - switch (ios->bus_width) { 849 - case MMC_BUS_WIDTH_1: 850 - sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); 851 - break; 852 - case MMC_BUS_WIDTH_4: 853 - sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); 854 - break; 822 + if (host->power) { 823 + switch (ios->bus_width) { 824 + case MMC_BUS_WIDTH_1: 825 + sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0); 826 + break; 827 + case MMC_BUS_WIDTH_4: 828 + sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0); 829 + break; 830 + } 855 831 } 856 832 857 833 /* Let things settle. delay taken from winCE driver */ ··· 875 841 { 876 842 struct tmio_mmc_host *host = mmc_priv(mmc); 877 843 struct tmio_mmc_data *pdata = host->pdata; 844 + int ret = mmc_gpio_get_ro(mmc); 845 + if (ret >= 0) 846 + return ret; 878 847 879 848 return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) || 880 849 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT)); ··· 887 850 { 888 851 struct tmio_mmc_host *host = mmc_priv(mmc); 889 852 struct tmio_mmc_data *pdata = host->pdata; 853 + int ret = mmc_gpio_get_cd(mmc); 854 + if (ret >= 0) 855 + return ret; 890 856 891 857 if (!pdata->get_cd) 892 858 return -ENOSYS; ··· 904 864 .get_cd = tmio_mmc_get_cd, 905 865 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 906 866 }; 867 + 868 + static void tmio_mmc_init_ocr(struct tmio_mmc_host *host) 869 + { 870 + struct tmio_mmc_data *pdata = host->pdata; 871 + struct mmc_host *mmc = host->mmc; 872 + 873 + mmc_regulator_get_supply(mmc); 874 + 875 + if (!mmc->ocr_avail) 876 + mmc->ocr_avail = pdata->ocr_mask ? : MMC_VDD_32_33 | MMC_VDD_33_34; 877 + else if (pdata->ocr_mask) 878 + dev_warn(mmc_dev(mmc), "Platform OCR mask is ignored\n"); 879 + } 907 880 908 881 int __devinit tmio_mmc_host_probe(struct tmio_mmc_host **host, 909 882 struct platform_device *pdev, ··· 957 904 958 905 mmc->ops = &tmio_mmc_ops; 959 906 mmc->caps = MMC_CAP_4_BIT_DATA | pdata->capabilities; 960 - mmc->f_max = pdata->hclk; 961 - mmc->f_min = mmc->f_max / 512; 907 + mmc->caps2 = pdata->capabilities2; 962 908 mmc->max_segs = 32; 963 909 mmc->max_blk_size = 512; 964 910 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) * 965 911 mmc->max_segs; 966 912 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 967 913 mmc->max_seg_size = mmc->max_req_size; 968 - if (pdata->ocr_mask) 969 - mmc->ocr_avail = pdata->ocr_mask; 970 - else 971 - mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 914 + tmio_mmc_init_ocr(_host); 972 915 973 916 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD || 974 917 mmc->caps & MMC_CAP_NEEDS_POLL || ··· 976 927 if (ret < 0) 977 928 goto pm_disable; 978 929 930 + if (tmio_mmc_clk_update(mmc) < 0) { 931 + mmc->f_max = pdata->hclk; 932 + mmc->f_min = mmc->f_max / 512; 933 + } 934 + 979 935 /* 980 936 * There are 4 different scenarios for the card detection: 981 937 * 1) an external gpio irq handles the cd (best for power savings) ··· 991 937 * While we increment the runtime PM counter for all scenarios when 992 938 * the mmc core activates us by calling an appropriate set_ios(), we 993 939 * must additionally ensure that in case 2) the tmio mmc hardware stays 994 - * additionally ensure that in case 2) the tmio mmc hardware stays 995 940 * powered on during runtime for the card detection to work. 996 941 */ 997 942 if (_host->native_hotplug) ··· 1001 948 1002 949 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK); 1003 950 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL); 951 + 952 + /* Unmask the IRQs we want to know about */ 953 + if (!_host->chan_rx) 954 + irq_mask |= TMIO_MASK_READOP; 955 + if (!_host->chan_tx) 956 + irq_mask |= TMIO_MASK_WRITEOP; 957 + if (!_host->native_hotplug) 958 + irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 959 + 960 + _host->sdcard_irq_mask &= ~irq_mask; 961 + 1004 962 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1005 963 tmio_mmc_enable_sdio_irq(mmc, 0); 1006 964 ··· 1025 961 /* See if we also get DMA */ 1026 962 tmio_mmc_request_dma(_host, pdata); 1027 963 1028 - mmc_add_host(mmc); 964 + ret = mmc_add_host(mmc); 965 + if (pdata->clk_disable) 966 + pdata->clk_disable(pdev); 967 + if (ret < 0) { 968 + tmio_mmc_host_remove(_host); 969 + return ret; 970 + } 1029 971 1030 972 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1031 973 1032 - /* Unmask the IRQs we want to know about */ 1033 - if (!_host->chan_rx) 1034 - irq_mask |= TMIO_MASK_READOP; 1035 - if (!_host->chan_tx) 1036 - irq_mask |= TMIO_MASK_WRITEOP; 1037 - if (!_host->native_hotplug) 1038 - irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 1039 - 1040 - tmio_mmc_enable_mmc_irqs(_host, irq_mask); 1041 - 1042 974 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) { 1043 - ret = mmc_cd_gpio_request(mmc, pdata->cd_gpio); 975 + ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio); 1044 976 if (ret < 0) { 1045 977 tmio_mmc_host_remove(_host); 1046 978 return ret; ··· 1068 1008 * This means we can miss a card-eject, but this is anyway 1069 1009 * possible, because of delayed processing of hotplug events. 1070 1010 */ 1071 - mmc_cd_gpio_free(mmc); 1011 + mmc_gpio_free_cd(mmc); 1072 1012 1073 1013 if (!host->native_hotplug) 1074 1014 pm_runtime_get_sync(&pdev->dev);
+4
include/linux/mfd/tmio.h
··· 101 101 struct tmio_mmc_data { 102 102 unsigned int hclk; 103 103 unsigned long capabilities; 104 + unsigned long capabilities2; 104 105 unsigned long flags; 105 106 u32 ocr_mask; /* available voltages */ 106 107 struct tmio_mmc_dma *dma; ··· 111 110 void (*set_clk_div)(struct platform_device *host, int state); 112 111 int (*get_cd)(struct platform_device *host); 113 112 int (*write16_hook)(struct tmio_mmc_host *host, int addr); 113 + /* clock management callbacks */ 114 + int (*clk_enable)(struct platform_device *pdev, unsigned int *f); 115 + void (*clk_disable)(struct platform_device *pdev); 114 116 }; 115 117 116 118 /*
+1
include/linux/mmc/card.h
··· 149 149 #define SD_SET_CURRENT_LIMIT_400 1 150 150 #define SD_SET_CURRENT_LIMIT_600 2 151 151 #define SD_SET_CURRENT_LIMIT_800 3 152 + #define SD_SET_CURRENT_NO_CHANGE (-1) 152 153 153 154 #define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200) 154 155 #define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400)
-18
include/linux/mmc/cd-gpio.h
··· 1 - /* 2 - * Generic GPIO card-detect helper header 3 - * 4 - * Copyright (C) 2011, Guennadi Liakhovetski <g.liakhovetski@gmx.de> 5 - * 6 - * This program is free software; you can redistribute it and/or modify 7 - * it under the terms of the GNU General Public License version 2 as 8 - * published by the Free Software Foundation. 9 - */ 10 - 11 - #ifndef MMC_CD_GPIO_H 12 - #define MMC_CD_GPIO_H 13 - 14 - struct mmc_host; 15 - int mmc_cd_gpio_request(struct mmc_host *host, unsigned int gpio); 16 - void mmc_cd_gpio_free(struct mmc_host *host); 17 - 18 - #endif
+36 -12
include/linux/mmc/host.h
··· 11 11 #define LINUX_MMC_HOST_H 12 12 13 13 #include <linux/leds.h> 14 + #include <linux/mutex.h> 14 15 #include <linux/sched.h> 15 16 #include <linux/device.h> 16 17 #include <linux/fault-inject.h> ··· 151 150 int (*err_check) (struct mmc_card *, struct mmc_async_req *); 152 151 }; 153 152 154 - struct mmc_hotplug { 155 - unsigned int irq; 153 + /** 154 + * struct mmc_slot - MMC slot functions 155 + * 156 + * @cd_irq: MMC/SD-card slot hotplug detection IRQ or -EINVAL 157 + * @lock: protect the @handler_priv pointer 158 + * @handler_priv: MMC/SD-card slot context 159 + * 160 + * Some MMC/SD host controllers implement slot-functions like card and 161 + * write-protect detection natively. However, a large number of controllers 162 + * leave these functions to the CPU. This struct provides a hook to attach 163 + * such slot-function drivers. 164 + */ 165 + struct mmc_slot { 166 + int cd_irq; 167 + struct mutex lock; 156 168 void *handler_priv; 169 + }; 170 + 171 + struct regulator; 172 + 173 + struct mmc_supply { 174 + struct regulator *vmmc; /* Card power supply */ 175 + struct regulator *vqmmc; /* Optional Vccq supply */ 157 176 }; 158 177 159 178 struct mmc_host { ··· 189 168 u32 ocr_avail_sd; /* SD-specific OCR */ 190 169 u32 ocr_avail_mmc; /* MMC-specific OCR */ 191 170 struct notifier_block pm_notify; 171 + u32 max_current_330; 172 + u32 max_current_300; 173 + u32 max_current_180; 192 174 193 175 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */ 194 176 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ ··· 235 211 #define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */ 236 212 #define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */ 237 213 #define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */ 238 - #define MMC_CAP_SET_XPC_330 (1 << 20) /* Host supports >150mA current at 3.3V */ 239 - #define MMC_CAP_SET_XPC_300 (1 << 21) /* Host supports >150mA current at 3.0V */ 240 - #define MMC_CAP_SET_XPC_180 (1 << 22) /* Host supports >150mA current at 1.8V */ 241 214 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */ 242 215 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */ 243 216 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */ 244 - #define MMC_CAP_MAX_CURRENT_200 (1 << 26) /* Host max current limit is 200mA */ 245 - #define MMC_CAP_MAX_CURRENT_400 (1 << 27) /* Host max current limit is 400mA */ 246 - #define MMC_CAP_MAX_CURRENT_600 (1 << 28) /* Host max current limit is 600mA */ 247 - #define MMC_CAP_MAX_CURRENT_800 (1 << 29) /* Host max current limit is 800mA */ 248 217 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */ 249 218 #define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */ 250 219 ··· 255 238 #define MMC_CAP2_BROKEN_VOLTAGE (1 << 7) /* Use the broken voltage */ 256 239 #define MMC_CAP2_DETECT_ON_ERR (1 << 8) /* On I/O err check card removal */ 257 240 #define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */ 241 + #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ 242 + #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ 258 243 259 244 mmc_pm_flag_t pm_caps; /* supported pm features */ 260 245 unsigned int power_notify_type; ··· 309 290 310 291 struct delayed_work detect; 311 292 int detect_change; /* card detect flag */ 312 - struct mmc_hotplug hotplug; 293 + struct mmc_slot slot; 313 294 314 295 const struct mmc_bus_ops *bus_ops; /* current bus driver */ 315 296 unsigned int bus_refs; /* reference counter */ ··· 328 309 #ifdef CONFIG_REGULATOR 329 310 bool regulator_enabled; /* regulator state */ 330 311 #endif 312 + struct mmc_supply supply; 331 313 332 314 struct dentry *debugfs_root; 333 315 ··· 377 357 wake_up_process(host->sdio_irq_thread); 378 358 } 379 359 380 - struct regulator; 381 - 382 360 #ifdef CONFIG_REGULATOR 383 361 int mmc_regulator_get_ocrmask(struct regulator *supply); 384 362 int mmc_regulator_set_ocr(struct mmc_host *mmc, 385 363 struct regulator *supply, 386 364 unsigned short vdd_bit); 365 + int mmc_regulator_get_supply(struct mmc_host *mmc); 387 366 #else 388 367 static inline int mmc_regulator_get_ocrmask(struct regulator *supply) 389 368 { ··· 392 373 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc, 393 374 struct regulator *supply, 394 375 unsigned short vdd_bit) 376 + { 377 + return 0; 378 + } 379 + 380 + static inline int mmc_regulator_get_supply(struct mmc_host *mmc) 395 381 { 396 382 return 0; 397 383 }
+3 -1
include/linux/mmc/sdhci.h
··· 122 122 #define SDHCI_PV_ENABLED (1<<8) /* Preset value enabled */ 123 123 #define SDHCI_SDIO_IRQ_ENABLED (1<<9) /* SDIO irq enabled */ 124 124 #define SDHCI_HS200_NEEDS_TUNING (1<<10) /* HS200 needs tuning */ 125 + #define SDHCI_USING_RETUNING_TIMER (1<<11) /* Host is using a retuning timer for the card */ 125 126 126 127 unsigned int version; /* SDHCI spec. version */ 127 128 ··· 156 155 157 156 struct timer_list timer; /* Timer for timeouts */ 158 157 159 - unsigned int caps; /* Alternative capabilities */ 158 + unsigned int caps; /* Alternative CAPABILITY_0 */ 159 + unsigned int caps1; /* Alternative CAPABILITY_1 */ 160 160 161 161 unsigned int ocr_avail_sdio; /* OCR bit masks */ 162 162 unsigned int ocr_avail_sd;
+2
include/linux/mmc/sh_mmcif.h
··· 44 44 struct sh_mmcif_dma *dma; /* Deprecated. Instead */ 45 45 unsigned int slave_id_tx; /* use embedded slave_id_[tr]x */ 46 46 unsigned int slave_id_rx; 47 + bool use_cd_gpio : 1; 48 + unsigned int cd_gpio; 47 49 u8 sup_pclk; /* 1 :SH7757, 0: SH7724/SH7372 */ 48 50 unsigned long caps; 49 51 u32 ocr;
+1
include/linux/mmc/sh_mobile_sdhi.h
··· 23 23 int dma_slave_rx; 24 24 unsigned long tmio_flags; 25 25 unsigned long tmio_caps; 26 + unsigned long tmio_caps2; 26 27 u32 tmio_ocr_mask; /* available MMC voltages */ 27 28 unsigned int cd_gpio; 28 29 struct tmio_mmc_data *pdata;
+24
include/linux/mmc/slot-gpio.h
··· 1 + /* 2 + * Generic GPIO card-detect helper header 3 + * 4 + * Copyright (C) 2011, Guennadi Liakhovetski <g.liakhovetski@gmx.de> 5 + * 6 + * This program is free software; you can redistribute it and/or modify 7 + * it under the terms of the GNU General Public License version 2 as 8 + * published by the Free Software Foundation. 9 + */ 10 + 11 + #ifndef MMC_SLOT_GPIO_H 12 + #define MMC_SLOT_GPIO_H 13 + 14 + struct mmc_host; 15 + 16 + int mmc_gpio_get_ro(struct mmc_host *host); 17 + int mmc_gpio_request_ro(struct mmc_host *host, unsigned int gpio); 18 + void mmc_gpio_free_ro(struct mmc_host *host); 19 + 20 + int mmc_gpio_get_cd(struct mmc_host *host); 21 + int mmc_gpio_request_cd(struct mmc_host *host, unsigned int gpio); 22 + void mmc_gpio_free_cd(struct mmc_host *host); 23 + 24 + #endif