Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: ce4100: Configure IOAPIC pins for USB and SATA to level type
x86: devicetree: Configure IOAPIC pin only once
x86, setup: When probing memory with e801, use ax/bx as a pair

+11 -11
+1 -1
arch/x86/boot/memory.c
··· 91 if (oreg.ax > 15*1024) { 92 return -1; /* Bogus! */ 93 } else if (oreg.ax == 15*1024) { 94 - boot_params.alt_mem_k = (oreg.dx << 6) + oreg.ax; 95 } else { 96 /* 97 * This ignores memory above 16MB if we have a memory
··· 91 if (oreg.ax > 15*1024) { 92 return -1; /* Bogus! */ 93 } else if (oreg.ax == 15*1024) { 94 + boot_params.alt_mem_k = (oreg.bx << 6) + oreg.ax; 95 } else { 96 /* 97 * This ignores memory above 16MB if we have a memory
+1 -1
arch/x86/include/asm/io_apic.h
··· 150 extern void ioapic_and_gsi_init(void); 151 extern void ioapic_insert_resources(void); 152 153 - int io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr); 154 155 extern struct IO_APIC_route_entry **alloc_ioapic_entries(void); 156 extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries);
··· 150 extern void ioapic_and_gsi_init(void); 151 extern void ioapic_insert_resources(void); 152 153 + int io_apic_setup_irq_pin_once(unsigned int irq, int node, struct io_apic_irq_attr *attr); 154 155 extern struct IO_APIC_route_entry **alloc_ioapic_entries(void); 156 extern void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries);
+5 -5
arch/x86/kernel/apic/io_apic.c
··· 128 } 129 early_param("noapic", parse_noapic); 130 131 - static int io_apic_setup_irq_pin_once(unsigned int irq, int node, 132 - struct io_apic_irq_attr *attr); 133 134 /* Will be called in mpparse/acpi/sfi codes for saving IRQ info */ 135 void mp_save_irq(struct mpc_intsrc *m) ··· 3570 } 3571 #endif /* CONFIG_HT_IRQ */ 3572 3573 - int 3574 io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr) 3575 { 3576 struct irq_cfg *cfg = alloc_irq_and_cfg_at(irq, node); ··· 3585 return ret; 3586 } 3587 3588 - static int io_apic_setup_irq_pin_once(unsigned int irq, int node, 3589 - struct io_apic_irq_attr *attr) 3590 { 3591 unsigned int id = attr->ioapic, pin = attr->ioapic_pin; 3592 int ret;
··· 128 } 129 early_param("noapic", parse_noapic); 130 131 + static int io_apic_setup_irq_pin(unsigned int irq, int node, 132 + struct io_apic_irq_attr *attr); 133 134 /* Will be called in mpparse/acpi/sfi codes for saving IRQ info */ 135 void mp_save_irq(struct mpc_intsrc *m) ··· 3570 } 3571 #endif /* CONFIG_HT_IRQ */ 3572 3573 + static int 3574 io_apic_setup_irq_pin(unsigned int irq, int node, struct io_apic_irq_attr *attr) 3575 { 3576 struct irq_cfg *cfg = alloc_irq_and_cfg_at(irq, node); ··· 3585 return ret; 3586 } 3587 3588 + int io_apic_setup_irq_pin_once(unsigned int irq, int node, 3589 + struct io_apic_irq_attr *attr) 3590 { 3591 unsigned int id = attr->ioapic, pin = attr->ioapic_pin; 3592 int ret;
+1 -1
arch/x86/kernel/devicetree.c
··· 391 392 set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity); 393 394 - return io_apic_setup_irq_pin(*out_hwirq, cpu_to_node(0), &attr); 395 } 396 397 static void __init ioapic_add_ofnode(struct device_node *np)
··· 391 392 set_io_apic_irq_attr(&attr, idx, line, it->trigger, it->polarity); 393 394 + return io_apic_setup_irq_pin_once(*out_hwirq, cpu_to_node(0), &attr); 395 } 396 397 static void __init ioapic_add_ofnode(struct device_node *np)
+3 -3
arch/x86/platform/ce4100/falconfalls.dts
··· 347 "pciclass0c03"; 348 349 reg = <0x16800 0x0 0x0 0x0 0x0>; 350 - interrupts = <22 3>; 351 }; 352 353 usb@d,1 { ··· 357 "pciclass0c03"; 358 359 reg = <0x16900 0x0 0x0 0x0 0x0>; 360 - interrupts = <22 3>; 361 }; 362 363 sata@e,0 { ··· 367 "pciclass0106"; 368 369 reg = <0x17000 0x0 0x0 0x0 0x0>; 370 - interrupts = <23 3>; 371 }; 372 373 flash@f,0 {
··· 347 "pciclass0c03"; 348 349 reg = <0x16800 0x0 0x0 0x0 0x0>; 350 + interrupts = <22 1>; 351 }; 352 353 usb@d,1 { ··· 357 "pciclass0c03"; 358 359 reg = <0x16900 0x0 0x0 0x0 0x0>; 360 + interrupts = <22 1>; 361 }; 362 363 sata@e,0 { ··· 367 "pciclass0106"; 368 369 reg = <0x17000 0x0 0x0 0x0 0x0>; 370 + interrupts = <23 1>; 371 }; 372 373 flash@f,0 {