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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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linux
clk: zynq: Update the parameters to zynq_clk_register_periph_clk
In case there are only one gate or the two_gate is 0 the clk1 clock
passed is not used. We are passing 0 which is arm_pll.
Pass a invalid clock instead.
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Link: https://lore.kernel.org/r/20220222130903.17235-3-shubhrajyoti.datta@xilinx.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
authored by Shubhrajyoti Datta and committed by Stephen Boyd a6aa462c d583804c
+6
-6
drivers/clk/zynq/clkc.c
+6
-6
drivers/clk/zynq/clkc.c
···
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periph_parents, enable);
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}
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-
zynq_clk_register_periph_clk(lqspi, 0, clk_output_name[lqspi], NULL,
359
-
SLCR_LQSPI_CLK_CTRL, periph_parents, 0);
360
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-
zynq_clk_register_periph_clk(smc, 0, clk_output_name[smc], NULL,
362
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SLCR_SMC_CLK_CTRL, periph_parents, 0);
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364
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zynq_clk_register_periph_clk(pcap, 0, clk_output_name[pcap], NULL,
365
-
SLCR_PCAP_CLK_CTRL, periph_parents, 0);
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zynq_clk_register_periph_clk(sdio0, sdio1, clk_output_name[sdio0],
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clk_output_name[sdio1], SLCR_SDIO_CLK_CTRL,
···
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periph_parents, enable);
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}
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+
zynq_clk_register_periph_clk(lqspi, clk_max, clk_output_name[lqspi], NULL,
359
+
SLCR_LQSPI_CLK_CTRL, periph_parents, 0);
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+
zynq_clk_register_periph_clk(smc, clk_max, clk_output_name[smc], NULL,
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+
SLCR_SMC_CLK_CTRL, periph_parents, 0);
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+
zynq_clk_register_periph_clk(pcap, clk_max, clk_output_name[pcap], NULL,
365
+
SLCR_PCAP_CLK_CTRL, periph_parents, 0);
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zynq_clk_register_periph_clk(sdio0, sdio1, clk_output_name[sdio0],
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clk_output_name[sdio1], SLCR_SDIO_CLK_CTRL,