Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

pinctrl/abx500: replace IRQ offsets with table read-in values

The ABx500 GPIO controller used to provide a set of virtual contiguous
IRQs for use by sub-devices, but they have been removed after a request
from Mainline Maintainers. Now the AB8500 core driver deals with almost
all IRQ related issues instead.

The ABx500 GPIO driver is now only used to convert between GPIO and IRQ
numbers which is actually quite difficult, as the ABx500 GPIO's
associated IRQs are clustered together throughout the interrupt number
space at irregular intervals. To solve this quandary, we have placed the
read-in values into the existing cluster information table to use during
conversion.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
[Moved irq_base removal into this patch]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

authored by

Lee Jones and committed by
Linus Walleij
a6a16d27 ac652d79

+32 -25
+3 -3
drivers/pinctrl/pinctrl-ab8500.c
··· 456 456 * GPIO36 to GPIO41 457 457 */ 458 458 struct abx500_gpio_irq_cluster ab8500_gpio_irq_cluster[] = { 459 - GPIO_IRQ_CLUSTER(6, 13, 0), 460 - GPIO_IRQ_CLUSTER(24, 25, 0), 461 - GPIO_IRQ_CLUSTER(36, 41, 0), 459 + GPIO_IRQ_CLUSTER(6, 13, 34), 460 + GPIO_IRQ_CLUSTER(24, 25, 24), 461 + GPIO_IRQ_CLUSTER(36, 41, 14), 462 462 }; 463 463 464 464 static struct abx500_pinctrl_soc_data ab8500_soc = {
+5 -5
drivers/pinctrl/pinctrl-ab8505.c
··· 349 349 * GPIO52 to GPIO53 350 350 */ 351 351 struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = { 352 - GPIO_IRQ_CLUSTER(10, 11, 0), 353 - GPIO_IRQ_CLUSTER(13, 13, 0), 354 - GPIO_IRQ_CLUSTER(40, 41, 0), 355 - GPIO_IRQ_CLUSTER(50, 50, 0), 356 - GPIO_IRQ_CLUSTER(52, 53, 0), 352 + GPIO_IRQ_CLUSTER(10, 11, 34), 353 + GPIO_IRQ_CLUSTER(13, 13, 34), 354 + GPIO_IRQ_CLUSTER(40, 41, 14), 355 + GPIO_IRQ_CLUSTER(50, 50, 63), 356 + GPIO_IRQ_CLUSTER(52, 53, 63), 357 357 }; 358 358 359 359 static struct abx500_pinctrl_soc_data ab8505_soc = {
+3 -2
drivers/pinctrl/pinctrl-ab8540.c
··· 377 377 * GPIO51 to GPIO54 378 378 */ 379 379 struct abx500_gpio_irq_cluster ab8540_gpio_irq_cluster[] = { 380 - GPIO_IRQ_CLUSTER(43, 44, 2), 381 - GPIO_IRQ_CLUSTER(51, 54, 0), 380 + GPIO_IRQ_CLUSTER(43, 43, 126), 381 + GPIO_IRQ_CLUSTER(44, 44, 127), 382 + GPIO_IRQ_CLUSTER(51, 54, 63), 382 383 }; 383 384 384 385 static struct abx500_pinctrl_soc_data ab8540_soc = {
+4 -4
drivers/pinctrl/pinctrl-ab9540.c
··· 455 455 }; 456 456 457 457 struct abx500_gpio_irq_cluster ab9540_gpio_irq_cluster[] = { 458 - GPIO_IRQ_CLUSTER(10, 13, 0), 459 - GPIO_IRQ_CLUSTER(24, 25, 0), 460 - GPIO_IRQ_CLUSTER(40, 41, 0), 461 - GPIO_IRQ_CLUSTER(50, 54, 0), 458 + GPIO_IRQ_CLUSTER(10, 13, 34), 459 + GPIO_IRQ_CLUSTER(24, 25, 24), 460 + GPIO_IRQ_CLUSTER(40, 41, 14), 461 + GPIO_IRQ_CLUSTER(50, 54, 63), 462 462 }; 463 463 464 464 static struct abx500_pinctrl_soc_data ab9540_soc = {
+11 -7
drivers/pinctrl/pinctrl-abx500.c
··· 100 100 struct gpio_chip chip; 101 101 struct ab8500 *parent; 102 102 struct mutex lock; 103 - u32 irq_base; 104 103 struct abx500_gpio_irq_cluster *irq_cluster; 105 104 int irq_cluster_size; 106 105 }; ··· 261 262 struct abx500_pinctrl *pct = to_abx500_pinctrl(chip); 262 263 /* The AB8500 GPIO numbers are off by one */ 263 264 int gpio = offset + 1; 264 - int base = pct->irq_base; 265 + int hwirq; 265 266 int i; 266 267 267 268 for (i = 0; i < pct->irq_cluster_size; i++) { 268 269 struct abx500_gpio_irq_cluster *cluster = 269 270 &pct->irq_cluster[i]; 270 271 271 - if (gpio >= cluster->start && gpio <= cluster->end) 272 - return base + gpio - cluster->start; 272 + if (gpio >= cluster->start && gpio <= cluster->end) { 273 + /* 274 + * The ABx500 GPIO's associated IRQs are clustered together 275 + * throughout the interrupt numbers at irregular intervals. 276 + * To solve this quandry, we have placed the read-in values 277 + * into the cluster information table. 278 + */ 279 + hwirq = gpio + cluster->to_irq; 273 280 274 - /* Advance by the number of gpios in this cluster */ 275 - base += cluster->end + cluster->offset - cluster->start + 1; 281 + return irq_create_mapping(pct->parent->domain, hwirq); 282 + } 276 283 } 277 284 278 285 return -EINVAL; ··· 881 876 pct->chip = abx500gpio_chip; 882 877 pct->chip.dev = &pdev->dev; 883 878 pct->chip.base = pdata->gpio_base; 884 - pct->irq_base = pdata->irq_base; 885 879 pct->chip.base = (np) ? -1 : pdata->gpio_base; 886 880 887 881 /* initialize the lock */
+6 -4
drivers/pinctrl/pinctrl-abx500.h
··· 98 98 { \ 99 99 .start = a, \ 100 100 .end = b, \ 101 - .offset = c, \ 101 + .to_irq = c, \ 102 102 } 103 103 104 104 /** ··· 106 106 * capable 107 107 * @start: The pin number of the first pin interrupt capable 108 108 * @end: The pin number of the last pin interrupt capable 109 - * @offset: offset used to compute specific setting strategy of 110 - * the interrupt line 109 + * @to_irq: The ABx500 GPIO's associated IRQs are clustered 110 + * together throughout the interrupt numbers at irregular 111 + * intervals. To solve this quandary, we will place the 112 + * read-in values into the cluster information table 111 113 */ 112 114 113 115 struct abx500_gpio_irq_cluster { 114 116 int start; 115 117 int end; 116 - int offset; 118 + int to_irq; 117 119 }; 118 120 119 121 /**