Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Input: synaptics-rmi4 - enable IRQ operation in F34 V7

The polled firmware update proved unreliable when testing on S7817. Use
attention to signal commands are complete.

Signed-off-by: Nick Dyer <nick@shmanahar.org>
Tested-by: Chris Healy <cphealy@gmail.com>
Acked-by: Benjamin Tissoires <benjamin.tissoires@redhat.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>

authored by

Nick Dyer and committed by
Dmitry Torokhov
a6869e3a 25670fb0

+82 -67
+18 -7
drivers/input/rmi4/rmi_f34.c
··· 105 105 { 106 106 struct f34_data *f34 = dev_get_drvdata(&fn->dev); 107 107 int ret; 108 + u8 status; 108 109 109 - if (f34->bl_version != 5) 110 - return 0; 110 + if (f34->bl_version == 5) { 111 + ret = rmi_read(f34->fn->rmi_dev, f34->v5.ctrl_address, 112 + &status); 113 + rmi_dbg(RMI_DEBUG_FN, &fn->dev, "%s: status: %#02x, ret: %d\n", 114 + __func__, status, ret); 111 115 112 - ret = rmi_read(f34->fn->rmi_dev, f34->v5.ctrl_address, &f34->v5.status); 113 - rmi_dbg(RMI_DEBUG_FN, &fn->dev, "%s: status: %#02x, ret: %d\n", 114 - __func__, f34->v5.status, ret); 116 + if (!ret && !(status & 0x7f)) 117 + complete(&f34->v5.cmd_done); 118 + } else { 119 + ret = rmi_read_block(f34->fn->rmi_dev, 120 + f34->fn->fd.data_base_addr + 121 + f34->v7.off.flash_status, 122 + &status, sizeof(status)); 123 + rmi_dbg(RMI_DEBUG_FN, &fn->dev, "%s: status: %#02x, ret: %d\n", 124 + __func__, status, ret); 115 125 116 - if (!ret && !(f34->v5.status & 0x7f)) 117 - complete(&f34->v5.cmd_done); 126 + if (!ret && !(status & 0x1f)) 127 + complete(&f34->v7.cmd_done); 128 + } 118 129 119 130 return 0; 120 131 }
+2 -5
drivers/input/rmi4/rmi_f34.h
··· 30 30 #define F34_IDLE_WAIT_MS 500 31 31 #define F34_ENABLE_WAIT_MS 300 32 32 #define F34_ERASE_WAIT_MS 5000 33 + #define F34_WRITE_WAIT_MS 3000 33 34 34 35 #define F34_BOOTLOADER_ID_LEN 2 35 36 ··· 48 47 #define CONFIG_ID_SIZE 32 49 48 #define PRODUCT_ID_SIZE 10 50 49 51 - #define ENABLE_WAIT_MS (1 * 1000) 52 - #define WRITE_WAIT_MS (3 * 1000) 53 - 54 - #define MIN_SLEEP_TIME_US 50 55 - #define MAX_SLEEP_TIME_US 100 56 50 57 51 #define HAS_BSR BIT(5) 58 52 #define HAS_CONFIG_ID BIT(3) ··· 288 292 289 293 const void *config_data; 290 294 const void *image; 295 + struct completion cmd_done; 291 296 }; 292 297 293 298 struct f34_data {
+62 -55
drivers/input/rmi4/rmi_f34v7.c
··· 15 15 #include <asm/unaligned.h> 16 16 #include <linux/delay.h> 17 17 #include <linux/slab.h> 18 + #include <linux/jiffies.h> 18 19 19 20 #include "rmi_driver.h" 20 21 #include "rmi_f34.h" ··· 32 31 sizeof(status)); 33 32 if (ret < 0) { 34 33 rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, 35 - "%s: Failed to read flash status\n", __func__); 34 + "%s: Error %d reading flash status\n", __func__, ret); 36 35 return ret; 37 36 } 38 37 ··· 61 60 62 61 static int rmi_f34v7_wait_for_idle(struct f34_data *f34, int timeout_ms) 63 62 { 64 - int count = 0; 65 - int timeout_count = ((timeout_ms * 1000) / MAX_SLEEP_TIME_US) + 1; 63 + unsigned long timeout; 66 64 67 - do { 68 - usleep_range(MIN_SLEEP_TIME_US, MAX_SLEEP_TIME_US); 65 + timeout = msecs_to_jiffies(timeout_ms); 69 66 70 - count++; 67 + if (!wait_for_completion_timeout(&f34->v7.cmd_done, timeout)) { 68 + dev_warn(&f34->fn->dev, "%s: Timed out waiting for idle status\n", 69 + __func__); 70 + return -ETIMEDOUT; 71 + } 71 72 72 - rmi_f34v7_read_flash_status(f34); 73 - 74 - if ((f34->v7.command == v7_CMD_IDLE) 75 - && (f34->v7.flash_status == 0x00)) { 76 - rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, 77 - "Idle status detected\n"); 78 - return 0; 79 - } 80 - } while (count < timeout_count); 81 - 82 - dev_err(&f34->fn->dev, 83 - "%s: Timed out waiting for idle status\n", __func__); 84 - 85 - return -ETIMEDOUT; 73 + return 0; 86 74 } 87 75 88 76 static int rmi_f34v7_write_command_single_transaction(struct f34_data *f34, ··· 275 285 return 0; 276 286 } 277 287 278 - static int rmi_f34v7_read_f34v7_partition_table(struct f34_data *f34) 288 + static int rmi_f34v7_read_partition_table(struct f34_data *f34) 279 289 { 280 290 int ret; 291 + unsigned long timeout; 281 292 u8 base; 282 293 __le16 length; 283 294 u16 block_number = 0; ··· 311 320 return ret; 312 321 } 313 322 323 + init_completion(&f34->v7.cmd_done); 324 + 314 325 ret = rmi_f34v7_write_command(f34, v7_CMD_READ_CONFIG); 315 326 if (ret < 0) { 316 327 dev_err(&f34->fn->dev, "%s: Failed to write command\n", ··· 320 327 return ret; 321 328 } 322 329 323 - ret = rmi_f34v7_wait_for_idle(f34, WRITE_WAIT_MS); 324 - if (ret < 0) { 325 - dev_err(&f34->fn->dev, "%s: Failed to wait for idle status\n", 326 - __func__); 327 - return ret; 330 + timeout = msecs_to_jiffies(F34_WRITE_WAIT_MS); 331 + while (time_before(jiffies, timeout)) { 332 + usleep_range(5000, 6000); 333 + rmi_f34v7_read_flash_status(f34); 334 + 335 + if (f34->v7.command == v7_CMD_IDLE && 336 + f34->v7.flash_status == 0x00) { 337 + break; 338 + } 328 339 } 329 340 330 341 ret = rmi_read_block(f34->fn->rmi_dev, ··· 567 570 f34->v7.read_config_buf_size = f34->v7.partition_table_bytes; 568 571 ptable = f34->v7.read_config_buf; 569 572 570 - ret = rmi_f34v7_read_f34v7_partition_table(f34); 573 + ret = rmi_f34v7_read_partition_table(f34); 571 574 if (ret < 0) { 572 575 dev_err(&f34->fn->dev, "%s: Failed to read partition table\n", 573 576 __func__); ··· 663 666 664 667 dev_info(&f34->fn->dev, "Erasing config...\n"); 665 668 669 + init_completion(&f34->v7.cmd_done); 670 + 666 671 switch (f34->v7.config_area) { 667 672 case v7_UI_CONFIG_AREA: 668 673 ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_UI_CONFIG); ··· 683 684 break; 684 685 } 685 686 686 - ret = rmi_f34v7_wait_for_idle(f34, ENABLE_WAIT_MS); 687 + ret = rmi_f34v7_wait_for_idle(f34, F34_ERASE_WAIT_MS); 687 688 if (ret < 0) 688 689 return ret; 689 690 690 - return ret; 691 + return 0; 691 692 } 692 693 693 694 static int rmi_f34v7_erase_guest_code(struct f34_data *f34) ··· 696 697 697 698 dev_info(&f34->fn->dev, "Erasing guest code...\n"); 698 699 700 + init_completion(&f34->v7.cmd_done); 701 + 699 702 ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_GUEST_CODE); 700 703 if (ret < 0) 701 704 return ret; 702 705 703 - ret = rmi_f34v7_wait_for_idle(f34, ENABLE_WAIT_MS); 706 + ret = rmi_f34v7_wait_for_idle(f34, F34_ERASE_WAIT_MS); 704 707 if (ret < 0) 705 708 return ret; 706 709 ··· 715 714 716 715 dev_info(&f34->fn->dev, "Erasing firmware...\n"); 717 716 717 + init_completion(&f34->v7.cmd_done); 718 + 718 719 ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_UI_FIRMWARE); 719 720 if (ret < 0) 720 721 return ret; 721 722 722 - ret = rmi_f34v7_wait_for_idle(f34, ENABLE_WAIT_MS); 723 + ret = rmi_f34v7_wait_for_idle(f34, F34_ERASE_WAIT_MS); 723 724 if (ret < 0) 724 725 return ret; 725 726 ··· 746 743 return 0; 747 744 } 748 745 749 - static int rmi_f34v7_read_f34v7_blocks(struct f34_data *f34, u16 block_cnt, 750 - u8 command) 746 + static int rmi_f34v7_read_blocks(struct f34_data *f34, 747 + u16 block_cnt, u8 command) 751 748 { 752 749 int ret; 753 750 u8 base; ··· 790 787 return ret; 791 788 } 792 789 790 + init_completion(&f34->v7.cmd_done); 791 + 793 792 ret = rmi_f34v7_write_command(f34, command); 794 793 if (ret < 0) 795 794 return ret; 796 795 797 - ret = rmi_f34v7_wait_for_idle(f34, ENABLE_WAIT_MS); 798 - if (ret < 0) { 799 - dev_err(&f34->fn->dev, 800 - "%s: Wait for idle failed (%d blks remaining)\n", 801 - __func__, remaining); 796 + ret = rmi_f34v7_wait_for_idle(f34, F34_ENABLE_WAIT_MS); 797 + if (ret < 0) 802 798 return ret; 803 - } 804 799 805 800 ret = rmi_read_block(f34->fn->rmi_dev, 806 801 base + f34->v7.off.payload, ··· 854 853 transfer = min(remaining, max_transfer); 855 854 put_unaligned_le16(transfer, &length); 856 855 856 + init_completion(&f34->v7.cmd_done); 857 + 857 858 ret = rmi_write_block(f34->fn->rmi_dev, 858 859 base + f34->v7.off.transfer_length, 859 860 &length, sizeof(length)); ··· 880 877 return ret; 881 878 } 882 879 883 - ret = rmi_f34v7_wait_for_idle(f34, ENABLE_WAIT_MS); 884 - if (ret < 0) { 885 - dev_err(&f34->fn->dev, 886 - "%s: Failed wait for idle (%d blks remaining)\n", 887 - __func__, remaining); 880 + ret = rmi_f34v7_wait_for_idle(f34, F34_ENABLE_WAIT_MS); 881 + if (ret < 0) 888 882 return ret; 889 - } 890 883 891 884 block_ptr += (transfer * f34->v7.block_size); 892 885 remaining -= transfer; ··· 944 945 return -EINVAL; 945 946 } 946 947 948 + init_completion(&f34->v7.cmd_done); 949 + 947 950 ret = rmi_f34v7_write_command(f34, v7_CMD_ERASE_FLASH_CONFIG); 948 951 if (ret < 0) 949 952 return ret; ··· 953 952 rmi_dbg(RMI_DEBUG_FN, &f34->fn->dev, 954 953 "%s: Erase flash config command written\n", __func__); 955 954 956 - ret = rmi_f34v7_wait_for_idle(f34, ENABLE_WAIT_MS); 955 + ret = rmi_f34v7_wait_for_idle(f34, F34_WRITE_WAIT_MS); 957 956 if (ret < 0) 958 957 return ret; 959 958 ··· 982 981 983 982 f34->v7.read_config_buf_size = f34->v7.config_size; 984 983 985 - ret = rmi_f34v7_read_f34v7_blocks(f34, block_count, v7_CMD_READ_CONFIG); 984 + ret = rmi_f34v7_read_blocks(f34, block_count, v7_CMD_READ_CONFIG); 986 985 if (ret < 0) 987 986 return ret; 988 987 ··· 1288 1287 { 1289 1288 int ret; 1290 1289 1290 + f34->fn->rmi_dev->driver->set_irq_bits(f34->fn->rmi_dev, f34->fn->irq_mask); 1291 + 1291 1292 ret = rmi_f34v7_read_flash_status(f34); 1292 1293 if (ret < 0) 1293 1294 return ret; ··· 1297 1294 if (f34->v7.in_bl_mode) 1298 1295 return 0; 1299 1296 1297 + init_completion(&f34->v7.cmd_done); 1298 + 1300 1299 ret = rmi_f34v7_write_command(f34, v7_CMD_ENABLE_FLASH_PROG); 1301 1300 if (ret < 0) 1302 1301 return ret; 1303 1302 1304 - ret = rmi_f34v7_wait_for_idle(f34, ENABLE_WAIT_MS); 1303 + ret = rmi_f34v7_wait_for_idle(f34, F34_ENABLE_WAIT_MS); 1305 1304 if (ret < 0) 1306 1305 return ret; 1307 - 1308 - if (!f34->v7.in_bl_mode) { 1309 - dev_err(&f34->fn->dev, "%s: BL mode not entered\n", __func__); 1310 - return -EINVAL; 1311 - } 1312 1306 1313 1307 return 0; 1314 1308 } ··· 1313 1313 int rmi_f34v7_start_reflash(struct f34_data *f34, const struct firmware *fw) 1314 1314 { 1315 1315 int ret = 0; 1316 + 1317 + f34->fn->rmi_dev->driver->set_irq_bits(f34->fn->rmi_dev, f34->fn->irq_mask); 1316 1318 1317 1319 f34->v7.config_area = v7_UI_CONFIG_AREA; 1318 1320 f34->v7.image = fw->data; ··· 1378 1376 1379 1377 memset(&f34->v7.blkcount, 0x00, sizeof(f34->v7.blkcount)); 1380 1378 memset(&f34->v7.phyaddr, 0x00, sizeof(f34->v7.phyaddr)); 1381 - rmi_f34v7_read_queries(f34); 1382 1379 1383 - f34->v7.force_update = false; 1380 + init_completion(&f34->v7.cmd_done); 1381 + 1382 + ret = rmi_f34v7_read_queries(f34); 1383 + if (ret < 0) 1384 + return ret; 1385 + 1386 + f34->v7.force_update = true; 1384 1387 return 0; 1385 1388 }