···22222323Mailbox #10 is reserved for DMA transfer information.24242525+Note: the hardware expects little-endian data ('intel format').2626+2527Flow2628====2729···66646765Each S-G array element is a struct of three 32-bit words. The first word is6866the source address, the second is the destination address. Both take up the6969-entire 32 bits. The lowest 16 bits of the third word is the transfer byte6767+entire 32 bits. The lowest 18 bits of the third word is the transfer byte7068count. The high-bit of the third word is the "last" flag. The last-flag tells7169the card to raise the DMA_DONE interrupt. From hard personal experience, if7270you forget to set this bit, the card will still "work" but the stream will···80788179- 32-bit Source Address8280- 32-bit Destination Address8383-- 16-bit reserved (high bit is the last flag)8484-- 16-bit byte count8181+- 14-bit reserved (high bit is the last flag)8282+- 18-bit byte count85838684DMA Transfer Status8785===================···8987Register 0x0004 holds the DMA Transfer Status:90889189Bit9292-4 Scatter-Gather array error9393-3 DMA write error9494-2 DMA read error9595-1 write completed96900 read completed9191+1 write completed9292+2 DMA read error9393+3 DMA write error9494+4 Scatter-Gather array error
···498498Enum 203/0xCB499499Description500500 Returns information on the previous DMA transfer in conjunction with501501- bit 27 of the interrupt mask. Uses mailbox 9.501501+ bit 27 or 18 of the interrupt mask. Uses mailbox 9.502502Result[0]503503 Status bits:504504- Bit 0 set indicates transfer complete505505- Bit 2 set indicates transfer error506506- Bit 4 set indicates linked list error504504+ 0 read completed505505+ 1 write completed506506+ 2 DMA read error507507+ 3 DMA write error508508+ 4 Scatter-Gather array error507509Result[1]508510 DMA type509511Result[2]
+3-1
Documentation/video4linux/cx2341x/fw-memory.txt
···11This document describes the cx2341x memory map and documents some of the register22space.3344+Note: the memory long words are little-endian ('intel format').55+46Warning! This information was figured out from searching through the memory and57registers, this information may not be correct and is certainly not complete, and68was not derived from anything more than searching through the memory space with···6967 0x84 - first write linked list reg, for pci memory addr7068 0x88 - first write linked list reg, for length of buffer in memory addr7169 (|0x80000000 or this for last link)7272- 0x8c-0xcc - rest of write linked list reg, 8 sets of 3 total, DMA goes here7070+ 0x8c-0xdc - rest of write linked list reg, 8 sets of 3 total, DMA goes here7371 from linked list addr in reg 0x0c, firmware must push through or7472 something.7573 0xe0 - first (and only) read linked list reg, for pci memory addr