dt-bindings: PCI: socionext,uniphier-pcie-ep: Add top-level constraints

Properties with variable number of items per each device are expected to
have widest constraints in top-level "properties:" block and further
customized (narrowed) in "if:then:".

Add missing top-level constraints for clock-names and reset-names.

Link: https://lore.kernel.org/linux-pci/[e-mail]
Signed-off-by: Krzysztof Kozlowski <[e-mail]>
Signed-off-by: Krzysztof Wilczyński <[e-mail]>
Reviewed-by: Kunihiko Hayashi <[e-mail]>
Reviewed-by: Rob Herring (Arm) <[e-mail]>

Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml

···
     minItems: 1
     maxItems: 2
 
-  clock-names: true
+  clock-names:
+    minItems: 1
+    maxItems: 2
 
   resets:
     minItems: 1
     maxItems: 2
 
-  reset-names: true
+  reset-names:
+    minItems: 1
+    maxItems: 2
 
   num-ib-windows:
     const: 16