Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

crypto: qat - Move adf admin and adf hw arbitrer to common code

Adf admin and HW arbiter function can be used by dh895xcc specific code
well as the new dh895xccvf and future devices so moving them to
qat_common so that they can be shared.

Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Tadeusz Struk and committed by
Herbert Xu
a5733139 104880a6

+95 -239
+2
drivers/crypto/qat/qat_common/Makefile
··· 9 9 adf_accel_engine.o \ 10 10 adf_aer.o \ 11 11 adf_transport.o \ 12 + adf_admin.o \ 13 + adf_hw_arbiter.o \ 12 14 qat_crypto.o \ 13 15 qat_algs.o \ 14 16 qat_rsakey-asn1.o \
+3 -2
drivers/crypto/qat/qat_common/adf_accel_devices.h
··· 141 141 uint32_t (*get_num_aes)(struct adf_hw_device_data *self); 142 142 uint32_t (*get_num_accels)(struct adf_hw_device_data *self); 143 143 enum dev_sku_info (*get_sku)(struct adf_hw_device_data *self); 144 - void (*hw_arb_ring_enable)(struct adf_etr_ring_data *ring); 145 - void (*hw_arb_ring_disable)(struct adf_etr_ring_data *ring); 146 144 int (*alloc_irq)(struct adf_accel_dev *accel_dev); 147 145 void (*free_irq)(struct adf_accel_dev *accel_dev); 148 146 void (*enable_error_correction)(struct adf_accel_dev *accel_dev); 149 147 int (*init_admin_comms)(struct adf_accel_dev *accel_dev); 150 148 void (*exit_admin_comms)(struct adf_accel_dev *accel_dev); 149 + int (*send_admin_init)(struct adf_accel_dev *accel_dev); 151 150 int (*init_arb)(struct adf_accel_dev *accel_dev); 152 151 void (*exit_arb)(struct adf_accel_dev *accel_dev); 152 + void (*get_arb_mapping)(struct adf_accel_dev *accel_dev, 153 + const uint32_t **cfg); 153 154 void (*enable_ints)(struct adf_accel_dev *accel_dev); 154 155 const char *fw_name; 155 156 const char *fw_mmp_name;
+6 -1
drivers/crypto/qat/qat_common/adf_common_drv.h
··· 91 91 unsigned long start_status; 92 92 char *name; 93 93 struct list_head list; 94 - int admin; 95 94 }; 96 95 97 96 static inline int get_current_node(void) ··· 134 135 void adf_disable_aer(struct adf_accel_dev *accel_dev); 135 136 int adf_init_aer(void); 136 137 void adf_exit_aer(void); 138 + int adf_init_admin_comms(struct adf_accel_dev *accel_dev); 139 + void adf_exit_admin_comms(struct adf_accel_dev *accel_dev); 140 + int adf_send_admin_init(struct adf_accel_dev *accel_dev); 141 + int adf_init_arb(struct adf_accel_dev *accel_dev); 142 + void adf_exit_arb(struct adf_accel_dev *accel_dev); 143 + void adf_update_ring_arb(struct adf_etr_ring_data *ring); 137 144 138 145 int adf_dev_get(struct adf_accel_dev *accel_dev); 139 146 void adf_dev_put(struct adf_accel_dev *accel_dev);
+5 -79
drivers/crypto/qat/qat_common/adf_init.c
··· 177 177 */ 178 178 list_for_each(list_itr, &service_table) { 179 179 service = list_entry(list_itr, struct service_hndl, list); 180 - if (!service->admin) 181 - continue; 182 - if (service->event_hld(accel_dev, ADF_EVENT_INIT)) { 183 - dev_err(&GET_DEV(accel_dev), 184 - "Failed to initialise service %s\n", 185 - service->name); 186 - return -EFAULT; 187 - } 188 - set_bit(accel_dev->accel_id, &service->init_status); 189 - } 190 - list_for_each(list_itr, &service_table) { 191 - service = list_entry(list_itr, struct service_hndl, list); 192 - if (service->admin) 193 - continue; 194 180 if (service->event_hld(accel_dev, ADF_EVENT_INIT)) { 195 181 dev_err(&GET_DEV(accel_dev), 196 182 "Failed to initialise service %s\n", ··· 204 218 */ 205 219 int adf_dev_start(struct adf_accel_dev *accel_dev) 206 220 { 221 + struct adf_hw_device_data *hw_data = accel_dev->hw_device; 207 222 struct service_hndl *service; 208 223 struct list_head *list_itr; 209 224 ··· 216 229 } 217 230 set_bit(ADF_STATUS_AE_STARTED, &accel_dev->status); 218 231 219 - list_for_each(list_itr, &service_table) { 220 - service = list_entry(list_itr, struct service_hndl, list); 221 - if (!service->admin) 222 - continue; 223 - if (service->event_hld(accel_dev, ADF_EVENT_START)) { 224 - dev_err(&GET_DEV(accel_dev), 225 - "Failed to start service %s\n", 226 - service->name); 227 - return -EFAULT; 228 - } 229 - set_bit(accel_dev->accel_id, &service->start_status); 232 + if (hw_data->send_admin_init(accel_dev)) { 233 + dev_err(&GET_DEV(accel_dev), "Failed to send init message\n"); 234 + return -EFAULT; 230 235 } 236 + 231 237 list_for_each(list_itr, &service_table) { 232 238 service = list_entry(list_itr, struct service_hndl, list); 233 - if (service->admin) 234 - continue; 235 239 if (service->event_hld(accel_dev, ADF_EVENT_START)) { 236 240 dev_err(&GET_DEV(accel_dev), 237 241 "Failed to start service %s\n", ··· 278 300 279 301 list_for_each(list_itr, &service_table) { 280 302 service = list_entry(list_itr, struct service_hndl, list); 281 - if (service->admin) 282 - continue; 283 303 if (!test_bit(accel_dev->accel_id, &service->start_status)) 284 304 continue; 285 305 ret = service->event_hld(accel_dev, ADF_EVENT_STOP); ··· 287 311 wait = true; 288 312 clear_bit(accel_dev->accel_id, &service->start_status); 289 313 } 290 - } 291 - list_for_each(list_itr, &service_table) { 292 - service = list_entry(list_itr, struct service_hndl, list); 293 - if (!service->admin) 294 - continue; 295 - if (!test_bit(accel_dev->accel_id, &service->start_status)) 296 - continue; 297 - if (service->event_hld(accel_dev, ADF_EVENT_STOP)) 298 - dev_err(&GET_DEV(accel_dev), 299 - "Failed to shutdown service %s\n", 300 - service->name); 301 - else 302 - clear_bit(accel_dev->accel_id, &service->start_status); 303 314 } 304 315 305 316 if (wait) ··· 338 375 339 376 list_for_each(list_itr, &service_table) { 340 377 service = list_entry(list_itr, struct service_hndl, list); 341 - if (service->admin) 342 - continue; 343 - if (!test_bit(accel_dev->accel_id, &service->init_status)) 344 - continue; 345 - if (service->event_hld(accel_dev, ADF_EVENT_SHUTDOWN)) 346 - dev_err(&GET_DEV(accel_dev), 347 - "Failed to shutdown service %s\n", 348 - service->name); 349 - else 350 - clear_bit(accel_dev->accel_id, &service->init_status); 351 - } 352 - list_for_each(list_itr, &service_table) { 353 - service = list_entry(list_itr, struct service_hndl, list); 354 - if (!service->admin) 355 - continue; 356 378 if (!test_bit(accel_dev->accel_id, &service->init_status)) 357 379 continue; 358 380 if (service->event_hld(accel_dev, ADF_EVENT_SHUTDOWN)) ··· 374 426 375 427 list_for_each(list_itr, &service_table) { 376 428 service = list_entry(list_itr, struct service_hndl, list); 377 - if (service->admin) 378 - continue; 379 - if (service->event_hld(accel_dev, ADF_EVENT_RESTARTING)) 380 - dev_err(&GET_DEV(accel_dev), 381 - "Failed to restart service %s.\n", 382 - service->name); 383 - } 384 - list_for_each(list_itr, &service_table) { 385 - service = list_entry(list_itr, struct service_hndl, list); 386 - if (!service->admin) 387 - continue; 388 429 if (service->event_hld(accel_dev, ADF_EVENT_RESTARTING)) 389 430 dev_err(&GET_DEV(accel_dev), 390 431 "Failed to restart service %s.\n", ··· 389 452 390 453 list_for_each(list_itr, &service_table) { 391 454 service = list_entry(list_itr, struct service_hndl, list); 392 - if (service->admin) 393 - continue; 394 - if (service->event_hld(accel_dev, ADF_EVENT_RESTARTED)) 395 - dev_err(&GET_DEV(accel_dev), 396 - "Failed to restart service %s.\n", 397 - service->name); 398 - } 399 - list_for_each(list_itr, &service_table) { 400 - service = list_entry(list_itr, struct service_hndl, list); 401 - if (!service->admin) 402 - continue; 403 455 if (service->event_hld(accel_dev, ADF_EVENT_RESTARTED)) 404 456 dev_err(&GET_DEV(accel_dev), 405 457 "Failed to restart service %s.\n",
+3 -4
drivers/crypto/qat/qat_common/adf_transport.c
··· 285 285 goto err; 286 286 287 287 /* Enable HW arbitration for the given ring */ 288 - accel_dev->hw_device->hw_arb_ring_enable(ring); 288 + adf_update_ring_arb(ring); 289 289 290 290 if (adf_ring_debugfs_add(ring, ring_name)) { 291 291 dev_err(&GET_DEV(accel_dev), ··· 302 302 err: 303 303 adf_cleanup_ring(ring); 304 304 adf_unreserve_ring(bank, ring_num); 305 - accel_dev->hw_device->hw_arb_ring_disable(ring); 305 + adf_update_ring_arb(ring); 306 306 return ret; 307 307 } 308 308 309 309 void adf_remove_ring(struct adf_etr_ring_data *ring) 310 310 { 311 311 struct adf_etr_bank_data *bank = ring->bank; 312 - struct adf_accel_dev *accel_dev = bank->accel_dev; 313 312 314 313 /* Disable interrupts for the given ring */ 315 314 adf_disable_ring_irq(bank, ring->ring_number); ··· 321 322 adf_ring_debugfs_rm(ring); 322 323 adf_unreserve_ring(bank, ring->ring_number); 323 324 /* Disable HW arbitration for the given ring */ 324 - accel_dev->hw_device->hw_arb_ring_disable(ring); 325 + adf_update_ring_arb(ring); 325 326 adf_cleanup_ring(ring); 326 327 } 327 328
+2 -1
drivers/crypto/qat/qat_common/qat_crypto.c
··· 152 152 153 153 INIT_LIST_HEAD(&accel_dev->crypto_list); 154 154 strlcpy(key, ADF_NUM_CY, sizeof(key)); 155 - 156 155 if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) 157 156 return -EFAULT; 158 157 ··· 180 181 181 182 if (kstrtoul(val, 10, &num_msg_sym)) 182 183 goto err; 184 + 183 185 num_msg_sym = num_msg_sym >> 1; 186 + 184 187 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_SIZE, i); 185 188 if (adf_cfg_get_param_value(accel_dev, SEC, key, val)) 186 189 goto err;
+1 -4
drivers/crypto/qat/qat_dh895xcc/Makefile
··· 2 2 obj-$(CONFIG_CRYPTO_DEV_QAT_DH895xCC) += qat_dh895xcc.o 3 3 qat_dh895xcc-objs := adf_drv.o \ 4 4 adf_isr.o \ 5 - adf_dh895xcc_hw_data.o \ 6 - adf_hw_arbiter.o \ 7 - qat_admin.o \ 8 - adf_admin.o 5 + adf_dh895xcc_hw_data.o
+48 -8
drivers/crypto/qat/qat_dh895xcc/adf_admin.c drivers/crypto/qat/qat_common/adf_admin.c
··· 50 50 #include <linux/delay.h> 51 51 #include <linux/pci.h> 52 52 #include <linux/dma-mapping.h> 53 - #include <adf_accel_devices.h> 54 - #include "adf_drv.h" 55 - #include "adf_dh895xcc_hw_data.h" 53 + #include "adf_accel_devices.h" 54 + #include "icp_qat_fw_init_admin.h" 56 55 56 + /* Admin Messages Registers */ 57 + #define ADF_DH895XCC_ADMINMSGUR_OFFSET (0x3A000 + 0x574) 58 + #define ADF_DH895XCC_ADMINMSGLR_OFFSET (0x3A000 + 0x578) 59 + #define ADF_DH895XCC_MAILBOX_BASE_OFFSET 0x20970 60 + #define ADF_DH895XCC_MAILBOX_STRIDE 0x1000 57 61 #define ADF_ADMINMSG_LEN 32 58 62 59 63 struct adf_admin_comms { ··· 67 63 struct mutex lock; /* protects adf_admin_comms struct */ 68 64 }; 69 65 70 - int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, 71 - uint32_t ae, void *in, void *out) 66 + static int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, u32 ae, 67 + void *in, void *out) 72 68 { 73 69 struct adf_admin_comms *admin = accel_dev->admin; 74 70 int offset = ae * ADF_ADMINMSG_LEN * 2; ··· 104 100 return received ? 0 : -EFAULT; 105 101 } 106 102 103 + static int adf_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd) 104 + { 105 + struct adf_hw_device_data *hw_device = accel_dev->hw_device; 106 + struct icp_qat_fw_init_admin_req req; 107 + struct icp_qat_fw_init_admin_resp resp; 108 + int i; 109 + 110 + memset(&req, 0, sizeof(struct icp_qat_fw_init_admin_req)); 111 + req.init_admin_cmd_id = cmd; 112 + for (i = 0; i < hw_device->get_num_aes(hw_device); i++) { 113 + memset(&resp, 0, sizeof(struct icp_qat_fw_init_admin_resp)); 114 + if (adf_put_admin_msg_sync(accel_dev, i, &req, &resp) || 115 + resp.init_resp_hdr.status) 116 + return -EFAULT; 117 + } 118 + return 0; 119 + } 120 + 121 + /** 122 + * adf_send_admin_init() - Function sends init message to FW 123 + * @accel_dev: Pointer to acceleration device. 124 + * 125 + * Function sends admin init message to the FW 126 + * 127 + * Return: 0 on success, error code otherwise. 128 + */ 129 + int adf_send_admin_init(struct adf_accel_dev *accel_dev) 130 + { 131 + return adf_send_admin_cmd(accel_dev, ICP_QAT_FW_INIT_ME); 132 + } 133 + EXPORT_SYMBOL_GPL(adf_send_admin_init); 134 + 107 135 int adf_init_admin_comms(struct adf_accel_dev *accel_dev) 108 136 { 109 137 struct adf_admin_comms *admin; 110 - struct adf_bar *pmisc = &GET_BARS(accel_dev)[ADF_DH895XCC_PMISC_BAR]; 138 + struct adf_hw_device_data *hw_data = accel_dev->hw_device; 139 + struct adf_bar *pmisc = 140 + &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; 111 141 void __iomem *csr = pmisc->virt_addr; 112 142 void __iomem *mailbox = csr + ADF_DH895XCC_MAILBOX_BASE_OFFSET; 113 - uint64_t reg_val; 143 + u64 reg_val; 114 144 115 145 admin = kzalloc_node(sizeof(*accel_dev->admin), GFP_KERNEL, 116 146 dev_to_node(&GET_DEV(accel_dev))); ··· 157 119 kfree(admin); 158 120 return -ENOMEM; 159 121 } 160 - reg_val = (uint64_t)admin->phy_addr; 122 + reg_val = (u64)admin->phy_addr; 161 123 ADF_CSR_WR(csr, ADF_DH895XCC_ADMINMSGUR_OFFSET, reg_val >> 32); 162 124 ADF_CSR_WR(csr, ADF_DH895XCC_ADMINMSGLR_OFFSET, reg_val); 163 125 mutex_init(&admin->lock); ··· 165 127 accel_dev->admin = admin; 166 128 return 0; 167 129 } 130 + EXPORT_SYMBOL_GPL(adf_init_admin_comms); 168 131 169 132 void adf_exit_admin_comms(struct adf_accel_dev *accel_dev) 170 133 { ··· 182 143 kfree(admin); 183 144 accel_dev->admin = NULL; 184 145 } 146 + EXPORT_SYMBOL_GPL(adf_exit_admin_comms);
+3 -3
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
··· 45 45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 46 46 */ 47 47 #include <adf_accel_devices.h> 48 + #include <adf_common_drv.h> 48 49 #include "adf_dh895xcc_hw_data.h" 49 - #include "adf_common_drv.h" 50 50 #include "adf_drv.h" 51 51 52 52 /* Worker thread to service arbiter mappings based on dev SKUs */ ··· 215 215 hw_data->alloc_irq = adf_isr_resource_alloc; 216 216 hw_data->free_irq = adf_isr_resource_free; 217 217 hw_data->enable_error_correction = adf_enable_error_correction; 218 - hw_data->hw_arb_ring_enable = adf_update_ring_arb_enable; 219 - hw_data->hw_arb_ring_disable = adf_update_ring_arb_enable; 220 218 hw_data->get_accel_mask = get_accel_mask; 221 219 hw_data->get_ae_mask = get_ae_mask; 222 220 hw_data->get_num_accels = get_num_accels; ··· 227 229 hw_data->fw_mmp_name = ADF_DH895XCC_MMP; 228 230 hw_data->init_admin_comms = adf_init_admin_comms; 229 231 hw_data->exit_admin_comms = adf_exit_admin_comms; 232 + hw_data->send_admin_init = adf_send_admin_init; 230 233 hw_data->init_arb = adf_init_arb; 231 234 hw_data->exit_arb = adf_exit_arb; 235 + hw_data->get_arb_mapping = adf_get_arbiter_mapping; 232 236 hw_data->enable_ints = adf_enable_ints; 233 237 } 234 238
-5
drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.h
··· 80 80 #define ADF_DH895XCC_CERRSSMSH(i) (i * 0x4000 + 0x10) 81 81 #define ADF_DH895XCC_ERRSSMSH_EN BIT(3) 82 82 83 - /* Admin Messages Registers */ 84 - #define ADF_DH895XCC_ADMINMSGUR_OFFSET (0x3A000 + 0x574) 85 - #define ADF_DH895XCC_ADMINMSGLR_OFFSET (0x3A000 + 0x578) 86 - #define ADF_DH895XCC_MAILBOX_BASE_OFFSET 0x20970 87 - #define ADF_DH895XCC_MAILBOX_STRIDE 0x1000 88 83 /* FW names */ 89 84 #define ADF_DH895XCC_FW "qat_895xcc.bin" 90 85 #define ADF_DH895XCC_MMP "qat_mmp.bin"
-3
drivers/crypto/qat/qat_dh895xcc/adf_drv.c
··· 386 386 static int __init adfdrv_init(void) 387 387 { 388 388 request_module("intel_qat"); 389 - if (qat_admin_register()) 390 - return -EFAULT; 391 389 392 390 if (pci_register_driver(&adf_driver)) { 393 391 pr_err("QAT: Driver initialization failed\n"); ··· 397 399 static void __exit adfdrv_release(void) 398 400 { 399 401 pci_unregister_driver(&adf_driver); 400 - qat_admin_unregister(); 401 402 } 402 403 403 404 module_init(adfdrv_init);
-9
drivers/crypto/qat/qat_dh895xcc/adf_drv.h
··· 53 53 void adf_clean_hw_data_dh895xcc(struct adf_hw_device_data *hw_data); 54 54 int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 55 55 void adf_isr_resource_free(struct adf_accel_dev *accel_dev); 56 - void adf_update_ring_arb_enable(struct adf_etr_ring_data *ring); 57 56 void adf_get_arbiter_mapping(struct adf_accel_dev *accel_dev, 58 57 uint32_t const **arb_map_config); 59 - int adf_init_admin_comms(struct adf_accel_dev *accel_dev); 60 - void adf_exit_admin_comms(struct adf_accel_dev *accel_dev); 61 - int adf_put_admin_msg_sync(struct adf_accel_dev *accel_dev, 62 - uint32_t ae, void *in, void *out); 63 - int qat_admin_register(void); 64 - int qat_admin_unregister(void); 65 - int adf_init_arb(struct adf_accel_dev *accel_dev); 66 - void adf_exit_arb(struct adf_accel_dev *accel_dev); 67 58 #endif
+22 -13
drivers/crypto/qat/qat_dh895xcc/adf_hw_arbiter.c drivers/crypto/qat/qat_common/adf_hw_arbiter.c
··· 44 44 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 45 45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 46 46 */ 47 - #include <adf_accel_devices.h> 48 - #include <adf_transport_internal.h> 49 - #include "adf_drv.h" 47 + #include "adf_accel_devices.h" 48 + #include "adf_transport_internal.h" 50 49 51 50 #define ADF_ARB_NUM 4 52 51 #define ADF_ARB_REQ_RING_NUM 8 ··· 57 58 #define ADF_ARB_RO_EN_OFFSET 0x090 58 59 #define ADF_ARB_WQCFG_OFFSET 0x100 59 60 #define ADF_ARB_WRK_2_SER_MAP_OFFSET 0x180 60 - #define ADF_ARB_WRK_2_SER_MAP 10 61 61 #define ADF_ARB_RINGSRVARBEN_OFFSET 0x19C 62 62 63 63 #define WRITE_CSR_ARB_RINGSRVARBEN(csr_addr, index, value) \ ··· 87 89 88 90 int adf_init_arb(struct adf_accel_dev *accel_dev) 89 91 { 92 + struct adf_hw_device_data *hw_data = accel_dev->hw_device; 90 93 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; 91 - uint32_t arb_cfg = 0x1 << 31 | 0x4 << 4 | 0x1; 92 - uint32_t arb, i; 93 - const uint32_t *thd_2_arb_cfg; 94 + u32 arb_cfg = 0x1 << 31 | 0x4 << 4 | 0x1; 95 + u32 arb, i; 96 + const u32 *thd_2_arb_cfg; 94 97 95 98 /* Service arb configured for 32 bytes responses and 96 99 * ring flow control check enabled. */ ··· 108 109 WRITE_CSR_ARB_RESPORDERING(csr, i, 0xFFFFFFFF); 109 110 110 111 /* Setup worker queue registers */ 111 - for (i = 0; i < ADF_ARB_WRK_2_SER_MAP; i++) 112 + for (i = 0; i < hw_data->num_engines; i++) 112 113 WRITE_CSR_ARB_WQCFG(csr, i, i); 113 114 114 115 /* Map worker threads to service arbiters */ 115 - adf_get_arbiter_mapping(accel_dev, &thd_2_arb_cfg); 116 + hw_data->get_arb_mapping(accel_dev, &thd_2_arb_cfg); 116 117 117 118 if (!thd_2_arb_cfg) 118 119 return -EFAULT; 119 120 120 - for (i = 0; i < ADF_ARB_WRK_2_SER_MAP; i++) 121 + for (i = 0; i < hw_data->num_engines; i++) 121 122 WRITE_CSR_ARB_WRK_2_SER_MAP(csr, i, *(thd_2_arb_cfg + i)); 122 123 123 124 return 0; 124 125 } 126 + EXPORT_SYMBOL_GPL(adf_init_arb); 125 127 126 - void adf_update_ring_arb_enable(struct adf_etr_ring_data *ring) 128 + /** 129 + * adf_update_ring_arb() - update ring arbitration rgister 130 + * @accel_dev: Pointer to ring data. 131 + * 132 + * Function enables or disables rings for/from arbitration. 133 + */ 134 + void adf_update_ring_arb(struct adf_etr_ring_data *ring) 127 135 { 128 136 WRITE_CSR_ARB_RINGSRVARBEN(ring->bank->csr_addr, 129 137 ring->bank->bank_number, 130 138 ring->bank->ring_mask & 0xFF); 131 139 } 140 + EXPORT_SYMBOL_GPL(adf_update_ring_arb); 132 141 133 142 void adf_exit_arb(struct adf_accel_dev *accel_dev) 134 143 { 144 + struct adf_hw_device_data *hw_data = accel_dev->hw_device; 135 145 void __iomem *csr; 136 146 unsigned int i; 137 147 ··· 154 146 WRITE_CSR_ARB_SARCONFIG(csr, i, 0); 155 147 156 148 /* Shutdown work queue */ 157 - for (i = 0; i < ADF_ARB_WRK_2_SER_MAP; i++) 149 + for (i = 0; i < hw_data->num_engines; i++) 158 150 WRITE_CSR_ARB_WQCFG(csr, i, 0); 159 151 160 152 /* Unmap worker threads to service arbiters */ 161 - for (i = 0; i < ADF_ARB_WRK_2_SER_MAP; i++) 153 + for (i = 0; i < hw_data->num_engines; i++) 162 154 WRITE_CSR_ARB_WRK_2_SER_MAP(csr, i, 0); 163 155 164 156 /* Disable arbitration on all rings */ 165 157 for (i = 0; i < GET_MAX_BANKS(accel_dev); i++) 166 158 WRITE_CSR_ARB_RINGSRVARBEN(csr, i, 0); 167 159 } 160 + EXPORT_SYMBOL_GPL(adf_exit_arb);
-107
drivers/crypto/qat/qat_dh895xcc/qat_admin.c
··· 1 - /* 2 - This file is provided under a dual BSD/GPLv2 license. When using or 3 - redistributing this file, you may do so under either license. 4 - 5 - GPL LICENSE SUMMARY 6 - Copyright(c) 2014 Intel Corporation. 7 - This program is free software; you can redistribute it and/or modify 8 - it under the terms of version 2 of the GNU General Public License as 9 - published by the Free Software Foundation. 10 - 11 - This program is distributed in the hope that it will be useful, but 12 - WITHOUT ANY WARRANTY; without even the implied warranty of 13 - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 - General Public License for more details. 15 - 16 - Contact Information: 17 - qat-linux@intel.com 18 - 19 - BSD LICENSE 20 - Copyright(c) 2014 Intel Corporation. 21 - Redistribution and use in source and binary forms, with or without 22 - modification, are permitted provided that the following conditions 23 - are met: 24 - 25 - * Redistributions of source code must retain the above copyright 26 - notice, this list of conditions and the following disclaimer. 27 - * Redistributions in binary form must reproduce the above copyright 28 - notice, this list of conditions and the following disclaimer in 29 - the documentation and/or other materials provided with the 30 - distribution. 31 - * Neither the name of Intel Corporation nor the names of its 32 - contributors may be used to endorse or promote products derived 33 - from this software without specific prior written permission. 34 - 35 - THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 36 - "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 37 - LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 38 - A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 39 - OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 40 - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 41 - LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 42 - DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 43 - THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 44 - (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 45 - OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 46 - */ 47 - #include <icp_qat_fw_init_admin.h> 48 - #include <adf_accel_devices.h> 49 - #include <adf_common_drv.h> 50 - #include "adf_drv.h" 51 - 52 - static struct service_hndl qat_admin; 53 - 54 - static int qat_send_admin_cmd(struct adf_accel_dev *accel_dev, int cmd) 55 - { 56 - struct adf_hw_device_data *hw_device = accel_dev->hw_device; 57 - struct icp_qat_fw_init_admin_req req; 58 - struct icp_qat_fw_init_admin_resp resp; 59 - int i; 60 - 61 - memset(&req, 0, sizeof(struct icp_qat_fw_init_admin_req)); 62 - req.init_admin_cmd_id = cmd; 63 - for (i = 0; i < hw_device->get_num_aes(hw_device); i++) { 64 - memset(&resp, 0, sizeof(struct icp_qat_fw_init_admin_resp)); 65 - if (adf_put_admin_msg_sync(accel_dev, i, &req, &resp) || 66 - resp.init_resp_hdr.status) 67 - return -EFAULT; 68 - } 69 - return 0; 70 - } 71 - 72 - static int qat_admin_start(struct adf_accel_dev *accel_dev) 73 - { 74 - return qat_send_admin_cmd(accel_dev, ICP_QAT_FW_INIT_ME); 75 - } 76 - 77 - static int qat_admin_event_handler(struct adf_accel_dev *accel_dev, 78 - enum adf_event event) 79 - { 80 - int ret; 81 - 82 - switch (event) { 83 - case ADF_EVENT_START: 84 - ret = qat_admin_start(accel_dev); 85 - break; 86 - case ADF_EVENT_STOP: 87 - case ADF_EVENT_INIT: 88 - case ADF_EVENT_SHUTDOWN: 89 - default: 90 - ret = 0; 91 - } 92 - return ret; 93 - } 94 - 95 - int qat_admin_register(void) 96 - { 97 - memset(&qat_admin, 0, sizeof(struct service_hndl)); 98 - qat_admin.event_hld = qat_admin_event_handler; 99 - qat_admin.name = "qat_admin"; 100 - qat_admin.admin = 1; 101 - return adf_service_register(&qat_admin); 102 - } 103 - 104 - int qat_admin_unregister(void) 105 - { 106 - return adf_service_unregister(&qat_admin); 107 - }